LXR linux/include/linux/mmc/host.h

   1/*
   2 *  linux/include/linux/mmc/host.h
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 *
   8 *  Host driver specific definitions.
   9 */
  10#ifndef LINUX_MMC_HOST_H
  11#define LINUX_MMC_HOST_H
  12
  13#include <linux/leds.h>
  14#include <linux/mutex.h>
  15#include <linux/sched.h>
  16#include <linux/device.h>
  17#include <linux/fault-inject.h>
  18
  19#include <linux/mmc/core.h>
  20#include <linux/mmc/card.h>
  21#include <linux/mmc/pm.h>
  22
  23struct mmc_ios {
  24        unsigned int    clock;                  /* clock rate */
  25        unsigned short  vdd;
  26
  27/* vdd stores the bit number of the selected voltage range from below. */
  28
  29        unsigned char   bus_mode;               /* command output mode */
  30
  31#define MMC_BUSMODE_OPENDRAIN   1
  32#define MMC_BUSMODE_PUSHPULL    2
  33
  34        unsigned char   chip_select;            /* SPI chip select */
  35
  36#define MMC_CS_DONTCARE         0
  37#define MMC_CS_HIGH             1
  38#define MMC_CS_LOW              2
  39
  40        unsigned char   power_mode;             /* power supply mode */
  41
  42#define MMC_POWER_OFF           0
  43#define MMC_POWER_UP            1
  44#define MMC_POWER_ON            2
  45#define MMC_POWER_UNDEFINED     3
  46
  47        unsigned char   bus_width;              /* data bus width */
  48
  49#define MMC_BUS_WIDTH_1         0
  50#define MMC_BUS_WIDTH_4         2
  51#define MMC_BUS_WIDTH_8         3
  52
  53        unsigned char   timing;                 /* timing specification used */
  54
  55#define MMC_TIMING_LEGACY       0
  56#define MMC_TIMING_MMC_HS       1
  57#define MMC_TIMING_SD_HS        2
  58#define MMC_TIMING_UHS_SDR12    3
  59#define MMC_TIMING_UHS_SDR25    4
  60#define MMC_TIMING_UHS_SDR50    5
  61#define MMC_TIMING_UHS_SDR104   6
  62#define MMC_TIMING_UHS_DDR50    7
  63#define MMC_TIMING_MMC_DDR52    8
  64#define MMC_TIMING_MMC_HS200    9
  65#define MMC_TIMING_MMC_HS400    10
  66
  67        unsigned char   signal_voltage;         /* signalling voltage (1.8V or 3.3V) */
  68
  69#define MMC_SIGNAL_VOLTAGE_330  0
  70#define MMC_SIGNAL_VOLTAGE_180  1
  71#define MMC_SIGNAL_VOLTAGE_120  2
  72
  73        unsigned char   drv_type;               /* driver type (A, B, C, D) */
  74
  75#define MMC_SET_DRIVER_TYPE_B   0
  76#define MMC_SET_DRIVER_TYPE_A   1
  77#define MMC_SET_DRIVER_TYPE_C   2
  78#define MMC_SET_DRIVER_TYPE_D   3
  79};
  80
  81struct mmc_host_ops {
  82        /*
  83         * It is optional for the host to implement pre_req and post_req in
  84         * order to support double buffering of requests (prepare one
  85         * request while another request is active).
  86         * pre_req() must always be followed by a post_req().
  87         * To undo a call made to pre_req(), call post_req() with
  88         * a nonzero err condition.
  89         */
  90        void    (*post_req)(struct mmc_host *host, struct mmc_request *req,
  91                            int err);
  92        void    (*pre_req)(struct mmc_host *host, struct mmc_request *req,
  93                           bool is_first_req);
  94        void    (*request)(struct mmc_host *host, struct mmc_request *req);
  95        /*
  96         * Avoid calling these three functions too often or in a "fast path",
  97         * since underlaying controller might implement them in an expensive
  98         * and/or slow way.
  99         *
 100         * Also note that these functions might sleep, so don't call them
 101         * in the atomic contexts!
 102         *
 103         * Return values for the get_ro callback should be:
 104         *   0 for a read/write card
 105         *   1 for a read-only card
 106         *   -ENOSYS when not supported (equal to NULL callback)
 107         *   or a negative errno value when something bad happened
 108         *
 109         * Return values for the get_cd callback should be:
 110         *   0 for a absent card
 111         *   1 for a present card
 112         *   -ENOSYS when not supported (equal to NULL callback)
 113         *   or a negative errno value when something bad happened
 114         */
 115        void    (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
 116        int     (*get_ro)(struct mmc_host *host);
 117        int     (*get_cd)(struct mmc_host *host);
 118
 119        void    (*enable_sdio_irq)(struct mmc_host *host, int enable);
 120
 121        /* optional callback for HC quirks */
 122        void    (*init_card)(struct mmc_host *host, struct mmc_card *card);
 123
 124        int     (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
 125
 126        /* Check if the card is pulling dat[0:3] low */
 127        int     (*card_busy)(struct mmc_host *host);
 128
 129        /* The tuning command opcode value is different for SD and eMMC cards */
 130        int     (*execute_tuning)(struct mmc_host *host, u32 opcode);
 131
 132        /* Prepare HS400 target operating frequency depending host driver */
 133        int     (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
 134        int     (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
 135        void    (*hw_reset)(struct mmc_host *host);
 136        void    (*card_event)(struct mmc_host *host);
 137
 138        /*
 139         * Optional callback to support controllers with HW issues for multiple
 140         * I/O. Returns the number of supported blocks for the request.
 141         */
 142        int     (*multi_io_quirk)(struct mmc_card *card,
 143                                  unsigned int direction, int blk_size);
 144};
 145
 146struct mmc_card;
 147struct device;
 148
 149struct mmc_async_req {
 150        /* active mmc request */
 151        struct mmc_request      *mrq;
 152        /*
 153         * Check error status of completed mmc request.
 154         * Returns 0 if success otherwise non zero.
 155         */
 156        int (*err_check) (struct mmc_card *, struct mmc_async_req *);
 157};
 158
 159/**
 160 * struct mmc_slot - MMC slot functions
 161 *
 162 * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
 163 * @handler_priv:       MMC/SD-card slot context
 164 *
 165 * Some MMC/SD host controllers implement slot-functions like card and
 166 * write-protect detection natively. However, a large number of controllers
 167 * leave these functions to the CPU. This struct provides a hook to attach
 168 * such slot-function drivers.
 169 */
 170struct mmc_slot {
 171        int cd_irq;
 172        void *handler_priv;
 173};
 174
 175/**
 176 * mmc_context_info - synchronization details for mmc context
 177 * @is_done_rcv         wake up reason was done request
 178 * @is_new_req          wake up reason was new request
 179 * @is_waiting_last_req mmc context waiting for single running request
 180 * @wait                wait queue
 181 * @lock                lock to protect data fields
 182 */
 183struct mmc_context_info {
 184        bool                    is_done_rcv;
 185        bool                    is_new_req;
 186        bool                    is_waiting_last_req;
 187        wait_queue_head_t       wait;
 188        spinlock_t              lock;
 189};
 190
 191struct regulator;
 192struct mmc_pwrseq;
 193
 194struct mmc_supply {
 195        struct regulator *vmmc;         /* Card power supply */
 196        struct regulator *vqmmc;        /* Optional Vccq supply */
 197};
 198
 199struct mmc_host {
 200        struct device           *parent;
 201        struct device           class_dev;
 202        int                     index;
 203        const struct mmc_host_ops *ops;
 204        struct mmc_pwrseq       *pwrseq;
 205        unsigned int            f_min;
 206        unsigned int            f_max;
 207        unsigned int            f_init;
 208        u32                     ocr_avail;
 209        u32                     ocr_avail_sdio; /* SDIO-specific OCR */
 210        u32                     ocr_avail_sd;   /* SD-specific OCR */
 211        u32                     ocr_avail_mmc;  /* MMC-specific OCR */
 212        struct notifier_block   pm_notify;
 213        u32                     max_current_330;
 214        u32                     max_current_300;
 215        u32                     max_current_180;
 216
 217#define MMC_VDD_165_195         0x00000080      /* VDD voltage 1.65 - 1.95 */
 218#define MMC_VDD_20_21           0x00000100      /* VDD voltage 2.0 ~ 2.1 */
 219#define MMC_VDD_21_22           0x00000200      /* VDD voltage 2.1 ~ 2.2 */
 220#define MMC_VDD_22_23           0x00000400      /* VDD voltage 2.2 ~ 2.3 */
 221#define MMC_VDD_23_24           0x00000800      /* VDD voltage 2.3 ~ 2.4 */
 222#define MMC_VDD_24_25           0x00001000      /* VDD voltage 2.4 ~ 2.5 */
 223#define MMC_VDD_25_26           0x00002000      /* VDD voltage 2.5 ~ 2.6 */
 224#define MMC_VDD_26_27           0x00004000      /* VDD voltage 2.6 ~ 2.7 */
 225#define MMC_VDD_27_28           0x00008000      /* VDD voltage 2.7 ~ 2.8 */
 226#define MMC_VDD_28_29           0x00010000      /* VDD voltage 2.8 ~ 2.9 */
 227#define MMC_VDD_29_30           0x00020000      /* VDD voltage 2.9 ~ 3.0 */
 228#define MMC_VDD_30_31           0x00040000      /* VDD voltage 3.0 ~ 3.1 */
 229#define MMC_VDD_31_32           0x00080000      /* VDD voltage 3.1 ~ 3.2 */
 230#define MMC_VDD_32_33           0x00100000      /* VDD voltage 3.2 ~ 3.3 */
 231#define MMC_VDD_33_34           0x00200000      /* VDD voltage 3.3 ~ 3.4 */
 232#define MMC_VDD_34_35           0x00400000      /* VDD voltage 3.4 ~ 3.5 */
 233#define MMC_VDD_35_36           0x00800000      /* VDD voltage 3.5 ~ 3.6 */
 234
 235        u32                     caps;           /* Host capabilities */
 236
 237#define MMC_CAP_4_BIT_DATA      (1 << 0)        /* Can the host do 4 bit transfers */
 238#define MMC_CAP_MMC_HIGHSPEED   (1 << 1)        /* Can do MMC high-speed timing */
 239#define MMC_CAP_SD_HIGHSPEED    (1 << 2)        /* Can do SD high-speed timing */
 240#define MMC_CAP_SDIO_IRQ        (1 << 3)        /* Can signal pending SDIO IRQs */
 241#define MMC_CAP_SPI             (1 << 4)        /* Talks only SPI protocols */
 242#define MMC_CAP_NEEDS_POLL      (1 << 5)        /* Needs polling for card-detection */
 243#define MMC_CAP_8_BIT_DATA      (1 << 6)        /* Can the host do 8 bit transfers */
 244#define MMC_CAP_AGGRESSIVE_PM   (1 << 7)        /* Suspend (e)MMC/SD at idle  */
 245#define MMC_CAP_NONREMOVABLE    (1 << 8)        /* Nonremovable e.g. eMMC */
 246#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9)        /* Waits while card is busy */
 247#define MMC_CAP_ERASE           (1 << 10)       /* Allow erase/trim commands */
 248#define MMC_CAP_1_8V_DDR        (1 << 11)       /* can support */
 249                                                /* DDR mode at 1.8V */
 250#define MMC_CAP_1_2V_DDR        (1 << 12)       /* can support */
 251                                                /* DDR mode at 1.2V */
 252#define MMC_CAP_POWER_OFF_CARD  (1 << 13)       /* Can power off after boot */
 253#define MMC_CAP_BUS_WIDTH_TEST  (1 << 14)       /* CMD14/CMD19 bus width ok */
 254#define MMC_CAP_UHS_SDR12       (1 << 15)       /* Host supports UHS SDR12 mode */
 255#define MMC_CAP_UHS_SDR25       (1 << 16)       /* Host supports UHS SDR25 mode */
 256#define MMC_CAP_UHS_SDR50       (1 << 17)       /* Host supports UHS SDR50 mode */
 257#define MMC_CAP_UHS_SDR104      (1 << 18)       /* Host supports UHS SDR104 mode */
 258#define MMC_CAP_UHS_DDR50       (1 << 19)       /* Host supports UHS DDR50 mode */
 259#define MMC_CAP_RUNTIME_RESUME  (1 << 20)       /* Resume at runtime_resume. */
 260#define MMC_CAP_DRIVER_TYPE_A   (1 << 23)       /* Host supports Driver Type A */
 261#define MMC_CAP_DRIVER_TYPE_C   (1 << 24)       /* Host supports Driver Type C */
 262#define MMC_CAP_DRIVER_TYPE_D   (1 << 25)       /* Host supports Driver Type D */
 263#define MMC_CAP_CMD23           (1 << 30)       /* CMD23 supported. */
 264#define MMC_CAP_HW_RESET        (1 << 31)       /* Hardware reset */
 265
 266        u32                     caps2;          /* More host capabilities */
 267
 268#define MMC_CAP2_BOOTPART_NOACC (1 << 0)        /* Boot partition no access */
 269#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2)        /* Can do full power cycle */
 270#define MMC_CAP2_HS200_1_8V_SDR (1 << 5)        /* can support */
 271#define MMC_CAP2_HS200_1_2V_SDR (1 << 6)        /* can support */
 272#define MMC_CAP2_HS200          (MMC_CAP2_HS200_1_8V_SDR | \
 273                                 MMC_CAP2_HS200_1_2V_SDR)
 274#define MMC_CAP2_HC_ERASE_SZ    (1 << 9)        /* High-capacity erase size */
 275#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 276#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
 277#define MMC_CAP2_PACKED_RD      (1 << 12)       /* Allow packed read */
 278#define MMC_CAP2_PACKED_WR      (1 << 13)       /* Allow packed write */
 279#define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
 280                                 MMC_CAP2_PACKED_WR)
 281#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 282#define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 283#define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
 284#define MMC_CAP2_HS400          (MMC_CAP2_HS400_1_8V | \
 285                                 MMC_CAP2_HS400_1_2V)
 286#define MMC_CAP2_HSX00_1_2V     (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
 287#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
 288
 289        mmc_pm_flag_t           pm_caps;        /* supported pm features */
 290
 291#ifdef CONFIG_MMC_CLKGATE
 292        int                     clk_requests;   /* internal reference counter */
 293        unsigned int            clk_delay;      /* number of MCI clk hold cycles */
 294        bool                    clk_gated;      /* clock gated */
 295        struct delayed_work     clk_gate_work; /* delayed clock gate */
 296        unsigned int            clk_old;        /* old clock value cache */
 297        spinlock_t              clk_lock;       /* lock for clk fields */
 298        struct mutex            clk_gate_mutex; /* mutex for clock gating */
 299        struct device_attribute clkgate_delay_attr;
 300        unsigned long           clkgate_delay;
 301#endif
 302
 303        /* host specific block data */
 304        unsigned int            max_seg_size;   /* see blk_queue_max_segment_size */
 305        unsigned short          max_segs;       /* see blk_queue_max_segments */
 306        unsigned short          unused;
 307        unsigned int            max_req_size;   /* maximum number of bytes in one req */
 308        unsigned int            max_blk_size;   /* maximum size of one mmc block */
 309        unsigned int            max_blk_count;  /* maximum number of blocks in one req */
 310        unsigned int            max_busy_timeout; /* max busy timeout in ms */
 311
 312        /* private data */
 313        spinlock_t              lock;           /* lock for claim and bus ops */
 314
 315        struct mmc_ios          ios;            /* current io bus settings */
 316
 317        /* group bitfields together to minimize padding */
 318        unsigned int            use_spi_crc:1;
 319        unsigned int            claimed:1;      /* host exclusively claimed */
 320        unsigned int            bus_dead:1;     /* bus has been released */
 321#ifdef CONFIG_MMC_DEBUG
 322        unsigned int            removed:1;      /* host is being removed */
 323#endif
 324
 325        int                     rescan_disable; /* disable card detection */
 326        int                     rescan_entered; /* used with nonremovable devices */
 327
 328        bool                    trigger_card_event; /* card_event necessary */
 329
 330        struct mmc_card         *card;          /* device attached to this host */
 331
 332        wait_queue_head_t       wq;
 333        struct task_struct      *claimer;       /* task that has host claimed */
 334        int                     claim_cnt;      /* "claim" nesting count */
 335
 336        struct delayed_work     detect;
 337        int                     detect_change;  /* card detect flag */
 338        struct mmc_slot         slot;
 339
 340        const struct mmc_bus_ops *bus_ops;      /* current bus driver */
 341        unsigned int            bus_refs;       /* reference counter */
 342
 343        unsigned int            sdio_irqs;
 344        struct task_struct      *sdio_irq_thread;
 345        bool                    sdio_irq_pending;
 346        atomic_t                sdio_irq_thread_abort;
 347
 348        mmc_pm_flag_t           pm_flags;       /* requested pm features */
 349
 350        struct led_trigger      *led;           /* activity led */
 351
 352#ifdef CONFIG_REGULATOR
 353        bool                    regulator_enabled; /* regulator state */
 354#endif
 355        struct mmc_supply       supply;
 356
 357        struct dentry           *debugfs_root;
 358
 359        struct mmc_async_req    *areq;          /* active async req */
 360        struct mmc_context_info context_info;   /* async synchronization info */
 361
 362#ifdef CONFIG_FAIL_MMC_REQUEST
 363        struct fault_attr       fail_mmc_request;
 364#endif
 365
 366        unsigned int            actual_clock;   /* Actual HC clock rate */
 367
 368        unsigned int            slotno; /* used for sdio acpi binding */
 369
 370        int                     dsr_req;        /* DSR value is valid */
 371        u32                     dsr;    /* optional driver stage (DSR) value */
 372
 373        unsigned long           private[0] ____cacheline_aligned;
 374};
 375
 376struct mmc_host *mmc_alloc_host(int extra, struct device *);
 377int mmc_add_host(struct mmc_host *);
 378void mmc_remove_host(struct mmc_host *);
 379void mmc_free_host(struct mmc_host *);
 380int mmc_of_parse(struct mmc_host *host);
 381
 382static inline void *mmc_priv(struct mmc_host *host)
 383{
 384        return (void *)host->private;
 385}
 386
 387#define mmc_host_is_spi(host)   ((host)->caps & MMC_CAP_SPI)
 388
 389#define mmc_dev(x)      ((x)->parent)
 390#define mmc_classdev(x) (&(x)->class_dev)
 391#define mmc_hostname(x) (dev_name(&(x)->class_dev))
 392
 393int mmc_power_save_host(struct mmc_host *host);
 394int mmc_power_restore_host(struct mmc_host *host);
 395
 396void mmc_detect_change(struct mmc_host *, unsigned long delay);
 397void mmc_request_done(struct mmc_host *, struct mmc_request *);
 398
 399static inline void mmc_signal_sdio_irq(struct mmc_host *host)
 400{
 401        host->ops->enable_sdio_irq(host, 0);
 402        host->sdio_irq_pending = true;
 403        wake_up_process(host->sdio_irq_thread);
 404}
 405
 406void sdio_run_irqs(struct mmc_host *host);
 407
 408#ifdef CONFIG_REGULATOR
 409int mmc_regulator_get_ocrmask(struct regulator *supply);
 410int mmc_regulator_set_ocr(struct mmc_host *mmc,
 411                        struct regulator *supply,
 412                        unsigned short vdd_bit);
 413#else
 414static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
 415{
 416        return 0;
 417}
 418
 419static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
 420                                 struct regulator *supply,
 421                                 unsigned short vdd_bit)
 422{
 423        return 0;
 424}
 425#endif
 426
 427int mmc_regulator_get_supply(struct mmc_host *mmc);
 428
 429int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
 430
 431static inline int mmc_card_is_removable(struct mmc_host *host)
 432{
 433        return !(host->caps & MMC_CAP_NONREMOVABLE);
 434}
 435
 436static inline int mmc_card_keep_power(struct mmc_host *host)
 437{
 438        return host->pm_flags & MMC_PM_KEEP_POWER;
 439}
 440
 441static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
 442{
 443        return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
 444}
 445
 446static inline int mmc_host_cmd23(struct mmc_host *host)
 447{
 448        return host->caps & MMC_CAP_CMD23;
 449}
 450
 451static inline int mmc_boot_partition_access(struct mmc_host *host)
 452{
 453        return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
 454}
 455
 456static inline int mmc_host_uhs(struct mmc_host *host)
 457{
 458        return host->caps &
 459                (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
 460                 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
 461                 MMC_CAP_UHS_DDR50);
 462}
 463
 464static inline int mmc_host_packed_wr(struct mmc_host *host)
 465{
 466        return host->caps2 & MMC_CAP2_PACKED_WR;
 467}
 468
 469#ifdef CONFIG_MMC_CLKGATE
 470void mmc_host_clk_hold(struct mmc_host *host);
 471void mmc_host_clk_release(struct mmc_host *host);
 472unsigned int mmc_host_clk_rate(struct mmc_host *host);
 473
 474#else
 475static inline void mmc_host_clk_hold(struct mmc_host *host)
 476{
 477}
 478
 479static inline void mmc_host_clk_release(struct mmc_host *host)
 480{
 481}
 482
 483static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
 484{
 485        return host->ios.clock;
 486}
 487#endif
 488
 489static inline int mmc_card_hs(struct mmc_card *card)
 490{
 491        return card->host->ios.timing == MMC_TIMING_SD_HS ||
 492                card->host->ios.timing == MMC_TIMING_MMC_HS;
 493}
 494
 495static inline int mmc_card_uhs(struct mmc_card *card)
 496{
 497        return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
 498                card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
 499}
 500
 501static inline bool mmc_card_hs200(struct mmc_card *card)
 502{
 503        return card->host->ios.timing == MMC_TIMING_MMC_HS200;
 504}
 505
 506static inline bool mmc_card_ddr52(struct mmc_card *card)
 507{
 508        return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
 509}
 510
 511static inline bool mmc_card_hs400(struct mmc_card *card)
 512{
 513        return card->host->ios.timing == MMC_TIMING_MMC_HS400;
 514}
 515
 516#endif /* LINUX_MMC_HOST_H */
 517