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21#ifndef _ADV7604_
22#define _ADV7604_
23
24#include <linux/types.h>
25
26
27enum adv7604_ain_sel {
28 ADV7604_AIN1_2_3_NC_SYNC_1_2 = 0,
29 ADV7604_AIN4_5_6_NC_SYNC_2_1 = 1,
30 ADV7604_AIN7_8_9_NC_SYNC_3_1 = 2,
31 ADV7604_AIN10_11_12_NC_SYNC_4_1 = 3,
32 ADV7604_AIN9_4_5_6_SYNC_2_1 = 4,
33};
34
35
36
37
38
39
40enum adv7604_bus_order {
41 ADV7604_BUS_ORDER_RGB,
42 ADV7604_BUS_ORDER_GRB,
43 ADV7604_BUS_ORDER_RBG,
44 ADV7604_BUS_ORDER_BGR,
45 ADV7604_BUS_ORDER_BRG,
46 ADV7604_BUS_ORDER_GBR,
47};
48
49
50enum adv76xx_inp_color_space {
51 ADV76XX_INP_COLOR_SPACE_LIM_RGB = 0,
52 ADV76XX_INP_COLOR_SPACE_FULL_RGB = 1,
53 ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
54 ADV76XX_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
55 ADV76XX_INP_COLOR_SPACE_XVYCC_601 = 4,
56 ADV76XX_INP_COLOR_SPACE_XVYCC_709 = 5,
57 ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
58 ADV76XX_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
59 ADV76XX_INP_COLOR_SPACE_AUTO = 0xf,
60};
61
62
63enum adv7604_op_format_mode_sel {
64 ADV7604_OP_FORMAT_MODE0 = 0x00,
65 ADV7604_OP_FORMAT_MODE1 = 0x04,
66 ADV7604_OP_FORMAT_MODE2 = 0x08,
67};
68
69enum adv76xx_drive_strength {
70 ADV76XX_DR_STR_MEDIUM_LOW = 1,
71 ADV76XX_DR_STR_MEDIUM_HIGH = 2,
72 ADV76XX_DR_STR_HIGH = 3,
73};
74
75
76enum adv76xx_int1_config {
77 ADV76XX_INT1_CONFIG_OPEN_DRAIN,
78 ADV76XX_INT1_CONFIG_ACTIVE_LOW,
79 ADV76XX_INT1_CONFIG_ACTIVE_HIGH,
80 ADV76XX_INT1_CONFIG_DISABLED,
81};
82
83enum adv76xx_page {
84 ADV76XX_PAGE_IO,
85 ADV7604_PAGE_AVLINK,
86 ADV76XX_PAGE_CEC,
87 ADV76XX_PAGE_INFOFRAME,
88 ADV7604_PAGE_ESDP,
89 ADV7604_PAGE_DPP,
90 ADV76XX_PAGE_AFE,
91 ADV76XX_PAGE_REP,
92 ADV76XX_PAGE_EDID,
93 ADV76XX_PAGE_HDMI,
94 ADV76XX_PAGE_TEST,
95 ADV76XX_PAGE_CP,
96 ADV7604_PAGE_VDP,
97 ADV76XX_PAGE_MAX,
98};
99
100
101struct adv76xx_platform_data {
102
103 unsigned disable_pwrdnb:1;
104
105
106 unsigned disable_cable_det_rst:1;
107
108 int default_input;
109
110
111 enum adv7604_ain_sel ain_sel;
112
113
114 enum adv7604_bus_order bus_order;
115
116
117 enum adv7604_op_format_mode_sel op_format_mode_sel;
118
119
120 enum adv76xx_int1_config int1_config;
121
122
123 unsigned alt_gamma:1;
124 unsigned op_656_range:1;
125 unsigned alt_data_sat:1;
126
127
128 unsigned blank_data:1;
129 unsigned insert_av_codes:1;
130 unsigned replicate_av_codes:1;
131
132
133 unsigned inv_vs_pol:1;
134 unsigned inv_hs_pol:1;
135 unsigned inv_llc_pol:1;
136
137
138 enum adv76xx_drive_strength dr_str_data;
139 enum adv76xx_drive_strength dr_str_clk;
140 enum adv76xx_drive_strength dr_str_sync;
141
142
143 unsigned output_bus_lsb_to_msb:1;
144
145
146 unsigned hdmi_free_run_mode;
147
148
149 u8 i2c_addresses[ADV76XX_PAGE_MAX];
150};
151
152enum adv76xx_pad {
153 ADV76XX_PAD_HDMI_PORT_A = 0,
154 ADV7604_PAD_HDMI_PORT_B = 1,
155 ADV7604_PAD_HDMI_PORT_C = 2,
156 ADV7604_PAD_HDMI_PORT_D = 3,
157 ADV7604_PAD_VGA_RGB = 4,
158 ADV7604_PAD_VGA_COMP = 5,
159
160 ADV7604_PAD_SOURCE = 6,
161 ADV7611_PAD_SOURCE = 1,
162 ADV76XX_PAD_MAX = 7,
163};
164
165#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
166#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001)
167#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
168
169
170#define ADV76XX_HOTPLUG 1
171#define ADV76XX_FMT_CHANGE 2
172
173#endif
174