1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/init.h>
27#include <linux/delay.h>
28#include <linux/pm.h>
29#include <linux/i2c.h>
30#include <linux/interrupt.h>
31#include <linux/gpio.h>
32#include <linux/regulator/consumer.h>
33#include <linux/slab.h>
34#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
38#include <sound/initval.h>
39#include <sound/tlv.h>
40
41#include <sound/tlv320dac33-plat.h>
42#include "tlv320dac33.h"
43
44
45
46
47
48
49
50#define DAC33_FIFO_SIZE_16BIT 6144
51#define DAC33_FIFO_SIZE_24BIT 4096
52#define DAC33_MODE7_MARGIN 10
53
54#define BURST_BASEFREQ_HZ 49152000
55
56#define SAMPLES_TO_US(rate, samples) \
57 (1000000000 / (((rate) * 1000) / (samples)))
58
59#define US_TO_SAMPLES(rate, us) \
60 ((rate) / (1000000 / ((us) < 1000000 ? (us) : 1000000)))
61
62#define UTHR_FROM_PERIOD_SIZE(samples, playrate, burstrate) \
63 (((samples)*5000) / (((burstrate)*5000) / ((burstrate) - (playrate))))
64
65static void dac33_calculate_times(struct snd_pcm_substream *substream,
66 struct snd_soc_codec *codec);
67static int dac33_prepare_chip(struct snd_pcm_substream *substream,
68 struct snd_soc_codec *codec);
69
70enum dac33_state {
71 DAC33_IDLE = 0,
72 DAC33_PREFILL,
73 DAC33_PLAYBACK,
74 DAC33_FLUSH,
75};
76
77enum dac33_fifo_modes {
78 DAC33_FIFO_BYPASS = 0,
79 DAC33_FIFO_MODE1,
80 DAC33_FIFO_MODE7,
81 DAC33_FIFO_LAST_MODE,
82};
83
84#define DAC33_NUM_SUPPLIES 3
85static const char *dac33_supply_names[DAC33_NUM_SUPPLIES] = {
86 "AVDD",
87 "DVDD",
88 "IOVDD",
89};
90
91struct tlv320dac33_priv {
92 struct mutex mutex;
93 struct workqueue_struct *dac33_wq;
94 struct work_struct work;
95 struct snd_soc_codec *codec;
96 struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES];
97 struct snd_pcm_substream *substream;
98 int power_gpio;
99 int chip_power;
100 int irq;
101 unsigned int refclk;
102
103 unsigned int alarm_threshold;
104 enum dac33_fifo_modes fifo_mode;
105 unsigned int fifo_size;
106 unsigned int nsample;
107 int mode1_latency;
108
109 u8 burst_bclkdiv;
110 unsigned int burst_rate;
111
112 int keep_bclk;
113
114 spinlock_t lock;
115 unsigned long long t_stamp1;
116 unsigned long long t_stamp2;
117
118 unsigned int mode1_us_burst;
119
120 unsigned int mode7_us_to_lthr;
121
122 unsigned int uthr;
123
124 enum dac33_state state;
125 void *control_data;
126};
127
128static const u8 dac33_reg[DAC33_CACHEREGNUM] = {
1290x00, 0x00, 0x00, 0x00,
1300x00, 0x00, 0x00, 0x00,
1310x00, 0x00, 0x00, 0x00,
1320x00, 0x00, 0x00, 0x00,
1330x00, 0x00, 0x00, 0x00,
1340x00, 0x00, 0x00, 0x00,
1350x00, 0x00, 0x00, 0x00,
1360x00, 0x00, 0x00, 0x00,
1370x00, 0x00, 0x00, 0x00,
1380x00, 0x00, 0x00, 0x00,
1390x00, 0x00, 0x00, 0x00,
1400x00, 0x00, 0x00, 0x80,
1410x80, 0x00, 0x00, 0x00,
1420x00, 0x00, 0x00, 0x00,
1430x00, 0x00,
144
145 0x00, 0x00,
1460x00, 0x00, 0x00, 0x00,
147
1480x00, 0x00, 0x00, 0x00,
1490x00, 0x80,
150
151 0x80, 0x80,
152
1530x80, 0x00, 0x00,
154
155 0x00,
1560x00, 0x00, 0x00, 0x00,
1570x00, 0x00, 0x00, 0x00,
1580x00, 0x00, 0x00, 0x00,
1590x00, 0x00, 0x00, 0x00,
1600x00, 0x00, 0x00, 0x00,
1610x00, 0x00, 0x00, 0x00,
1620x00, 0x00, 0x00, 0x00,
1630x00, 0x00, 0x00, 0x00,
1640x00, 0x00, 0x00, 0x00,
1650x00, 0x00, 0x00, 0x00,
1660x00, 0x00, 0x00, 0x00,
1670x00, 0x00, 0x00, 0x00,
1680x00,
169
170 0xda, 0x33, 0x03,
171};
172
173
174static inline unsigned int dac33_read_reg_cache(struct snd_soc_codec *codec,
175 unsigned reg)
176{
177 u8 *cache = codec->reg_cache;
178 if (reg >= DAC33_CACHEREGNUM)
179 return 0;
180
181 return cache[reg];
182}
183
184static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
185 u8 reg, u8 value)
186{
187 u8 *cache = codec->reg_cache;
188 if (reg >= DAC33_CACHEREGNUM)
189 return;
190
191 cache[reg] = value;
192}
193
194static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
195 u8 *value)
196{
197 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
198 int val, ret = 0;
199
200 *value = reg & 0xff;
201
202
203 if (dac33->chip_power) {
204 val = i2c_smbus_read_byte_data(codec->control_data, value[0]);
205 if (val < 0) {
206 dev_err(codec->dev, "Read failed (%d)\n", val);
207 value[0] = dac33_read_reg_cache(codec, reg);
208 ret = val;
209 } else {
210 value[0] = val;
211 dac33_write_reg_cache(codec, reg, val);
212 }
213 } else {
214 value[0] = dac33_read_reg_cache(codec, reg);
215 }
216
217 return ret;
218}
219
220static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
221 unsigned int value)
222{
223 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
224 u8 data[2];
225 int ret = 0;
226
227
228
229
230
231
232 data[0] = reg & 0xff;
233 data[1] = value & 0xff;
234
235 dac33_write_reg_cache(codec, data[0], data[1]);
236 if (dac33->chip_power) {
237 ret = codec->hw_write(codec->control_data, data, 2);
238 if (ret != 2)
239 dev_err(codec->dev, "Write failed (%d)\n", ret);
240 else
241 ret = 0;
242 }
243
244 return ret;
245}
246
247static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
248 unsigned int value)
249{
250 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
251 int ret;
252
253 mutex_lock(&dac33->mutex);
254 ret = dac33_write(codec, reg, value);
255 mutex_unlock(&dac33->mutex);
256
257 return ret;
258}
259
260#define DAC33_I2C_ADDR_AUTOINC 0x80
261static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
262 unsigned int value)
263{
264 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
265 u8 data[3];
266 int ret = 0;
267
268
269
270
271
272
273
274 data[0] = reg & 0xff;
275 data[1] = (value >> 8) & 0xff;
276 data[2] = value & 0xff;
277
278 dac33_write_reg_cache(codec, data[0], data[1]);
279 dac33_write_reg_cache(codec, data[0] + 1, data[2]);
280
281 if (dac33->chip_power) {
282
283 data[0] |= DAC33_I2C_ADDR_AUTOINC;
284 ret = codec->hw_write(codec->control_data, data, 3);
285 if (ret != 3)
286 dev_err(codec->dev, "Write failed (%d)\n", ret);
287 else
288 ret = 0;
289 }
290
291 return ret;
292}
293
294static void dac33_init_chip(struct snd_soc_codec *codec)
295{
296 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
297
298 if (unlikely(!dac33->chip_power))
299 return;
300
301
302 dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
303
304 dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
305 DAC33_DACSRCL_LEFT);
306
307 dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
308
309
310
311 dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
312
313
314 dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL,
315 dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL));
316 dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL,
317 dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL));
318
319 dac33_write(codec, DAC33_LINEL_TO_LLO_VOL,
320 dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
321 dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
322 dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
323
324 dac33_write(codec, DAC33_OUT_AMP_CTRL,
325 dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL));
326
327 dac33_write(codec, DAC33_LDAC_PWR_CTRL,
328 dac33_read_reg_cache(codec, DAC33_LDAC_PWR_CTRL));
329 dac33_write(codec, DAC33_RDAC_PWR_CTRL,
330 dac33_read_reg_cache(codec, DAC33_RDAC_PWR_CTRL));
331}
332
333static inline int dac33_read_id(struct snd_soc_codec *codec)
334{
335 int i, ret = 0;
336 u8 reg;
337
338 for (i = 0; i < 3; i++) {
339 ret = dac33_read(codec, DAC33_DEVICE_ID_MSB + i, ®);
340 if (ret < 0)
341 break;
342 }
343
344 return ret;
345}
346
347static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
348{
349 u8 reg;
350
351 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
352 if (power)
353 reg |= DAC33_PDNALLB;
354 else
355 reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB |
356 DAC33_DACRPDNB | DAC33_DACLPDNB);
357 dac33_write(codec, DAC33_PWR_CTRL, reg);
358}
359
360static inline void dac33_disable_digital(struct snd_soc_codec *codec)
361{
362 u8 reg;
363
364
365 reg = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
366 reg &= ~DAC33_BCLKON;
367 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg);
368
369
370 reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
371 reg &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
372 dac33_write(codec, DAC33_PWR_CTRL, reg);
373}
374
375static int dac33_hard_power(struct snd_soc_codec *codec, int power)
376{
377 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
378 int ret = 0;
379
380 mutex_lock(&dac33->mutex);
381
382
383 if (unlikely(power == dac33->chip_power)) {
384 dev_dbg(codec->dev, "Trying to set the same power state: %s\n",
385 power ? "ON" : "OFF");
386 goto exit;
387 }
388
389 if (power) {
390 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies),
391 dac33->supplies);
392 if (ret != 0) {
393 dev_err(codec->dev,
394 "Failed to enable supplies: %d\n", ret);
395 goto exit;
396 }
397
398 if (dac33->power_gpio >= 0)
399 gpio_set_value(dac33->power_gpio, 1);
400
401 dac33->chip_power = 1;
402 } else {
403 dac33_soft_power(codec, 0);
404 if (dac33->power_gpio >= 0)
405 gpio_set_value(dac33->power_gpio, 0);
406
407 ret = regulator_bulk_disable(ARRAY_SIZE(dac33->supplies),
408 dac33->supplies);
409 if (ret != 0) {
410 dev_err(codec->dev,
411 "Failed to disable supplies: %d\n", ret);
412 goto exit;
413 }
414
415 dac33->chip_power = 0;
416 }
417
418exit:
419 mutex_unlock(&dac33->mutex);
420 return ret;
421}
422
423static int dac33_playback_event(struct snd_soc_dapm_widget *w,
424 struct snd_kcontrol *kcontrol, int event)
425{
426 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
427 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
428
429 switch (event) {
430 case SND_SOC_DAPM_PRE_PMU:
431 if (likely(dac33->substream)) {
432 dac33_calculate_times(dac33->substream, codec);
433 dac33_prepare_chip(dac33->substream, codec);
434 }
435 break;
436 case SND_SOC_DAPM_POST_PMD:
437 dac33_disable_digital(codec);
438 break;
439 }
440 return 0;
441}
442
443static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
444 struct snd_ctl_elem_value *ucontrol)
445{
446 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
447 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
448
449 ucontrol->value.integer.value[0] = dac33->fifo_mode;
450
451 return 0;
452}
453
454static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
455 struct snd_ctl_elem_value *ucontrol)
456{
457 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
458 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
459 int ret = 0;
460
461 if (dac33->fifo_mode == ucontrol->value.integer.value[0])
462 return 0;
463
464 if (snd_soc_codec_is_active(codec))
465 return -EPERM;
466
467 if (ucontrol->value.integer.value[0] < 0 ||
468 ucontrol->value.integer.value[0] >= DAC33_FIFO_LAST_MODE)
469 ret = -EINVAL;
470 else
471 dac33->fifo_mode = ucontrol->value.integer.value[0];
472
473 return ret;
474}
475
476
477static const char *dac33_fifo_mode_texts[] = {
478 "Bypass", "Mode 1", "Mode 7"
479};
480
481static SOC_ENUM_SINGLE_EXT_DECL(dac33_fifo_mode_enum, dac33_fifo_mode_texts);
482
483
484static const char *lr_lineout_gain_texts[] = {
485 "Line -12dB DAC 0dB", "Line -6dB DAC 6dB",
486 "Line 0dB DAC 12dB", "Line 6dB DAC 18dB",
487};
488
489static SOC_ENUM_SINGLE_DECL(l_lineout_gain_enum,
490 DAC33_LDAC_PWR_CTRL, 0,
491 lr_lineout_gain_texts);
492
493static SOC_ENUM_SINGLE_DECL(r_lineout_gain_enum,
494 DAC33_RDAC_PWR_CTRL, 0,
495 lr_lineout_gain_texts);
496
497
498
499
500
501
502
503
504static DECLARE_TLV_DB_SCALE(dac_digivol_tlv, -6350, 50, 0);
505
506static const struct snd_kcontrol_new dac33_snd_controls[] = {
507 SOC_DOUBLE_R_TLV("DAC Digital Playback Volume",
508 DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL,
509 0, 0x7f, 1, dac_digivol_tlv),
510 SOC_DOUBLE_R("DAC Digital Playback Switch",
511 DAC33_LDAC_DIG_VOL_CTRL, DAC33_RDAC_DIG_VOL_CTRL, 7, 1, 1),
512 SOC_DOUBLE_R("Line to Line Out Volume",
513 DAC33_LINEL_TO_LLO_VOL, DAC33_LINER_TO_RLO_VOL, 0, 127, 1),
514 SOC_ENUM("Left Line Output Gain", l_lineout_gain_enum),
515 SOC_ENUM("Right Line Output Gain", r_lineout_gain_enum),
516};
517
518static const struct snd_kcontrol_new dac33_mode_snd_controls[] = {
519 SOC_ENUM_EXT("FIFO Mode", dac33_fifo_mode_enum,
520 dac33_get_fifo_mode, dac33_set_fifo_mode),
521};
522
523
524static const struct snd_kcontrol_new dac33_dapm_abypassl_control =
525 SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1);
526
527static const struct snd_kcontrol_new dac33_dapm_abypassr_control =
528 SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1);
529
530
531static const char *dac33_lr_lom_texts[] = {"DAC", "LOP"};
532
533static SOC_ENUM_SINGLE_DECL(dac33_left_lom_enum,
534 DAC33_OUT_AMP_CTRL, 3,
535 dac33_lr_lom_texts);
536
537static const struct snd_kcontrol_new dac33_dapm_left_lom_control =
538SOC_DAPM_ENUM("Route", dac33_left_lom_enum);
539
540static SOC_ENUM_SINGLE_DECL(dac33_right_lom_enum,
541 DAC33_OUT_AMP_CTRL, 2,
542 dac33_lr_lom_texts);
543
544static const struct snd_kcontrol_new dac33_dapm_right_lom_control =
545SOC_DAPM_ENUM("Route", dac33_right_lom_enum);
546
547static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = {
548 SND_SOC_DAPM_OUTPUT("LEFT_LO"),
549 SND_SOC_DAPM_OUTPUT("RIGHT_LO"),
550
551 SND_SOC_DAPM_INPUT("LINEL"),
552 SND_SOC_DAPM_INPUT("LINER"),
553
554 SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0),
555 SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0),
556
557
558 SND_SOC_DAPM_SWITCH("Analog Left Bypass", SND_SOC_NOPM, 0, 0,
559 &dac33_dapm_abypassl_control),
560 SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0,
561 &dac33_dapm_abypassr_control),
562
563 SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0,
564 &dac33_dapm_left_lom_control),
565 SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0,
566 &dac33_dapm_right_lom_control),
567
568
569
570
571
572 SND_SOC_DAPM_PGA("Left Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
573 SND_SOC_DAPM_PGA("Right Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
574
575 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier",
576 DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0),
577 SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier",
578 DAC33_OUT_AMP_PWR_CTRL, 4, 3, 3, 0),
579
580 SND_SOC_DAPM_SUPPLY("Left DAC Power",
581 DAC33_LDAC_PWR_CTRL, 2, 0, NULL, 0),
582 SND_SOC_DAPM_SUPPLY("Right DAC Power",
583 DAC33_RDAC_PWR_CTRL, 2, 0, NULL, 0),
584
585 SND_SOC_DAPM_SUPPLY("Codec Power",
586 DAC33_PWR_CTRL, 4, 0, NULL, 0),
587
588 SND_SOC_DAPM_PRE("Pre Playback", dac33_playback_event),
589 SND_SOC_DAPM_POST("Post Playback", dac33_playback_event),
590};
591
592static const struct snd_soc_dapm_route audio_map[] = {
593
594 {"Analog Left Bypass", "Switch", "LINEL"},
595 {"Analog Right Bypass", "Switch", "LINER"},
596
597 {"Output Left Amplifier", NULL, "DACL"},
598 {"Output Right Amplifier", NULL, "DACR"},
599
600 {"Left Bypass PGA", NULL, "Analog Left Bypass"},
601 {"Right Bypass PGA", NULL, "Analog Right Bypass"},
602
603 {"Left LOM Inverted From", "DAC", "Left Bypass PGA"},
604 {"Right LOM Inverted From", "DAC", "Right Bypass PGA"},
605 {"Left LOM Inverted From", "LOP", "Analog Left Bypass"},
606 {"Right LOM Inverted From", "LOP", "Analog Right Bypass"},
607
608 {"Output Left Amplifier", NULL, "Left LOM Inverted From"},
609 {"Output Right Amplifier", NULL, "Right LOM Inverted From"},
610
611 {"DACL", NULL, "Left DAC Power"},
612 {"DACR", NULL, "Right DAC Power"},
613
614 {"Left Bypass PGA", NULL, "Left DAC Power"},
615 {"Right Bypass PGA", NULL, "Right DAC Power"},
616
617
618 {"LEFT_LO", NULL, "Output Left Amplifier"},
619 {"RIGHT_LO", NULL, "Output Right Amplifier"},
620
621 {"LEFT_LO", NULL, "Codec Power"},
622 {"RIGHT_LO", NULL, "Codec Power"},
623};
624
625static int dac33_set_bias_level(struct snd_soc_codec *codec,
626 enum snd_soc_bias_level level)
627{
628 int ret;
629
630 switch (level) {
631 case SND_SOC_BIAS_ON:
632 break;
633 case SND_SOC_BIAS_PREPARE:
634 break;
635 case SND_SOC_BIAS_STANDBY:
636 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
637
638 ret = dac33_hard_power(codec, 1);
639 if (ret != 0)
640 return ret;
641
642 dac33_init_chip(codec);
643 }
644 break;
645 case SND_SOC_BIAS_OFF:
646
647 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
648 return 0;
649 ret = dac33_hard_power(codec, 0);
650 if (ret != 0)
651 return ret;
652 break;
653 }
654 codec->dapm.bias_level = level;
655
656 return 0;
657}
658
659static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
660{
661 struct snd_soc_codec *codec = dac33->codec;
662 unsigned int delay;
663 unsigned long flags;
664
665 switch (dac33->fifo_mode) {
666 case DAC33_FIFO_MODE1:
667 dac33_write16(codec, DAC33_NSAMPLE_MSB,
668 DAC33_THRREG(dac33->nsample));
669
670
671 spin_lock_irqsave(&dac33->lock, flags);
672 dac33->t_stamp2 = ktime_to_us(ktime_get());
673 dac33->t_stamp1 = dac33->t_stamp2;
674 spin_unlock_irqrestore(&dac33->lock, flags);
675
676 dac33_write16(codec, DAC33_PREFILL_MSB,
677 DAC33_THRREG(dac33->alarm_threshold));
678
679 delay = SAMPLES_TO_US(dac33->burst_rate,
680 dac33->alarm_threshold) + 1000;
681 usleep_range(delay, delay + 500);
682 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
683 break;
684 case DAC33_FIFO_MODE7:
685
686 spin_lock_irqsave(&dac33->lock, flags);
687 dac33->t_stamp1 = ktime_to_us(ktime_get());
688
689 dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
690 spin_unlock_irqrestore(&dac33->lock, flags);
691
692 dac33_write16(codec, DAC33_PREFILL_MSB,
693 DAC33_THRREG(DAC33_MODE7_MARGIN));
694
695
696 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
697 break;
698 default:
699 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
700 dac33->fifo_mode);
701 break;
702 }
703}
704
705static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
706{
707 struct snd_soc_codec *codec = dac33->codec;
708 unsigned long flags;
709
710 switch (dac33->fifo_mode) {
711 case DAC33_FIFO_MODE1:
712
713 spin_lock_irqsave(&dac33->lock, flags);
714 dac33->t_stamp2 = ktime_to_us(ktime_get());
715 spin_unlock_irqrestore(&dac33->lock, flags);
716
717 dac33_write16(codec, DAC33_NSAMPLE_MSB,
718 DAC33_THRREG(dac33->nsample));
719 break;
720 case DAC33_FIFO_MODE7:
721
722 break;
723 default:
724 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
725 dac33->fifo_mode);
726 break;
727 }
728}
729
730static void dac33_work(struct work_struct *work)
731{
732 struct snd_soc_codec *codec;
733 struct tlv320dac33_priv *dac33;
734 u8 reg;
735
736 dac33 = container_of(work, struct tlv320dac33_priv, work);
737 codec = dac33->codec;
738
739 mutex_lock(&dac33->mutex);
740 switch (dac33->state) {
741 case DAC33_PREFILL:
742 dac33->state = DAC33_PLAYBACK;
743 dac33_prefill_handler(dac33);
744 break;
745 case DAC33_PLAYBACK:
746 dac33_playback_handler(dac33);
747 break;
748 case DAC33_IDLE:
749 break;
750 case DAC33_FLUSH:
751 dac33->state = DAC33_IDLE;
752
753 dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
754
755
756 reg = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
757 reg |= DAC33_FIFOFLUSH;
758 dac33_write(codec, DAC33_FIFO_CTRL_A, reg);
759 break;
760 }
761 mutex_unlock(&dac33->mutex);
762}
763
764static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
765{
766 struct snd_soc_codec *codec = dev;
767 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
768 unsigned long flags;
769
770 spin_lock_irqsave(&dac33->lock, flags);
771 dac33->t_stamp1 = ktime_to_us(ktime_get());
772 spin_unlock_irqrestore(&dac33->lock, flags);
773
774
775 if (dac33->fifo_mode != DAC33_FIFO_MODE7)
776 queue_work(dac33->dac33_wq, &dac33->work);
777
778 return IRQ_HANDLED;
779}
780
781static void dac33_oscwait(struct snd_soc_codec *codec)
782{
783 int timeout = 60;
784 u8 reg;
785
786 do {
787 usleep_range(1000, 2000);
788 dac33_read(codec, DAC33_INT_OSC_STATUS, ®);
789 } while (((reg & 0x03) != DAC33_OSCSTATUS_NORMAL) && timeout--);
790 if ((reg & 0x03) != DAC33_OSCSTATUS_NORMAL)
791 dev_err(codec->dev,
792 "internal oscillator calibration failed\n");
793}
794
795static int dac33_startup(struct snd_pcm_substream *substream,
796 struct snd_soc_dai *dai)
797{
798 struct snd_soc_codec *codec = dai->codec;
799 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
800
801
802 dac33->substream = substream;
803
804 return 0;
805}
806
807static void dac33_shutdown(struct snd_pcm_substream *substream,
808 struct snd_soc_dai *dai)
809{
810 struct snd_soc_codec *codec = dai->codec;
811 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
812
813 dac33->substream = NULL;
814}
815
816#define CALC_BURST_RATE(bclkdiv, bclk_per_sample) \
817 (BURST_BASEFREQ_HZ / bclkdiv / bclk_per_sample)
818static int dac33_hw_params(struct snd_pcm_substream *substream,
819 struct snd_pcm_hw_params *params,
820 struct snd_soc_dai *dai)
821{
822 struct snd_soc_codec *codec = dai->codec;
823 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
824
825
826 switch (params_rate(params)) {
827 case 44100:
828 case 48000:
829 break;
830 default:
831 dev_err(codec->dev, "unsupported rate %d\n",
832 params_rate(params));
833 return -EINVAL;
834 }
835
836 switch (params_width(params)) {
837 case 16:
838 dac33->fifo_size = DAC33_FIFO_SIZE_16BIT;
839 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32);
840 break;
841 case 32:
842 dac33->fifo_size = DAC33_FIFO_SIZE_24BIT;
843 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
844 break;
845 default:
846 dev_err(codec->dev, "unsupported width %d\n",
847 params_width(params));
848 return -EINVAL;
849 }
850
851 return 0;
852}
853
854#define CALC_OSCSET(rate, refclk) ( \
855 ((((rate * 10000) / refclk) * 4096) + 7000) / 10000)
856#define CALC_RATIOSET(rate, refclk) ( \
857 ((((refclk * 100000) / rate) * 16384) + 50000) / 100000)
858
859
860
861
862
863
864static int dac33_prepare_chip(struct snd_pcm_substream *substream,
865 struct snd_soc_codec *codec)
866{
867 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
868 unsigned int oscset, ratioset, pwr_ctrl, reg_tmp;
869 u8 aictrl_a, aictrl_b, fifoctrl_a;
870
871 switch (substream->runtime->rate) {
872 case 44100:
873 case 48000:
874 oscset = CALC_OSCSET(substream->runtime->rate, dac33->refclk);
875 ratioset = CALC_RATIOSET(substream->runtime->rate,
876 dac33->refclk);
877 break;
878 default:
879 dev_err(codec->dev, "unsupported rate %d\n",
880 substream->runtime->rate);
881 return -EINVAL;
882 }
883
884
885 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
886 aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK);
887
888 fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
889 fifoctrl_a &= ~DAC33_FIFOFLUSH;
890
891 fifoctrl_a &= ~DAC33_WIDTH;
892 switch (substream->runtime->format) {
893 case SNDRV_PCM_FORMAT_S16_LE:
894 aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16);
895 fifoctrl_a |= DAC33_WIDTH;
896 break;
897 case SNDRV_PCM_FORMAT_S32_LE:
898 aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24);
899 break;
900 default:
901 dev_err(codec->dev, "unsupported format %d\n",
902 substream->runtime->format);
903 return -EINVAL;
904 }
905
906 mutex_lock(&dac33->mutex);
907
908 if (!dac33->chip_power) {
909
910
911
912
913 mutex_unlock(&dac33->mutex);
914 return 0;
915 }
916
917 dac33_soft_power(codec, 0);
918 dac33_soft_power(codec, 1);
919
920 reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
921 dac33_write(codec, DAC33_INT_OSC_CTRL, reg_tmp);
922
923
924 dac33_write16(codec, DAC33_INT_OSC_FREQ_RAT_A, oscset);
925
926
927 dac33_write(codec, DAC33_CALIB_TIME, 96);
928
929
930 dac33_write(codec, DAC33_INT_OSC_CTRL_B, DAC33_ADJTHRSHLD(2) |
931 DAC33_ADJSTEP(1));
932
933
934 dac33_write(codec, DAC33_INT_OSC_CTRL_C, DAC33_REFDIV(4));
935
936 pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
937 pwr_ctrl |= DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB;
938 dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
939
940 dac33_oscwait(codec);
941
942 if (dac33->fifo_mode) {
943
944
945 dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
946 dac33_write(codec, DAC33_ASRC_CTRL_B, 1);
947
948
949 dac33_write16(codec, DAC33_SRC_REF_CLK_RATIO_A, ratioset);
950
951
952 dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH);
953 } else {
954
955
956 dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP);
957 dac33_write(codec, DAC33_ASRC_CTRL_B, 0);
958 }
959
960
961 switch (dac33->fifo_mode) {
962 case DAC33_FIFO_MODE1:
963 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
964 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
965 break;
966 case DAC33_FIFO_MODE7:
967 dac33_write(codec, DAC33_FIFO_IRQ_MODE_A,
968 DAC33_UTM(DAC33_FIFO_IRQ_MODE_LEVEL));
969 break;
970 default:
971
972 break;
973 }
974
975 aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
976
977 switch (dac33->fifo_mode) {
978 case DAC33_FIFO_MODE1:
979
980
981
982
983
984
985 fifoctrl_a &= ~DAC33_FBYPAS;
986 fifoctrl_a &= ~DAC33_FAUTO;
987 if (dac33->keep_bclk)
988 aictrl_b |= DAC33_BCLKON;
989 else
990 aictrl_b &= ~DAC33_BCLKON;
991 break;
992 case DAC33_FIFO_MODE7:
993
994
995
996
997
998
999 fifoctrl_a &= ~DAC33_FBYPAS;
1000 fifoctrl_a |= DAC33_FAUTO;
1001 if (dac33->keep_bclk)
1002 aictrl_b |= DAC33_BCLKON;
1003 else
1004 aictrl_b &= ~DAC33_BCLKON;
1005 break;
1006 default:
1007
1008
1009
1010
1011
1012 fifoctrl_a |= DAC33_FBYPAS;
1013 aictrl_b |= DAC33_BCLKON;
1014 break;
1015 }
1016
1017 dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a);
1018 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
1019 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030 if (dac33->fifo_mode)
1031 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
1032 dac33->burst_bclkdiv);
1033 else
1034 if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
1035 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
1036 else
1037 dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16);
1038
1039 switch (dac33->fifo_mode) {
1040 case DAC33_FIFO_MODE1:
1041 dac33_write16(codec, DAC33_ATHR_MSB,
1042 DAC33_THRREG(dac33->alarm_threshold));
1043 break;
1044 case DAC33_FIFO_MODE7:
1045
1046
1047
1048
1049 dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
1050 dac33_write16(codec, DAC33_LTHR_MSB,
1051 DAC33_THRREG(DAC33_MODE7_MARGIN));
1052 break;
1053 default:
1054 break;
1055 }
1056
1057 mutex_unlock(&dac33->mutex);
1058
1059 return 0;
1060}
1061
1062static void dac33_calculate_times(struct snd_pcm_substream *substream,
1063 struct snd_soc_codec *codec)
1064{
1065 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1066 unsigned int period_size = substream->runtime->period_size;
1067 unsigned int rate = substream->runtime->rate;
1068 unsigned int nsample_limit;
1069
1070
1071 if (!dac33->fifo_mode)
1072 return;
1073
1074 switch (dac33->fifo_mode) {
1075 case DAC33_FIFO_MODE1:
1076
1077 dac33->alarm_threshold = US_TO_SAMPLES(rate,
1078 dac33->mode1_latency);
1079 nsample_limit = dac33->fifo_size - dac33->alarm_threshold;
1080
1081 if (period_size <= dac33->alarm_threshold)
1082
1083
1084
1085
1086 dac33->nsample = period_size *
1087 ((dac33->alarm_threshold / period_size) +
1088 (dac33->alarm_threshold % period_size ?
1089 1 : 0));
1090 else if (period_size > nsample_limit)
1091 dac33->nsample = nsample_limit;
1092 else
1093 dac33->nsample = period_size;
1094
1095 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
1096 dac33->nsample);
1097 dac33->t_stamp1 = 0;
1098 dac33->t_stamp2 = 0;
1099 break;
1100 case DAC33_FIFO_MODE7:
1101 dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate,
1102 dac33->burst_rate) + 9;
1103 if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN))
1104 dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN;
1105 if (dac33->uthr < (DAC33_MODE7_MARGIN + 10))
1106 dac33->uthr = (DAC33_MODE7_MARGIN + 10);
1107
1108 dac33->mode7_us_to_lthr =
1109 SAMPLES_TO_US(substream->runtime->rate,
1110 dac33->uthr - DAC33_MODE7_MARGIN + 1);
1111 dac33->t_stamp1 = 0;
1112 break;
1113 default:
1114 break;
1115 }
1116
1117}
1118
1119static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
1120 struct snd_soc_dai *dai)
1121{
1122 struct snd_soc_codec *codec = dai->codec;
1123 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1124 int ret = 0;
1125
1126 switch (cmd) {
1127 case SNDRV_PCM_TRIGGER_START:
1128 case SNDRV_PCM_TRIGGER_RESUME:
1129 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1130 if (dac33->fifo_mode) {
1131 dac33->state = DAC33_PREFILL;
1132 queue_work(dac33->dac33_wq, &dac33->work);
1133 }
1134 break;
1135 case SNDRV_PCM_TRIGGER_STOP:
1136 case SNDRV_PCM_TRIGGER_SUSPEND:
1137 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1138 if (dac33->fifo_mode) {
1139 dac33->state = DAC33_FLUSH;
1140 queue_work(dac33->dac33_wq, &dac33->work);
1141 }
1142 break;
1143 default:
1144 ret = -EINVAL;
1145 }
1146
1147 return ret;
1148}
1149
1150static snd_pcm_sframes_t dac33_dai_delay(
1151 struct snd_pcm_substream *substream,
1152 struct snd_soc_dai *dai)
1153{
1154 struct snd_soc_codec *codec = dai->codec;
1155 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1156 unsigned long long t0, t1, t_now;
1157 unsigned int time_delta, uthr;
1158 int samples_out, samples_in, samples;
1159 snd_pcm_sframes_t delay = 0;
1160 unsigned long flags;
1161
1162 switch (dac33->fifo_mode) {
1163 case DAC33_FIFO_BYPASS:
1164 break;
1165 case DAC33_FIFO_MODE1:
1166 spin_lock_irqsave(&dac33->lock, flags);
1167 t0 = dac33->t_stamp1;
1168 t1 = dac33->t_stamp2;
1169 spin_unlock_irqrestore(&dac33->lock, flags);
1170 t_now = ktime_to_us(ktime_get());
1171
1172
1173 if (!t1)
1174 goto out;
1175
1176 if (t0 > t1) {
1177
1178
1179
1180
1181 time_delta = t_now - t0;
1182 samples_out = time_delta ? US_TO_SAMPLES(
1183 substream->runtime->rate,
1184 time_delta) : 0;
1185
1186 if (likely(dac33->alarm_threshold > samples_out))
1187 delay = dac33->alarm_threshold - samples_out;
1188 else
1189 delay = 0;
1190 } else if ((t_now - t1) <= dac33->mode1_us_burst) {
1191
1192
1193
1194
1195 time_delta = t_now - t0;
1196 samples_out = time_delta ? US_TO_SAMPLES(
1197 substream->runtime->rate,
1198 time_delta) : 0;
1199
1200 time_delta = t_now - t1;
1201 samples_in = time_delta ? US_TO_SAMPLES(
1202 dac33->burst_rate,
1203 time_delta) : 0;
1204
1205 samples = dac33->alarm_threshold;
1206 samples += (samples_in - samples_out);
1207
1208 if (likely(samples > 0))
1209 delay = samples;
1210 else
1211 delay = 0;
1212 } else {
1213
1214
1215
1216
1217 time_delta = t_now - t0;
1218 samples_out = time_delta ? US_TO_SAMPLES(
1219 substream->runtime->rate,
1220 time_delta) : 0;
1221
1222 samples_in = dac33->nsample;
1223 samples = dac33->alarm_threshold;
1224 samples += (samples_in - samples_out);
1225
1226 if (likely(samples > 0))
1227 delay = samples > dac33->fifo_size ?
1228 dac33->fifo_size : samples;
1229 else
1230 delay = 0;
1231 }
1232 break;
1233 case DAC33_FIFO_MODE7:
1234 spin_lock_irqsave(&dac33->lock, flags);
1235 t0 = dac33->t_stamp1;
1236 uthr = dac33->uthr;
1237 spin_unlock_irqrestore(&dac33->lock, flags);
1238 t_now = ktime_to_us(ktime_get());
1239
1240
1241 if (!t0)
1242 goto out;
1243
1244 if (t_now <= t0) {
1245
1246
1247
1248
1249 delay = uthr;
1250 goto out;
1251 }
1252
1253 time_delta = t_now - t0;
1254 if (time_delta <= dac33->mode7_us_to_lthr) {
1255
1256
1257
1258
1259 samples_out = US_TO_SAMPLES(
1260 substream->runtime->rate,
1261 time_delta);
1262
1263 if (likely(uthr > samples_out))
1264 delay = uthr - samples_out;
1265 else
1266 delay = 0;
1267 } else {
1268
1269
1270
1271
1272 time_delta = time_delta - dac33->mode7_us_to_lthr;
1273
1274 samples_out = US_TO_SAMPLES(
1275 substream->runtime->rate,
1276 time_delta);
1277 samples_in = US_TO_SAMPLES(
1278 dac33->burst_rate,
1279 time_delta);
1280 delay = DAC33_MODE7_MARGIN + samples_in - samples_out;
1281
1282 if (unlikely(delay > uthr))
1283 delay = uthr;
1284 }
1285 break;
1286 default:
1287 dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
1288 dac33->fifo_mode);
1289 break;
1290 }
1291out:
1292 return delay;
1293}
1294
1295static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1296 int clk_id, unsigned int freq, int dir)
1297{
1298 struct snd_soc_codec *codec = codec_dai->codec;
1299 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1300 u8 ioc_reg, asrcb_reg;
1301
1302 ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
1303 asrcb_reg = dac33_read_reg_cache(codec, DAC33_ASRC_CTRL_B);
1304 switch (clk_id) {
1305 case TLV320DAC33_MCLK:
1306 ioc_reg |= DAC33_REFSEL;
1307 asrcb_reg |= DAC33_SRCREFSEL;
1308 break;
1309 case TLV320DAC33_SLEEPCLK:
1310 ioc_reg &= ~DAC33_REFSEL;
1311 asrcb_reg &= ~DAC33_SRCREFSEL;
1312 break;
1313 default:
1314 dev_err(codec->dev, "Invalid clock ID (%d)\n", clk_id);
1315 break;
1316 }
1317 dac33->refclk = freq;
1318
1319 dac33_write_reg_cache(codec, DAC33_INT_OSC_CTRL, ioc_reg);
1320 dac33_write_reg_cache(codec, DAC33_ASRC_CTRL_B, asrcb_reg);
1321
1322 return 0;
1323}
1324
1325static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
1326 unsigned int fmt)
1327{
1328 struct snd_soc_codec *codec = codec_dai->codec;
1329 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1330 u8 aictrl_a, aictrl_b;
1331
1332 aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
1333 aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
1334
1335 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1336 case SND_SOC_DAIFMT_CBM_CFM:
1337
1338 aictrl_a |= (DAC33_MSBCLK | DAC33_MSWCLK);
1339 break;
1340 case SND_SOC_DAIFMT_CBS_CFS:
1341
1342 if (dac33->fifo_mode) {
1343 dev_err(codec->dev, "FIFO mode requires master mode\n");
1344 return -EINVAL;
1345 } else
1346 aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
1347 break;
1348 default:
1349 return -EINVAL;
1350 }
1351
1352 aictrl_a &= ~DAC33_AFMT_MASK;
1353 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1354 case SND_SOC_DAIFMT_I2S:
1355 aictrl_a |= DAC33_AFMT_I2S;
1356 break;
1357 case SND_SOC_DAIFMT_DSP_A:
1358 aictrl_a |= DAC33_AFMT_DSP;
1359 aictrl_b &= ~DAC33_DATA_DELAY_MASK;
1360 aictrl_b |= DAC33_DATA_DELAY(0);
1361 break;
1362 case SND_SOC_DAIFMT_RIGHT_J:
1363 aictrl_a |= DAC33_AFMT_RIGHT_J;
1364 break;
1365 case SND_SOC_DAIFMT_LEFT_J:
1366 aictrl_a |= DAC33_AFMT_LEFT_J;
1367 break;
1368 default:
1369 dev_err(codec->dev, "Unsupported format (%u)\n",
1370 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1371 return -EINVAL;
1372 }
1373
1374 dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
1375 dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
1376
1377 return 0;
1378}
1379
1380static int dac33_soc_probe(struct snd_soc_codec *codec)
1381{
1382 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1383 int ret = 0;
1384
1385 codec->control_data = dac33->control_data;
1386 codec->hw_write = (hw_write_t) i2c_master_send;
1387 dac33->codec = codec;
1388
1389
1390 ret = dac33_hard_power(codec, 1);
1391 if (ret != 0) {
1392 dev_err(codec->dev, "Failed to power up codec: %d\n", ret);
1393 goto err_power;
1394 }
1395 ret = dac33_read_id(codec);
1396 dac33_hard_power(codec, 0);
1397
1398 if (ret < 0) {
1399 dev_err(codec->dev, "Failed to read chip ID: %d\n", ret);
1400 ret = -ENODEV;
1401 goto err_power;
1402 }
1403
1404
1405 if (dac33->irq >= 0) {
1406 ret = request_irq(dac33->irq, dac33_interrupt_handler,
1407 IRQF_TRIGGER_RISING,
1408 codec->component.name, codec);
1409 if (ret < 0) {
1410 dev_err(codec->dev, "Could not request IRQ%d (%d)\n",
1411 dac33->irq, ret);
1412 dac33->irq = -1;
1413 }
1414 if (dac33->irq != -1) {
1415
1416 dac33->dac33_wq =
1417 create_singlethread_workqueue("tlv320dac33");
1418 if (dac33->dac33_wq == NULL) {
1419 free_irq(dac33->irq, codec);
1420 return -ENOMEM;
1421 }
1422
1423 INIT_WORK(&dac33->work, dac33_work);
1424 }
1425 }
1426
1427
1428 if (dac33->irq >= 0)
1429 snd_soc_add_codec_controls(codec, dac33_mode_snd_controls,
1430 ARRAY_SIZE(dac33_mode_snd_controls));
1431
1432err_power:
1433 return ret;
1434}
1435
1436static int dac33_soc_remove(struct snd_soc_codec *codec)
1437{
1438 struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
1439
1440 if (dac33->irq >= 0) {
1441 free_irq(dac33->irq, dac33->codec);
1442 destroy_workqueue(dac33->dac33_wq);
1443 }
1444 return 0;
1445}
1446
1447static struct snd_soc_codec_driver soc_codec_dev_tlv320dac33 = {
1448 .read = dac33_read_reg_cache,
1449 .write = dac33_write_locked,
1450 .set_bias_level = dac33_set_bias_level,
1451 .idle_bias_off = true,
1452 .reg_cache_size = ARRAY_SIZE(dac33_reg),
1453 .reg_word_size = sizeof(u8),
1454 .reg_cache_default = dac33_reg,
1455 .probe = dac33_soc_probe,
1456 .remove = dac33_soc_remove,
1457
1458 .controls = dac33_snd_controls,
1459 .num_controls = ARRAY_SIZE(dac33_snd_controls),
1460 .dapm_widgets = dac33_dapm_widgets,
1461 .num_dapm_widgets = ARRAY_SIZE(dac33_dapm_widgets),
1462 .dapm_routes = audio_map,
1463 .num_dapm_routes = ARRAY_SIZE(audio_map),
1464};
1465
1466#define DAC33_RATES (SNDRV_PCM_RATE_44100 | \
1467 SNDRV_PCM_RATE_48000)
1468#define DAC33_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1469
1470static const struct snd_soc_dai_ops dac33_dai_ops = {
1471 .startup = dac33_startup,
1472 .shutdown = dac33_shutdown,
1473 .hw_params = dac33_hw_params,
1474 .trigger = dac33_pcm_trigger,
1475 .delay = dac33_dai_delay,
1476 .set_sysclk = dac33_set_dai_sysclk,
1477 .set_fmt = dac33_set_dai_fmt,
1478};
1479
1480static struct snd_soc_dai_driver dac33_dai = {
1481 .name = "tlv320dac33-hifi",
1482 .playback = {
1483 .stream_name = "Playback",
1484 .channels_min = 2,
1485 .channels_max = 2,
1486 .rates = DAC33_RATES,
1487 .formats = DAC33_FORMATS,
1488 .sig_bits = 24,
1489 },
1490 .ops = &dac33_dai_ops,
1491};
1492
1493static int dac33_i2c_probe(struct i2c_client *client,
1494 const struct i2c_device_id *id)
1495{
1496 struct tlv320dac33_platform_data *pdata;
1497 struct tlv320dac33_priv *dac33;
1498 int ret, i;
1499
1500 if (client->dev.platform_data == NULL) {
1501 dev_err(&client->dev, "Platform data not set\n");
1502 return -ENODEV;
1503 }
1504 pdata = client->dev.platform_data;
1505
1506 dac33 = devm_kzalloc(&client->dev, sizeof(struct tlv320dac33_priv),
1507 GFP_KERNEL);
1508 if (dac33 == NULL)
1509 return -ENOMEM;
1510
1511 dac33->control_data = client;
1512 mutex_init(&dac33->mutex);
1513 spin_lock_init(&dac33->lock);
1514
1515 i2c_set_clientdata(client, dac33);
1516
1517 dac33->power_gpio = pdata->power_gpio;
1518 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1519 dac33->keep_bclk = pdata->keep_bclk;
1520 dac33->mode1_latency = pdata->mode1_latency;
1521 if (!dac33->mode1_latency)
1522 dac33->mode1_latency = 10000;
1523 dac33->irq = client->irq;
1524
1525 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1526
1527
1528 if (dac33->power_gpio >= 0) {
1529 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset");
1530 if (ret < 0) {
1531 dev_err(&client->dev,
1532 "Failed to request reset GPIO (%d)\n",
1533 dac33->power_gpio);
1534 goto err_gpio;
1535 }
1536 gpio_direction_output(dac33->power_gpio, 0);
1537 }
1538
1539 for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++)
1540 dac33->supplies[i].supply = dac33_supply_names[i];
1541
1542 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(dac33->supplies),
1543 dac33->supplies);
1544
1545 if (ret != 0) {
1546 dev_err(&client->dev, "Failed to request supplies: %d\n", ret);
1547 goto err_get;
1548 }
1549
1550 ret = snd_soc_register_codec(&client->dev,
1551 &soc_codec_dev_tlv320dac33, &dac33_dai, 1);
1552 if (ret < 0)
1553 goto err_get;
1554
1555 return ret;
1556err_get:
1557 if (dac33->power_gpio >= 0)
1558 gpio_free(dac33->power_gpio);
1559err_gpio:
1560 return ret;
1561}
1562
1563static int dac33_i2c_remove(struct i2c_client *client)
1564{
1565 struct tlv320dac33_priv *dac33 = i2c_get_clientdata(client);
1566
1567 if (unlikely(dac33->chip_power))
1568 dac33_hard_power(dac33->codec, 0);
1569
1570 if (dac33->power_gpio >= 0)
1571 gpio_free(dac33->power_gpio);
1572
1573 snd_soc_unregister_codec(&client->dev);
1574 return 0;
1575}
1576
1577static const struct i2c_device_id tlv320dac33_i2c_id[] = {
1578 {
1579 .name = "tlv320dac33",
1580 .driver_data = 0,
1581 },
1582 { },
1583};
1584MODULE_DEVICE_TABLE(i2c, tlv320dac33_i2c_id);
1585
1586static struct i2c_driver tlv320dac33_i2c_driver = {
1587 .driver = {
1588 .name = "tlv320dac33-codec",
1589 .owner = THIS_MODULE,
1590 },
1591 .probe = dac33_i2c_probe,
1592 .remove = dac33_i2c_remove,
1593 .id_table = tlv320dac33_i2c_id,
1594};
1595
1596module_i2c_driver(tlv320dac33_i2c_driver);
1597
1598MODULE_DESCRIPTION("ASoC TLV320DAC33 codec driver");
1599MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
1600MODULE_LICENSE("GPL");
1601
