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26#include <linux/platform_device.h>
27#include <linux/gpio.h>
28#include <linux/mtd/partitions.h>
29#include <linux/platform_data/gpio-davinci.h>
30#include <linux/platform_data/i2c-davinci.h>
31#include <linux/platform_data/mmc-davinci.h>
32#include <linux/platform_data/mtd-davinci.h>
33#include <linux/platform_data/usb-davinci.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37
38#include <mach/common.h>
39#include <mach/serial.h>
40#include <mach/mux.h>
41
42#include "davinci.h"
43
44#define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
45#define LXT971_PHY_ID 0x001378e2
46#define LXT971_PHY_MASK 0xfffffff0
47
48#define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
49#define NTOSD2_MSP430_I2C_ADDR 0x59
50#define NTOSD2_MSP430_IRQ 2
51
52
53
54
55
56
57#define NAND_BLOCK_SIZE SZ_128K
58
59static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
60 {
61
62 .name = "bootloader",
63 .offset = 0,
64 .size = 15 * NAND_BLOCK_SIZE,
65 .mask_flags = MTD_WRITEABLE,
66 }, {
67
68 .name = "params",
69 .offset = MTDPART_OFS_APPEND,
70 .size = 1 * NAND_BLOCK_SIZE,
71 .mask_flags = 0,
72 }, {
73
74 .name = "kernel",
75 .offset = MTDPART_OFS_APPEND,
76 .size = SZ_4M,
77 .mask_flags = 0,
78 }, {
79
80 .name = "filesystem",
81 .offset = MTDPART_OFS_APPEND,
82 .size = MTDPART_SIZ_FULL,
83 .mask_flags = 0,
84 }
85
86};
87
88static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
89 .parts = davinci_ntosd2_nandflash_partition,
90 .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
91 .ecc_mode = NAND_ECC_HW,
92 .ecc_bits = 1,
93 .bbt_options = NAND_BBT_USE_FLASH,
94};
95
96static struct resource davinci_ntosd2_nandflash_resource[] = {
97 {
98 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
99 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
103 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
104 .flags = IORESOURCE_MEM,
105 },
106};
107
108static struct platform_device davinci_ntosd2_nandflash_device = {
109 .name = "davinci_nand",
110 .id = 0,
111 .dev = {
112 .platform_data = &davinci_ntosd2_nandflash_data,
113 },
114 .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
115 .resource = davinci_ntosd2_nandflash_resource,
116};
117
118static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
119
120static struct platform_device davinci_fb_device = {
121 .name = "davincifb",
122 .id = -1,
123 .dev = {
124 .dma_mask = &davinci_fb_dma_mask,
125 .coherent_dma_mask = DMA_BIT_MASK(32),
126 },
127 .num_resources = 0,
128};
129
130static struct gpio_led ntosd2_leds[] = {
131 { .name = "led1_green", .gpio = GPIO(10), },
132 { .name = "led1_red", .gpio = GPIO(11), },
133 { .name = "led2_green", .gpio = GPIO(12), },
134 { .name = "led2_red", .gpio = GPIO(13), },
135};
136
137static struct gpio_led_platform_data ntosd2_leds_data = {
138 .num_leds = ARRAY_SIZE(ntosd2_leds),
139 .leds = ntosd2_leds,
140};
141
142static struct platform_device ntosd2_leds_dev = {
143 .name = "leds-gpio",
144 .id = -1,
145 .dev = {
146 .platform_data = &ntosd2_leds_data,
147 },
148};
149
150
151static struct platform_device *davinci_ntosd2_devices[] __initdata = {
152 &davinci_fb_device,
153 &ntosd2_leds_dev,
154};
155
156static void __init davinci_ntosd2_map_io(void)
157{
158 dm644x_init();
159}
160
161static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
162 .wires = 4,
163};
164
165#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
166
167#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
168
169static __init void davinci_ntosd2_init(void)
170{
171 int ret;
172 struct clk *aemif_clk;
173 struct davinci_soc_info *soc_info = &davinci_soc_info;
174
175 ret = dm644x_gpio_register();
176 if (ret)
177 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
178
179 aemif_clk = clk_get(NULL, "aemif");
180 clk_prepare_enable(aemif_clk);
181
182 if (HAS_ATA) {
183 if (HAS_NAND)
184 pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
185 "\tDisable IDE for NAND/NOR support\n");
186 davinci_init_ide();
187 } else if (HAS_NAND) {
188 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
189 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
190
191
192 if (HAS_NAND)
193 platform_device_register(
194 &davinci_ntosd2_nandflash_device);
195 }
196
197 platform_add_devices(davinci_ntosd2_devices,
198 ARRAY_SIZE(davinci_ntosd2_devices));
199
200 davinci_serial_init(dm644x_serial_device);
201 dm644x_init_asp();
202
203 soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
204
205 davinci_setup_usb(1000, 8);
206
207
208
209
210
211
212
213
214 davinci_cfg_reg(DM644X_AEAW0);
215 davinci_cfg_reg(DM644X_AEAW1);
216 davinci_cfg_reg(DM644X_AEAW2);
217 davinci_cfg_reg(DM644X_AEAW3);
218 davinci_cfg_reg(DM644X_AEAW4);
219
220 davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
221}
222
223MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
224
225 .atag_offset = 0x100,
226 .map_io = davinci_ntosd2_map_io,
227 .init_irq = davinci_irq_init,
228 .init_time = davinci_timer_init,
229 .init_machine = davinci_ntosd2_init,
230 .init_late = davinci_init_late,
231 .dma_zone_size = SZ_128M,
232 .restart = davinci_restart,
233MACHINE_END
234
