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12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15#include <linux/io.h>
16#include <linux/reboot.h>
17
18#include <mach/hardware.h>
19#include <linux/platform_data/i2c-davinci.h>
20#include <mach/irqs.h>
21#include <mach/cputype.h>
22#include <mach/mux.h>
23#include <linux/platform_data/mmc-davinci.h>
24#include <mach/time.h>
25#include <linux/platform_data/edma.h>
26
27
28#include "davinci.h"
29#include "clock.h"
30
31#define DAVINCI_I2C_BASE 0x01C21000
32#define DAVINCI_ATA_BASE 0x01C66000
33#define DAVINCI_MMCSD0_BASE 0x01E10000
34#define DM355_MMCSD0_BASE 0x01E11000
35#define DM355_MMCSD1_BASE 0x01E00000
36#define DM365_MMCSD0_BASE 0x01D11000
37#define DM365_MMCSD1_BASE 0x01D00000
38
39void __iomem *davinci_sysmod_base;
40
41void davinci_map_sysmod(void)
42{
43 davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
44 0x800);
45
46
47
48
49
50 BUG_ON(!davinci_sysmod_base);
51}
52
53static struct resource i2c_resources[] = {
54 {
55 .start = DAVINCI_I2C_BASE,
56 .end = DAVINCI_I2C_BASE + 0x40,
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .start = IRQ_I2C,
61 .flags = IORESOURCE_IRQ,
62 },
63};
64
65static struct platform_device davinci_i2c_device = {
66 .name = "i2c_davinci",
67 .id = 1,
68 .num_resources = ARRAY_SIZE(i2c_resources),
69 .resource = i2c_resources,
70};
71
72void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
73{
74 if (cpu_is_davinci_dm644x())
75 davinci_cfg_reg(DM644X_I2C);
76
77 davinci_i2c_device.dev.platform_data = pdata;
78 (void) platform_device_register(&davinci_i2c_device);
79}
80
81static struct resource ide_resources[] = {
82 {
83 .start = DAVINCI_ATA_BASE,
84 .end = DAVINCI_ATA_BASE + 0x7ff,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = IRQ_IDE,
89 .end = IRQ_IDE,
90 .flags = IORESOURCE_IRQ,
91 },
92};
93
94static u64 ide_dma_mask = DMA_BIT_MASK(32);
95
96static struct platform_device ide_device = {
97 .name = "palm_bk3710",
98 .id = -1,
99 .resource = ide_resources,
100 .num_resources = ARRAY_SIZE(ide_resources),
101 .dev = {
102 .dma_mask = &ide_dma_mask,
103 .coherent_dma_mask = DMA_BIT_MASK(32),
104 },
105};
106
107void __init davinci_init_ide(void)
108{
109 if (cpu_is_davinci_dm644x()) {
110 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
111 davinci_cfg_reg(DM644X_ATAEN);
112 davinci_cfg_reg(DM644X_HDIREN);
113 } else if (cpu_is_davinci_dm646x()) {
114
115 davinci_cfg_reg(DM646X_ATAEN);
116 } else {
117 WARN_ON(1);
118 return;
119 }
120
121 platform_device_register(&ide_device);
122}
123
124#if IS_ENABLED(CONFIG_MMC_DAVINCI)
125
126static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
127
128static struct resource mmcsd0_resources[] = {
129 {
130
131 .start = DAVINCI_MMCSD0_BASE,
132 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
133 .flags = IORESOURCE_MEM,
134 },
135
136 {
137 .start = IRQ_MMCINT,
138 .flags = IORESOURCE_IRQ,
139 }, {
140
141 .start = IRQ_SDIOINT,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device davinci_mmcsd0_device = {
147 .name = "dm6441-mmc",
148 .id = 0,
149 .dev = {
150 .dma_mask = &mmcsd0_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
152 },
153 .num_resources = ARRAY_SIZE(mmcsd0_resources),
154 .resource = mmcsd0_resources,
155};
156
157static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
158
159static struct resource mmcsd1_resources[] = {
160 {
161 .start = DM355_MMCSD1_BASE,
162 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
163 .flags = IORESOURCE_MEM,
164 },
165
166 {
167 .start = IRQ_DM355_MMCINT1,
168 .flags = IORESOURCE_IRQ,
169 }, {
170 .start = IRQ_DM355_SDIOINT1,
171 .flags = IORESOURCE_IRQ,
172 },
173};
174
175static struct platform_device davinci_mmcsd1_device = {
176 .name = "dm6441-mmc",
177 .id = 1,
178 .dev = {
179 .dma_mask = &mmcsd1_dma_mask,
180 .coherent_dma_mask = DMA_BIT_MASK(32),
181 },
182 .num_resources = ARRAY_SIZE(mmcsd1_resources),
183 .resource = mmcsd1_resources,
184};
185
186
187void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
188{
189 struct platform_device *pdev = NULL;
190
191 if (WARN_ON(cpu_is_davinci_dm646x()))
192 return;
193
194
195
196
197
198
199
200 switch (module) {
201 case 1:
202 if (cpu_is_davinci_dm355()) {
203
204
205
206 davinci_cfg_reg(DM355_SD1_CMD);
207 davinci_cfg_reg(DM355_SD1_CLK);
208 davinci_cfg_reg(DM355_SD1_DATA0);
209 davinci_cfg_reg(DM355_SD1_DATA1);
210 davinci_cfg_reg(DM355_SD1_DATA2);
211 davinci_cfg_reg(DM355_SD1_DATA3);
212 } else if (cpu_is_davinci_dm365()) {
213
214 unsigned v;
215
216 v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
217 __raw_writel(v & ~0xfc0,
218 DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
219
220 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
221 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
222 SZ_4K - 1;
223 mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
224 davinci_mmcsd1_device.name = "da830-mmc";
225 } else
226 break;
227
228 pdev = &davinci_mmcsd1_device;
229 break;
230 case 0:
231 if (cpu_is_davinci_dm355()) {
232 mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
233 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
234 mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
235
236
237 davinci_cfg_reg(DM355_MMCSD0);
238
239
240 davinci_cfg_reg(DM355_EVT26_MMC0_RX);
241 } else if (cpu_is_davinci_dm365()) {
242 mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
243 mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
244 SZ_4K - 1;
245 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
246 davinci_mmcsd0_device.name = "da830-mmc";
247 } else if (cpu_is_davinci_dm644x()) {
248
249
250 __raw_writel(0,
251 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
252
253 davinci_cfg_reg(DM644X_MSTK);
254 }
255
256 pdev = &davinci_mmcsd0_device;
257 break;
258 }
259
260 if (WARN_ON(!pdev))
261 return;
262
263 pdev->dev.platform_data = config;
264 platform_device_register(pdev);
265}
266
267#else
268
269void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
270{
271}
272
273#endif
274
275
276
277static struct resource wdt_resources[] = {
278 {
279 .start = DAVINCI_WDOG_BASE,
280 .end = DAVINCI_WDOG_BASE + SZ_1K - 1,
281 .flags = IORESOURCE_MEM,
282 },
283};
284
285struct platform_device davinci_wdt_device = {
286 .name = "davinci-wdt",
287 .id = -1,
288 .num_resources = ARRAY_SIZE(wdt_resources),
289 .resource = wdt_resources,
290};
291
292void davinci_restart(enum reboot_mode mode, const char *cmd)
293{
294 davinci_watchdog_reset(&davinci_wdt_device);
295}
296
297int davinci_init_wdt(void)
298{
299 return platform_device_register(&davinci_wdt_device);
300}
301
302static struct platform_device davinci_gpio_device = {
303 .name = "davinci_gpio",
304 .id = -1,
305};
306
307int davinci_gpio_register(struct resource *res, int size, void *pdata)
308{
309 davinci_gpio_device.resource = res;
310 davinci_gpio_device.num_resources = size;
311 davinci_gpio_device.dev.platform_data = pdata;
312 return platform_device_register(&davinci_gpio_device);
313}
314
315
316
317
318
319struct davinci_timer_instance davinci_timer_instance[2] = {
320 {
321 .base = DAVINCI_TIMER0_BASE,
322 .bottom_irq = IRQ_TINT0_TINT12,
323 .top_irq = IRQ_TINT0_TINT34,
324 },
325 {
326 .base = DAVINCI_TIMER1_BASE,
327 .bottom_irq = IRQ_TINT1_TINT12,
328 .top_irq = IRQ_TINT1_TINT34,
329 },
330};
331
332
