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28#ifndef KGD_KFD_INTERFACE_H_INCLUDED
29#define KGD_KFD_INTERFACE_H_INCLUDED
30
31#include <linux/types.h>
32
33struct pci_dev;
34
35#define KFD_INTERFACE_VERSION 1
36
37struct kfd_dev;
38struct kgd_dev;
39
40struct kgd_mem;
41
42enum kgd_memory_pool {
43 KGD_POOL_SYSTEM_CACHEABLE = 1,
44 KGD_POOL_SYSTEM_WRITECOMBINE = 2,
45 KGD_POOL_FRAMEBUFFER = 3,
46};
47
48enum kgd_engine_type {
49 KGD_ENGINE_PFP = 1,
50 KGD_ENGINE_ME,
51 KGD_ENGINE_CE,
52 KGD_ENGINE_MEC1,
53 KGD_ENGINE_MEC2,
54 KGD_ENGINE_RLC,
55 KGD_ENGINE_SDMA1,
56 KGD_ENGINE_SDMA2,
57 KGD_ENGINE_MAX
58};
59
60struct kgd2kfd_shared_resources {
61
62 unsigned int compute_vmid_bitmap;
63
64
65 unsigned int first_compute_pipe;
66
67
68 unsigned int compute_pipe_count;
69
70
71 phys_addr_t doorbell_physical_address;
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73
74 size_t doorbell_aperture_size;
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77 size_t doorbell_start_offset;
78};
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125struct kfd2kgd_calls {
126 int (*init_gtt_mem_allocation)(struct kgd_dev *kgd, size_t size,
127 void **mem_obj, uint64_t *gpu_addr,
128 void **cpu_ptr);
129
130 void (*free_gtt_mem)(struct kgd_dev *kgd, void *mem_obj);
131
132 uint64_t (*get_vmem_size)(struct kgd_dev *kgd);
133 uint64_t (*get_gpu_clock_counter)(struct kgd_dev *kgd);
134
135 uint32_t (*get_max_engine_clock_in_mhz)(struct kgd_dev *kgd);
136
137
138 void (*program_sh_mem_settings)(struct kgd_dev *kgd, uint32_t vmid,
139 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
140 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
141
142 int (*set_pasid_vmid_mapping)(struct kgd_dev *kgd, unsigned int pasid,
143 unsigned int vmid);
144
145 int (*init_pipeline)(struct kgd_dev *kgd, uint32_t pipe_id,
146 uint32_t hpd_size, uint64_t hpd_gpu_addr);
147
148 int (*init_interrupts)(struct kgd_dev *kgd, uint32_t pipe_id);
149
150 int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
151 uint32_t queue_id, uint32_t __user *wptr);
152
153 int (*hqd_sdma_load)(struct kgd_dev *kgd, void *mqd);
154
155 bool (*hqd_is_occupied)(struct kgd_dev *kgd, uint64_t queue_address,
156 uint32_t pipe_id, uint32_t queue_id);
157
158 int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
159 unsigned int timeout, uint32_t pipe_id,
160 uint32_t queue_id);
161
162 bool (*hqd_sdma_is_occupied)(struct kgd_dev *kgd, void *mqd);
163
164 int (*hqd_sdma_destroy)(struct kgd_dev *kgd, void *mqd,
165 unsigned int timeout);
166
167 int (*address_watch_disable)(struct kgd_dev *kgd);
168 int (*address_watch_execute)(struct kgd_dev *kgd,
169 unsigned int watch_point_id,
170 uint32_t cntl_val,
171 uint32_t addr_hi,
172 uint32_t addr_lo);
173 int (*wave_control_execute)(struct kgd_dev *kgd,
174 uint32_t gfx_index_val,
175 uint32_t sq_cmd);
176 uint32_t (*address_watch_get_offset)(struct kgd_dev *kgd,
177 unsigned int watch_point_id,
178 unsigned int reg_offset);
179 bool (*get_atc_vmid_pasid_mapping_valid)(
180 struct kgd_dev *kgd,
181 uint8_t vmid);
182 uint16_t (*get_atc_vmid_pasid_mapping_pasid)(
183 struct kgd_dev *kgd,
184 uint8_t vmid);
185 void (*write_vmid_invalidate_request)(struct kgd_dev *kgd,
186 uint8_t vmid);
187
188 uint16_t (*get_fw_version)(struct kgd_dev *kgd,
189 enum kgd_engine_type type);
190};
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212struct kgd2kfd_calls {
213 void (*exit)(void);
214 struct kfd_dev* (*probe)(struct kgd_dev *kgd, struct pci_dev *pdev,
215 const struct kfd2kgd_calls *f2g);
216 bool (*device_init)(struct kfd_dev *kfd,
217 const struct kgd2kfd_shared_resources *gpu_resources);
218 void (*device_exit)(struct kfd_dev *kfd);
219 void (*interrupt)(struct kfd_dev *kfd, const void *ih_ring_entry);
220 void (*suspend)(struct kfd_dev *kfd);
221 int (*resume)(struct kfd_dev *kfd);
222};
223
224int kgd2kfd_init(unsigned interface_version,
225 const struct kgd2kfd_calls **g2f);
226
227#endif
228