linux/drivers/gpu/drm/i915/intel_panel.c
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   1/*
   2 * Copyright © 2006-2010 Intel Corporation
   3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4 *
   5 * Permission is hereby granted, free of charge, to any person obtaining a
   6 * copy of this software and associated documentation files (the "Software"),
   7 * to deal in the Software without restriction, including without limitation
   8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9 * and/or sell copies of the Software, and to permit persons to whom the
  10 * Software is furnished to do so, subject to the following conditions:
  11 *
  12 * The above copyright notice and this permission notice (including the next
  13 * paragraph) shall be included in all copies or substantial portions of the
  14 * Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22 * DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors:
  25 *      Eric Anholt <eric@anholt.net>
  26 *      Dave Airlie <airlied@linux.ie>
  27 *      Jesse Barnes <jesse.barnes@intel.com>
  28 *      Chris Wilson <chris@chris-wilson.co.uk>
  29 */
  30
  31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32
  33#include <linux/kernel.h>
  34#include <linux/moduleparam.h>
  35#include <linux/pwm.h>
  36#include "intel_drv.h"
  37
  38#define CRC_PMIC_PWM_PERIOD_NS  21333
  39
  40void
  41intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  42                       struct drm_display_mode *adjusted_mode)
  43{
  44        drm_mode_copy(adjusted_mode, fixed_mode);
  45
  46        drm_mode_set_crtcinfo(adjusted_mode, 0);
  47}
  48
  49/**
  50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  51 * @dev: drm device
  52 * @fixed_mode : panel native mode
  53 * @connector: LVDS/eDP connector
  54 *
  55 * Return downclock_avail
  56 * Find the reduced downclock for LVDS/eDP in EDID.
  57 */
  58struct drm_display_mode *
  59intel_find_panel_downclock(struct drm_device *dev,
  60                        struct drm_display_mode *fixed_mode,
  61                        struct drm_connector *connector)
  62{
  63        struct drm_display_mode *scan, *tmp_mode;
  64        int temp_downclock;
  65
  66        temp_downclock = fixed_mode->clock;
  67        tmp_mode = NULL;
  68
  69        list_for_each_entry(scan, &connector->probed_modes, head) {
  70                /*
  71                 * If one mode has the same resolution with the fixed_panel
  72                 * mode while they have the different refresh rate, it means
  73                 * that the reduced downclock is found. In such
  74                 * case we can set the different FPx0/1 to dynamically select
  75                 * between low and high frequency.
  76                 */
  77                if (scan->hdisplay == fixed_mode->hdisplay &&
  78                    scan->hsync_start == fixed_mode->hsync_start &&
  79                    scan->hsync_end == fixed_mode->hsync_end &&
  80                    scan->htotal == fixed_mode->htotal &&
  81                    scan->vdisplay == fixed_mode->vdisplay &&
  82                    scan->vsync_start == fixed_mode->vsync_start &&
  83                    scan->vsync_end == fixed_mode->vsync_end &&
  84                    scan->vtotal == fixed_mode->vtotal) {
  85                        if (scan->clock < temp_downclock) {
  86                                /*
  87                                 * The downclock is already found. But we
  88                                 * expect to find the lower downclock.
  89                                 */
  90                                temp_downclock = scan->clock;
  91                                tmp_mode = scan;
  92                        }
  93                }
  94        }
  95
  96        if (temp_downclock < fixed_mode->clock)
  97                return drm_mode_duplicate(dev, tmp_mode);
  98        else
  99                return NULL;
 100}
 101
 102/* adjusted_mode has been preset to be the panel's fixed mode */
 103void
 104intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
 105                        struct intel_crtc_state *pipe_config,
 106                        int fitting_mode)
 107{
 108        const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 109        int x = 0, y = 0, width = 0, height = 0;
 110
 111        /* Native modes don't need fitting */
 112        if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
 113            adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
 114                goto done;
 115
 116        switch (fitting_mode) {
 117        case DRM_MODE_SCALE_CENTER:
 118                width = pipe_config->pipe_src_w;
 119                height = pipe_config->pipe_src_h;
 120                x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
 121                y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
 122                break;
 123
 124        case DRM_MODE_SCALE_ASPECT:
 125                /* Scale but preserve the aspect ratio */
 126                {
 127                        u32 scaled_width = adjusted_mode->crtc_hdisplay
 128                                * pipe_config->pipe_src_h;
 129                        u32 scaled_height = pipe_config->pipe_src_w
 130                                * adjusted_mode->crtc_vdisplay;
 131                        if (scaled_width > scaled_height) { /* pillar */
 132                                width = scaled_height / pipe_config->pipe_src_h;
 133                                if (width & 1)
 134                                        width++;
 135                                x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
 136                                y = 0;
 137                                height = adjusted_mode->crtc_vdisplay;
 138                        } else if (scaled_width < scaled_height) { /* letter */
 139                                height = scaled_width / pipe_config->pipe_src_w;
 140                                if (height & 1)
 141                                    height++;
 142                                y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
 143                                x = 0;
 144                                width = adjusted_mode->crtc_hdisplay;
 145                        } else {
 146                                x = y = 0;
 147                                width = adjusted_mode->crtc_hdisplay;
 148                                height = adjusted_mode->crtc_vdisplay;
 149                        }
 150                }
 151                break;
 152
 153        case DRM_MODE_SCALE_FULLSCREEN:
 154                x = y = 0;
 155                width = adjusted_mode->crtc_hdisplay;
 156                height = adjusted_mode->crtc_vdisplay;
 157                break;
 158
 159        default:
 160                WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 161                return;
 162        }
 163
 164done:
 165        pipe_config->pch_pfit.pos = (x << 16) | y;
 166        pipe_config->pch_pfit.size = (width << 16) | height;
 167        pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
 168}
 169
 170static void
 171centre_horizontally(struct drm_display_mode *adjusted_mode,
 172                    int width)
 173{
 174        u32 border, sync_pos, blank_width, sync_width;
 175
 176        /* keep the hsync and hblank widths constant */
 177        sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
 178        blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
 179        sync_pos = (blank_width - sync_width + 1) / 2;
 180
 181        border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
 182        border += border & 1; /* make the border even */
 183
 184        adjusted_mode->crtc_hdisplay = width;
 185        adjusted_mode->crtc_hblank_start = width + border;
 186        adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
 187
 188        adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
 189        adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
 190}
 191
 192static void
 193centre_vertically(struct drm_display_mode *adjusted_mode,
 194                  int height)
 195{
 196        u32 border, sync_pos, blank_width, sync_width;
 197
 198        /* keep the vsync and vblank widths constant */
 199        sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
 200        blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
 201        sync_pos = (blank_width - sync_width + 1) / 2;
 202
 203        border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
 204
 205        adjusted_mode->crtc_vdisplay = height;
 206        adjusted_mode->crtc_vblank_start = height + border;
 207        adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
 208
 209        adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
 210        adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
 211}
 212
 213static inline u32 panel_fitter_scaling(u32 source, u32 target)
 214{
 215        /*
 216         * Floating point operation is not supported. So the FACTOR
 217         * is defined, which can avoid the floating point computation
 218         * when calculating the panel ratio.
 219         */
 220#define ACCURACY 12
 221#define FACTOR (1 << ACCURACY)
 222        u32 ratio = source * FACTOR / target;
 223        return (FACTOR * ratio + FACTOR/2) / FACTOR;
 224}
 225
 226static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
 227                              u32 *pfit_control)
 228{
 229        const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 230        u32 scaled_width = adjusted_mode->crtc_hdisplay *
 231                pipe_config->pipe_src_h;
 232        u32 scaled_height = pipe_config->pipe_src_w *
 233                adjusted_mode->crtc_vdisplay;
 234
 235        /* 965+ is easy, it does everything in hw */
 236        if (scaled_width > scaled_height)
 237                *pfit_control |= PFIT_ENABLE |
 238                        PFIT_SCALING_PILLAR;
 239        else if (scaled_width < scaled_height)
 240                *pfit_control |= PFIT_ENABLE |
 241                        PFIT_SCALING_LETTER;
 242        else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
 243                *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 244}
 245
 246static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
 247                              u32 *pfit_control, u32 *pfit_pgm_ratios,
 248                              u32 *border)
 249{
 250        struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 251        u32 scaled_width = adjusted_mode->crtc_hdisplay *
 252                pipe_config->pipe_src_h;
 253        u32 scaled_height = pipe_config->pipe_src_w *
 254                adjusted_mode->crtc_vdisplay;
 255        u32 bits;
 256
 257        /*
 258         * For earlier chips we have to calculate the scaling
 259         * ratio by hand and program it into the
 260         * PFIT_PGM_RATIO register
 261         */
 262        if (scaled_width > scaled_height) { /* pillar */
 263                centre_horizontally(adjusted_mode,
 264                                    scaled_height /
 265                                    pipe_config->pipe_src_h);
 266
 267                *border = LVDS_BORDER_ENABLE;
 268                if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
 269                        bits = panel_fitter_scaling(pipe_config->pipe_src_h,
 270                                                    adjusted_mode->crtc_vdisplay);
 271
 272                        *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 273                                             bits << PFIT_VERT_SCALE_SHIFT);
 274                        *pfit_control |= (PFIT_ENABLE |
 275                                          VERT_INTERP_BILINEAR |
 276                                          HORIZ_INTERP_BILINEAR);
 277                }
 278        } else if (scaled_width < scaled_height) { /* letter */
 279                centre_vertically(adjusted_mode,
 280                                  scaled_width /
 281                                  pipe_config->pipe_src_w);
 282
 283                *border = LVDS_BORDER_ENABLE;
 284                if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
 285                        bits = panel_fitter_scaling(pipe_config->pipe_src_w,
 286                                                    adjusted_mode->crtc_hdisplay);
 287
 288                        *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 289                                             bits << PFIT_VERT_SCALE_SHIFT);
 290                        *pfit_control |= (PFIT_ENABLE |
 291                                          VERT_INTERP_BILINEAR |
 292                                          HORIZ_INTERP_BILINEAR);
 293                }
 294        } else {
 295                /* Aspects match, Let hw scale both directions */
 296                *pfit_control |= (PFIT_ENABLE |
 297                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 298                                  VERT_INTERP_BILINEAR |
 299                                  HORIZ_INTERP_BILINEAR);
 300        }
 301}
 302
 303void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
 304                              struct intel_crtc_state *pipe_config,
 305                              int fitting_mode)
 306{
 307        struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 308        u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 309        struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
 310
 311        /* Native modes don't need fitting */
 312        if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
 313            adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
 314                goto out;
 315
 316        switch (fitting_mode) {
 317        case DRM_MODE_SCALE_CENTER:
 318                /*
 319                 * For centered modes, we have to calculate border widths &
 320                 * heights and modify the values programmed into the CRTC.
 321                 */
 322                centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
 323                centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
 324                border = LVDS_BORDER_ENABLE;
 325                break;
 326        case DRM_MODE_SCALE_ASPECT:
 327                /* Scale but preserve the aspect ratio */
 328                if (INTEL_GEN(dev_priv) >= 4)
 329                        i965_scale_aspect(pipe_config, &pfit_control);
 330                else
 331                        i9xx_scale_aspect(pipe_config, &pfit_control,
 332                                          &pfit_pgm_ratios, &border);
 333                break;
 334        case DRM_MODE_SCALE_FULLSCREEN:
 335                /*
 336                 * Full scaling, even if it changes the aspect ratio.
 337                 * Fortunately this is all done for us in hw.
 338                 */
 339                if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
 340                    pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
 341                        pfit_control |= PFIT_ENABLE;
 342                        if (INTEL_GEN(dev_priv) >= 4)
 343                                pfit_control |= PFIT_SCALING_AUTO;
 344                        else
 345                                pfit_control |= (VERT_AUTO_SCALE |
 346                                                 VERT_INTERP_BILINEAR |
 347                                                 HORIZ_AUTO_SCALE |
 348                                                 HORIZ_INTERP_BILINEAR);
 349                }
 350                break;
 351        default:
 352                WARN(1, "bad panel fit mode: %d\n", fitting_mode);
 353                return;
 354        }
 355
 356        /* 965+ wants fuzzy fitting */
 357        /* FIXME: handle multiple panels by failing gracefully */
 358        if (INTEL_GEN(dev_priv) >= 4)
 359                pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 360                                 PFIT_FILTER_FUZZY);
 361
 362out:
 363        if ((pfit_control & PFIT_ENABLE) == 0) {
 364                pfit_control = 0;
 365                pfit_pgm_ratios = 0;
 366        }
 367
 368        /* Make sure pre-965 set dither correctly for 18bpp panels. */
 369        if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
 370                pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 371
 372        pipe_config->gmch_pfit.control = pfit_control;
 373        pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
 374        pipe_config->gmch_pfit.lvds_border_bits = border;
 375}
 376
 377enum drm_connector_status
 378intel_panel_detect(struct drm_device *dev)
 379{
 380        struct drm_i915_private *dev_priv = to_i915(dev);
 381
 382        /* Assume that the BIOS does not lie through the OpRegion... */
 383        if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
 384                return *dev_priv->opregion.lid_state & 0x1 ?
 385                        connector_status_connected :
 386                        connector_status_disconnected;
 387        }
 388
 389        switch (i915.panel_ignore_lid) {
 390        case -2:
 391                return connector_status_connected;
 392        case -1:
 393                return connector_status_disconnected;
 394        default:
 395                return connector_status_unknown;
 396        }
 397}
 398
 399/**
 400 * scale - scale values from one range to another
 401 *
 402 * @source_val: value in range [@source_min..@source_max]
 403 *
 404 * Return @source_val in range [@source_min..@source_max] scaled to range
 405 * [@target_min..@target_max].
 406 */
 407static uint32_t scale(uint32_t source_val,
 408                      uint32_t source_min, uint32_t source_max,
 409                      uint32_t target_min, uint32_t target_max)
 410{
 411        uint64_t target_val;
 412
 413        WARN_ON(source_min > source_max);
 414        WARN_ON(target_min > target_max);
 415
 416        /* defensive */
 417        source_val = clamp(source_val, source_min, source_max);
 418
 419        /* avoid overflows */
 420        target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
 421                        (target_max - target_min), source_max - source_min);
 422        target_val += target_min;
 423
 424        return target_val;
 425}
 426
 427/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
 428static inline u32 scale_user_to_hw(struct intel_connector *connector,
 429                                   u32 user_level, u32 user_max)
 430{
 431        struct intel_panel *panel = &connector->panel;
 432
 433        return scale(user_level, 0, user_max,
 434                     panel->backlight.min, panel->backlight.max);
 435}
 436
 437/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
 438 * to [hw_min..hw_max]. */
 439static inline u32 clamp_user_to_hw(struct intel_connector *connector,
 440                                   u32 user_level, u32 user_max)
 441{
 442        struct intel_panel *panel = &connector->panel;
 443        u32 hw_level;
 444
 445        hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
 446        hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
 447
 448        return hw_level;
 449}
 450
 451/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
 452static inline u32 scale_hw_to_user(struct intel_connector *connector,
 453                                   u32 hw_level, u32 user_max)
 454{
 455        struct intel_panel *panel = &connector->panel;
 456
 457        return scale(hw_level, panel->backlight.min, panel->backlight.max,
 458                     0, user_max);
 459}
 460
 461static u32 intel_panel_compute_brightness(struct intel_connector *connector,
 462                                          u32 val)
 463{
 464        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 465        struct intel_panel *panel = &connector->panel;
 466
 467        WARN_ON(panel->backlight.max == 0);
 468
 469        if (i915.invert_brightness < 0)
 470                return val;
 471
 472        if (i915.invert_brightness > 0 ||
 473            dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
 474                return panel->backlight.max - val;
 475        }
 476
 477        return val;
 478}
 479
 480static u32 lpt_get_backlight(struct intel_connector *connector)
 481{
 482        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 483
 484        return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
 485}
 486
 487static u32 pch_get_backlight(struct intel_connector *connector)
 488{
 489        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 490
 491        return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 492}
 493
 494static u32 i9xx_get_backlight(struct intel_connector *connector)
 495{
 496        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 497        struct intel_panel *panel = &connector->panel;
 498        u32 val;
 499
 500        val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
 501        if (INTEL_INFO(dev_priv)->gen < 4)
 502                val >>= 1;
 503
 504        if (panel->backlight.combination_mode) {
 505                u8 lbpc;
 506
 507                pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
 508                val *= lbpc;
 509        }
 510
 511        return val;
 512}
 513
 514static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
 515{
 516        if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 517                return 0;
 518
 519        return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
 520}
 521
 522static u32 vlv_get_backlight(struct intel_connector *connector)
 523{
 524        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 525        enum pipe pipe = intel_get_pipe_from_connector(connector);
 526
 527        return _vlv_get_backlight(dev_priv, pipe);
 528}
 529
 530static u32 bxt_get_backlight(struct intel_connector *connector)
 531{
 532        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 533        struct intel_panel *panel = &connector->panel;
 534
 535        return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
 536}
 537
 538static u32 pwm_get_backlight(struct intel_connector *connector)
 539{
 540        struct intel_panel *panel = &connector->panel;
 541        int duty_ns;
 542
 543        duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
 544        return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
 545}
 546
 547static u32 intel_panel_get_backlight(struct intel_connector *connector)
 548{
 549        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 550        struct intel_panel *panel = &connector->panel;
 551        u32 val = 0;
 552
 553        mutex_lock(&dev_priv->backlight_lock);
 554
 555        if (panel->backlight.enabled) {
 556                val = panel->backlight.get(connector);
 557                val = intel_panel_compute_brightness(connector, val);
 558        }
 559
 560        mutex_unlock(&dev_priv->backlight_lock);
 561
 562        DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
 563        return val;
 564}
 565
 566static void lpt_set_backlight(struct intel_connector *connector, u32 level)
 567{
 568        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 569        u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 570        I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
 571}
 572
 573static void pch_set_backlight(struct intel_connector *connector, u32 level)
 574{
 575        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 576        u32 tmp;
 577
 578        tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 579        I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
 580}
 581
 582static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
 583{
 584        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 585        struct intel_panel *panel = &connector->panel;
 586        u32 tmp, mask;
 587
 588        WARN_ON(panel->backlight.max == 0);
 589
 590        if (panel->backlight.combination_mode) {
 591                u8 lbpc;
 592
 593                lbpc = level * 0xfe / panel->backlight.max + 1;
 594                level /= lbpc;
 595                pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
 596        }
 597
 598        if (IS_GEN4(dev_priv)) {
 599                mask = BACKLIGHT_DUTY_CYCLE_MASK;
 600        } else {
 601                level <<= 1;
 602                mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
 603        }
 604
 605        tmp = I915_READ(BLC_PWM_CTL) & ~mask;
 606        I915_WRITE(BLC_PWM_CTL, tmp | level);
 607}
 608
 609static void vlv_set_backlight(struct intel_connector *connector, u32 level)
 610{
 611        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 612        enum pipe pipe = intel_get_pipe_from_connector(connector);
 613        u32 tmp;
 614
 615        if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 616                return;
 617
 618        tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
 619        I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
 620}
 621
 622static void bxt_set_backlight(struct intel_connector *connector, u32 level)
 623{
 624        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 625        struct intel_panel *panel = &connector->panel;
 626
 627        I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
 628}
 629
 630static void pwm_set_backlight(struct intel_connector *connector, u32 level)
 631{
 632        struct intel_panel *panel = &connector->panel;
 633        int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
 634
 635        pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
 636}
 637
 638static void
 639intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
 640{
 641        struct intel_panel *panel = &connector->panel;
 642
 643        DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
 644
 645        level = intel_panel_compute_brightness(connector, level);
 646        panel->backlight.set(connector, level);
 647}
 648
 649/* set backlight brightness to level in range [0..max], scaling wrt hw min */
 650static void intel_panel_set_backlight(struct intel_connector *connector,
 651                                      u32 user_level, u32 user_max)
 652{
 653        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 654        struct intel_panel *panel = &connector->panel;
 655        u32 hw_level;
 656
 657        if (!panel->backlight.present)
 658                return;
 659
 660        mutex_lock(&dev_priv->backlight_lock);
 661
 662        WARN_ON(panel->backlight.max == 0);
 663
 664        hw_level = scale_user_to_hw(connector, user_level, user_max);
 665        panel->backlight.level = hw_level;
 666
 667        if (panel->backlight.enabled)
 668                intel_panel_actually_set_backlight(connector, hw_level);
 669
 670        mutex_unlock(&dev_priv->backlight_lock);
 671}
 672
 673/* set backlight brightness to level in range [0..max], assuming hw min is
 674 * respected.
 675 */
 676void intel_panel_set_backlight_acpi(struct intel_connector *connector,
 677                                    u32 user_level, u32 user_max)
 678{
 679        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 680        struct intel_panel *panel = &connector->panel;
 681        enum pipe pipe = intel_get_pipe_from_connector(connector);
 682        u32 hw_level;
 683
 684        /*
 685         * INVALID_PIPE may occur during driver init because
 686         * connection_mutex isn't held across the entire backlight
 687         * setup + modeset readout, and the BIOS can issue the
 688         * requests at any time.
 689         */
 690        if (!panel->backlight.present || pipe == INVALID_PIPE)
 691                return;
 692
 693        mutex_lock(&dev_priv->backlight_lock);
 694
 695        WARN_ON(panel->backlight.max == 0);
 696
 697        hw_level = clamp_user_to_hw(connector, user_level, user_max);
 698        panel->backlight.level = hw_level;
 699
 700        if (panel->backlight.device)
 701                panel->backlight.device->props.brightness =
 702                        scale_hw_to_user(connector,
 703                                         panel->backlight.level,
 704                                         panel->backlight.device->props.max_brightness);
 705
 706        if (panel->backlight.enabled)
 707                intel_panel_actually_set_backlight(connector, hw_level);
 708
 709        mutex_unlock(&dev_priv->backlight_lock);
 710}
 711
 712static void lpt_disable_backlight(struct intel_connector *connector)
 713{
 714        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 715        u32 tmp;
 716
 717        intel_panel_actually_set_backlight(connector, 0);
 718
 719        /*
 720         * Although we don't support or enable CPU PWM with LPT/SPT based
 721         * systems, it may have been enabled prior to loading the
 722         * driver. Disable to avoid warnings on LCPLL disable.
 723         *
 724         * This needs rework if we need to add support for CPU PWM on PCH split
 725         * platforms.
 726         */
 727        tmp = I915_READ(BLC_PWM_CPU_CTL2);
 728        if (tmp & BLM_PWM_ENABLE) {
 729                DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
 730                I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
 731        }
 732
 733        tmp = I915_READ(BLC_PWM_PCH_CTL1);
 734        I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
 735}
 736
 737static void pch_disable_backlight(struct intel_connector *connector)
 738{
 739        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 740        u32 tmp;
 741
 742        intel_panel_actually_set_backlight(connector, 0);
 743
 744        tmp = I915_READ(BLC_PWM_CPU_CTL2);
 745        I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
 746
 747        tmp = I915_READ(BLC_PWM_PCH_CTL1);
 748        I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
 749}
 750
 751static void i9xx_disable_backlight(struct intel_connector *connector)
 752{
 753        intel_panel_actually_set_backlight(connector, 0);
 754}
 755
 756static void i965_disable_backlight(struct intel_connector *connector)
 757{
 758        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 759        u32 tmp;
 760
 761        intel_panel_actually_set_backlight(connector, 0);
 762
 763        tmp = I915_READ(BLC_PWM_CTL2);
 764        I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
 765}
 766
 767static void vlv_disable_backlight(struct intel_connector *connector)
 768{
 769        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 770        enum pipe pipe = intel_get_pipe_from_connector(connector);
 771        u32 tmp;
 772
 773        if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
 774                return;
 775
 776        intel_panel_actually_set_backlight(connector, 0);
 777
 778        tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
 779        I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
 780}
 781
 782static void bxt_disable_backlight(struct intel_connector *connector)
 783{
 784        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 785        struct intel_panel *panel = &connector->panel;
 786        u32 tmp, val;
 787
 788        intel_panel_actually_set_backlight(connector, 0);
 789
 790        tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
 791        I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
 792                        tmp & ~BXT_BLC_PWM_ENABLE);
 793
 794        if (panel->backlight.controller == 1) {
 795                val = I915_READ(UTIL_PIN_CTL);
 796                val &= ~UTIL_PIN_ENABLE;
 797                I915_WRITE(UTIL_PIN_CTL, val);
 798        }
 799}
 800
 801static void pwm_disable_backlight(struct intel_connector *connector)
 802{
 803        struct intel_panel *panel = &connector->panel;
 804
 805        /* Disable the backlight */
 806        pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
 807        usleep_range(2000, 3000);
 808        pwm_disable(panel->backlight.pwm);
 809}
 810
 811void intel_panel_disable_backlight(struct intel_connector *connector)
 812{
 813        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 814        struct intel_panel *panel = &connector->panel;
 815
 816        if (!panel->backlight.present)
 817                return;
 818
 819        /*
 820         * Do not disable backlight on the vga_switcheroo path. When switching
 821         * away from i915, the other client may depend on i915 to handle the
 822         * backlight. This will leave the backlight on unnecessarily when
 823         * another client is not activated.
 824         */
 825        if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
 826                DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
 827                return;
 828        }
 829
 830        mutex_lock(&dev_priv->backlight_lock);
 831
 832        if (panel->backlight.device)
 833                panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
 834        panel->backlight.enabled = false;
 835        panel->backlight.disable(connector);
 836
 837        mutex_unlock(&dev_priv->backlight_lock);
 838}
 839
 840static void lpt_enable_backlight(struct intel_connector *connector)
 841{
 842        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 843        struct intel_panel *panel = &connector->panel;
 844        u32 pch_ctl1, pch_ctl2, schicken;
 845
 846        pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 847        if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
 848                DRM_DEBUG_KMS("pch backlight already enabled\n");
 849                pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
 850                I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 851        }
 852
 853        if (HAS_PCH_LPT(dev_priv)) {
 854                schicken = I915_READ(SOUTH_CHICKEN2);
 855                if (panel->backlight.alternate_pwm_increment)
 856                        schicken |= LPT_PWM_GRANULARITY;
 857                else
 858                        schicken &= ~LPT_PWM_GRANULARITY;
 859                I915_WRITE(SOUTH_CHICKEN2, schicken);
 860        } else {
 861                schicken = I915_READ(SOUTH_CHICKEN1);
 862                if (panel->backlight.alternate_pwm_increment)
 863                        schicken |= SPT_PWM_GRANULARITY;
 864                else
 865                        schicken &= ~SPT_PWM_GRANULARITY;
 866                I915_WRITE(SOUTH_CHICKEN1, schicken);
 867        }
 868
 869        pch_ctl2 = panel->backlight.max << 16;
 870        I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
 871
 872        pch_ctl1 = 0;
 873        if (panel->backlight.active_low_pwm)
 874                pch_ctl1 |= BLM_PCH_POLARITY;
 875
 876        /* After LPT, override is the default. */
 877        if (HAS_PCH_LPT(dev_priv))
 878                pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
 879
 880        I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 881        POSTING_READ(BLC_PWM_PCH_CTL1);
 882        I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
 883
 884        /* This won't stick until the above enable. */
 885        intel_panel_actually_set_backlight(connector, panel->backlight.level);
 886}
 887
 888static void pch_enable_backlight(struct intel_connector *connector)
 889{
 890        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 891        struct intel_panel *panel = &connector->panel;
 892        enum pipe pipe = intel_get_pipe_from_connector(connector);
 893        enum transcoder cpu_transcoder =
 894                intel_pipe_to_cpu_transcoder(dev_priv, pipe);
 895        u32 cpu_ctl2, pch_ctl1, pch_ctl2;
 896
 897        cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
 898        if (cpu_ctl2 & BLM_PWM_ENABLE) {
 899                DRM_DEBUG_KMS("cpu backlight already enabled\n");
 900                cpu_ctl2 &= ~BLM_PWM_ENABLE;
 901                I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
 902        }
 903
 904        pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
 905        if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
 906                DRM_DEBUG_KMS("pch backlight already enabled\n");
 907                pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
 908                I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 909        }
 910
 911        if (cpu_transcoder == TRANSCODER_EDP)
 912                cpu_ctl2 = BLM_TRANSCODER_EDP;
 913        else
 914                cpu_ctl2 = BLM_PIPE(cpu_transcoder);
 915        I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
 916        POSTING_READ(BLC_PWM_CPU_CTL2);
 917        I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
 918
 919        /* This won't stick until the above enable. */
 920        intel_panel_actually_set_backlight(connector, panel->backlight.level);
 921
 922        pch_ctl2 = panel->backlight.max << 16;
 923        I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
 924
 925        pch_ctl1 = 0;
 926        if (panel->backlight.active_low_pwm)
 927                pch_ctl1 |= BLM_PCH_POLARITY;
 928
 929        I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
 930        POSTING_READ(BLC_PWM_PCH_CTL1);
 931        I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
 932}
 933
 934static void i9xx_enable_backlight(struct intel_connector *connector)
 935{
 936        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 937        struct intel_panel *panel = &connector->panel;
 938        u32 ctl, freq;
 939
 940        ctl = I915_READ(BLC_PWM_CTL);
 941        if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
 942                DRM_DEBUG_KMS("backlight already enabled\n");
 943                I915_WRITE(BLC_PWM_CTL, 0);
 944        }
 945
 946        freq = panel->backlight.max;
 947        if (panel->backlight.combination_mode)
 948                freq /= 0xff;
 949
 950        ctl = freq << 17;
 951        if (panel->backlight.combination_mode)
 952                ctl |= BLM_LEGACY_MODE;
 953        if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
 954                ctl |= BLM_POLARITY_PNV;
 955
 956        I915_WRITE(BLC_PWM_CTL, ctl);
 957        POSTING_READ(BLC_PWM_CTL);
 958
 959        /* XXX: combine this into above write? */
 960        intel_panel_actually_set_backlight(connector, panel->backlight.level);
 961
 962        /*
 963         * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
 964         * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
 965         * that has backlight.
 966         */
 967        if (IS_GEN2(dev_priv))
 968                I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
 969}
 970
 971static void i965_enable_backlight(struct intel_connector *connector)
 972{
 973        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 974        struct intel_panel *panel = &connector->panel;
 975        enum pipe pipe = intel_get_pipe_from_connector(connector);
 976        u32 ctl, ctl2, freq;
 977
 978        ctl2 = I915_READ(BLC_PWM_CTL2);
 979        if (ctl2 & BLM_PWM_ENABLE) {
 980                DRM_DEBUG_KMS("backlight already enabled\n");
 981                ctl2 &= ~BLM_PWM_ENABLE;
 982                I915_WRITE(BLC_PWM_CTL2, ctl2);
 983        }
 984
 985        freq = panel->backlight.max;
 986        if (panel->backlight.combination_mode)
 987                freq /= 0xff;
 988
 989        ctl = freq << 16;
 990        I915_WRITE(BLC_PWM_CTL, ctl);
 991
 992        ctl2 = BLM_PIPE(pipe);
 993        if (panel->backlight.combination_mode)
 994                ctl2 |= BLM_COMBINATION_MODE;
 995        if (panel->backlight.active_low_pwm)
 996                ctl2 |= BLM_POLARITY_I965;
 997        I915_WRITE(BLC_PWM_CTL2, ctl2);
 998        POSTING_READ(BLC_PWM_CTL2);
 999        I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
1000
1001        intel_panel_actually_set_backlight(connector, panel->backlight.level);
1002}
1003
1004static void vlv_enable_backlight(struct intel_connector *connector)
1005{
1006        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1007        struct intel_panel *panel = &connector->panel;
1008        enum pipe pipe = intel_get_pipe_from_connector(connector);
1009        u32 ctl, ctl2;
1010
1011        if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1012                return;
1013
1014        ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1015        if (ctl2 & BLM_PWM_ENABLE) {
1016                DRM_DEBUG_KMS("backlight already enabled\n");
1017                ctl2 &= ~BLM_PWM_ENABLE;
1018                I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1019        }
1020
1021        ctl = panel->backlight.max << 16;
1022        I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1023
1024        /* XXX: combine this into above write? */
1025        intel_panel_actually_set_backlight(connector, panel->backlight.level);
1026
1027        ctl2 = 0;
1028        if (panel->backlight.active_low_pwm)
1029                ctl2 |= BLM_POLARITY_I965;
1030        I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1031        POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1032        I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1033}
1034
1035static void bxt_enable_backlight(struct intel_connector *connector)
1036{
1037        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1038        struct intel_panel *panel = &connector->panel;
1039        enum pipe pipe = intel_get_pipe_from_connector(connector);
1040        u32 pwm_ctl, val;
1041
1042        /* To use 2nd set of backlight registers, utility pin has to be
1043         * enabled with PWM mode.
1044         * The field should only be changed when the utility pin is disabled
1045         */
1046        if (panel->backlight.controller == 1) {
1047                val = I915_READ(UTIL_PIN_CTL);
1048                if (val & UTIL_PIN_ENABLE) {
1049                        DRM_DEBUG_KMS("util pin already enabled\n");
1050                        val &= ~UTIL_PIN_ENABLE;
1051                        I915_WRITE(UTIL_PIN_CTL, val);
1052                }
1053
1054                val = 0;
1055                if (panel->backlight.util_pin_active_low)
1056                        val |= UTIL_PIN_POLARITY;
1057                I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1058                                UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1059        }
1060
1061        pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1062        if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1063                DRM_DEBUG_KMS("backlight already enabled\n");
1064                pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1065                I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1066                                pwm_ctl);
1067        }
1068
1069        I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1070                        panel->backlight.max);
1071
1072        intel_panel_actually_set_backlight(connector, panel->backlight.level);
1073
1074        pwm_ctl = 0;
1075        if (panel->backlight.active_low_pwm)
1076                pwm_ctl |= BXT_BLC_PWM_POLARITY;
1077
1078        I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1079        POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1080        I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1081                        pwm_ctl | BXT_BLC_PWM_ENABLE);
1082}
1083
1084static void pwm_enable_backlight(struct intel_connector *connector)
1085{
1086        struct intel_panel *panel = &connector->panel;
1087
1088        pwm_enable(panel->backlight.pwm);
1089        intel_panel_actually_set_backlight(connector, panel->backlight.level);
1090}
1091
1092void intel_panel_enable_backlight(struct intel_connector *connector)
1093{
1094        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1095        struct intel_panel *panel = &connector->panel;
1096        enum pipe pipe = intel_get_pipe_from_connector(connector);
1097
1098        if (!panel->backlight.present)
1099                return;
1100
1101        DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1102
1103        mutex_lock(&dev_priv->backlight_lock);
1104
1105        WARN_ON(panel->backlight.max == 0);
1106
1107        if (panel->backlight.level <= panel->backlight.min) {
1108                panel->backlight.level = panel->backlight.max;
1109                if (panel->backlight.device)
1110                        panel->backlight.device->props.brightness =
1111                                scale_hw_to_user(connector,
1112                                                 panel->backlight.level,
1113                                                 panel->backlight.device->props.max_brightness);
1114        }
1115
1116        panel->backlight.enable(connector);
1117        panel->backlight.enabled = true;
1118        if (panel->backlight.device)
1119                panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1120
1121        mutex_unlock(&dev_priv->backlight_lock);
1122}
1123
1124#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1125static int intel_backlight_device_update_status(struct backlight_device *bd)
1126{
1127        struct intel_connector *connector = bl_get_data(bd);
1128        struct intel_panel *panel = &connector->panel;
1129        struct drm_device *dev = connector->base.dev;
1130
1131        drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1132        DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1133                      bd->props.brightness, bd->props.max_brightness);
1134        intel_panel_set_backlight(connector, bd->props.brightness,
1135                                  bd->props.max_brightness);
1136
1137        /*
1138         * Allow flipping bl_power as a sub-state of enabled. Sadly the
1139         * backlight class device does not make it easy to to differentiate
1140         * between callbacks for brightness and bl_power, so our backlight_power
1141         * callback needs to take this into account.
1142         */
1143        if (panel->backlight.enabled) {
1144                if (panel->backlight.power) {
1145                        bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1146                                bd->props.brightness != 0;
1147                        panel->backlight.power(connector, enable);
1148                }
1149        } else {
1150                bd->props.power = FB_BLANK_POWERDOWN;
1151        }
1152
1153        drm_modeset_unlock(&dev->mode_config.connection_mutex);
1154        return 0;
1155}
1156
1157static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1158{
1159        struct intel_connector *connector = bl_get_data(bd);
1160        struct drm_device *dev = connector->base.dev;
1161        struct drm_i915_private *dev_priv = to_i915(dev);
1162        u32 hw_level;
1163        int ret;
1164
1165        intel_runtime_pm_get(dev_priv);
1166        drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1167
1168        hw_level = intel_panel_get_backlight(connector);
1169        ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1170
1171        drm_modeset_unlock(&dev->mode_config.connection_mutex);
1172        intel_runtime_pm_put(dev_priv);
1173
1174        return ret;
1175}
1176
1177static const struct backlight_ops intel_backlight_device_ops = {
1178        .update_status = intel_backlight_device_update_status,
1179        .get_brightness = intel_backlight_device_get_brightness,
1180};
1181
1182int intel_backlight_device_register(struct intel_connector *connector)
1183{
1184        struct intel_panel *panel = &connector->panel;
1185        struct backlight_properties props;
1186
1187        if (WARN_ON(panel->backlight.device))
1188                return -ENODEV;
1189
1190        if (!panel->backlight.present)
1191                return 0;
1192
1193        WARN_ON(panel->backlight.max == 0);
1194
1195        memset(&props, 0, sizeof(props));
1196        props.type = BACKLIGHT_RAW;
1197
1198        /*
1199         * Note: Everything should work even if the backlight device max
1200         * presented to the userspace is arbitrarily chosen.
1201         */
1202        props.max_brightness = panel->backlight.max;
1203        props.brightness = scale_hw_to_user(connector,
1204                                            panel->backlight.level,
1205                                            props.max_brightness);
1206
1207        if (panel->backlight.enabled)
1208                props.power = FB_BLANK_UNBLANK;
1209        else
1210                props.power = FB_BLANK_POWERDOWN;
1211
1212        /*
1213         * Note: using the same name independent of the connector prevents
1214         * registration of multiple backlight devices in the driver.
1215         */
1216        panel->backlight.device =
1217                backlight_device_register("intel_backlight",
1218                                          connector->base.kdev,
1219                                          connector,
1220                                          &intel_backlight_device_ops, &props);
1221
1222        if (IS_ERR(panel->backlight.device)) {
1223                DRM_ERROR("Failed to register backlight: %ld\n",
1224                          PTR_ERR(panel->backlight.device));
1225                panel->backlight.device = NULL;
1226                return -ENODEV;
1227        }
1228
1229        DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1230                      connector->base.name);
1231
1232        return 0;
1233}
1234
1235void intel_backlight_device_unregister(struct intel_connector *connector)
1236{
1237        struct intel_panel *panel = &connector->panel;
1238
1239        if (panel->backlight.device) {
1240                backlight_device_unregister(panel->backlight.device);
1241                panel->backlight.device = NULL;
1242        }
1243}
1244#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1245
1246/*
1247 * BXT: PWM clock frequency = 19.2 MHz.
1248 */
1249static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1250{
1251        return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1252}
1253
1254/*
1255 * SPT: This value represents the period of the PWM stream in clock periods
1256 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1257 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1258 */
1259static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1260{
1261        struct intel_panel *panel = &connector->panel;
1262        u32 mul;
1263
1264        if (panel->backlight.alternate_pwm_increment)
1265                mul = 128;
1266        else
1267                mul = 16;
1268
1269        return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1270}
1271
1272/*
1273 * LPT: This value represents the period of the PWM stream in clock periods
1274 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1275 * LPT SOUTH_CHICKEN2 register bit 5).
1276 */
1277static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1278{
1279        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1280        struct intel_panel *panel = &connector->panel;
1281        u32 mul, clock;
1282
1283        if (panel->backlight.alternate_pwm_increment)
1284                mul = 16;
1285        else
1286                mul = 128;
1287
1288        if (HAS_PCH_LPT_H(dev_priv))
1289                clock = MHz(135); /* LPT:H */
1290        else
1291                clock = MHz(24); /* LPT:LP */
1292
1293        return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1294}
1295
1296/*
1297 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1298 * display raw clocks multiplied by 128.
1299 */
1300static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1301{
1302        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1303
1304        return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1305}
1306
1307/*
1308 * Gen2: This field determines the number of time base events (display core
1309 * clock frequency/32) in total for a complete cycle of modulated backlight
1310 * control.
1311 *
1312 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1313 * divided by 32.
1314 */
1315static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1316{
1317        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1318        int clock;
1319
1320        if (IS_PINEVIEW(dev_priv))
1321                clock = KHz(dev_priv->rawclk_freq);
1322        else
1323                clock = KHz(dev_priv->cdclk_freq);
1324
1325        return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1326}
1327
1328/*
1329 * Gen4: This value represents the period of the PWM stream in display core
1330 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1331 *
1332 */
1333static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1334{
1335        struct drm_device *dev = connector->base.dev;
1336        struct drm_i915_private *dev_priv = to_i915(dev);
1337        int clock;
1338
1339        if (IS_G4X(dev_priv))
1340                clock = KHz(dev_priv->rawclk_freq);
1341        else
1342                clock = KHz(dev_priv->cdclk_freq);
1343
1344        return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1345}
1346
1347/*
1348 * VLV: This value represents the period of the PWM stream in display core
1349 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1350 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1351 */
1352static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1353{
1354        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1355        int mul, clock;
1356
1357        if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1358                if (IS_CHERRYVIEW(dev_priv))
1359                        clock = KHz(19200);
1360                else
1361                        clock = MHz(25);
1362                mul = 16;
1363        } else {
1364                clock = KHz(dev_priv->rawclk_freq);
1365                mul = 128;
1366        }
1367
1368        return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1369}
1370
1371static u32 get_backlight_max_vbt(struct intel_connector *connector)
1372{
1373        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1374        struct intel_panel *panel = &connector->panel;
1375        u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1376        u32 pwm;
1377
1378        if (!panel->backlight.hz_to_pwm) {
1379                DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1380                return 0;
1381        }
1382
1383        if (pwm_freq_hz) {
1384                DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1385                              pwm_freq_hz);
1386        } else {
1387                pwm_freq_hz = 200;
1388                DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1389                              pwm_freq_hz);
1390        }
1391
1392        pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1393        if (!pwm) {
1394                DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1395                return 0;
1396        }
1397
1398        return pwm;
1399}
1400
1401/*
1402 * Note: The setup hooks can't assume pipe is set!
1403 */
1404static u32 get_backlight_min_vbt(struct intel_connector *connector)
1405{
1406        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1407        struct intel_panel *panel = &connector->panel;
1408        int min;
1409
1410        WARN_ON(panel->backlight.max == 0);
1411
1412        /*
1413         * XXX: If the vbt value is 255, it makes min equal to max, which leads
1414         * to problems. There are such machines out there. Either our
1415         * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1416         * against this by letting the minimum be at most (arbitrarily chosen)
1417         * 25% of the max.
1418         */
1419        min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1420        if (min != dev_priv->vbt.backlight.min_brightness) {
1421                DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1422                              dev_priv->vbt.backlight.min_brightness, min);
1423        }
1424
1425        /* vbt value is a coefficient in range [0..255] */
1426        return scale(min, 0, 255, 0, panel->backlight.max);
1427}
1428
1429static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1430{
1431        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1432        struct intel_panel *panel = &connector->panel;
1433        u32 pch_ctl1, pch_ctl2, val;
1434        bool alt;
1435
1436        if (HAS_PCH_LPT(dev_priv))
1437                alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1438        else
1439                alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1440        panel->backlight.alternate_pwm_increment = alt;
1441
1442        pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1443        panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1444
1445        pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1446        panel->backlight.max = pch_ctl2 >> 16;
1447
1448        if (!panel->backlight.max)
1449                panel->backlight.max = get_backlight_max_vbt(connector);
1450
1451        if (!panel->backlight.max)
1452                return -ENODEV;
1453
1454        panel->backlight.min = get_backlight_min_vbt(connector);
1455
1456        val = lpt_get_backlight(connector);
1457        val = intel_panel_compute_brightness(connector, val);
1458        panel->backlight.level = clamp(val, panel->backlight.min,
1459                                       panel->backlight.max);
1460
1461        panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1462
1463        return 0;
1464}
1465
1466static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1467{
1468        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1469        struct intel_panel *panel = &connector->panel;
1470        u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1471
1472        pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1473        panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1474
1475        pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1476        panel->backlight.max = pch_ctl2 >> 16;
1477
1478        if (!panel->backlight.max)
1479                panel->backlight.max = get_backlight_max_vbt(connector);
1480
1481        if (!panel->backlight.max)
1482                return -ENODEV;
1483
1484        panel->backlight.min = get_backlight_min_vbt(connector);
1485
1486        val = pch_get_backlight(connector);
1487        val = intel_panel_compute_brightness(connector, val);
1488        panel->backlight.level = clamp(val, panel->backlight.min,
1489                                       panel->backlight.max);
1490
1491        cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1492        panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1493                (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1494
1495        return 0;
1496}
1497
1498static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1499{
1500        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1501        struct intel_panel *panel = &connector->panel;
1502        u32 ctl, val;
1503
1504        ctl = I915_READ(BLC_PWM_CTL);
1505
1506        if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1507                panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1508
1509        if (IS_PINEVIEW(dev_priv))
1510                panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1511
1512        panel->backlight.max = ctl >> 17;
1513
1514        if (!panel->backlight.max) {
1515                panel->backlight.max = get_backlight_max_vbt(connector);
1516                panel->backlight.max >>= 1;
1517        }
1518
1519        if (!panel->backlight.max)
1520                return -ENODEV;
1521
1522        if (panel->backlight.combination_mode)
1523                panel->backlight.max *= 0xff;
1524
1525        panel->backlight.min = get_backlight_min_vbt(connector);
1526
1527        val = i9xx_get_backlight(connector);
1528        val = intel_panel_compute_brightness(connector, val);
1529        panel->backlight.level = clamp(val, panel->backlight.min,
1530                                       panel->backlight.max);
1531
1532        panel->backlight.enabled = val != 0;
1533
1534        return 0;
1535}
1536
1537static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1538{
1539        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1540        struct intel_panel *panel = &connector->panel;
1541        u32 ctl, ctl2, val;
1542
1543        ctl2 = I915_READ(BLC_PWM_CTL2);
1544        panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1545        panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1546
1547        ctl = I915_READ(BLC_PWM_CTL);
1548        panel->backlight.max = ctl >> 16;
1549
1550        if (!panel->backlight.max)
1551                panel->backlight.max = get_backlight_max_vbt(connector);
1552
1553        if (!panel->backlight.max)
1554                return -ENODEV;
1555
1556        if (panel->backlight.combination_mode)
1557                panel->backlight.max *= 0xff;
1558
1559        panel->backlight.min = get_backlight_min_vbt(connector);
1560
1561        val = i9xx_get_backlight(connector);
1562        val = intel_panel_compute_brightness(connector, val);
1563        panel->backlight.level = clamp(val, panel->backlight.min,
1564                                       panel->backlight.max);
1565
1566        panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1567
1568        return 0;
1569}
1570
1571static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1572{
1573        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1574        struct intel_panel *panel = &connector->panel;
1575        u32 ctl, ctl2, val;
1576
1577        if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1578                return -ENODEV;
1579
1580        ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1581        panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1582
1583        ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1584        panel->backlight.max = ctl >> 16;
1585
1586        if (!panel->backlight.max)
1587                panel->backlight.max = get_backlight_max_vbt(connector);
1588
1589        if (!panel->backlight.max)
1590                return -ENODEV;
1591
1592        panel->backlight.min = get_backlight_min_vbt(connector);
1593
1594        val = _vlv_get_backlight(dev_priv, pipe);
1595        val = intel_panel_compute_brightness(connector, val);
1596        panel->backlight.level = clamp(val, panel->backlight.min,
1597                                       panel->backlight.max);
1598
1599        panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1600
1601        return 0;
1602}
1603
1604static int
1605bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1606{
1607        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1608        struct intel_panel *panel = &connector->panel;
1609        u32 pwm_ctl, val;
1610
1611        /*
1612         * For BXT hard coding the Backlight controller to 0.
1613         * TODO : Read the controller value from VBT and generalize
1614         */
1615        panel->backlight.controller = 0;
1616
1617        pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1618
1619        /* Keeping the check if controller 1 is to be programmed.
1620         * This will come into affect once the VBT parsing
1621         * is fixed for controller selection, and controller 1 is used
1622         * for a prticular display configuration.
1623         */
1624        if (panel->backlight.controller == 1) {
1625                val = I915_READ(UTIL_PIN_CTL);
1626                panel->backlight.util_pin_active_low =
1627                                        val & UTIL_PIN_POLARITY;
1628        }
1629
1630        panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1631        panel->backlight.max =
1632                I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1633
1634        if (!panel->backlight.max)
1635                panel->backlight.max = get_backlight_max_vbt(connector);
1636
1637        if (!panel->backlight.max)
1638                return -ENODEV;
1639
1640        val = bxt_get_backlight(connector);
1641        val = intel_panel_compute_brightness(connector, val);
1642        panel->backlight.level = clamp(val, panel->backlight.min,
1643                                       panel->backlight.max);
1644
1645        panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1646
1647        return 0;
1648}
1649
1650static int pwm_setup_backlight(struct intel_connector *connector,
1651                               enum pipe pipe)
1652{
1653        struct drm_device *dev = connector->base.dev;
1654        struct intel_panel *panel = &connector->panel;
1655        int retval;
1656
1657        /* Get the PWM chip for backlight control */
1658        panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1659        if (IS_ERR(panel->backlight.pwm)) {
1660                DRM_ERROR("Failed to own the pwm chip\n");
1661                panel->backlight.pwm = NULL;
1662                return -ENODEV;
1663        }
1664
1665        /*
1666         * FIXME: pwm_apply_args() should be removed when switching to
1667         * the atomic PWM API.
1668         */
1669        pwm_apply_args(panel->backlight.pwm);
1670
1671        retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1672                            CRC_PMIC_PWM_PERIOD_NS);
1673        if (retval < 0) {
1674                DRM_ERROR("Failed to configure the pwm chip\n");
1675                pwm_put(panel->backlight.pwm);
1676                panel->backlight.pwm = NULL;
1677                return retval;
1678        }
1679
1680        panel->backlight.min = 0; /* 0% */
1681        panel->backlight.max = 100; /* 100% */
1682        panel->backlight.level = DIV_ROUND_UP(
1683                                 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1684                                 CRC_PMIC_PWM_PERIOD_NS);
1685        panel->backlight.enabled = panel->backlight.level != 0;
1686
1687        return 0;
1688}
1689
1690int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1691{
1692        struct drm_i915_private *dev_priv = to_i915(connector->dev);
1693        struct intel_connector *intel_connector = to_intel_connector(connector);
1694        struct intel_panel *panel = &intel_connector->panel;
1695        int ret;
1696
1697        if (!dev_priv->vbt.backlight.present) {
1698                if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1699                        DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1700                } else {
1701                        DRM_DEBUG_KMS("no backlight present per VBT\n");
1702                        return 0;
1703                }
1704        }
1705
1706        /* ensure intel_panel has been initialized first */
1707        if (WARN_ON(!panel->backlight.setup))
1708                return -ENODEV;
1709
1710        /* set level and max in panel struct */
1711        mutex_lock(&dev_priv->backlight_lock);
1712        ret = panel->backlight.setup(intel_connector, pipe);
1713        mutex_unlock(&dev_priv->backlight_lock);
1714
1715        if (ret) {
1716                DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1717                              connector->name);
1718                return ret;
1719        }
1720
1721        panel->backlight.present = true;
1722
1723        DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1724                      connector->name,
1725                      enableddisabled(panel->backlight.enabled),
1726                      panel->backlight.level, panel->backlight.max);
1727
1728        return 0;
1729}
1730
1731void intel_panel_destroy_backlight(struct drm_connector *connector)
1732{
1733        struct intel_connector *intel_connector = to_intel_connector(connector);
1734        struct intel_panel *panel = &intel_connector->panel;
1735
1736        /* dispose of the pwm */
1737        if (panel->backlight.pwm)
1738                pwm_put(panel->backlight.pwm);
1739
1740        panel->backlight.present = false;
1741}
1742
1743/* Set up chip specific backlight functions */
1744static void
1745intel_panel_init_backlight_funcs(struct intel_panel *panel)
1746{
1747        struct intel_connector *connector =
1748                container_of(panel, struct intel_connector, panel);
1749        struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1750
1751        if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1752            intel_dp_aux_init_backlight_funcs(connector) == 0)
1753                return;
1754
1755        if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1756            intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1757                return;
1758
1759        if (IS_BROXTON(dev_priv)) {
1760                panel->backlight.setup = bxt_setup_backlight;
1761                panel->backlight.enable = bxt_enable_backlight;
1762                panel->backlight.disable = bxt_disable_backlight;
1763                panel->backlight.set = bxt_set_backlight;
1764                panel->backlight.get = bxt_get_backlight;
1765                panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1766        } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1767                   HAS_PCH_KBP(dev_priv)) {
1768                panel->backlight.setup = lpt_setup_backlight;
1769                panel->backlight.enable = lpt_enable_backlight;
1770                panel->backlight.disable = lpt_disable_backlight;
1771                panel->backlight.set = lpt_set_backlight;
1772                panel->backlight.get = lpt_get_backlight;
1773                if (HAS_PCH_LPT(dev_priv))
1774                        panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1775                else
1776                        panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1777        } else if (HAS_PCH_SPLIT(dev_priv)) {
1778                panel->backlight.setup = pch_setup_backlight;
1779                panel->backlight.enable = pch_enable_backlight;
1780                panel->backlight.disable = pch_disable_backlight;
1781                panel->backlight.set = pch_set_backlight;
1782                panel->backlight.get = pch_get_backlight;
1783                panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1784        } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1785                if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1786                        panel->backlight.setup = pwm_setup_backlight;
1787                        panel->backlight.enable = pwm_enable_backlight;
1788                        panel->backlight.disable = pwm_disable_backlight;
1789                        panel->backlight.set = pwm_set_backlight;
1790                        panel->backlight.get = pwm_get_backlight;
1791                } else {
1792                        panel->backlight.setup = vlv_setup_backlight;
1793                        panel->backlight.enable = vlv_enable_backlight;
1794                        panel->backlight.disable = vlv_disable_backlight;
1795                        panel->backlight.set = vlv_set_backlight;
1796                        panel->backlight.get = vlv_get_backlight;
1797                        panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1798                }
1799        } else if (IS_GEN4(dev_priv)) {
1800                panel->backlight.setup = i965_setup_backlight;
1801                panel->backlight.enable = i965_enable_backlight;
1802                panel->backlight.disable = i965_disable_backlight;
1803                panel->backlight.set = i9xx_set_backlight;
1804                panel->backlight.get = i9xx_get_backlight;
1805                panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1806        } else {
1807                panel->backlight.setup = i9xx_setup_backlight;
1808                panel->backlight.enable = i9xx_enable_backlight;
1809                panel->backlight.disable = i9xx_disable_backlight;
1810                panel->backlight.set = i9xx_set_backlight;
1811                panel->backlight.get = i9xx_get_backlight;
1812                panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1813        }
1814}
1815
1816int intel_panel_init(struct intel_panel *panel,
1817                     struct drm_display_mode *fixed_mode,
1818                     struct drm_display_mode *downclock_mode)
1819{
1820        intel_panel_init_backlight_funcs(panel);
1821
1822        panel->fixed_mode = fixed_mode;
1823        panel->downclock_mode = downclock_mode;
1824
1825        return 0;
1826}
1827
1828void intel_panel_fini(struct intel_panel *panel)
1829{
1830        struct intel_connector *intel_connector =
1831                container_of(panel, struct intel_connector, panel);
1832
1833        if (panel->fixed_mode)
1834                drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1835
1836        if (panel->downclock_mode)
1837                drm_mode_destroy(intel_connector->base.dev,
1838                                panel->downclock_mode);
1839}
1840