1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26#include <linux/virtio.h>
27#include <linux/virtio_config.h>
28#include <drm/drmP.h>
29#include "virtgpu_drv.h"
30
31static int virtio_gpu_fbdev = 1;
32
33MODULE_PARM_DESC(fbdev, "Disable/Enable framebuffer device & console");
34module_param_named(fbdev, virtio_gpu_fbdev, int, 0400);
35
36static void virtio_gpu_config_changed_work_func(struct work_struct *work)
37{
38 struct virtio_gpu_device *vgdev =
39 container_of(work, struct virtio_gpu_device,
40 config_changed_work);
41 u32 events_read, events_clear = 0;
42
43
44 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
45 events_read, &events_read);
46 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
47 virtio_gpu_cmd_get_display_info(vgdev);
48 drm_helper_hpd_irq_event(vgdev->ddev);
49 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
50 }
51 virtio_cwrite(vgdev->vdev, struct virtio_gpu_config,
52 events_clear, &events_clear);
53}
54
55static void virtio_gpu_ctx_id_get(struct virtio_gpu_device *vgdev,
56 uint32_t *resid)
57{
58 int handle;
59
60 idr_preload(GFP_KERNEL);
61 spin_lock(&vgdev->ctx_id_idr_lock);
62 handle = idr_alloc(&vgdev->ctx_id_idr, NULL, 1, 0, 0);
63 spin_unlock(&vgdev->ctx_id_idr_lock);
64 idr_preload_end();
65 *resid = handle;
66}
67
68static void virtio_gpu_ctx_id_put(struct virtio_gpu_device *vgdev, uint32_t id)
69{
70 spin_lock(&vgdev->ctx_id_idr_lock);
71 idr_remove(&vgdev->ctx_id_idr, id);
72 spin_unlock(&vgdev->ctx_id_idr_lock);
73}
74
75static void virtio_gpu_context_create(struct virtio_gpu_device *vgdev,
76 uint32_t nlen, const char *name,
77 uint32_t *ctx_id)
78{
79 virtio_gpu_ctx_id_get(vgdev, ctx_id);
80 virtio_gpu_cmd_context_create(vgdev, *ctx_id, nlen, name);
81}
82
83static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev,
84 uint32_t ctx_id)
85{
86 virtio_gpu_cmd_context_destroy(vgdev, ctx_id);
87 virtio_gpu_ctx_id_put(vgdev, ctx_id);
88}
89
90static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
91 void (*work_func)(struct work_struct *work))
92{
93 spin_lock_init(&vgvq->qlock);
94 init_waitqueue_head(&vgvq->ack_queue);
95 INIT_WORK(&vgvq->dequeue_work, work_func);
96}
97
98static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
99 int num_capsets)
100{
101 int i, ret;
102
103 vgdev->capsets = kcalloc(num_capsets,
104 sizeof(struct virtio_gpu_drv_capset),
105 GFP_KERNEL);
106 if (!vgdev->capsets) {
107 DRM_ERROR("failed to allocate cap sets\n");
108 return;
109 }
110 for (i = 0; i < num_capsets; i++) {
111 virtio_gpu_cmd_get_capset_info(vgdev, i);
112 ret = wait_event_timeout(vgdev->resp_wq,
113 vgdev->capsets[i].id > 0, 5 * HZ);
114 if (ret == 0) {
115 DRM_ERROR("timed out waiting for cap set %d\n", i);
116 kfree(vgdev->capsets);
117 vgdev->capsets = NULL;
118 return;
119 }
120 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
121 i, vgdev->capsets[i].id,
122 vgdev->capsets[i].max_version,
123 vgdev->capsets[i].max_size);
124 }
125 vgdev->num_capsets = num_capsets;
126}
127
128int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags)
129{
130 static vq_callback_t *callbacks[] = {
131 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
132 };
133 static const char * const names[] = { "control", "cursor" };
134
135 struct virtio_gpu_device *vgdev;
136
137 struct virtqueue *vqs[2];
138 u32 num_scanouts, num_capsets;
139 int ret;
140
141 if (!virtio_has_feature(dev->virtdev, VIRTIO_F_VERSION_1))
142 return -ENODEV;
143
144 vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
145 if (!vgdev)
146 return -ENOMEM;
147
148 vgdev->ddev = dev;
149 dev->dev_private = vgdev;
150 vgdev->vdev = dev->virtdev;
151 vgdev->dev = dev->dev;
152
153 spin_lock_init(&vgdev->display_info_lock);
154 spin_lock_init(&vgdev->ctx_id_idr_lock);
155 idr_init(&vgdev->ctx_id_idr);
156 spin_lock_init(&vgdev->resource_idr_lock);
157 idr_init(&vgdev->resource_idr);
158 init_waitqueue_head(&vgdev->resp_wq);
159 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
160 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
161
162 vgdev->fence_drv.context = dma_fence_context_alloc(1);
163 spin_lock_init(&vgdev->fence_drv.lock);
164 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
165 INIT_LIST_HEAD(&vgdev->cap_cache);
166 INIT_WORK(&vgdev->config_changed_work,
167 virtio_gpu_config_changed_work_func);
168
169 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
170 vgdev->has_virgl_3d = true;
171 DRM_INFO("virgl 3d acceleration %s\n",
172 vgdev->has_virgl_3d ? "enabled" : "not available");
173
174 ret = vgdev->vdev->config->find_vqs(vgdev->vdev, 2, vqs,
175 callbacks, names);
176 if (ret) {
177 DRM_ERROR("failed to find virt queues\n");
178 goto err_vqs;
179 }
180 vgdev->ctrlq.vq = vqs[0];
181 vgdev->cursorq.vq = vqs[1];
182 ret = virtio_gpu_alloc_vbufs(vgdev);
183 if (ret) {
184 DRM_ERROR("failed to alloc vbufs\n");
185 goto err_vbufs;
186 }
187
188 ret = virtio_gpu_ttm_init(vgdev);
189 if (ret) {
190 DRM_ERROR("failed to init ttm %d\n", ret);
191 goto err_ttm;
192 }
193
194
195 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
196 num_scanouts, &num_scanouts);
197 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
198 VIRTIO_GPU_MAX_SCANOUTS);
199 if (!vgdev->num_scanouts) {
200 DRM_ERROR("num_scanouts is zero\n");
201 ret = -EINVAL;
202 goto err_scanouts;
203 }
204 DRM_INFO("number of scanouts: %d\n", num_scanouts);
205
206 virtio_cread(vgdev->vdev, struct virtio_gpu_config,
207 num_capsets, &num_capsets);
208 DRM_INFO("number of cap sets: %d\n", num_capsets);
209
210 ret = virtio_gpu_modeset_init(vgdev);
211 if (ret)
212 goto err_modeset;
213
214 virtio_device_ready(vgdev->vdev);
215 vgdev->vqs_ready = true;
216
217 if (num_capsets)
218 virtio_gpu_get_capsets(vgdev, num_capsets);
219 virtio_gpu_cmd_get_display_info(vgdev);
220 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
221 5 * HZ);
222 if (virtio_gpu_fbdev)
223 virtio_gpu_fbdev_init(vgdev);
224
225 return 0;
226
227err_modeset:
228err_scanouts:
229 virtio_gpu_ttm_fini(vgdev);
230err_ttm:
231 virtio_gpu_free_vbufs(vgdev);
232err_vbufs:
233 vgdev->vdev->config->del_vqs(vgdev->vdev);
234err_vqs:
235 kfree(vgdev);
236 return ret;
237}
238
239static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
240{
241 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
242
243 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
244 kfree(cache_ent->caps_cache);
245 kfree(cache_ent);
246 }
247}
248
249int virtio_gpu_driver_unload(struct drm_device *dev)
250{
251 struct virtio_gpu_device *vgdev = dev->dev_private;
252
253 vgdev->vqs_ready = false;
254 flush_work(&vgdev->ctrlq.dequeue_work);
255 flush_work(&vgdev->cursorq.dequeue_work);
256 flush_work(&vgdev->config_changed_work);
257 vgdev->vdev->config->del_vqs(vgdev->vdev);
258
259 virtio_gpu_modeset_fini(vgdev);
260 virtio_gpu_ttm_fini(vgdev);
261 virtio_gpu_free_vbufs(vgdev);
262 virtio_gpu_cleanup_cap_cache(vgdev);
263 kfree(vgdev->capsets);
264 kfree(vgdev);
265 return 0;
266}
267
268int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
269{
270 struct virtio_gpu_device *vgdev = dev->dev_private;
271 struct virtio_gpu_fpriv *vfpriv;
272 uint32_t id;
273 char dbgname[64], tmpname[TASK_COMM_LEN];
274
275
276 if (!vgdev->has_virgl_3d)
277 return 0;
278
279 get_task_comm(tmpname, current);
280 snprintf(dbgname, sizeof(dbgname), "%s", tmpname);
281 dbgname[63] = 0;
282
283 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
284 if (!vfpriv)
285 return -ENOMEM;
286
287 virtio_gpu_context_create(vgdev, strlen(dbgname), dbgname, &id);
288
289 vfpriv->ctx_id = id;
290 file->driver_priv = vfpriv;
291 return 0;
292}
293
294void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
295{
296 struct virtio_gpu_device *vgdev = dev->dev_private;
297 struct virtio_gpu_fpriv *vfpriv;
298
299 if (!vgdev->has_virgl_3d)
300 return;
301
302 vfpriv = file->driver_priv;
303
304 virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id);
305 kfree(vfpriv);
306 file->driver_priv = NULL;
307}
308
