linux/drivers/net/ethernet/atheros/atlx/atl1.c
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   1/*
   2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
   3 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
   4 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
   5 *
   6 * Derived from Intel e1000 driver
   7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
   8 *
   9 * This program is free software; you can redistribute it and/or modify it
  10 * under the terms of the GNU General Public License as published by the Free
  11 * Software Foundation; either version 2 of the License, or (at your option)
  12 * any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful, but WITHOUT
  15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  17 * more details.
  18 *
  19 * You should have received a copy of the GNU General Public License along with
  20 * this program; if not, write to the Free Software Foundation, Inc., 59
  21 * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  22 *
  23 * The full GNU General Public License is included in this distribution in the
  24 * file called COPYING.
  25 *
  26 * Contact Information:
  27 * Xiong Huang <xiong.huang@atheros.com>
  28 * Jie Yang <jie.yang@atheros.com>
  29 * Chris Snook <csnook@redhat.com>
  30 * Jay Cliburn <jcliburn@gmail.com>
  31 *
  32 * This version is adapted from the Attansic reference driver.
  33 *
  34 * TODO:
  35 * Add more ethtool functions.
  36 * Fix abstruse irq enable/disable condition described here:
  37 *      http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  38 *
  39 * NEEDS TESTING:
  40 * VLAN
  41 * multicast
  42 * promiscuous mode
  43 * interrupt coalescing
  44 * SMP torture testing
  45 */
  46
  47#include <linux/atomic.h>
  48#include <asm/byteorder.h>
  49
  50#include <linux/compiler.h>
  51#include <linux/crc32.h>
  52#include <linux/delay.h>
  53#include <linux/dma-mapping.h>
  54#include <linux/etherdevice.h>
  55#include <linux/hardirq.h>
  56#include <linux/if_ether.h>
  57#include <linux/if_vlan.h>
  58#include <linux/in.h>
  59#include <linux/interrupt.h>
  60#include <linux/ip.h>
  61#include <linux/irqflags.h>
  62#include <linux/irqreturn.h>
  63#include <linux/jiffies.h>
  64#include <linux/mii.h>
  65#include <linux/module.h>
  66#include <linux/moduleparam.h>
  67#include <linux/net.h>
  68#include <linux/netdevice.h>
  69#include <linux/pci.h>
  70#include <linux/pci_ids.h>
  71#include <linux/pm.h>
  72#include <linux/skbuff.h>
  73#include <linux/slab.h>
  74#include <linux/spinlock.h>
  75#include <linux/string.h>
  76#include <linux/tcp.h>
  77#include <linux/timer.h>
  78#include <linux/types.h>
  79#include <linux/workqueue.h>
  80
  81#include <net/checksum.h>
  82
  83#include "atl1.h"
  84
  85#define ATLX_DRIVER_VERSION "2.1.3"
  86MODULE_AUTHOR("Xiong Huang <xiong.huang@atheros.com>, "
  87              "Chris Snook <csnook@redhat.com>, "
  88              "Jay Cliburn <jcliburn@gmail.com>");
  89MODULE_LICENSE("GPL");
  90MODULE_VERSION(ATLX_DRIVER_VERSION);
  91
  92/* Temporary hack for merging atl1 and atl2 */
  93#include "atlx.c"
  94
  95static const struct ethtool_ops atl1_ethtool_ops;
  96
  97/*
  98 * This is the only thing that needs to be changed to adjust the
  99 * maximum number of ports that the driver can manage.
 100 */
 101#define ATL1_MAX_NIC 4
 102
 103#define OPTION_UNSET    -1
 104#define OPTION_DISABLED 0
 105#define OPTION_ENABLED  1
 106
 107#define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
 108
 109/*
 110 * Interrupt Moderate Timer in units of 2 us
 111 *
 112 * Valid Range: 10-65535
 113 *
 114 * Default Value: 100 (200us)
 115 */
 116static int int_mod_timer[ATL1_MAX_NIC+1] = ATL1_PARAM_INIT;
 117static unsigned int num_int_mod_timer;
 118module_param_array_named(int_mod_timer, int_mod_timer, int,
 119        &num_int_mod_timer, 0);
 120MODULE_PARM_DESC(int_mod_timer, "Interrupt moderator timer");
 121
 122#define DEFAULT_INT_MOD_CNT     100     /* 200us */
 123#define MAX_INT_MOD_CNT         65000
 124#define MIN_INT_MOD_CNT         50
 125
 126struct atl1_option {
 127        enum { enable_option, range_option, list_option } type;
 128        char *name;
 129        char *err;
 130        int def;
 131        union {
 132                struct {        /* range_option info */
 133                        int min;
 134                        int max;
 135                } r;
 136                struct {        /* list_option info */
 137                        int nr;
 138                        struct atl1_opt_list {
 139                                int i;
 140                                char *str;
 141                        } *p;
 142                } l;
 143        } arg;
 144};
 145
 146static int atl1_validate_option(int *value, struct atl1_option *opt,
 147                                struct pci_dev *pdev)
 148{
 149        if (*value == OPTION_UNSET) {
 150                *value = opt->def;
 151                return 0;
 152        }
 153
 154        switch (opt->type) {
 155        case enable_option:
 156                switch (*value) {
 157                case OPTION_ENABLED:
 158                        dev_info(&pdev->dev, "%s enabled\n", opt->name);
 159                        return 0;
 160                case OPTION_DISABLED:
 161                        dev_info(&pdev->dev, "%s disabled\n", opt->name);
 162                        return 0;
 163                }
 164                break;
 165        case range_option:
 166                if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
 167                        dev_info(&pdev->dev, "%s set to %i\n", opt->name,
 168                                *value);
 169                        return 0;
 170                }
 171                break;
 172        case list_option:{
 173                        int i;
 174                        struct atl1_opt_list *ent;
 175
 176                        for (i = 0; i < opt->arg.l.nr; i++) {
 177                                ent = &opt->arg.l.p[i];
 178                                if (*value == ent->i) {
 179                                        if (ent->str[0] != '\0')
 180                                                dev_info(&pdev->dev, "%s\n",
 181                                                        ent->str);
 182                                        return 0;
 183                                }
 184                        }
 185                }
 186                break;
 187
 188        default:
 189                break;
 190        }
 191
 192        dev_info(&pdev->dev, "invalid %s specified (%i) %s\n",
 193                opt->name, *value, opt->err);
 194        *value = opt->def;
 195        return -1;
 196}
 197
 198/**
 199 * atl1_check_options - Range Checking for Command Line Parameters
 200 * @adapter: board private structure
 201 *
 202 * This routine checks all command line parameters for valid user
 203 * input.  If an invalid value is given, or if no user specified
 204 * value exists, a default value is used.  The final value is stored
 205 * in a variable in the adapter structure.
 206 */
 207static void atl1_check_options(struct atl1_adapter *adapter)
 208{
 209        struct pci_dev *pdev = adapter->pdev;
 210        int bd = adapter->bd_number;
 211        if (bd >= ATL1_MAX_NIC) {
 212                dev_notice(&pdev->dev, "no configuration for board#%i\n", bd);
 213                dev_notice(&pdev->dev, "using defaults for all values\n");
 214        }
 215        {                       /* Interrupt Moderate Timer */
 216                struct atl1_option opt = {
 217                        .type = range_option,
 218                        .name = "Interrupt Moderator Timer",
 219                        .err = "using default of "
 220                                __MODULE_STRING(DEFAULT_INT_MOD_CNT),
 221                        .def = DEFAULT_INT_MOD_CNT,
 222                        .arg = {.r = {.min = MIN_INT_MOD_CNT,
 223                                        .max = MAX_INT_MOD_CNT} }
 224                };
 225                int val;
 226                if (num_int_mod_timer > bd) {
 227                        val = int_mod_timer[bd];
 228                        atl1_validate_option(&val, &opt, pdev);
 229                        adapter->imt = (u16) val;
 230                } else
 231                        adapter->imt = (u16) (opt.def);
 232        }
 233}
 234
 235/*
 236 * atl1_pci_tbl - PCI Device ID Table
 237 */
 238static const struct pci_device_id atl1_pci_tbl[] = {
 239        {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
 240        /* required last entry */
 241        {0,}
 242};
 243MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
 244
 245static const u32 atl1_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
 246        NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
 247
 248static int debug = -1;
 249module_param(debug, int, 0);
 250MODULE_PARM_DESC(debug, "Message level (0=none,...,16=all)");
 251
 252/*
 253 * Reset the transmit and receive units; mask and clear all interrupts.
 254 * hw - Struct containing variables accessed by shared code
 255 * return : 0  or  idle status (if error)
 256 */
 257static s32 atl1_reset_hw(struct atl1_hw *hw)
 258{
 259        struct pci_dev *pdev = hw->back->pdev;
 260        struct atl1_adapter *adapter = hw->back;
 261        u32 icr;
 262        int i;
 263
 264        /*
 265         * Clear Interrupt mask to stop board from generating
 266         * interrupts & Clear any pending interrupt events
 267         */
 268        /*
 269         * atlx_irq_disable(adapter);
 270         * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
 271         */
 272
 273        /*
 274         * Issue Soft Reset to the MAC.  This will reset the chip's
 275         * transmit, receive, DMA.  It will not effect
 276         * the current PCI configuration.  The global reset bit is self-
 277         * clearing, and should clear within a microsecond.
 278         */
 279        iowrite32(MASTER_CTRL_SOFT_RST, hw->hw_addr + REG_MASTER_CTRL);
 280        ioread32(hw->hw_addr + REG_MASTER_CTRL);
 281
 282        iowrite16(1, hw->hw_addr + REG_PHY_ENABLE);
 283        ioread16(hw->hw_addr + REG_PHY_ENABLE);
 284
 285        /* delay about 1ms */
 286        msleep(1);
 287
 288        /* Wait at least 10ms for All module to be Idle */
 289        for (i = 0; i < 10; i++) {
 290                icr = ioread32(hw->hw_addr + REG_IDLE_STATUS);
 291                if (!icr)
 292                        break;
 293                /* delay 1 ms */
 294                msleep(1);
 295                /* FIXME: still the right way to do this? */
 296                cpu_relax();
 297        }
 298
 299        if (icr) {
 300                if (netif_msg_hw(adapter))
 301                        dev_dbg(&pdev->dev, "ICR = 0x%x\n", icr);
 302                return icr;
 303        }
 304
 305        return 0;
 306}
 307
 308/* function about EEPROM
 309 *
 310 * check_eeprom_exist
 311 * return 0 if eeprom exist
 312 */
 313static int atl1_check_eeprom_exist(struct atl1_hw *hw)
 314{
 315        u32 value;
 316        value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 317        if (value & SPI_FLASH_CTRL_EN_VPD) {
 318                value &= ~SPI_FLASH_CTRL_EN_VPD;
 319                iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 320        }
 321
 322        value = ioread16(hw->hw_addr + REG_PCIE_CAP_LIST);
 323        return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
 324}
 325
 326static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
 327{
 328        int i;
 329        u32 control;
 330
 331        if (offset & 3)
 332                /* address do not align */
 333                return false;
 334
 335        iowrite32(0, hw->hw_addr + REG_VPD_DATA);
 336        control = (offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
 337        iowrite32(control, hw->hw_addr + REG_VPD_CAP);
 338        ioread32(hw->hw_addr + REG_VPD_CAP);
 339
 340        for (i = 0; i < 10; i++) {
 341                msleep(2);
 342                control = ioread32(hw->hw_addr + REG_VPD_CAP);
 343                if (control & VPD_CAP_VPD_FLAG)
 344                        break;
 345        }
 346        if (control & VPD_CAP_VPD_FLAG) {
 347                *p_value = ioread32(hw->hw_addr + REG_VPD_DATA);
 348                return true;
 349        }
 350        /* timeout */
 351        return false;
 352}
 353
 354/*
 355 * Reads the value from a PHY register
 356 * hw - Struct containing variables accessed by shared code
 357 * reg_addr - address of the PHY register to read
 358 */
 359static s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
 360{
 361        u32 val;
 362        int i;
 363
 364        val = ((u32) (reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
 365                MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW | MDIO_CLK_25_4 <<
 366                MDIO_CLK_SEL_SHIFT;
 367        iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 368        ioread32(hw->hw_addr + REG_MDIO_CTRL);
 369
 370        for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 371                udelay(2);
 372                val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 373                if (!(val & (MDIO_START | MDIO_BUSY)))
 374                        break;
 375        }
 376        if (!(val & (MDIO_START | MDIO_BUSY))) {
 377                *phy_data = (u16) val;
 378                return 0;
 379        }
 380        return ATLX_ERR_PHY;
 381}
 382
 383#define CUSTOM_SPI_CS_SETUP     2
 384#define CUSTOM_SPI_CLK_HI       2
 385#define CUSTOM_SPI_CLK_LO       2
 386#define CUSTOM_SPI_CS_HOLD      2
 387#define CUSTOM_SPI_CS_HI        3
 388
 389static bool atl1_spi_read(struct atl1_hw *hw, u32 addr, u32 *buf)
 390{
 391        int i;
 392        u32 value;
 393
 394        iowrite32(0, hw->hw_addr + REG_SPI_DATA);
 395        iowrite32(addr, hw->hw_addr + REG_SPI_ADDR);
 396
 397        value = SPI_FLASH_CTRL_WAIT_READY |
 398            (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
 399            SPI_FLASH_CTRL_CS_SETUP_SHIFT | (CUSTOM_SPI_CLK_HI &
 400                                             SPI_FLASH_CTRL_CLK_HI_MASK) <<
 401            SPI_FLASH_CTRL_CLK_HI_SHIFT | (CUSTOM_SPI_CLK_LO &
 402                                           SPI_FLASH_CTRL_CLK_LO_MASK) <<
 403            SPI_FLASH_CTRL_CLK_LO_SHIFT | (CUSTOM_SPI_CS_HOLD &
 404                                           SPI_FLASH_CTRL_CS_HOLD_MASK) <<
 405            SPI_FLASH_CTRL_CS_HOLD_SHIFT | (CUSTOM_SPI_CS_HI &
 406                                            SPI_FLASH_CTRL_CS_HI_MASK) <<
 407            SPI_FLASH_CTRL_CS_HI_SHIFT | (1 & SPI_FLASH_CTRL_INS_MASK) <<
 408            SPI_FLASH_CTRL_INS_SHIFT;
 409
 410        iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 411
 412        value |= SPI_FLASH_CTRL_START;
 413        iowrite32(value, hw->hw_addr + REG_SPI_FLASH_CTRL);
 414        ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 415
 416        for (i = 0; i < 10; i++) {
 417                msleep(1);
 418                value = ioread32(hw->hw_addr + REG_SPI_FLASH_CTRL);
 419                if (!(value & SPI_FLASH_CTRL_START))
 420                        break;
 421        }
 422
 423        if (value & SPI_FLASH_CTRL_START)
 424                return false;
 425
 426        *buf = ioread32(hw->hw_addr + REG_SPI_DATA);
 427
 428        return true;
 429}
 430
 431/*
 432 * get_permanent_address
 433 * return 0 if get valid mac address,
 434 */
 435static int atl1_get_permanent_address(struct atl1_hw *hw)
 436{
 437        u32 addr[2];
 438        u32 i, control;
 439        u16 reg;
 440        u8 eth_addr[ETH_ALEN];
 441        bool key_valid;
 442
 443        if (is_valid_ether_addr(hw->perm_mac_addr))
 444                return 0;
 445
 446        /* init */
 447        addr[0] = addr[1] = 0;
 448
 449        if (!atl1_check_eeprom_exist(hw)) {
 450                reg = 0;
 451                key_valid = false;
 452                /* Read out all EEPROM content */
 453                i = 0;
 454                while (1) {
 455                        if (atl1_read_eeprom(hw, i + 0x100, &control)) {
 456                                if (key_valid) {
 457                                        if (reg == REG_MAC_STA_ADDR)
 458                                                addr[0] = control;
 459                                        else if (reg == (REG_MAC_STA_ADDR + 4))
 460                                                addr[1] = control;
 461                                        key_valid = false;
 462                                } else if ((control & 0xff) == 0x5A) {
 463                                        key_valid = true;
 464                                        reg = (u16) (control >> 16);
 465                                } else
 466                                        break;
 467                        } else
 468                                /* read error */
 469                                break;
 470                        i += 4;
 471                }
 472
 473                *(u32 *) &eth_addr[2] = swab32(addr[0]);
 474                *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 475                if (is_valid_ether_addr(eth_addr)) {
 476                        memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 477                        return 0;
 478                }
 479        }
 480
 481        /* see if SPI FLAGS exist ? */
 482        addr[0] = addr[1] = 0;
 483        reg = 0;
 484        key_valid = false;
 485        i = 0;
 486        while (1) {
 487                if (atl1_spi_read(hw, i + 0x1f000, &control)) {
 488                        if (key_valid) {
 489                                if (reg == REG_MAC_STA_ADDR)
 490                                        addr[0] = control;
 491                                else if (reg == (REG_MAC_STA_ADDR + 4))
 492                                        addr[1] = control;
 493                                key_valid = false;
 494                        } else if ((control & 0xff) == 0x5A) {
 495                                key_valid = true;
 496                                reg = (u16) (control >> 16);
 497                        } else
 498                                /* data end */
 499                                break;
 500                } else
 501                        /* read error */
 502                        break;
 503                i += 4;
 504        }
 505
 506        *(u32 *) &eth_addr[2] = swab32(addr[0]);
 507        *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 508        if (is_valid_ether_addr(eth_addr)) {
 509                memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 510                return 0;
 511        }
 512
 513        /*
 514         * On some motherboards, the MAC address is written by the
 515         * BIOS directly to the MAC register during POST, and is
 516         * not stored in eeprom.  If all else thus far has failed
 517         * to fetch the permanent MAC address, try reading it directly.
 518         */
 519        addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
 520        addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
 521        *(u32 *) &eth_addr[2] = swab32(addr[0]);
 522        *(u16 *) &eth_addr[0] = swab16(*(u16 *) &addr[1]);
 523        if (is_valid_ether_addr(eth_addr)) {
 524                memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
 525                return 0;
 526        }
 527
 528        return 1;
 529}
 530
 531/*
 532 * Reads the adapter's MAC address from the EEPROM
 533 * hw - Struct containing variables accessed by shared code
 534 */
 535static s32 atl1_read_mac_addr(struct atl1_hw *hw)
 536{
 537        s32 ret = 0;
 538        u16 i;
 539
 540        if (atl1_get_permanent_address(hw)) {
 541                eth_random_addr(hw->perm_mac_addr);
 542                ret = 1;
 543        }
 544
 545        for (i = 0; i < ETH_ALEN; i++)
 546                hw->mac_addr[i] = hw->perm_mac_addr[i];
 547        return ret;
 548}
 549
 550/*
 551 * Hashes an address to determine its location in the multicast table
 552 * hw - Struct containing variables accessed by shared code
 553 * mc_addr - the multicast address to hash
 554 *
 555 * atl1_hash_mc_addr
 556 *  purpose
 557 *      set hash value for a multicast address
 558 *      hash calcu processing :
 559 *          1. calcu 32bit CRC for multicast address
 560 *          2. reverse crc with MSB to LSB
 561 */
 562static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
 563{
 564        u32 crc32, value = 0;
 565        int i;
 566
 567        crc32 = ether_crc_le(6, mc_addr);
 568        for (i = 0; i < 32; i++)
 569                value |= (((crc32 >> i) & 1) << (31 - i));
 570
 571        return value;
 572}
 573
 574/*
 575 * Sets the bit in the multicast table corresponding to the hash value.
 576 * hw - Struct containing variables accessed by shared code
 577 * hash_value - Multicast address hash value
 578 */
 579static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
 580{
 581        u32 hash_bit, hash_reg;
 582        u32 mta;
 583
 584        /*
 585         * The HASH Table  is a register array of 2 32-bit registers.
 586         * It is treated like an array of 64 bits.  We want to set
 587         * bit BitArray[hash_value]. So we figure out what register
 588         * the bit is in, read it, OR in the new bit, then write
 589         * back the new value.  The register is determined by the
 590         * upper 7 bits of the hash value and the bit within that
 591         * register are determined by the lower 5 bits of the value.
 592         */
 593        hash_reg = (hash_value >> 31) & 0x1;
 594        hash_bit = (hash_value >> 26) & 0x1F;
 595        mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 596        mta |= (1 << hash_bit);
 597        iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
 598}
 599
 600/*
 601 * Writes a value to a PHY register
 602 * hw - Struct containing variables accessed by shared code
 603 * reg_addr - address of the PHY register to write
 604 * data - data to write to the PHY
 605 */
 606static s32 atl1_write_phy_reg(struct atl1_hw *hw, u32 reg_addr, u16 phy_data)
 607{
 608        int i;
 609        u32 val;
 610
 611        val = ((u32) (phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
 612            (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
 613            MDIO_SUP_PREAMBLE |
 614            MDIO_START | MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
 615        iowrite32(val, hw->hw_addr + REG_MDIO_CTRL);
 616        ioread32(hw->hw_addr + REG_MDIO_CTRL);
 617
 618        for (i = 0; i < MDIO_WAIT_TIMES; i++) {
 619                udelay(2);
 620                val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 621                if (!(val & (MDIO_START | MDIO_BUSY)))
 622                        break;
 623        }
 624
 625        if (!(val & (MDIO_START | MDIO_BUSY)))
 626                return 0;
 627
 628        return ATLX_ERR_PHY;
 629}
 630
 631/*
 632 * Make L001's PHY out of Power Saving State (bug)
 633 * hw - Struct containing variables accessed by shared code
 634 * when power on, L001's PHY always on Power saving State
 635 * (Gigabit Link forbidden)
 636 */
 637static s32 atl1_phy_leave_power_saving(struct atl1_hw *hw)
 638{
 639        s32 ret;
 640        ret = atl1_write_phy_reg(hw, 29, 0x0029);
 641        if (ret)
 642                return ret;
 643        return atl1_write_phy_reg(hw, 30, 0);
 644}
 645
 646/*
 647 * Resets the PHY and make all config validate
 648 * hw - Struct containing variables accessed by shared code
 649 *
 650 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
 651 */
 652static s32 atl1_phy_reset(struct atl1_hw *hw)
 653{
 654        struct pci_dev *pdev = hw->back->pdev;
 655        struct atl1_adapter *adapter = hw->back;
 656        s32 ret_val;
 657        u16 phy_data;
 658
 659        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
 660            hw->media_type == MEDIA_TYPE_1000M_FULL)
 661                phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
 662        else {
 663                switch (hw->media_type) {
 664                case MEDIA_TYPE_100M_FULL:
 665                        phy_data =
 666                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
 667                            MII_CR_RESET;
 668                        break;
 669                case MEDIA_TYPE_100M_HALF:
 670                        phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
 671                        break;
 672                case MEDIA_TYPE_10M_FULL:
 673                        phy_data =
 674                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
 675                        break;
 676                default:
 677                        /* MEDIA_TYPE_10M_HALF: */
 678                        phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
 679                        break;
 680                }
 681        }
 682
 683        ret_val = atl1_write_phy_reg(hw, MII_BMCR, phy_data);
 684        if (ret_val) {
 685                u32 val;
 686                int i;
 687                /* pcie serdes link may be down! */
 688                if (netif_msg_hw(adapter))
 689                        dev_dbg(&pdev->dev, "pcie phy link down\n");
 690
 691                for (i = 0; i < 25; i++) {
 692                        msleep(1);
 693                        val = ioread32(hw->hw_addr + REG_MDIO_CTRL);
 694                        if (!(val & (MDIO_START | MDIO_BUSY)))
 695                                break;
 696                }
 697
 698                if ((val & (MDIO_START | MDIO_BUSY)) != 0) {
 699                        if (netif_msg_hw(adapter))
 700                                dev_warn(&pdev->dev,
 701                                        "pcie link down at least 25ms\n");
 702                        return ret_val;
 703                }
 704        }
 705        return 0;
 706}
 707
 708/*
 709 * Configures PHY autoneg and flow control advertisement settings
 710 * hw - Struct containing variables accessed by shared code
 711 */
 712static s32 atl1_phy_setup_autoneg_adv(struct atl1_hw *hw)
 713{
 714        s32 ret_val;
 715        s16 mii_autoneg_adv_reg;
 716        s16 mii_1000t_ctrl_reg;
 717
 718        /* Read the MII Auto-Neg Advertisement Register (Address 4). */
 719        mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
 720
 721        /* Read the MII 1000Base-T Control Register (Address 9). */
 722        mii_1000t_ctrl_reg = MII_ATLX_CR_1000T_DEFAULT_CAP_MASK;
 723
 724        /*
 725         * First we clear all the 10/100 mb speed bits in the Auto-Neg
 726         * Advertisement Register (Address 4) and the 1000 mb speed bits in
 727         * the  1000Base-T Control Register (Address 9).
 728         */
 729        mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
 730        mii_1000t_ctrl_reg &= ~MII_ATLX_CR_1000T_SPEED_MASK;
 731
 732        /*
 733         * Need to parse media_type  and set up
 734         * the appropriate PHY registers.
 735         */
 736        switch (hw->media_type) {
 737        case MEDIA_TYPE_AUTO_SENSOR:
 738                mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS |
 739                                        MII_AR_10T_FD_CAPS |
 740                                        MII_AR_100TX_HD_CAPS |
 741                                        MII_AR_100TX_FD_CAPS);
 742                mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 743                break;
 744
 745        case MEDIA_TYPE_1000M_FULL:
 746                mii_1000t_ctrl_reg |= MII_ATLX_CR_1000T_FD_CAPS;
 747                break;
 748
 749        case MEDIA_TYPE_100M_FULL:
 750                mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
 751                break;
 752
 753        case MEDIA_TYPE_100M_HALF:
 754                mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
 755                break;
 756
 757        case MEDIA_TYPE_10M_FULL:
 758                mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
 759                break;
 760
 761        default:
 762                mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
 763                break;
 764        }
 765
 766        /* flow control fixed to enable all */
 767        mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
 768
 769        hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
 770        hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
 771
 772        ret_val = atl1_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
 773        if (ret_val)
 774                return ret_val;
 775
 776        ret_val = atl1_write_phy_reg(hw, MII_ATLX_CR, mii_1000t_ctrl_reg);
 777        if (ret_val)
 778                return ret_val;
 779
 780        return 0;
 781}
 782
 783/*
 784 * Configures link settings.
 785 * hw - Struct containing variables accessed by shared code
 786 * Assumes the hardware has previously been reset and the
 787 * transmitter and receiver are not enabled.
 788 */
 789static s32 atl1_setup_link(struct atl1_hw *hw)
 790{
 791        struct pci_dev *pdev = hw->back->pdev;
 792        struct atl1_adapter *adapter = hw->back;
 793        s32 ret_val;
 794
 795        /*
 796         * Options:
 797         *  PHY will advertise value(s) parsed from
 798         *  autoneg_advertised and fc
 799         *  no matter what autoneg is , We will not wait link result.
 800         */
 801        ret_val = atl1_phy_setup_autoneg_adv(hw);
 802        if (ret_val) {
 803                if (netif_msg_link(adapter))
 804                        dev_dbg(&pdev->dev,
 805                                "error setting up autonegotiation\n");
 806                return ret_val;
 807        }
 808        /* SW.Reset , En-Auto-Neg if needed */
 809        ret_val = atl1_phy_reset(hw);
 810        if (ret_val) {
 811                if (netif_msg_link(adapter))
 812                        dev_dbg(&pdev->dev, "error resetting phy\n");
 813                return ret_val;
 814        }
 815        hw->phy_configured = true;
 816        return ret_val;
 817}
 818
 819static void atl1_init_flash_opcode(struct atl1_hw *hw)
 820{
 821        if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
 822                /* Atmel */
 823                hw->flash_vendor = 0;
 824
 825        /* Init OP table */
 826        iowrite8(flash_table[hw->flash_vendor].cmd_program,
 827                hw->hw_addr + REG_SPI_FLASH_OP_PROGRAM);
 828        iowrite8(flash_table[hw->flash_vendor].cmd_sector_erase,
 829                hw->hw_addr + REG_SPI_FLASH_OP_SC_ERASE);
 830        iowrite8(flash_table[hw->flash_vendor].cmd_chip_erase,
 831                hw->hw_addr + REG_SPI_FLASH_OP_CHIP_ERASE);
 832        iowrite8(flash_table[hw->flash_vendor].cmd_rdid,
 833                hw->hw_addr + REG_SPI_FLASH_OP_RDID);
 834        iowrite8(flash_table[hw->flash_vendor].cmd_wren,
 835                hw->hw_addr + REG_SPI_FLASH_OP_WREN);
 836        iowrite8(flash_table[hw->flash_vendor].cmd_rdsr,
 837                hw->hw_addr + REG_SPI_FLASH_OP_RDSR);
 838        iowrite8(flash_table[hw->flash_vendor].cmd_wrsr,
 839                hw->hw_addr + REG_SPI_FLASH_OP_WRSR);
 840        iowrite8(flash_table[hw->flash_vendor].cmd_read,
 841                hw->hw_addr + REG_SPI_FLASH_OP_READ);
 842}
 843
 844/*
 845 * Performs basic configuration of the adapter.
 846 * hw - Struct containing variables accessed by shared code
 847 * Assumes that the controller has previously been reset and is in a
 848 * post-reset uninitialized state. Initializes multicast table,
 849 * and  Calls routines to setup link
 850 * Leaves the transmit and receive units disabled and uninitialized.
 851 */
 852static s32 atl1_init_hw(struct atl1_hw *hw)
 853{
 854        u32 ret_val = 0;
 855
 856        /* Zero out the Multicast HASH table */
 857        iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
 858        /* clear the old settings from the multicast hash table */
 859        iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
 860
 861        atl1_init_flash_opcode(hw);
 862
 863        if (!hw->phy_configured) {
 864                /* enable GPHY LinkChange Interrupt */
 865                ret_val = atl1_write_phy_reg(hw, 18, 0xC00);
 866                if (ret_val)
 867                        return ret_val;
 868                /* make PHY out of power-saving state */
 869                ret_val = atl1_phy_leave_power_saving(hw);
 870                if (ret_val)
 871                        return ret_val;
 872                /* Call a subroutine to configure the link */
 873                ret_val = atl1_setup_link(hw);
 874        }
 875        return ret_val;
 876}
 877
 878/*
 879 * Detects the current speed and duplex settings of the hardware.
 880 * hw - Struct containing variables accessed by shared code
 881 * speed - Speed of the connection
 882 * duplex - Duplex setting of the connection
 883 */
 884static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex)
 885{
 886        struct pci_dev *pdev = hw->back->pdev;
 887        struct atl1_adapter *adapter = hw->back;
 888        s32 ret_val;
 889        u16 phy_data;
 890
 891        /* ; --- Read   PHY Specific Status Register (17) */
 892        ret_val = atl1_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
 893        if (ret_val)
 894                return ret_val;
 895
 896        if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
 897                return ATLX_ERR_PHY_RES;
 898
 899        switch (phy_data & MII_ATLX_PSSR_SPEED) {
 900        case MII_ATLX_PSSR_1000MBS:
 901                *speed = SPEED_1000;
 902                break;
 903        case MII_ATLX_PSSR_100MBS:
 904                *speed = SPEED_100;
 905                break;
 906        case MII_ATLX_PSSR_10MBS:
 907                *speed = SPEED_10;
 908                break;
 909        default:
 910                if (netif_msg_hw(adapter))
 911                        dev_dbg(&pdev->dev, "error getting speed\n");
 912                return ATLX_ERR_PHY_SPEED;
 913        }
 914        if (phy_data & MII_ATLX_PSSR_DPLX)
 915                *duplex = FULL_DUPLEX;
 916        else
 917                *duplex = HALF_DUPLEX;
 918
 919        return 0;
 920}
 921
 922static void atl1_set_mac_addr(struct atl1_hw *hw)
 923{
 924        u32 value;
 925        /*
 926         * 00-0B-6A-F6-00-DC
 927         * 0:  6AF600DC   1: 000B
 928         * low dword
 929         */
 930        value = (((u32) hw->mac_addr[2]) << 24) |
 931            (((u32) hw->mac_addr[3]) << 16) |
 932            (((u32) hw->mac_addr[4]) << 8) | (((u32) hw->mac_addr[5]));
 933        iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
 934        /* high dword */
 935        value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
 936        iowrite32(value, (hw->hw_addr + REG_MAC_STA_ADDR) + (1 << 2));
 937}
 938
 939/**
 940 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
 941 * @adapter: board private structure to initialize
 942 *
 943 * atl1_sw_init initializes the Adapter private data structure.
 944 * Fields are initialized based on PCI device information and
 945 * OS network device settings (MTU size).
 946 */
 947static int atl1_sw_init(struct atl1_adapter *adapter)
 948{
 949        struct atl1_hw *hw = &adapter->hw;
 950        struct net_device *netdev = adapter->netdev;
 951
 952        hw->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 953        hw->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
 954
 955        adapter->wol = 0;
 956        device_set_wakeup_enable(&adapter->pdev->dev, false);
 957        adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
 958        adapter->ict = 50000;           /* 100ms */
 959        adapter->link_speed = SPEED_0;  /* hardware init */
 960        adapter->link_duplex = FULL_DUPLEX;
 961
 962        hw->phy_configured = false;
 963        hw->preamble_len = 7;
 964        hw->ipgt = 0x60;
 965        hw->min_ifg = 0x50;
 966        hw->ipgr1 = 0x40;
 967        hw->ipgr2 = 0x60;
 968        hw->max_retry = 0xf;
 969        hw->lcol = 0x37;
 970        hw->jam_ipg = 7;
 971        hw->rfd_burst = 8;
 972        hw->rrd_burst = 8;
 973        hw->rfd_fetch_gap = 1;
 974        hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
 975        hw->rx_jumbo_lkah = 1;
 976        hw->rrd_ret_timer = 16;
 977        hw->tpd_burst = 4;
 978        hw->tpd_fetch_th = 16;
 979        hw->txf_burst = 0x100;
 980        hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
 981        hw->tpd_fetch_gap = 1;
 982        hw->rcb_value = atl1_rcb_64;
 983        hw->dma_ord = atl1_dma_ord_enh;
 984        hw->dmar_block = atl1_dma_req_256;
 985        hw->dmaw_block = atl1_dma_req_256;
 986        hw->cmb_rrd = 4;
 987        hw->cmb_tpd = 4;
 988        hw->cmb_rx_timer = 1;   /* about 2us */
 989        hw->cmb_tx_timer = 1;   /* about 2us */
 990        hw->smb_timer = 100000; /* about 200ms */
 991
 992        spin_lock_init(&adapter->lock);
 993        spin_lock_init(&adapter->mb_lock);
 994
 995        return 0;
 996}
 997
 998static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
 999{
1000        struct atl1_adapter *adapter = netdev_priv(netdev);
1001        u16 result;
1002
1003        atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
1004
1005        return result;
1006}
1007
1008static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
1009        int val)
1010{
1011        struct atl1_adapter *adapter = netdev_priv(netdev);
1012
1013        atl1_write_phy_reg(&adapter->hw, reg_num, val);
1014}
1015
1016static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1017{
1018        struct atl1_adapter *adapter = netdev_priv(netdev);
1019        unsigned long flags;
1020        int retval;
1021
1022        if (!netif_running(netdev))
1023                return -EINVAL;
1024
1025        spin_lock_irqsave(&adapter->lock, flags);
1026        retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
1027        spin_unlock_irqrestore(&adapter->lock, flags);
1028
1029        return retval;
1030}
1031
1032/**
1033 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1034 * @adapter: board private structure
1035 *
1036 * Return 0 on success, negative on failure
1037 */
1038static s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
1039{
1040        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1041        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1042        struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1043        struct atl1_ring_header *ring_header = &adapter->ring_header;
1044        struct pci_dev *pdev = adapter->pdev;
1045        int size;
1046        u8 offset = 0;
1047
1048        size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
1049        tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
1050        if (unlikely(!tpd_ring->buffer_info)) {
1051                if (netif_msg_drv(adapter))
1052                        dev_err(&pdev->dev, "kzalloc failed , size = D%d\n",
1053                                size);
1054                goto err_nomem;
1055        }
1056        rfd_ring->buffer_info =
1057                (tpd_ring->buffer_info + tpd_ring->count);
1058
1059        /*
1060         * real ring DMA buffer
1061         * each ring/block may need up to 8 bytes for alignment, hence the
1062         * additional 40 bytes tacked onto the end.
1063         */
1064        ring_header->size = size =
1065                sizeof(struct tx_packet_desc) * tpd_ring->count
1066                + sizeof(struct rx_free_desc) * rfd_ring->count
1067                + sizeof(struct rx_return_desc) * rrd_ring->count
1068                + sizeof(struct coals_msg_block)
1069                + sizeof(struct stats_msg_block)
1070                + 40;
1071
1072        ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
1073                &ring_header->dma);
1074        if (unlikely(!ring_header->desc)) {
1075                if (netif_msg_drv(adapter))
1076                        dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
1077                goto err_nomem;
1078        }
1079
1080        memset(ring_header->desc, 0, ring_header->size);
1081
1082        /* init TPD ring */
1083        tpd_ring->dma = ring_header->dma;
1084        offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
1085        tpd_ring->dma += offset;
1086        tpd_ring->desc = (u8 *) ring_header->desc + offset;
1087        tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
1088
1089        /* init RFD ring */
1090        rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
1091        offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
1092        rfd_ring->dma += offset;
1093        rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
1094        rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
1095
1096
1097        /* init RRD ring */
1098        rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
1099        offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
1100        rrd_ring->dma += offset;
1101        rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
1102        rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
1103
1104
1105        /* init CMB */
1106        adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
1107        offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
1108        adapter->cmb.dma += offset;
1109        adapter->cmb.cmb = (struct coals_msg_block *)
1110                ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
1111
1112        /* init SMB */
1113        adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
1114        offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
1115        adapter->smb.dma += offset;
1116        adapter->smb.smb = (struct stats_msg_block *)
1117                ((u8 *) adapter->cmb.cmb +
1118                (sizeof(struct coals_msg_block) + offset));
1119
1120        return 0;
1121
1122err_nomem:
1123        kfree(tpd_ring->buffer_info);
1124        return -ENOMEM;
1125}
1126
1127static void atl1_init_ring_ptrs(struct atl1_adapter *adapter)
1128{
1129        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1130        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1131        struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1132
1133        atomic_set(&tpd_ring->next_to_use, 0);
1134        atomic_set(&tpd_ring->next_to_clean, 0);
1135
1136        rfd_ring->next_to_clean = 0;
1137        atomic_set(&rfd_ring->next_to_use, 0);
1138
1139        rrd_ring->next_to_use = 0;
1140        atomic_set(&rrd_ring->next_to_clean, 0);
1141}
1142
1143/**
1144 * atl1_clean_rx_ring - Free RFD Buffers
1145 * @adapter: board private structure
1146 */
1147static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
1148{
1149        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1150        struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1151        struct atl1_buffer *buffer_info;
1152        struct pci_dev *pdev = adapter->pdev;
1153        unsigned long size;
1154        unsigned int i;
1155
1156        /* Free all the Rx ring sk_buffs */
1157        for (i = 0; i < rfd_ring->count; i++) {
1158                buffer_info = &rfd_ring->buffer_info[i];
1159                if (buffer_info->dma) {
1160                        pci_unmap_page(pdev, buffer_info->dma,
1161                                buffer_info->length, PCI_DMA_FROMDEVICE);
1162                        buffer_info->dma = 0;
1163                }
1164                if (buffer_info->skb) {
1165                        dev_kfree_skb(buffer_info->skb);
1166                        buffer_info->skb = NULL;
1167                }
1168        }
1169
1170        size = sizeof(struct atl1_buffer) * rfd_ring->count;
1171        memset(rfd_ring->buffer_info, 0, size);
1172
1173        /* Zero out the descriptor ring */
1174        memset(rfd_ring->desc, 0, rfd_ring->size);
1175
1176        rfd_ring->next_to_clean = 0;
1177        atomic_set(&rfd_ring->next_to_use, 0);
1178
1179        rrd_ring->next_to_use = 0;
1180        atomic_set(&rrd_ring->next_to_clean, 0);
1181}
1182
1183/**
1184 * atl1_clean_tx_ring - Free Tx Buffers
1185 * @adapter: board private structure
1186 */
1187static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
1188{
1189        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1190        struct atl1_buffer *buffer_info;
1191        struct pci_dev *pdev = adapter->pdev;
1192        unsigned long size;
1193        unsigned int i;
1194
1195        /* Free all the Tx ring sk_buffs */
1196        for (i = 0; i < tpd_ring->count; i++) {
1197                buffer_info = &tpd_ring->buffer_info[i];
1198                if (buffer_info->dma) {
1199                        pci_unmap_page(pdev, buffer_info->dma,
1200                                buffer_info->length, PCI_DMA_TODEVICE);
1201                        buffer_info->dma = 0;
1202                }
1203        }
1204
1205        for (i = 0; i < tpd_ring->count; i++) {
1206                buffer_info = &tpd_ring->buffer_info[i];
1207                if (buffer_info->skb) {
1208                        dev_kfree_skb_any(buffer_info->skb);
1209                        buffer_info->skb = NULL;
1210                }
1211        }
1212
1213        size = sizeof(struct atl1_buffer) * tpd_ring->count;
1214        memset(tpd_ring->buffer_info, 0, size);
1215
1216        /* Zero out the descriptor ring */
1217        memset(tpd_ring->desc, 0, tpd_ring->size);
1218
1219        atomic_set(&tpd_ring->next_to_use, 0);
1220        atomic_set(&tpd_ring->next_to_clean, 0);
1221}
1222
1223/**
1224 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1225 * @adapter: board private structure
1226 *
1227 * Free all transmit software resources
1228 */
1229static void atl1_free_ring_resources(struct atl1_adapter *adapter)
1230{
1231        struct pci_dev *pdev = adapter->pdev;
1232        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
1233        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1234        struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1235        struct atl1_ring_header *ring_header = &adapter->ring_header;
1236
1237        atl1_clean_tx_ring(adapter);
1238        atl1_clean_rx_ring(adapter);
1239
1240        kfree(tpd_ring->buffer_info);
1241        pci_free_consistent(pdev, ring_header->size, ring_header->desc,
1242                ring_header->dma);
1243
1244        tpd_ring->buffer_info = NULL;
1245        tpd_ring->desc = NULL;
1246        tpd_ring->dma = 0;
1247
1248        rfd_ring->buffer_info = NULL;
1249        rfd_ring->desc = NULL;
1250        rfd_ring->dma = 0;
1251
1252        rrd_ring->desc = NULL;
1253        rrd_ring->dma = 0;
1254
1255        adapter->cmb.dma = 0;
1256        adapter->cmb.cmb = NULL;
1257
1258        adapter->smb.dma = 0;
1259        adapter->smb.smb = NULL;
1260}
1261
1262static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
1263{
1264        u32 value;
1265        struct atl1_hw *hw = &adapter->hw;
1266        struct net_device *netdev = adapter->netdev;
1267        /* Config MAC CTRL Register */
1268        value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
1269        /* duplex */
1270        if (FULL_DUPLEX == adapter->link_duplex)
1271                value |= MAC_CTRL_DUPLX;
1272        /* speed */
1273        value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
1274                         MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1275                  MAC_CTRL_SPEED_SHIFT);
1276        /* flow control */
1277        value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1278        /* PAD & CRC */
1279        value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1280        /* preamble length */
1281        value |= (((u32) adapter->hw.preamble_len
1282                   & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1283        /* vlan */
1284        __atlx_vlan_mode(netdev->features, &value);
1285        /* rx checksum
1286           if (adapter->rx_csum)
1287           value |= MAC_CTRL_RX_CHKSUM_EN;
1288         */
1289        /* filter mode */
1290        value |= MAC_CTRL_BC_EN;
1291        if (netdev->flags & IFF_PROMISC)
1292                value |= MAC_CTRL_PROMIS_EN;
1293        else if (netdev->flags & IFF_ALLMULTI)
1294                value |= MAC_CTRL_MC_ALL_EN;
1295        /* value |= MAC_CTRL_LOOPBACK; */
1296        iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
1297}
1298
1299static u32 atl1_check_link(struct atl1_adapter *adapter)
1300{
1301        struct atl1_hw *hw = &adapter->hw;
1302        struct net_device *netdev = adapter->netdev;
1303        u32 ret_val;
1304        u16 speed, duplex, phy_data;
1305        int reconfig = 0;
1306
1307        /* MII_BMSR must read twice */
1308        atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1309        atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
1310        if (!(phy_data & BMSR_LSTATUS)) {
1311                /* link down */
1312                if (netif_carrier_ok(netdev)) {
1313                        /* old link state: Up */
1314                        if (netif_msg_link(adapter))
1315                                dev_info(&adapter->pdev->dev, "link is down\n");
1316                        adapter->link_speed = SPEED_0;
1317                        netif_carrier_off(netdev);
1318                }
1319                return 0;
1320        }
1321
1322        /* Link Up */
1323        ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
1324        if (ret_val)
1325                return ret_val;
1326
1327        switch (hw->media_type) {
1328        case MEDIA_TYPE_1000M_FULL:
1329                if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
1330                        reconfig = 1;
1331                break;
1332        case MEDIA_TYPE_100M_FULL:
1333                if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1334                        reconfig = 1;
1335                break;
1336        case MEDIA_TYPE_100M_HALF:
1337                if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1338                        reconfig = 1;
1339                break;
1340        case MEDIA_TYPE_10M_FULL:
1341                if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1342                        reconfig = 1;
1343                break;
1344        case MEDIA_TYPE_10M_HALF:
1345                if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1346                        reconfig = 1;
1347                break;
1348        }
1349
1350        /* link result is our setting */
1351        if (!reconfig) {
1352                if (adapter->link_speed != speed ||
1353                    adapter->link_duplex != duplex) {
1354                        adapter->link_speed = speed;
1355                        adapter->link_duplex = duplex;
1356                        atl1_setup_mac_ctrl(adapter);
1357                        if (netif_msg_link(adapter))
1358                                dev_info(&adapter->pdev->dev,
1359                                        "%s link is up %d Mbps %s\n",
1360                                        netdev->name, adapter->link_speed,
1361                                        adapter->link_duplex == FULL_DUPLEX ?
1362                                        "full duplex" : "half duplex");
1363                }
1364                if (!netif_carrier_ok(netdev)) {
1365                        /* Link down -> Up */
1366                        netif_carrier_on(netdev);
1367                }
1368                return 0;
1369        }
1370
1371        /* change original link status */
1372        if (netif_carrier_ok(netdev)) {
1373                adapter->link_speed = SPEED_0;
1374                netif_carrier_off(netdev);
1375                netif_stop_queue(netdev);
1376        }
1377
1378        if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
1379            hw->media_type != MEDIA_TYPE_1000M_FULL) {
1380                switch (hw->media_type) {
1381                case MEDIA_TYPE_100M_FULL:
1382                        phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
1383                                   MII_CR_RESET;
1384                        break;
1385                case MEDIA_TYPE_100M_HALF:
1386                        phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
1387                        break;
1388                case MEDIA_TYPE_10M_FULL:
1389                        phy_data =
1390                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
1391                        break;
1392                default:
1393                        /* MEDIA_TYPE_10M_HALF: */
1394                        phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
1395                        break;
1396                }
1397                atl1_write_phy_reg(hw, MII_BMCR, phy_data);
1398                return 0;
1399        }
1400
1401        /* auto-neg, insert timer to re-config phy */
1402        if (!adapter->phy_timer_pending) {
1403                adapter->phy_timer_pending = true;
1404                mod_timer(&adapter->phy_config_timer,
1405                          round_jiffies(jiffies + 3 * HZ));
1406        }
1407
1408        return 0;
1409}
1410
1411static void set_flow_ctrl_old(struct atl1_adapter *adapter)
1412{
1413        u32 hi, lo, value;
1414
1415        /* RFD Flow Control */
1416        value = adapter->rfd_ring.count;
1417        hi = value / 16;
1418        if (hi < 2)
1419                hi = 2;
1420        lo = value * 7 / 8;
1421
1422        value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1423                ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1424        iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1425
1426        /* RRD Flow Control */
1427        value = adapter->rrd_ring.count;
1428        lo = value / 16;
1429        hi = value * 7 / 8;
1430        if (lo < 2)
1431                lo = 2;
1432        value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1433                ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1434        iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1435}
1436
1437static void set_flow_ctrl_new(struct atl1_hw *hw)
1438{
1439        u32 hi, lo, value;
1440
1441        /* RXF Flow Control */
1442        value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
1443        lo = value / 16;
1444        if (lo < 192)
1445                lo = 192;
1446        hi = value * 7 / 8;
1447        if (hi < lo)
1448                hi = lo + 16;
1449        value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1450                ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1451        iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
1452
1453        /* RRD Flow Control */
1454        value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
1455        lo = value / 8;
1456        hi = value * 7 / 8;
1457        if (lo < 2)
1458                lo = 2;
1459        if (hi < lo)
1460                hi = lo + 3;
1461        value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
1462                ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
1463        iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
1464}
1465
1466/**
1467 * atl1_configure - Configure Transmit&Receive Unit after Reset
1468 * @adapter: board private structure
1469 *
1470 * Configure the Tx /Rx unit of the MAC after a reset.
1471 */
1472static u32 atl1_configure(struct atl1_adapter *adapter)
1473{
1474        struct atl1_hw *hw = &adapter->hw;
1475        u32 value;
1476
1477        /* clear interrupt status */
1478        iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
1479
1480        /* set MAC Address */
1481        value = (((u32) hw->mac_addr[2]) << 24) |
1482                (((u32) hw->mac_addr[3]) << 16) |
1483                (((u32) hw->mac_addr[4]) << 8) |
1484                (((u32) hw->mac_addr[5]));
1485        iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
1486        value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
1487        iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
1488
1489        /* tx / rx ring */
1490
1491        /* HI base address */
1492        iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
1493                hw->hw_addr + REG_DESC_BASE_ADDR_HI);
1494        /* LO base address */
1495        iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
1496                hw->hw_addr + REG_DESC_RFD_ADDR_LO);
1497        iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
1498                hw->hw_addr + REG_DESC_RRD_ADDR_LO);
1499        iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
1500                hw->hw_addr + REG_DESC_TPD_ADDR_LO);
1501        iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
1502                hw->hw_addr + REG_DESC_CMB_ADDR_LO);
1503        iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
1504                hw->hw_addr + REG_DESC_SMB_ADDR_LO);
1505
1506        /* element count */
1507        value = adapter->rrd_ring.count;
1508        value <<= 16;
1509        value += adapter->rfd_ring.count;
1510        iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
1511        iowrite32(adapter->tpd_ring.count, hw->hw_addr +
1512                REG_DESC_TPD_RING_SIZE);
1513
1514        /* Load Ptr */
1515        iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
1516
1517        /* config Mailbox */
1518        value = ((atomic_read(&adapter->tpd_ring.next_to_use)
1519                  & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
1520                ((atomic_read(&adapter->rrd_ring.next_to_clean)
1521                & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
1522                ((atomic_read(&adapter->rfd_ring.next_to_use)
1523                & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
1524        iowrite32(value, hw->hw_addr + REG_MAILBOX);
1525
1526        /* config IPG/IFG */
1527        value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
1528                 << MAC_IPG_IFG_IPGT_SHIFT) |
1529                (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
1530                << MAC_IPG_IFG_MIFG_SHIFT) |
1531                (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
1532                << MAC_IPG_IFG_IPGR1_SHIFT) |
1533                (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
1534                << MAC_IPG_IFG_IPGR2_SHIFT);
1535        iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
1536
1537        /* config  Half-Duplex Control */
1538        value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
1539                (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
1540                << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
1541                MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
1542                (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
1543                (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
1544                << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
1545        iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
1546
1547        /* set Interrupt Moderator Timer */
1548        iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
1549        iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
1550
1551        /* set Interrupt Clear Timer */
1552        iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
1553
1554        /* set max frame size hw will accept */
1555        iowrite32(hw->max_frame_size, hw->hw_addr + REG_MTU);
1556
1557        /* jumbo size & rrd retirement timer */
1558        value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
1559                 << RXQ_JMBOSZ_TH_SHIFT) |
1560                (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
1561                << RXQ_JMBO_LKAH_SHIFT) |
1562                (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
1563                << RXQ_RRD_TIMER_SHIFT);
1564        iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
1565
1566        /* Flow Control */
1567        switch (hw->dev_rev) {
1568        case 0x8001:
1569        case 0x9001:
1570        case 0x9002:
1571        case 0x9003:
1572                set_flow_ctrl_old(adapter);
1573                break;
1574        default:
1575                set_flow_ctrl_new(hw);
1576                break;
1577        }
1578
1579        /* config TXQ */
1580        value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
1581                 << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
1582                (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
1583                << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
1584                (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
1585                << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
1586                TXQ_CTRL_EN;
1587        iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
1588
1589        /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1590        value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
1591                << TX_JUMBO_TASK_TH_SHIFT) |
1592                (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
1593                << TX_TPD_MIN_IPG_SHIFT);
1594        iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
1595
1596        /* config RXQ */
1597        value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
1598                << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
1599                (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
1600                << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
1601                (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
1602                << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
1603                RXQ_CTRL_EN;
1604        iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
1605
1606        /* config DMA Engine */
1607        value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1608                << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
1609                ((((u32) hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1610                << DMA_CTRL_DMAW_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
1611                DMA_CTRL_DMAW_EN;
1612        value |= (u32) hw->dma_ord;
1613        if (atl1_rcb_128 == hw->rcb_value)
1614                value |= DMA_CTRL_RCB_VALUE;
1615        iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
1616
1617        /* config CMB / SMB */
1618        value = (hw->cmb_tpd > adapter->tpd_ring.count) ?
1619                hw->cmb_tpd : adapter->tpd_ring.count;
1620        value <<= 16;
1621        value |= hw->cmb_rrd;
1622        iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
1623        value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
1624        iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
1625        iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
1626
1627        /* --- enable CMB / SMB */
1628        value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
1629        iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
1630
1631        value = ioread32(adapter->hw.hw_addr + REG_ISR);
1632        if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
1633                value = 1;      /* config failed */
1634        else
1635                value = 0;
1636
1637        /* clear all interrupt status */
1638        iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
1639        iowrite32(0, adapter->hw.hw_addr + REG_ISR);
1640        return value;
1641}
1642
1643/*
1644 * atl1_pcie_patch - Patch for PCIE module
1645 */
1646static void atl1_pcie_patch(struct atl1_adapter *adapter)
1647{
1648        u32 value;
1649
1650        /* much vendor magic here */
1651        value = 0x6500;
1652        iowrite32(value, adapter->hw.hw_addr + 0x12FC);
1653        /* pcie flow control mode change */
1654        value = ioread32(adapter->hw.hw_addr + 0x1008);
1655        value |= 0x8000;
1656        iowrite32(value, adapter->hw.hw_addr + 0x1008);
1657}
1658
1659/*
1660 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1661 * on PCI Command register is disable.
1662 * The function enable this bit.
1663 * Brackett, 2006/03/15
1664 */
1665static void atl1_via_workaround(struct atl1_adapter *adapter)
1666{
1667        unsigned long value;
1668
1669        value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
1670        if (value & PCI_COMMAND_INTX_DISABLE)
1671                value &= ~PCI_COMMAND_INTX_DISABLE;
1672        iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
1673}
1674
1675static void atl1_inc_smb(struct atl1_adapter *adapter)
1676{
1677        struct net_device *netdev = adapter->netdev;
1678        struct stats_msg_block *smb = adapter->smb.smb;
1679
1680        u64 new_rx_errors = smb->rx_frag +
1681                            smb->rx_fcs_err +
1682                            smb->rx_len_err +
1683                            smb->rx_sz_ov +
1684                            smb->rx_rxf_ov +
1685                            smb->rx_rrd_ov +
1686                            smb->rx_align_err;
1687        u64 new_tx_errors = smb->tx_late_col +
1688                            smb->tx_abort_col +
1689                            smb->tx_underrun +
1690                            smb->tx_trunc;
1691
1692        /* Fill out the OS statistics structure */
1693        adapter->soft_stats.rx_packets += smb->rx_ok + new_rx_errors;
1694        adapter->soft_stats.tx_packets += smb->tx_ok + new_tx_errors;
1695        adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
1696        adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
1697        adapter->soft_stats.multicast += smb->rx_mcast;
1698        adapter->soft_stats.collisions += smb->tx_1_col +
1699                                          smb->tx_2_col +
1700                                          smb->tx_late_col +
1701                                          smb->tx_abort_col;
1702
1703        /* Rx Errors */
1704        adapter->soft_stats.rx_errors += new_rx_errors;
1705        adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
1706        adapter->soft_stats.rx_length_errors += smb->rx_len_err;
1707        adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
1708        adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
1709
1710        adapter->soft_stats.rx_pause += smb->rx_pause;
1711        adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
1712        adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
1713
1714        /* Tx Errors */
1715        adapter->soft_stats.tx_errors += new_tx_errors;
1716        adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
1717        adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
1718        adapter->soft_stats.tx_window_errors += smb->tx_late_col;
1719
1720        adapter->soft_stats.excecol += smb->tx_abort_col;
1721        adapter->soft_stats.deffer += smb->tx_defer;
1722        adapter->soft_stats.scc += smb->tx_1_col;
1723        adapter->soft_stats.mcc += smb->tx_2_col;
1724        adapter->soft_stats.latecol += smb->tx_late_col;
1725        adapter->soft_stats.tx_underun += smb->tx_underrun;
1726        adapter->soft_stats.tx_trunc += smb->tx_trunc;
1727        adapter->soft_stats.tx_pause += smb->tx_pause;
1728
1729        netdev->stats.rx_bytes = adapter->soft_stats.rx_bytes;
1730        netdev->stats.tx_bytes = adapter->soft_stats.tx_bytes;
1731        netdev->stats.multicast = adapter->soft_stats.multicast;
1732        netdev->stats.collisions = adapter->soft_stats.collisions;
1733        netdev->stats.rx_errors = adapter->soft_stats.rx_errors;
1734        netdev->stats.rx_length_errors =
1735                adapter->soft_stats.rx_length_errors;
1736        netdev->stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
1737        netdev->stats.rx_frame_errors =
1738                adapter->soft_stats.rx_frame_errors;
1739        netdev->stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
1740        netdev->stats.rx_dropped = adapter->soft_stats.rx_rrd_ov;
1741        netdev->stats.tx_errors = adapter->soft_stats.tx_errors;
1742        netdev->stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
1743        netdev->stats.tx_aborted_errors =
1744                adapter->soft_stats.tx_aborted_errors;
1745        netdev->stats.tx_window_errors =
1746                adapter->soft_stats.tx_window_errors;
1747        netdev->stats.tx_carrier_errors =
1748                adapter->soft_stats.tx_carrier_errors;
1749
1750        netdev->stats.rx_packets = adapter->soft_stats.rx_packets;
1751        netdev->stats.tx_packets = adapter->soft_stats.tx_packets;
1752}
1753
1754static void atl1_update_mailbox(struct atl1_adapter *adapter)
1755{
1756        unsigned long flags;
1757        u32 tpd_next_to_use;
1758        u32 rfd_next_to_use;
1759        u32 rrd_next_to_clean;
1760        u32 value;
1761
1762        spin_lock_irqsave(&adapter->mb_lock, flags);
1763
1764        tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
1765        rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
1766        rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
1767
1768        value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
1769                MB_RFD_PROD_INDX_SHIFT) |
1770                ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
1771                MB_RRD_CONS_INDX_SHIFT) |
1772                ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
1773                MB_TPD_PROD_INDX_SHIFT);
1774        iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
1775
1776        spin_unlock_irqrestore(&adapter->mb_lock, flags);
1777}
1778
1779static void atl1_clean_alloc_flag(struct atl1_adapter *adapter,
1780        struct rx_return_desc *rrd, u16 offset)
1781{
1782        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1783
1784        while (rfd_ring->next_to_clean != (rrd->buf_indx + offset)) {
1785                rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced = 0;
1786                if (++rfd_ring->next_to_clean == rfd_ring->count) {
1787                        rfd_ring->next_to_clean = 0;
1788                }
1789        }
1790}
1791
1792static void atl1_update_rfd_index(struct atl1_adapter *adapter,
1793        struct rx_return_desc *rrd)
1794{
1795        u16 num_buf;
1796
1797        num_buf = (rrd->xsz.xsum_sz.pkt_size + adapter->rx_buffer_len - 1) /
1798                adapter->rx_buffer_len;
1799        if (rrd->num_buf == num_buf)
1800                /* clean alloc flag for bad rrd */
1801                atl1_clean_alloc_flag(adapter, rrd, num_buf);
1802}
1803
1804static void atl1_rx_checksum(struct atl1_adapter *adapter,
1805        struct rx_return_desc *rrd, struct sk_buff *skb)
1806{
1807        struct pci_dev *pdev = adapter->pdev;
1808
1809        /*
1810         * The L1 hardware contains a bug that erroneously sets the
1811         * PACKET_FLAG_ERR and ERR_FLAG_L4_CHKSUM bits whenever a
1812         * fragmented IP packet is received, even though the packet
1813         * is perfectly valid and its checksum is correct. There's
1814         * no way to distinguish between one of these good packets
1815         * and a packet that actually contains a TCP/UDP checksum
1816         * error, so all we can do is allow it to be handed up to
1817         * the higher layers and let it be sorted out there.
1818         */
1819
1820        skb_checksum_none_assert(skb);
1821
1822        if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
1823                if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
1824                                        ERR_FLAG_CODE | ERR_FLAG_OV)) {
1825                        adapter->hw_csum_err++;
1826                        if (netif_msg_rx_err(adapter))
1827                                dev_printk(KERN_DEBUG, &pdev->dev,
1828                                        "rx checksum error\n");
1829                        return;
1830                }
1831        }
1832
1833        /* not IPv4 */
1834        if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
1835                /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1836                return;
1837
1838        /* IPv4 packet */
1839        if (likely(!(rrd->err_flg &
1840                (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
1841                skb->ip_summed = CHECKSUM_UNNECESSARY;
1842                adapter->hw_csum_good++;
1843                return;
1844        }
1845}
1846
1847/**
1848 * atl1_alloc_rx_buffers - Replace used receive buffers
1849 * @adapter: address of board private structure
1850 */
1851static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
1852{
1853        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1854        struct pci_dev *pdev = adapter->pdev;
1855        struct page *page;
1856        unsigned long offset;
1857        struct atl1_buffer *buffer_info, *next_info;
1858        struct sk_buff *skb;
1859        u16 num_alloc = 0;
1860        u16 rfd_next_to_use, next_next;
1861        struct rx_free_desc *rfd_desc;
1862
1863        next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
1864        if (++next_next == rfd_ring->count)
1865                next_next = 0;
1866        buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1867        next_info = &rfd_ring->buffer_info[next_next];
1868
1869        while (!buffer_info->alloced && !next_info->alloced) {
1870                if (buffer_info->skb) {
1871                        buffer_info->alloced = 1;
1872                        goto next;
1873                }
1874
1875                rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
1876
1877                skb = netdev_alloc_skb_ip_align(adapter->netdev,
1878                                                adapter->rx_buffer_len);
1879                if (unlikely(!skb)) {
1880                        /* Better luck next round */
1881                        adapter->soft_stats.rx_dropped++;
1882                        break;
1883                }
1884
1885                buffer_info->alloced = 1;
1886                buffer_info->skb = skb;
1887                buffer_info->length = (u16) adapter->rx_buffer_len;
1888                page = virt_to_page(skb->data);
1889                offset = (unsigned long)skb->data & ~PAGE_MASK;
1890                buffer_info->dma = pci_map_page(pdev, page, offset,
1891                                                adapter->rx_buffer_len,
1892                                                PCI_DMA_FROMDEVICE);
1893                rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1894                rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
1895                rfd_desc->coalese = 0;
1896
1897next:
1898                rfd_next_to_use = next_next;
1899                if (unlikely(++next_next == rfd_ring->count))
1900                        next_next = 0;
1901
1902                buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1903                next_info = &rfd_ring->buffer_info[next_next];
1904                num_alloc++;
1905        }
1906
1907        if (num_alloc) {
1908                /*
1909                 * Force memory writes to complete before letting h/w
1910                 * know there are new descriptors to fetch.  (Only
1911                 * applicable for weak-ordered memory model archs,
1912                 * such as IA-64).
1913                 */
1914                wmb();
1915                atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
1916        }
1917        return num_alloc;
1918}
1919
1920static int atl1_intr_rx(struct atl1_adapter *adapter, int budget)
1921{
1922        int i, count;
1923        u16 length;
1924        u16 rrd_next_to_clean;
1925        u32 value;
1926        struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
1927        struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
1928        struct atl1_buffer *buffer_info;
1929        struct rx_return_desc *rrd;
1930        struct sk_buff *skb;
1931
1932        count = 0;
1933
1934        rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
1935
1936        while (count < budget) {
1937                rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
1938                i = 1;
1939                if (likely(rrd->xsz.valid)) {   /* packet valid */
1940chk_rrd:
1941                        /* check rrd status */
1942                        if (likely(rrd->num_buf == 1))
1943                                goto rrd_ok;
1944                        else if (netif_msg_rx_err(adapter)) {
1945                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1946                                        "unexpected RRD buffer count\n");
1947                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1948                                        "rx_buf_len = %d\n",
1949                                        adapter->rx_buffer_len);
1950                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1951                                        "RRD num_buf = %d\n",
1952                                        rrd->num_buf);
1953                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1954                                        "RRD pkt_len = %d\n",
1955                                        rrd->xsz.xsum_sz.pkt_size);
1956                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1957                                        "RRD pkt_flg = 0x%08X\n",
1958                                        rrd->pkt_flg);
1959                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1960                                        "RRD err_flg = 0x%08X\n",
1961                                        rrd->err_flg);
1962                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1963                                        "RRD vlan_tag = 0x%08X\n",
1964                                        rrd->vlan_tag);
1965                        }
1966
1967                        /* rrd seems to be bad */
1968                        if (unlikely(i-- > 0)) {
1969                                /* rrd may not be DMAed completely */
1970                                udelay(1);
1971                                goto chk_rrd;
1972                        }
1973                        /* bad rrd */
1974                        if (netif_msg_rx_err(adapter))
1975                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
1976                                        "bad RRD\n");
1977                        /* see if update RFD index */
1978                        if (rrd->num_buf > 1)
1979                                atl1_update_rfd_index(adapter, rrd);
1980
1981                        /* update rrd */
1982                        rrd->xsz.valid = 0;
1983                        if (++rrd_next_to_clean == rrd_ring->count)
1984                                rrd_next_to_clean = 0;
1985                        count++;
1986                        continue;
1987                } else {        /* current rrd still not be updated */
1988
1989                        break;
1990                }
1991rrd_ok:
1992                /* clean alloc flag for bad rrd */
1993                atl1_clean_alloc_flag(adapter, rrd, 0);
1994
1995                buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
1996                if (++rfd_ring->next_to_clean == rfd_ring->count)
1997                        rfd_ring->next_to_clean = 0;
1998
1999                /* update rrd next to clean */
2000                if (++rrd_next_to_clean == rrd_ring->count)
2001                        rrd_next_to_clean = 0;
2002                count++;
2003
2004                if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
2005                        if (!(rrd->err_flg &
2006                                (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
2007                                | ERR_FLAG_LEN))) {
2008                                /* packet error, don't need upstream */
2009                                buffer_info->alloced = 0;
2010                                rrd->xsz.valid = 0;
2011                                continue;
2012                        }
2013                }
2014
2015                /* Good Receive */
2016                pci_unmap_page(adapter->pdev, buffer_info->dma,
2017                               buffer_info->length, PCI_DMA_FROMDEVICE);
2018                buffer_info->dma = 0;
2019                skb = buffer_info->skb;
2020                length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
2021
2022                skb_put(skb, length - ETH_FCS_LEN);
2023
2024                /* Receive Checksum Offload */
2025                atl1_rx_checksum(adapter, rrd, skb);
2026                skb->protocol = eth_type_trans(skb, adapter->netdev);
2027
2028                if (rrd->pkt_flg & PACKET_FLAG_VLAN_INS) {
2029                        u16 vlan_tag = (rrd->vlan_tag >> 4) |
2030                                        ((rrd->vlan_tag & 7) << 13) |
2031                                        ((rrd->vlan_tag & 8) << 9);
2032
2033                        __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
2034                }
2035                netif_receive_skb(skb);
2036
2037                /* let protocol layer free skb */
2038                buffer_info->skb = NULL;
2039                buffer_info->alloced = 0;
2040                rrd->xsz.valid = 0;
2041        }
2042
2043        atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
2044
2045        atl1_alloc_rx_buffers(adapter);
2046
2047        /* update mailbox ? */
2048        if (count) {
2049                u32 tpd_next_to_use;
2050                u32 rfd_next_to_use;
2051
2052                spin_lock(&adapter->mb_lock);
2053
2054                tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
2055                rfd_next_to_use =
2056                    atomic_read(&adapter->rfd_ring.next_to_use);
2057                rrd_next_to_clean =
2058                    atomic_read(&adapter->rrd_ring.next_to_clean);
2059                value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
2060                        MB_RFD_PROD_INDX_SHIFT) |
2061                        ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
2062                        MB_RRD_CONS_INDX_SHIFT) |
2063                        ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
2064                        MB_TPD_PROD_INDX_SHIFT);
2065                iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
2066                spin_unlock(&adapter->mb_lock);
2067        }
2068
2069        return count;
2070}
2071
2072static int atl1_intr_tx(struct atl1_adapter *adapter)
2073{
2074        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2075        struct atl1_buffer *buffer_info;
2076        u16 sw_tpd_next_to_clean;
2077        u16 cmb_tpd_next_to_clean;
2078        int count = 0;
2079
2080        sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2081        cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
2082
2083        while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
2084                buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
2085                if (buffer_info->dma) {
2086                        pci_unmap_page(adapter->pdev, buffer_info->dma,
2087                                       buffer_info->length, PCI_DMA_TODEVICE);
2088                        buffer_info->dma = 0;
2089                }
2090
2091                if (buffer_info->skb) {
2092                        dev_kfree_skb_irq(buffer_info->skb);
2093                        buffer_info->skb = NULL;
2094                }
2095
2096                if (++sw_tpd_next_to_clean == tpd_ring->count)
2097                        sw_tpd_next_to_clean = 0;
2098
2099                count++;
2100        }
2101        atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
2102
2103        if (netif_queue_stopped(adapter->netdev) &&
2104            netif_carrier_ok(adapter->netdev))
2105                netif_wake_queue(adapter->netdev);
2106
2107        return count;
2108}
2109
2110static u16 atl1_tpd_avail(struct atl1_tpd_ring *tpd_ring)
2111{
2112        u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
2113        u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
2114        return (next_to_clean > next_to_use) ?
2115                next_to_clean - next_to_use - 1 :
2116                tpd_ring->count + next_to_clean - next_to_use - 1;
2117}
2118
2119static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
2120                    struct tx_packet_desc *ptpd)
2121{
2122        u8 hdr_len, ip_off;
2123        u32 real_len;
2124
2125        if (skb_shinfo(skb)->gso_size) {
2126                int err;
2127
2128                err = skb_cow_head(skb, 0);
2129                if (err < 0)
2130                        return err;
2131
2132                if (skb->protocol == htons(ETH_P_IP)) {
2133                        struct iphdr *iph = ip_hdr(skb);
2134
2135                        real_len = (((unsigned char *)iph - skb->data) +
2136                                ntohs(iph->tot_len));
2137                        if (real_len < skb->len)
2138                                pskb_trim(skb, real_len);
2139                        hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2140                        if (skb->len == hdr_len) {
2141                                iph->check = 0;
2142                                tcp_hdr(skb)->check =
2143                                        ~csum_tcpudp_magic(iph->saddr,
2144                                        iph->daddr, tcp_hdrlen(skb),
2145                                        IPPROTO_TCP, 0);
2146                                ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2147                                        TPD_IPHL_SHIFT;
2148                                ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2149                                        TPD_TCPHDRLEN_MASK) <<
2150                                        TPD_TCPHDRLEN_SHIFT;
2151                                ptpd->word3 |= 1 << TPD_IP_CSUM_SHIFT;
2152                                ptpd->word3 |= 1 << TPD_TCP_CSUM_SHIFT;
2153                                return 1;
2154                        }
2155
2156                        iph->check = 0;
2157                        tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2158                                        iph->daddr, 0, IPPROTO_TCP, 0);
2159                        ip_off = (unsigned char *)iph -
2160                                (unsigned char *) skb_network_header(skb);
2161                        if (ip_off == 8) /* 802.3-SNAP frame */
2162                                ptpd->word3 |= 1 << TPD_ETHTYPE_SHIFT;
2163                        else if (ip_off != 0)
2164                                return -2;
2165
2166                        ptpd->word3 |= (iph->ihl & TPD_IPHL_MASK) <<
2167                                TPD_IPHL_SHIFT;
2168                        ptpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
2169                                TPD_TCPHDRLEN_MASK) << TPD_TCPHDRLEN_SHIFT;
2170                        ptpd->word3 |= (skb_shinfo(skb)->gso_size &
2171                                TPD_MSS_MASK) << TPD_MSS_SHIFT;
2172                        ptpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
2173                        return 3;
2174                }
2175        }
2176        return 0;
2177}
2178
2179static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
2180        struct tx_packet_desc *ptpd)
2181{
2182        u8 css, cso;
2183
2184        if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2185                css = skb_checksum_start_offset(skb);
2186                cso = css + (u8) skb->csum_offset;
2187                if (unlikely(css & 0x1)) {
2188                        /* L1 hardware requires an even number here */
2189                        if (netif_msg_tx_err(adapter))
2190                                dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2191                                        "payload offset not an even number\n");
2192                        return -1;
2193                }
2194                ptpd->word3 |= (css & TPD_PLOADOFFSET_MASK) <<
2195                        TPD_PLOADOFFSET_SHIFT;
2196                ptpd->word3 |= (cso & TPD_CCSUMOFFSET_MASK) <<
2197                        TPD_CCSUMOFFSET_SHIFT;
2198                ptpd->word3 |= 1 << TPD_CUST_CSUM_EN_SHIFT;
2199                return true;
2200        }
2201        return 0;
2202}
2203
2204static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
2205        struct tx_packet_desc *ptpd)
2206{
2207        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2208        struct atl1_buffer *buffer_info;
2209        u16 buf_len = skb->len;
2210        struct page *page;
2211        unsigned long offset;
2212        unsigned int nr_frags;
2213        unsigned int f;
2214        int retval;
2215        u16 next_to_use;
2216        u16 data_len;
2217        u8 hdr_len;
2218
2219        buf_len -= skb->data_len;
2220        nr_frags = skb_shinfo(skb)->nr_frags;
2221        next_to_use = atomic_read(&tpd_ring->next_to_use);
2222        buffer_info = &tpd_ring->buffer_info[next_to_use];
2223        BUG_ON(buffer_info->skb);
2224        /* put skb in last TPD */
2225        buffer_info->skb = NULL;
2226
2227        retval = (ptpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
2228        if (retval) {
2229                /* TSO */
2230                hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2231                buffer_info->length = hdr_len;
2232                page = virt_to_page(skb->data);
2233                offset = (unsigned long)skb->data & ~PAGE_MASK;
2234                buffer_info->dma = pci_map_page(adapter->pdev, page,
2235                                                offset, hdr_len,
2236                                                PCI_DMA_TODEVICE);
2237
2238                if (++next_to_use == tpd_ring->count)
2239                        next_to_use = 0;
2240
2241                if (buf_len > hdr_len) {
2242                        int i, nseg;
2243
2244                        data_len = buf_len - hdr_len;
2245                        nseg = (data_len + ATL1_MAX_TX_BUF_LEN - 1) /
2246                                ATL1_MAX_TX_BUF_LEN;
2247                        for (i = 0; i < nseg; i++) {
2248                                buffer_info =
2249                                    &tpd_ring->buffer_info[next_to_use];
2250                                buffer_info->skb = NULL;
2251                                buffer_info->length =
2252                                    (ATL1_MAX_TX_BUF_LEN >=
2253                                     data_len) ? ATL1_MAX_TX_BUF_LEN : data_len;
2254                                data_len -= buffer_info->length;
2255                                page = virt_to_page(skb->data +
2256                                        (hdr_len + i * ATL1_MAX_TX_BUF_LEN));
2257                                offset = (unsigned long)(skb->data +
2258                                        (hdr_len + i * ATL1_MAX_TX_BUF_LEN)) &
2259                                        ~PAGE_MASK;
2260                                buffer_info->dma = pci_map_page(adapter->pdev,
2261                                        page, offset, buffer_info->length,
2262                                        PCI_DMA_TODEVICE);
2263                                if (++next_to_use == tpd_ring->count)
2264                                        next_to_use = 0;
2265                        }
2266                }
2267        } else {
2268                /* not TSO */
2269                buffer_info->length = buf_len;
2270                page = virt_to_page(skb->data);
2271                offset = (unsigned long)skb->data & ~PAGE_MASK;
2272                buffer_info->dma = pci_map_page(adapter->pdev, page,
2273                        offset, buf_len, PCI_DMA_TODEVICE);
2274                if (++next_to_use == tpd_ring->count)
2275                        next_to_use = 0;
2276        }
2277
2278        for (f = 0; f < nr_frags; f++) {
2279                const struct skb_frag_struct *frag;
2280                u16 i, nseg;
2281
2282                frag = &skb_shinfo(skb)->frags[f];
2283                buf_len = skb_frag_size(frag);
2284
2285                nseg = (buf_len + ATL1_MAX_TX_BUF_LEN - 1) /
2286                        ATL1_MAX_TX_BUF_LEN;
2287                for (i = 0; i < nseg; i++) {
2288                        buffer_info = &tpd_ring->buffer_info[next_to_use];
2289                        BUG_ON(buffer_info->skb);
2290
2291                        buffer_info->skb = NULL;
2292                        buffer_info->length = (buf_len > ATL1_MAX_TX_BUF_LEN) ?
2293                                ATL1_MAX_TX_BUF_LEN : buf_len;
2294                        buf_len -= buffer_info->length;
2295                        buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2296                                frag, i * ATL1_MAX_TX_BUF_LEN,
2297                                buffer_info->length, DMA_TO_DEVICE);
2298
2299                        if (++next_to_use == tpd_ring->count)
2300                                next_to_use = 0;
2301                }
2302        }
2303
2304        /* last tpd's buffer-info */
2305        buffer_info->skb = skb;
2306}
2307
2308static void atl1_tx_queue(struct atl1_adapter *adapter, u16 count,
2309       struct tx_packet_desc *ptpd)
2310{
2311        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2312        struct atl1_buffer *buffer_info;
2313        struct tx_packet_desc *tpd;
2314        u16 j;
2315        u32 val;
2316        u16 next_to_use = (u16) atomic_read(&tpd_ring->next_to_use);
2317
2318        for (j = 0; j < count; j++) {
2319                buffer_info = &tpd_ring->buffer_info[next_to_use];
2320                tpd = ATL1_TPD_DESC(&adapter->tpd_ring, next_to_use);
2321                if (tpd != ptpd)
2322                        memcpy(tpd, ptpd, sizeof(struct tx_packet_desc));
2323                tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2324                tpd->word2 &= ~(TPD_BUFLEN_MASK << TPD_BUFLEN_SHIFT);
2325                tpd->word2 |= (cpu_to_le16(buffer_info->length) &
2326                        TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT;
2327
2328                /*
2329                 * if this is the first packet in a TSO chain, set
2330                 * TPD_HDRFLAG, otherwise, clear it.
2331                 */
2332                val = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) &
2333                        TPD_SEGMENT_EN_MASK;
2334                if (val) {
2335                        if (!j)
2336                                tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
2337                        else
2338                                tpd->word3 &= ~(1 << TPD_HDRFLAG_SHIFT);
2339                }
2340
2341                if (j == (count - 1))
2342                        tpd->word3 |= 1 << TPD_EOP_SHIFT;
2343
2344                if (++next_to_use == tpd_ring->count)
2345                        next_to_use = 0;
2346        }
2347        /*
2348         * Force memory writes to complete before letting h/w
2349         * know there are new descriptors to fetch.  (Only
2350         * applicable for weak-ordered memory model archs,
2351         * such as IA-64).
2352         */
2353        wmb();
2354
2355        atomic_set(&tpd_ring->next_to_use, next_to_use);
2356}
2357
2358static netdev_tx_t atl1_xmit_frame(struct sk_buff *skb,
2359                                         struct net_device *netdev)
2360{
2361        struct atl1_adapter *adapter = netdev_priv(netdev);
2362        struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
2363        int len;
2364        int tso;
2365        int count = 1;
2366        int ret_val;
2367        struct tx_packet_desc *ptpd;
2368        u16 vlan_tag;
2369        unsigned int nr_frags = 0;
2370        unsigned int mss = 0;
2371        unsigned int f;
2372        unsigned int proto_hdr_len;
2373
2374        len = skb_headlen(skb);
2375
2376        if (unlikely(skb->len <= 0)) {
2377                dev_kfree_skb_any(skb);
2378                return NETDEV_TX_OK;
2379        }
2380
2381        nr_frags = skb_shinfo(skb)->nr_frags;
2382        for (f = 0; f < nr_frags; f++) {
2383                unsigned int f_size = skb_frag_size(&skb_shinfo(skb)->frags[f]);
2384                count += (f_size + ATL1_MAX_TX_BUF_LEN - 1) /
2385                         ATL1_MAX_TX_BUF_LEN;
2386        }
2387
2388        mss = skb_shinfo(skb)->gso_size;
2389        if (mss) {
2390                if (skb->protocol == htons(ETH_P_IP)) {
2391                        proto_hdr_len = (skb_transport_offset(skb) +
2392                                         tcp_hdrlen(skb));
2393                        if (unlikely(proto_hdr_len > len)) {
2394                                dev_kfree_skb_any(skb);
2395                                return NETDEV_TX_OK;
2396                        }
2397                        /* need additional TPD ? */
2398                        if (proto_hdr_len != len)
2399                                count += (len - proto_hdr_len +
2400                                        ATL1_MAX_TX_BUF_LEN - 1) /
2401                                        ATL1_MAX_TX_BUF_LEN;
2402                }
2403        }
2404
2405        if (atl1_tpd_avail(&adapter->tpd_ring) < count) {
2406                /* not enough descriptors */
2407                netif_stop_queue(netdev);
2408                if (netif_msg_tx_queued(adapter))
2409                        dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2410                                "tx busy\n");
2411                return NETDEV_TX_BUSY;
2412        }
2413
2414        ptpd = ATL1_TPD_DESC(tpd_ring,
2415                (u16) atomic_read(&tpd_ring->next_to_use));
2416        memset(ptpd, 0, sizeof(struct tx_packet_desc));
2417
2418        if (skb_vlan_tag_present(skb)) {
2419                vlan_tag = skb_vlan_tag_get(skb);
2420                vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
2421                        ((vlan_tag >> 9) & 0x8);
2422                ptpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
2423                ptpd->word2 |= (vlan_tag & TPD_VLANTAG_MASK) <<
2424                        TPD_VLANTAG_SHIFT;
2425        }
2426
2427        tso = atl1_tso(adapter, skb, ptpd);
2428        if (tso < 0) {
2429                dev_kfree_skb_any(skb);
2430                return NETDEV_TX_OK;
2431        }
2432
2433        if (!tso) {
2434                ret_val = atl1_tx_csum(adapter, skb, ptpd);
2435                if (ret_val < 0) {
2436                        dev_kfree_skb_any(skb);
2437                        return NETDEV_TX_OK;
2438                }
2439        }
2440
2441        atl1_tx_map(adapter, skb, ptpd);
2442        atl1_tx_queue(adapter, count, ptpd);
2443        atl1_update_mailbox(adapter);
2444        mmiowb();
2445        return NETDEV_TX_OK;
2446}
2447
2448static int atl1_rings_clean(struct napi_struct *napi, int budget)
2449{
2450        struct atl1_adapter *adapter = container_of(napi, struct atl1_adapter, napi);
2451        int work_done = atl1_intr_rx(adapter, budget);
2452
2453        if (atl1_intr_tx(adapter))
2454                work_done = budget;
2455
2456        /* Let's come again to process some more packets */
2457        if (work_done >= budget)
2458                return work_done;
2459
2460        napi_complete(napi);
2461        /* re-enable Interrupt */
2462        if (likely(adapter->int_enabled))
2463                atlx_imr_set(adapter, IMR_NORMAL_MASK);
2464        return work_done;
2465}
2466
2467static inline int atl1_sched_rings_clean(struct atl1_adapter* adapter)
2468{
2469        if (!napi_schedule_prep(&adapter->napi))
2470                /* It is possible in case even the RX/TX ints are disabled via IMR
2471                 * register the ISR bits are set anyway (but do not produce IRQ).
2472                 * To handle such situation the napi functions used to check is
2473                 * something scheduled or not.
2474                 */
2475                return 0;
2476
2477        __napi_schedule(&adapter->napi);
2478
2479        /*
2480         * Disable RX/TX ints via IMR register if it is
2481         * allowed. NAPI handler must reenable them in same
2482         * way.
2483         */
2484        if (!adapter->int_enabled)
2485                return 1;
2486
2487        atlx_imr_set(adapter, IMR_NORXTX_MASK);
2488        return 1;
2489}
2490
2491/**
2492 * atl1_intr - Interrupt Handler
2493 * @irq: interrupt number
2494 * @data: pointer to a network interface device structure
2495 */
2496static irqreturn_t atl1_intr(int irq, void *data)
2497{
2498        struct atl1_adapter *adapter = netdev_priv(data);
2499        u32 status;
2500
2501        status = adapter->cmb.cmb->int_stats;
2502        if (!status)
2503                return IRQ_NONE;
2504
2505        /* clear CMB interrupt status at once,
2506         * but leave rx/tx interrupt status in case it should be dropped
2507         * only if rx/tx processing queued. In other case interrupt
2508         * can be lost.
2509         */
2510        adapter->cmb.cmb->int_stats = status & (ISR_CMB_TX | ISR_CMB_RX);
2511
2512        if (status & ISR_GPHY)  /* clear phy status */
2513                atlx_clear_phy_int(adapter);
2514
2515        /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2516        iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
2517
2518        /* check if SMB intr */
2519        if (status & ISR_SMB)
2520                atl1_inc_smb(adapter);
2521
2522        /* check if PCIE PHY Link down */
2523        if (status & ISR_PHY_LINKDOWN) {
2524                if (netif_msg_intr(adapter))
2525                        dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2526                                "pcie phy link down %x\n", status);
2527                if (netif_running(adapter->netdev)) {   /* reset MAC */
2528                        atlx_irq_disable(adapter);
2529                        schedule_work(&adapter->reset_dev_task);
2530                        return IRQ_HANDLED;
2531                }
2532        }
2533
2534        /* check if DMA read/write error ? */
2535        if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
2536                if (netif_msg_intr(adapter))
2537                        dev_printk(KERN_DEBUG, &adapter->pdev->dev,
2538                                "pcie DMA r/w error (status = 0x%x)\n",
2539                                status);
2540                atlx_irq_disable(adapter);
2541                schedule_work(&adapter->reset_dev_task);
2542                return IRQ_HANDLED;
2543        }
2544
2545        /* link event */
2546        if (status & ISR_GPHY) {
2547                adapter->soft_stats.tx_carrier_errors++;
2548                atl1_check_for_link(adapter);
2549        }
2550
2551        /* transmit or receive event */
2552        if (status & (ISR_CMB_TX | ISR_CMB_RX) &&
2553            atl1_sched_rings_clean(adapter))
2554                adapter->cmb.cmb->int_stats = adapter->cmb.cmb->int_stats &
2555                                              ~(ISR_CMB_TX | ISR_CMB_RX);
2556
2557        /* rx exception */
2558        if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
2559                ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
2560                ISR_HOST_RRD_OV))) {
2561                if (netif_msg_intr(adapter))
2562                        dev_printk(KERN_DEBUG,
2563                                &adapter->pdev->dev,
2564                                "rx exception, ISR = 0x%x\n",
2565                                status);
2566                atl1_sched_rings_clean(adapter);
2567        }
2568
2569        /* re-enable Interrupt */
2570        iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
2571        return IRQ_HANDLED;
2572}
2573
2574
2575/**
2576 * atl1_phy_config - Timer Call-back
2577 * @data: pointer to netdev cast into an unsigned long
2578 */
2579static void atl1_phy_config(unsigned long data)
2580{
2581        struct atl1_adapter *adapter = (struct atl1_adapter *)data;
2582        struct atl1_hw *hw = &adapter->hw;
2583        unsigned long flags;
2584
2585        spin_lock_irqsave(&adapter->lock, flags);
2586        adapter->phy_timer_pending = false;
2587        atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
2588        atl1_write_phy_reg(hw, MII_ATLX_CR, hw->mii_1000t_ctrl_reg);
2589        atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
2590        spin_unlock_irqrestore(&adapter->lock, flags);
2591}
2592
2593/*
2594 * Orphaned vendor comment left intact here:
2595 * <vendor comment>
2596 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2597 * will assert. We do soft reset <0x1400=1> according
2598 * with the SPEC. BUT, it seemes that PCIE or DMA
2599 * state-machine will not be reset. DMAR_TO_INT will
2600 * assert again and again.
2601 * </vendor comment>
2602 */
2603
2604static int atl1_reset(struct atl1_adapter *adapter)
2605{
2606        int ret;
2607        ret = atl1_reset_hw(&adapter->hw);
2608        if (ret)
2609                return ret;
2610        return atl1_init_hw(&adapter->hw);
2611}
2612
2613static s32 atl1_up(struct atl1_adapter *adapter)
2614{
2615        struct net_device *netdev = adapter->netdev;
2616        int err;
2617        int irq_flags = 0;
2618
2619        /* hardware has been reset, we need to reload some things */
2620        atlx_set_multi(netdev);
2621        atl1_init_ring_ptrs(adapter);
2622        atlx_restore_vlan(adapter);
2623        err = atl1_alloc_rx_buffers(adapter);
2624        if (unlikely(!err))
2625                /* no RX BUFFER allocated */
2626                return -ENOMEM;
2627
2628        if (unlikely(atl1_configure(adapter))) {
2629                err = -EIO;
2630                goto err_up;
2631        }
2632
2633        err = pci_enable_msi(adapter->pdev);
2634        if (err) {
2635                if (netif_msg_ifup(adapter))
2636                        dev_info(&adapter->pdev->dev,
2637                                "Unable to enable MSI: %d\n", err);
2638                irq_flags |= IRQF_SHARED;
2639        }
2640
2641        err = request_irq(adapter->pdev->irq, atl1_intr, irq_flags,
2642                        netdev->name, netdev);
2643        if (unlikely(err))
2644                goto err_up;
2645
2646        napi_enable(&adapter->napi);
2647        atlx_irq_enable(adapter);
2648        atl1_check_link(adapter);
2649        netif_start_queue(netdev);
2650        return 0;
2651
2652err_up:
2653        pci_disable_msi(adapter->pdev);
2654        /* free rx_buffers */
2655        atl1_clean_rx_ring(adapter);
2656        return err;
2657}
2658
2659static void atl1_down(struct atl1_adapter *adapter)
2660{
2661        struct net_device *netdev = adapter->netdev;
2662
2663        napi_disable(&adapter->napi);
2664        netif_stop_queue(netdev);
2665        del_timer_sync(&adapter->phy_config_timer);
2666        adapter->phy_timer_pending = false;
2667
2668        atlx_irq_disable(adapter);
2669        free_irq(adapter->pdev->irq, netdev);
2670        pci_disable_msi(adapter->pdev);
2671        atl1_reset_hw(&adapter->hw);
2672        adapter->cmb.cmb->int_stats = 0;
2673
2674        adapter->link_speed = SPEED_0;
2675        adapter->link_duplex = -1;
2676        netif_carrier_off(netdev);
2677
2678        atl1_clean_tx_ring(adapter);
2679        atl1_clean_rx_ring(adapter);
2680}
2681
2682static void atl1_reset_dev_task(struct work_struct *work)
2683{
2684        struct atl1_adapter *adapter =
2685                container_of(work, struct atl1_adapter, reset_dev_task);
2686        struct net_device *netdev = adapter->netdev;
2687
2688        netif_device_detach(netdev);
2689        atl1_down(adapter);
2690        atl1_up(adapter);
2691        netif_device_attach(netdev);
2692}
2693
2694/**
2695 * atl1_change_mtu - Change the Maximum Transfer Unit
2696 * @netdev: network interface device structure
2697 * @new_mtu: new value for maximum frame size
2698 *
2699 * Returns 0 on success, negative on failure
2700 */
2701static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
2702{
2703        struct atl1_adapter *adapter = netdev_priv(netdev);
2704        int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2705
2706        adapter->hw.max_frame_size = max_frame;
2707        adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
2708        adapter->rx_buffer_len = (max_frame + 7) & ~7;
2709        adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
2710
2711        netdev->mtu = new_mtu;
2712        if (netif_running(netdev)) {
2713                atl1_down(adapter);
2714                atl1_up(adapter);
2715        }
2716
2717        return 0;
2718}
2719
2720/**
2721 * atl1_open - Called when a network interface is made active
2722 * @netdev: network interface device structure
2723 *
2724 * Returns 0 on success, negative value on failure
2725 *
2726 * The open entry point is called when a network interface is made
2727 * active by the system (IFF_UP).  At this point all resources needed
2728 * for transmit and receive operations are allocated, the interrupt
2729 * handler is registered with the OS, the watchdog timer is started,
2730 * and the stack is notified that the interface is ready.
2731 */
2732static int atl1_open(struct net_device *netdev)
2733{
2734        struct atl1_adapter *adapter = netdev_priv(netdev);
2735        int err;
2736
2737        netif_carrier_off(netdev);
2738
2739        /* allocate transmit descriptors */
2740        err = atl1_setup_ring_resources(adapter);
2741        if (err)
2742                return err;
2743
2744        err = atl1_up(adapter);
2745        if (err)
2746                goto err_up;
2747
2748        return 0;
2749
2750err_up:
2751        atl1_reset(adapter);
2752        return err;
2753}
2754
2755/**
2756 * atl1_close - Disables a network interface
2757 * @netdev: network interface device structure
2758 *
2759 * Returns 0, this is not allowed to fail
2760 *
2761 * The close entry point is called when an interface is de-activated
2762 * by the OS.  The hardware is still under the drivers control, but
2763 * needs to be disabled.  A global MAC reset is issued to stop the
2764 * hardware, and all transmit and receive resources are freed.
2765 */
2766static int atl1_close(struct net_device *netdev)
2767{
2768        struct atl1_adapter *adapter = netdev_priv(netdev);
2769        atl1_down(adapter);
2770        atl1_free_ring_resources(adapter);
2771        return 0;
2772}
2773
2774#ifdef CONFIG_PM_SLEEP
2775static int atl1_suspend(struct device *dev)
2776{
2777        struct pci_dev *pdev = to_pci_dev(dev);
2778        struct net_device *netdev = pci_get_drvdata(pdev);
2779        struct atl1_adapter *adapter = netdev_priv(netdev);
2780        struct atl1_hw *hw = &adapter->hw;
2781        u32 ctrl = 0;
2782        u32 wufc = adapter->wol;
2783        u32 val;
2784        u16 speed;
2785        u16 duplex;
2786
2787        netif_device_detach(netdev);
2788        if (netif_running(netdev))
2789                atl1_down(adapter);
2790
2791        atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2792        atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
2793        val = ctrl & BMSR_LSTATUS;
2794        if (val)
2795                wufc &= ~ATLX_WUFC_LNKC;
2796        if (!wufc)
2797                goto disable_wol;
2798
2799        if (val) {
2800                val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
2801                if (val) {
2802                        if (netif_msg_ifdown(adapter))
2803                                dev_printk(KERN_DEBUG, &pdev->dev,
2804                                        "error getting speed/duplex\n");
2805                        goto disable_wol;
2806                }
2807
2808                ctrl = 0;
2809
2810                /* enable magic packet WOL */
2811                if (wufc & ATLX_WUFC_MAG)
2812                        ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
2813                iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2814                ioread32(hw->hw_addr + REG_WOL_CTRL);
2815
2816                /* configure the mac */
2817                ctrl = MAC_CTRL_RX_EN;
2818                ctrl |= ((u32)((speed == SPEED_1000) ? MAC_CTRL_SPEED_1000 :
2819                        MAC_CTRL_SPEED_10_100) << MAC_CTRL_SPEED_SHIFT);
2820                if (duplex == FULL_DUPLEX)
2821                        ctrl |= MAC_CTRL_DUPLX;
2822                ctrl |= (((u32)adapter->hw.preamble_len &
2823                        MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
2824                __atlx_vlan_mode(netdev->features, &ctrl);
2825                if (wufc & ATLX_WUFC_MAG)
2826                        ctrl |= MAC_CTRL_BC_EN;
2827                iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
2828                ioread32(hw->hw_addr + REG_MAC_CTRL);
2829
2830                /* poke the PHY */
2831                ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2832                ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2833                iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2834                ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2835        } else {
2836                ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
2837                iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
2838                ioread32(hw->hw_addr + REG_WOL_CTRL);
2839                iowrite32(0, hw->hw_addr + REG_MAC_CTRL);
2840                ioread32(hw->hw_addr + REG_MAC_CTRL);
2841                hw->phy_configured = false;
2842        }
2843
2844        return 0;
2845
2846 disable_wol:
2847        iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
2848        ioread32(hw->hw_addr + REG_WOL_CTRL);
2849        ctrl = ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2850        ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2851        iowrite32(ctrl, hw->hw_addr + REG_PCIE_PHYMISC);
2852        ioread32(hw->hw_addr + REG_PCIE_PHYMISC);
2853        hw->phy_configured = false;
2854
2855        return 0;
2856}
2857
2858static int atl1_resume(struct device *dev)
2859{
2860        struct pci_dev *pdev = to_pci_dev(dev);
2861        struct net_device *netdev = pci_get_drvdata(pdev);
2862        struct atl1_adapter *adapter = netdev_priv(netdev);
2863
2864        iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
2865
2866        atl1_reset_hw(&adapter->hw);
2867
2868        if (netif_running(netdev)) {
2869                adapter->cmb.cmb->int_stats = 0;
2870                atl1_up(adapter);
2871        }
2872        netif_device_attach(netdev);
2873
2874        return 0;
2875}
2876#endif
2877
2878static SIMPLE_DEV_PM_OPS(atl1_pm_ops, atl1_suspend, atl1_resume);
2879
2880static void atl1_shutdown(struct pci_dev *pdev)
2881{
2882        struct net_device *netdev = pci_get_drvdata(pdev);
2883        struct atl1_adapter *adapter = netdev_priv(netdev);
2884
2885#ifdef CONFIG_PM_SLEEP
2886        atl1_suspend(&pdev->dev);
2887#endif
2888        pci_wake_from_d3(pdev, adapter->wol);
2889        pci_set_power_state(pdev, PCI_D3hot);
2890}
2891
2892#ifdef CONFIG_NET_POLL_CONTROLLER
2893static void atl1_poll_controller(struct net_device *netdev)
2894{
2895        disable_irq(netdev->irq);
2896        atl1_intr(netdev->irq, netdev);
2897        enable_irq(netdev->irq);
2898}
2899#endif
2900
2901static const struct net_device_ops atl1_netdev_ops = {
2902        .ndo_open               = atl1_open,
2903        .ndo_stop               = atl1_close,
2904        .ndo_start_xmit         = atl1_xmit_frame,
2905        .ndo_set_rx_mode        = atlx_set_multi,
2906        .ndo_validate_addr      = eth_validate_addr,
2907        .ndo_set_mac_address    = atl1_set_mac,
2908        .ndo_change_mtu         = atl1_change_mtu,
2909        .ndo_fix_features       = atlx_fix_features,
2910        .ndo_set_features       = atlx_set_features,
2911        .ndo_do_ioctl           = atlx_ioctl,
2912        .ndo_tx_timeout         = atlx_tx_timeout,
2913#ifdef CONFIG_NET_POLL_CONTROLLER
2914        .ndo_poll_controller    = atl1_poll_controller,
2915#endif
2916};
2917
2918/**
2919 * atl1_probe - Device Initialization Routine
2920 * @pdev: PCI device information struct
2921 * @ent: entry in atl1_pci_tbl
2922 *
2923 * Returns 0 on success, negative on failure
2924 *
2925 * atl1_probe initializes an adapter identified by a pci_dev structure.
2926 * The OS initialization, configuring of the adapter private structure,
2927 * and a hardware reset occur.
2928 */
2929static int atl1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2930{
2931        struct net_device *netdev;
2932        struct atl1_adapter *adapter;
2933        static int cards_found = 0;
2934        int err;
2935
2936        err = pci_enable_device(pdev);
2937        if (err)
2938                return err;
2939
2940        /*
2941         * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2942         * shared register for the high 32 bits, so only a single, aligned,
2943         * 4 GB physical address range can be used at a time.
2944         *
2945         * Supporting 64-bit DMA on this hardware is more trouble than it's
2946         * worth.  It is far easier to limit to 32-bit DMA than update
2947         * various kernel subsystems to support the mechanics required by a
2948         * fixed-high-32-bit system.
2949         */
2950        err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2951        if (err) {
2952                dev_err(&pdev->dev, "no usable DMA configuration\n");
2953                goto err_dma;
2954        }
2955        /*
2956         * Mark all PCI regions associated with PCI device
2957         * pdev as being reserved by owner atl1_driver_name
2958         */
2959        err = pci_request_regions(pdev, ATLX_DRIVER_NAME);
2960        if (err)
2961                goto err_request_regions;
2962
2963        /*
2964         * Enables bus-mastering on the device and calls
2965         * pcibios_set_master to do the needed arch specific settings
2966         */
2967        pci_set_master(pdev);
2968
2969        netdev = alloc_etherdev(sizeof(struct atl1_adapter));
2970        if (!netdev) {
2971                err = -ENOMEM;
2972                goto err_alloc_etherdev;
2973        }
2974        SET_NETDEV_DEV(netdev, &pdev->dev);
2975
2976        pci_set_drvdata(pdev, netdev);
2977        adapter = netdev_priv(netdev);
2978        adapter->netdev = netdev;
2979        adapter->pdev = pdev;
2980        adapter->hw.back = adapter;
2981        adapter->msg_enable = netif_msg_init(debug, atl1_default_msg);
2982
2983        adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
2984        if (!adapter->hw.hw_addr) {
2985                err = -EIO;
2986                goto err_pci_iomap;
2987        }
2988        /* get device revision number */
2989        adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
2990                (REG_MASTER_CTRL + 2));
2991        if (netif_msg_probe(adapter))
2992                dev_info(&pdev->dev, "version %s\n", ATLX_DRIVER_VERSION);
2993
2994        /* set default ring resource counts */
2995        adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
2996        adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
2997
2998        adapter->mii.dev = netdev;
2999        adapter->mii.mdio_read = mdio_read;
3000        adapter->mii.mdio_write = mdio_write;
3001        adapter->mii.phy_id_mask = 0x1f;
3002        adapter->mii.reg_num_mask = 0x1f;
3003
3004        netdev->netdev_ops = &atl1_netdev_ops;
3005        netdev->watchdog_timeo = 5 * HZ;
3006        netif_napi_add(netdev, &adapter->napi, atl1_rings_clean, 64);
3007
3008        netdev->ethtool_ops = &atl1_ethtool_ops;
3009        adapter->bd_number = cards_found;
3010
3011        /* setup the private structure */
3012        err = atl1_sw_init(adapter);
3013        if (err)
3014                goto err_common;
3015
3016        netdev->features = NETIF_F_HW_CSUM;
3017        netdev->features |= NETIF_F_SG;
3018        netdev->features |= (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX);
3019
3020        netdev->hw_features = NETIF_F_HW_CSUM | NETIF_F_SG | NETIF_F_TSO |
3021                              NETIF_F_HW_VLAN_CTAG_RX;
3022
3023        /* is this valid? see atl1_setup_mac_ctrl() */
3024        netdev->features |= NETIF_F_RXCSUM;
3025
3026        /* MTU range: 42 - 10218 */
3027        netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
3028        netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
3029                          (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
3030
3031        /*
3032         * patch for some L1 of old version,
3033         * the final version of L1 may not need these
3034         * patches
3035         */
3036        /* atl1_pcie_patch(adapter); */
3037
3038        /* really reset GPHY core */
3039        iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3040
3041        /*
3042         * reset the controller to
3043         * put the device in a known good starting state
3044         */
3045        if (atl1_reset_hw(&adapter->hw)) {
3046                err = -EIO;
3047                goto err_common;
3048        }
3049
3050        /* copy the MAC address out of the EEPROM */
3051        if (atl1_read_mac_addr(&adapter->hw)) {
3052                /* mark random mac */
3053                netdev->addr_assign_type = NET_ADDR_RANDOM;
3054        }
3055        memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
3056
3057        if (!is_valid_ether_addr(netdev->dev_addr)) {
3058                err = -EIO;
3059                goto err_common;
3060        }
3061
3062        atl1_check_options(adapter);
3063
3064        /* pre-init the MAC, and setup link */
3065        err = atl1_init_hw(&adapter->hw);
3066        if (err) {
3067                err = -EIO;
3068                goto err_common;
3069        }
3070
3071        atl1_pcie_patch(adapter);
3072        /* assume we have no link for now */
3073        netif_carrier_off(netdev);
3074
3075        setup_timer(&adapter->phy_config_timer, atl1_phy_config,
3076                    (unsigned long)adapter);
3077        adapter->phy_timer_pending = false;
3078
3079        INIT_WORK(&adapter->reset_dev_task, atl1_reset_dev_task);
3080
3081        INIT_WORK(&adapter->link_chg_task, atlx_link_chg_task);
3082
3083        err = register_netdev(netdev);
3084        if (err)
3085                goto err_common;
3086
3087        cards_found++;
3088        atl1_via_workaround(adapter);
3089        return 0;
3090
3091err_common:
3092        pci_iounmap(pdev, adapter->hw.hw_addr);
3093err_pci_iomap:
3094        free_netdev(netdev);
3095err_alloc_etherdev:
3096        pci_release_regions(pdev);
3097err_dma:
3098err_request_regions:
3099        pci_disable_device(pdev);
3100        return err;
3101}
3102
3103/**
3104 * atl1_remove - Device Removal Routine
3105 * @pdev: PCI device information struct
3106 *
3107 * atl1_remove is called by the PCI subsystem to alert the driver
3108 * that it should release a PCI device.  The could be caused by a
3109 * Hot-Plug event, or because the driver is going to be removed from
3110 * memory.
3111 */
3112static void atl1_remove(struct pci_dev *pdev)
3113{
3114        struct net_device *netdev = pci_get_drvdata(pdev);
3115        struct atl1_adapter *adapter;
3116        /* Device not available. Return. */
3117        if (!netdev)
3118                return;
3119
3120        adapter = netdev_priv(netdev);
3121
3122        /*
3123         * Some atl1 boards lack persistent storage for their MAC, and get it
3124         * from the BIOS during POST.  If we've been messing with the MAC
3125         * address, we need to save the permanent one.
3126         */
3127        if (!ether_addr_equal_unaligned(adapter->hw.mac_addr,
3128                                        adapter->hw.perm_mac_addr)) {
3129                memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
3130                        ETH_ALEN);
3131                atl1_set_mac_addr(&adapter->hw);
3132        }
3133
3134        iowrite16(0, adapter->hw.hw_addr + REG_PHY_ENABLE);
3135        unregister_netdev(netdev);
3136        pci_iounmap(pdev, adapter->hw.hw_addr);
3137        pci_release_regions(pdev);
3138        free_netdev(netdev);
3139        pci_disable_device(pdev);
3140}
3141
3142static struct pci_driver atl1_driver = {
3143        .name = ATLX_DRIVER_NAME,
3144        .id_table = atl1_pci_tbl,
3145        .probe = atl1_probe,
3146        .remove = atl1_remove,
3147        .shutdown = atl1_shutdown,
3148        .driver.pm = &atl1_pm_ops,
3149};
3150
3151struct atl1_stats {
3152        char stat_string[ETH_GSTRING_LEN];
3153        int sizeof_stat;
3154        int stat_offset;
3155};
3156
3157#define ATL1_STAT(m) \
3158        sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3159
3160static struct atl1_stats atl1_gstrings_stats[] = {
3161        {"rx_packets", ATL1_STAT(soft_stats.rx_packets)},
3162        {"tx_packets", ATL1_STAT(soft_stats.tx_packets)},
3163        {"rx_bytes", ATL1_STAT(soft_stats.rx_bytes)},
3164        {"tx_bytes", ATL1_STAT(soft_stats.tx_bytes)},
3165        {"rx_errors", ATL1_STAT(soft_stats.rx_errors)},
3166        {"tx_errors", ATL1_STAT(soft_stats.tx_errors)},
3167        {"multicast", ATL1_STAT(soft_stats.multicast)},
3168        {"collisions", ATL1_STAT(soft_stats.collisions)},
3169        {"rx_length_errors", ATL1_STAT(soft_stats.rx_length_errors)},
3170        {"rx_over_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3171        {"rx_crc_errors", ATL1_STAT(soft_stats.rx_crc_errors)},
3172        {"rx_frame_errors", ATL1_STAT(soft_stats.rx_frame_errors)},
3173        {"rx_fifo_errors", ATL1_STAT(soft_stats.rx_fifo_errors)},
3174        {"rx_missed_errors", ATL1_STAT(soft_stats.rx_missed_errors)},
3175        {"tx_aborted_errors", ATL1_STAT(soft_stats.tx_aborted_errors)},
3176        {"tx_carrier_errors", ATL1_STAT(soft_stats.tx_carrier_errors)},
3177        {"tx_fifo_errors", ATL1_STAT(soft_stats.tx_fifo_errors)},
3178        {"tx_window_errors", ATL1_STAT(soft_stats.tx_window_errors)},
3179        {"tx_abort_exce_coll", ATL1_STAT(soft_stats.excecol)},
3180        {"tx_abort_late_coll", ATL1_STAT(soft_stats.latecol)},
3181        {"tx_deferred_ok", ATL1_STAT(soft_stats.deffer)},
3182        {"tx_single_coll_ok", ATL1_STAT(soft_stats.scc)},
3183        {"tx_multi_coll_ok", ATL1_STAT(soft_stats.mcc)},
3184        {"tx_underun", ATL1_STAT(soft_stats.tx_underun)},
3185        {"tx_trunc", ATL1_STAT(soft_stats.tx_trunc)},
3186        {"tx_pause", ATL1_STAT(soft_stats.tx_pause)},
3187        {"rx_pause", ATL1_STAT(soft_stats.rx_pause)},
3188        {"rx_rrd_ov", ATL1_STAT(soft_stats.rx_rrd_ov)},
3189        {"rx_trunc", ATL1_STAT(soft_stats.rx_trunc)}
3190};
3191
3192static void atl1_get_ethtool_stats(struct net_device *netdev,
3193        struct ethtool_stats *stats, u64 *data)
3194{
3195        struct atl1_adapter *adapter = netdev_priv(netdev);
3196        int i;
3197        char *p;
3198
3199        for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3200                p = (char *)adapter+atl1_gstrings_stats[i].stat_offset;
3201                data[i] = (atl1_gstrings_stats[i].sizeof_stat ==
3202                        sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
3203        }
3204
3205}
3206
3207static int atl1_get_sset_count(struct net_device *netdev, int sset)
3208{
3209        switch (sset) {
3210        case ETH_SS_STATS:
3211                return ARRAY_SIZE(atl1_gstrings_stats);
3212        default:
3213                return -EOPNOTSUPP;
3214        }
3215}
3216
3217static int atl1_get_link_ksettings(struct net_device *netdev,
3218                                   struct ethtool_link_ksettings *cmd)
3219{
3220        struct atl1_adapter *adapter = netdev_priv(netdev);
3221        struct atl1_hw *hw = &adapter->hw;
3222        u32 supported, advertising;
3223
3224        supported = (SUPPORTED_10baseT_Half |
3225                           SUPPORTED_10baseT_Full |
3226                           SUPPORTED_100baseT_Half |
3227                           SUPPORTED_100baseT_Full |
3228                           SUPPORTED_1000baseT_Full |
3229                           SUPPORTED_Autoneg | SUPPORTED_TP);
3230        advertising = ADVERTISED_TP;
3231        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3232            hw->media_type == MEDIA_TYPE_1000M_FULL) {
3233                advertising |= ADVERTISED_Autoneg;
3234                if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR) {
3235                        advertising |= ADVERTISED_Autoneg;
3236                        advertising |=
3237                            (ADVERTISED_10baseT_Half |
3238                             ADVERTISED_10baseT_Full |
3239                             ADVERTISED_100baseT_Half |
3240                             ADVERTISED_100baseT_Full |
3241                             ADVERTISED_1000baseT_Full);
3242                } else
3243                        advertising |= (ADVERTISED_1000baseT_Full);
3244        }
3245        cmd->base.port = PORT_TP;
3246        cmd->base.phy_address = 0;
3247
3248        if (netif_carrier_ok(adapter->netdev)) {
3249                u16 link_speed, link_duplex;
3250                atl1_get_speed_and_duplex(hw, &link_speed, &link_duplex);
3251                cmd->base.speed = link_speed;
3252                if (link_duplex == FULL_DUPLEX)
3253                        cmd->base.duplex = DUPLEX_FULL;
3254                else
3255                        cmd->base.duplex = DUPLEX_HALF;
3256        } else {
3257                cmd->base.speed = SPEED_UNKNOWN;
3258                cmd->base.duplex = DUPLEX_UNKNOWN;
3259        }
3260        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3261            hw->media_type == MEDIA_TYPE_1000M_FULL)
3262                cmd->base.autoneg = AUTONEG_ENABLE;
3263        else
3264                cmd->base.autoneg = AUTONEG_DISABLE;
3265
3266        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
3267                                                supported);
3268        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
3269                                                advertising);
3270
3271        return 0;
3272}
3273
3274static int atl1_set_link_ksettings(struct net_device *netdev,
3275                                   const struct ethtool_link_ksettings *cmd)
3276{
3277        struct atl1_adapter *adapter = netdev_priv(netdev);
3278        struct atl1_hw *hw = &adapter->hw;
3279        u16 phy_data;
3280        int ret_val = 0;
3281        u16 old_media_type = hw->media_type;
3282        u32 advertising;
3283
3284        if (netif_running(adapter->netdev)) {
3285                if (netif_msg_link(adapter))
3286                        dev_dbg(&adapter->pdev->dev,
3287                                "ethtool shutting down adapter\n");
3288                atl1_down(adapter);
3289        }
3290
3291        if (cmd->base.autoneg == AUTONEG_ENABLE)
3292                hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
3293        else {
3294                u32 speed = cmd->base.speed;
3295                if (speed == SPEED_1000) {
3296                        if (cmd->base.duplex != DUPLEX_FULL) {
3297                                if (netif_msg_link(adapter))
3298                                        dev_warn(&adapter->pdev->dev,
3299                                                "1000M half is invalid\n");
3300                                ret_val = -EINVAL;
3301                                goto exit_sset;
3302                        }
3303                        hw->media_type = MEDIA_TYPE_1000M_FULL;
3304                } else if (speed == SPEED_100) {
3305                        if (cmd->base.duplex == DUPLEX_FULL)
3306                                hw->media_type = MEDIA_TYPE_100M_FULL;
3307                        else
3308                                hw->media_type = MEDIA_TYPE_100M_HALF;
3309                } else {
3310                        if (cmd->base.duplex == DUPLEX_FULL)
3311                                hw->media_type = MEDIA_TYPE_10M_FULL;
3312                        else
3313                                hw->media_type = MEDIA_TYPE_10M_HALF;
3314                }
3315        }
3316        switch (hw->media_type) {
3317        case MEDIA_TYPE_AUTO_SENSOR:
3318                advertising =
3319                    ADVERTISED_10baseT_Half |
3320                    ADVERTISED_10baseT_Full |
3321                    ADVERTISED_100baseT_Half |
3322                    ADVERTISED_100baseT_Full |
3323                    ADVERTISED_1000baseT_Full |
3324                    ADVERTISED_Autoneg | ADVERTISED_TP;
3325                break;
3326        case MEDIA_TYPE_1000M_FULL:
3327                advertising =
3328                    ADVERTISED_1000baseT_Full |
3329                    ADVERTISED_Autoneg | ADVERTISED_TP;
3330                break;
3331        default:
3332                advertising = 0;
3333                break;
3334        }
3335        if (atl1_phy_setup_autoneg_adv(hw)) {
3336                ret_val = -EINVAL;
3337                if (netif_msg_link(adapter))
3338                        dev_warn(&adapter->pdev->dev,
3339                                "invalid ethtool speed/duplex setting\n");
3340                goto exit_sset;
3341        }
3342        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3343            hw->media_type == MEDIA_TYPE_1000M_FULL)
3344                phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3345        else {
3346                switch (hw->media_type) {
3347                case MEDIA_TYPE_100M_FULL:
3348                        phy_data =
3349                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
3350                            MII_CR_RESET;
3351                        break;
3352                case MEDIA_TYPE_100M_HALF:
3353                        phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3354                        break;
3355                case MEDIA_TYPE_10M_FULL:
3356                        phy_data =
3357                            MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
3358                        break;
3359                default:
3360                        /* MEDIA_TYPE_10M_HALF: */
3361                        phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3362                        break;
3363                }
3364        }
3365        atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3366exit_sset:
3367        if (ret_val)
3368                hw->media_type = old_media_type;
3369
3370        if (netif_running(adapter->netdev)) {
3371                if (netif_msg_link(adapter))
3372                        dev_dbg(&adapter->pdev->dev,
3373                                "ethtool starting adapter\n");
3374                atl1_up(adapter);
3375        } else if (!ret_val) {
3376                if (netif_msg_link(adapter))
3377                        dev_dbg(&adapter->pdev->dev,
3378                                "ethtool resetting adapter\n");
3379                atl1_reset(adapter);
3380        }
3381        return ret_val;
3382}
3383
3384static void atl1_get_drvinfo(struct net_device *netdev,
3385        struct ethtool_drvinfo *drvinfo)
3386{
3387        struct atl1_adapter *adapter = netdev_priv(netdev);
3388
3389        strlcpy(drvinfo->driver, ATLX_DRIVER_NAME, sizeof(drvinfo->driver));
3390        strlcpy(drvinfo->version, ATLX_DRIVER_VERSION,
3391                sizeof(drvinfo->version));
3392        strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
3393                sizeof(drvinfo->bus_info));
3394}
3395
3396static void atl1_get_wol(struct net_device *netdev,
3397        struct ethtool_wolinfo *wol)
3398{
3399        struct atl1_adapter *adapter = netdev_priv(netdev);
3400
3401        wol->supported = WAKE_MAGIC;
3402        wol->wolopts = 0;
3403        if (adapter->wol & ATLX_WUFC_MAG)
3404                wol->wolopts |= WAKE_MAGIC;
3405}
3406
3407static int atl1_set_wol(struct net_device *netdev,
3408        struct ethtool_wolinfo *wol)
3409{
3410        struct atl1_adapter *adapter = netdev_priv(netdev);
3411
3412        if (wol->wolopts & (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST |
3413                WAKE_ARP | WAKE_MAGICSECURE))
3414                return -EOPNOTSUPP;
3415        adapter->wol = 0;
3416        if (wol->wolopts & WAKE_MAGIC)
3417                adapter->wol |= ATLX_WUFC_MAG;
3418
3419        device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
3420
3421        return 0;
3422}
3423
3424static u32 atl1_get_msglevel(struct net_device *netdev)
3425{
3426        struct atl1_adapter *adapter = netdev_priv(netdev);
3427        return adapter->msg_enable;
3428}
3429
3430static void atl1_set_msglevel(struct net_device *netdev, u32 value)
3431{
3432        struct atl1_adapter *adapter = netdev_priv(netdev);
3433        adapter->msg_enable = value;
3434}
3435
3436static int atl1_get_regs_len(struct net_device *netdev)
3437{
3438        return ATL1_REG_COUNT * sizeof(u32);
3439}
3440
3441static void atl1_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
3442        void *p)
3443{
3444        struct atl1_adapter *adapter = netdev_priv(netdev);
3445        struct atl1_hw *hw = &adapter->hw;
3446        unsigned int i;
3447        u32 *regbuf = p;
3448
3449        for (i = 0; i < ATL1_REG_COUNT; i++) {
3450                /*
3451                 * This switch statement avoids reserved regions
3452                 * of register space.
3453                 */
3454                switch (i) {
3455                case 6 ... 9:
3456                case 14:
3457                case 29 ... 31:
3458                case 34 ... 63:
3459                case 75 ... 127:
3460                case 136 ... 1023:
3461                case 1027 ... 1087:
3462                case 1091 ... 1151:
3463                case 1194 ... 1195:
3464                case 1200 ... 1201:
3465                case 1206 ... 1213:
3466                case 1216 ... 1279:
3467                case 1290 ... 1311:
3468                case 1323 ... 1343:
3469                case 1358 ... 1359:
3470                case 1368 ... 1375:
3471                case 1378 ... 1383:
3472                case 1388 ... 1391:
3473                case 1393 ... 1395:
3474                case 1402 ... 1403:
3475                case 1410 ... 1471:
3476                case 1522 ... 1535:
3477                        /* reserved region; don't read it */
3478                        regbuf[i] = 0;
3479                        break;
3480                default:
3481                        /* unreserved region */
3482                        regbuf[i] = ioread32(hw->hw_addr + (i * sizeof(u32)));
3483                }
3484        }
3485}
3486
3487static void atl1_get_ringparam(struct net_device *netdev,
3488        struct ethtool_ringparam *ring)
3489{
3490        struct atl1_adapter *adapter = netdev_priv(netdev);
3491        struct atl1_tpd_ring *txdr = &adapter->tpd_ring;
3492        struct atl1_rfd_ring *rxdr = &adapter->rfd_ring;
3493
3494        ring->rx_max_pending = ATL1_MAX_RFD;
3495        ring->tx_max_pending = ATL1_MAX_TPD;
3496        ring->rx_pending = rxdr->count;
3497        ring->tx_pending = txdr->count;
3498}
3499
3500static int atl1_set_ringparam(struct net_device *netdev,
3501        struct ethtool_ringparam *ring)
3502{
3503        struct atl1_adapter *adapter = netdev_priv(netdev);
3504        struct atl1_tpd_ring *tpdr = &adapter->tpd_ring;
3505        struct atl1_rrd_ring *rrdr = &adapter->rrd_ring;
3506        struct atl1_rfd_ring *rfdr = &adapter->rfd_ring;
3507
3508        struct atl1_tpd_ring tpd_old, tpd_new;
3509        struct atl1_rfd_ring rfd_old, rfd_new;
3510        struct atl1_rrd_ring rrd_old, rrd_new;
3511        struct atl1_ring_header rhdr_old, rhdr_new;
3512        struct atl1_smb smb;
3513        struct atl1_cmb cmb;
3514        int err;
3515
3516        tpd_old = adapter->tpd_ring;
3517        rfd_old = adapter->rfd_ring;
3518        rrd_old = adapter->rrd_ring;
3519        rhdr_old = adapter->ring_header;
3520
3521        if (netif_running(adapter->netdev))
3522                atl1_down(adapter);
3523
3524        rfdr->count = (u16) max(ring->rx_pending, (u32) ATL1_MIN_RFD);
3525        rfdr->count = rfdr->count > ATL1_MAX_RFD ? ATL1_MAX_RFD :
3526                        rfdr->count;
3527        rfdr->count = (rfdr->count + 3) & ~3;
3528        rrdr->count = rfdr->count;
3529
3530        tpdr->count = (u16) max(ring->tx_pending, (u32) ATL1_MIN_TPD);
3531        tpdr->count = tpdr->count > ATL1_MAX_TPD ? ATL1_MAX_TPD :
3532                        tpdr->count;
3533        tpdr->count = (tpdr->count + 3) & ~3;
3534
3535        if (netif_running(adapter->netdev)) {
3536                /* try to get new resources before deleting old */
3537                err = atl1_setup_ring_resources(adapter);
3538                if (err)
3539                        goto err_setup_ring;
3540
3541                /*
3542                 * save the new, restore the old in order to free it,
3543                 * then restore the new back again
3544                 */
3545
3546                rfd_new = adapter->rfd_ring;
3547                rrd_new = adapter->rrd_ring;
3548                tpd_new = adapter->tpd_ring;
3549                rhdr_new = adapter->ring_header;
3550                adapter->rfd_ring = rfd_old;
3551                adapter->rrd_ring = rrd_old;
3552                adapter->tpd_ring = tpd_old;
3553                adapter->ring_header = rhdr_old;
3554                /*
3555                 * Save SMB and CMB, since atl1_free_ring_resources
3556                 * will clear them.
3557                 */
3558                smb = adapter->smb;
3559                cmb = adapter->cmb;
3560                atl1_free_ring_resources(adapter);
3561                adapter->rfd_ring = rfd_new;
3562                adapter->rrd_ring = rrd_new;
3563                adapter->tpd_ring = tpd_new;
3564                adapter->ring_header = rhdr_new;
3565                adapter->smb = smb;
3566                adapter->cmb = cmb;
3567
3568                err = atl1_up(adapter);
3569                if (err)
3570                        return err;
3571        }
3572        return 0;
3573
3574err_setup_ring:
3575        adapter->rfd_ring = rfd_old;
3576        adapter->rrd_ring = rrd_old;
3577        adapter->tpd_ring = tpd_old;
3578        adapter->ring_header = rhdr_old;
3579        atl1_up(adapter);
3580        return err;
3581}
3582
3583static void atl1_get_pauseparam(struct net_device *netdev,
3584        struct ethtool_pauseparam *epause)
3585{
3586        struct atl1_adapter *adapter = netdev_priv(netdev);
3587        struct atl1_hw *hw = &adapter->hw;
3588
3589        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3590            hw->media_type == MEDIA_TYPE_1000M_FULL) {
3591                epause->autoneg = AUTONEG_ENABLE;
3592        } else {
3593                epause->autoneg = AUTONEG_DISABLE;
3594        }
3595        epause->rx_pause = 1;
3596        epause->tx_pause = 1;
3597}
3598
3599static int atl1_set_pauseparam(struct net_device *netdev,
3600        struct ethtool_pauseparam *epause)
3601{
3602        struct atl1_adapter *adapter = netdev_priv(netdev);
3603        struct atl1_hw *hw = &adapter->hw;
3604
3605        if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3606            hw->media_type == MEDIA_TYPE_1000M_FULL) {
3607                epause->autoneg = AUTONEG_ENABLE;
3608        } else {
3609                epause->autoneg = AUTONEG_DISABLE;
3610        }
3611
3612        epause->rx_pause = 1;
3613        epause->tx_pause = 1;
3614
3615        return 0;
3616}
3617
3618static void atl1_get_strings(struct net_device *netdev, u32 stringset,
3619        u8 *data)
3620{
3621        u8 *p = data;
3622        int i;
3623
3624        switch (stringset) {
3625        case ETH_SS_STATS:
3626                for (i = 0; i < ARRAY_SIZE(atl1_gstrings_stats); i++) {
3627                        memcpy(p, atl1_gstrings_stats[i].stat_string,
3628                                ETH_GSTRING_LEN);
3629                        p += ETH_GSTRING_LEN;
3630                }
3631                break;
3632        }
3633}
3634
3635static int atl1_nway_reset(struct net_device *netdev)
3636{
3637        struct atl1_adapter *adapter = netdev_priv(netdev);
3638        struct atl1_hw *hw = &adapter->hw;
3639
3640        if (netif_running(netdev)) {
3641                u16 phy_data;
3642                atl1_down(adapter);
3643
3644                if (hw->media_type == MEDIA_TYPE_AUTO_SENSOR ||
3645                        hw->media_type == MEDIA_TYPE_1000M_FULL) {
3646                        phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN;
3647                } else {
3648                        switch (hw->media_type) {
3649                        case MEDIA_TYPE_100M_FULL:
3650                                phy_data = MII_CR_FULL_DUPLEX |
3651                                        MII_CR_SPEED_100 | MII_CR_RESET;
3652                                break;
3653                        case MEDIA_TYPE_100M_HALF:
3654                                phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
3655                                break;
3656                        case MEDIA_TYPE_10M_FULL:
3657                                phy_data = MII_CR_FULL_DUPLEX |
3658                                        MII_CR_SPEED_10 | MII_CR_RESET;
3659                                break;
3660                        default:
3661                                /* MEDIA_TYPE_10M_HALF */
3662                                phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
3663                        }
3664                }
3665                atl1_write_phy_reg(hw, MII_BMCR, phy_data);
3666                atl1_up(adapter);
3667        }
3668        return 0;
3669}
3670
3671static const struct ethtool_ops atl1_ethtool_ops = {
3672        .get_drvinfo            = atl1_get_drvinfo,
3673        .get_wol                = atl1_get_wol,
3674        .set_wol                = atl1_set_wol,
3675        .get_msglevel           = atl1_get_msglevel,
3676        .set_msglevel           = atl1_set_msglevel,
3677        .get_regs_len           = atl1_get_regs_len,
3678        .get_regs               = atl1_get_regs,
3679        .get_ringparam          = atl1_get_ringparam,
3680        .set_ringparam          = atl1_set_ringparam,
3681        .get_pauseparam         = atl1_get_pauseparam,
3682        .set_pauseparam         = atl1_set_pauseparam,
3683        .get_link               = ethtool_op_get_link,
3684        .get_strings            = atl1_get_strings,
3685        .nway_reset             = atl1_nway_reset,
3686        .get_ethtool_stats      = atl1_get_ethtool_stats,
3687        .get_sset_count         = atl1_get_sset_count,
3688        .get_link_ksettings     = atl1_get_link_ksettings,
3689        .set_link_ksettings     = atl1_set_link_ksettings,
3690};
3691
3692module_pci_driver(atl1_driver);
3693