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29#include "i40e.h"
30#include "i40e_diag.h"
31
32struct i40e_stats {
33 char stat_string[ETH_GSTRING_LEN];
34 int sizeof_stat;
35 int stat_offset;
36};
37
38#define I40E_STAT(_type, _name, _stat) { \
39 .stat_string = _name, \
40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
41 .stat_offset = offsetof(_type, _stat) \
42}
43
44#define I40E_NETDEV_STAT(_net_stat) \
45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
46#define I40E_PF_STAT(_name, _stat) \
47 I40E_STAT(struct i40e_pf, _name, _stat)
48#define I40E_VSI_STAT(_name, _stat) \
49 I40E_STAT(struct i40e_vsi, _name, _stat)
50#define I40E_VEB_STAT(_name, _stat) \
51 I40E_STAT(struct i40e_veb, _name, _stat)
52
53static const struct i40e_stats i40e_gstrings_net_stats[] = {
54 I40E_NETDEV_STAT(rx_packets),
55 I40E_NETDEV_STAT(tx_packets),
56 I40E_NETDEV_STAT(rx_bytes),
57 I40E_NETDEV_STAT(tx_bytes),
58 I40E_NETDEV_STAT(rx_errors),
59 I40E_NETDEV_STAT(tx_errors),
60 I40E_NETDEV_STAT(rx_dropped),
61 I40E_NETDEV_STAT(tx_dropped),
62 I40E_NETDEV_STAT(collisions),
63 I40E_NETDEV_STAT(rx_length_errors),
64 I40E_NETDEV_STAT(rx_crc_errors),
65};
66
67static const struct i40e_stats i40e_gstrings_veb_stats[] = {
68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
76 I40E_VEB_STAT("rx_discards", stats.rx_discards),
77 I40E_VEB_STAT("tx_discards", stats.tx_discards),
78 I40E_VEB_STAT("tx_errors", stats.tx_errors),
79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
80};
81
82static const struct i40e_stats i40e_gstrings_misc_stats[] = {
83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
90 I40E_VSI_STAT("tx_linearize", tx_linearize),
91 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
92 I40E_VSI_STAT("tx_lost_interrupt", tx_lost_interrupt),
93 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
94 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
95};
96
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105
106
107static const struct i40e_stats i40e_gstrings_stats[] = {
108 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
109 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
110 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
111 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
112 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
113 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
114 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
115 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
116 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
117 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
118 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
119 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
120 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
121 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
122 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
123 I40E_PF_STAT("tx_timeout", tx_timeout_count),
124 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
125 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
126 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
127 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
128 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
129 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
130 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
131 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
132 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
133 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
134 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
135 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
136 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
137 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
138 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
139 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
140 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
141 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
142 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
143 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
144 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
145 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
146 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
147 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
148 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
149 I40E_PF_STAT("arq_overflows", arq_overflows),
150 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
157
158
159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
163};
164
165#ifdef I40E_FCOE
166static const struct i40e_stats i40e_gstrings_fcoe_stats[] = {
167 I40E_VSI_STAT("fcoe_bad_fccrc", fcoe_stats.fcoe_bad_fccrc),
168 I40E_VSI_STAT("rx_fcoe_dropped", fcoe_stats.rx_fcoe_dropped),
169 I40E_VSI_STAT("rx_fcoe_packets", fcoe_stats.rx_fcoe_packets),
170 I40E_VSI_STAT("rx_fcoe_dwords", fcoe_stats.rx_fcoe_dwords),
171 I40E_VSI_STAT("fcoe_ddp_count", fcoe_stats.fcoe_ddp_count),
172 I40E_VSI_STAT("fcoe_last_error", fcoe_stats.fcoe_last_error),
173 I40E_VSI_STAT("tx_fcoe_packets", fcoe_stats.tx_fcoe_packets),
174 I40E_VSI_STAT("tx_fcoe_dwords", fcoe_stats.tx_fcoe_dwords),
175};
176
177#endif
178#define I40E_QUEUE_STATS_LEN(n) \
179 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
180 * 2 \
181 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
182#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
183#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
184#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
185#ifdef I40E_FCOE
186#define I40E_FCOE_STATS_LEN ARRAY_SIZE(i40e_gstrings_fcoe_stats)
187#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
188 I40E_FCOE_STATS_LEN + \
189 I40E_MISC_STATS_LEN + \
190 I40E_QUEUE_STATS_LEN((n)))
191#else
192#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
193 I40E_MISC_STATS_LEN + \
194 I40E_QUEUE_STATS_LEN((n)))
195#endif
196#define I40E_PFC_STATS_LEN ( \
197 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
198 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
199 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
200 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
201 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
202 / sizeof(u64))
203#define I40E_VEB_TC_STATS_LEN ( \
204 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
205 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
206 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
207 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
208 / sizeof(u64))
209#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
210#define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
211#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
212 I40E_PFC_STATS_LEN + \
213 I40E_VSI_STATS_LEN((n)))
214
215enum i40e_ethtool_test_id {
216 I40E_ETH_TEST_REG = 0,
217 I40E_ETH_TEST_EEPROM,
218 I40E_ETH_TEST_INTR,
219 I40E_ETH_TEST_LINK,
220};
221
222static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
223 "Register test (offline)",
224 "Eeprom test (offline)",
225 "Interrupt test (offline)",
226 "Link test (on/offline)"
227};
228
229#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
230
231static const char i40e_priv_flags_strings[][ETH_GSTRING_LEN] = {
232 "MFP",
233 "LinkPolling",
234 "flow-director-atr",
235 "veb-stats",
236 "hw-atr-eviction",
237};
238
239#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings)
240
241
242static const char i40e_gl_priv_flags_strings[][ETH_GSTRING_LEN] = {
243 "vf-true-promisc-support",
244};
245
246#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_priv_flags_strings)
247
248
249
250
251
252static void i40e_partition_setting_complaint(struct i40e_pf *pf)
253{
254 dev_info(&pf->pdev->dev,
255 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
256}
257
258
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260
261
262
263
264
265static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,
266 u32 *advertising)
267{
268 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
269 u64 phy_types = pf->hw.phy.phy_types;
270
271 *supported = 0x0;
272 *advertising = 0x0;
273
274 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
275 *supported |= SUPPORTED_Autoneg |
276 SUPPORTED_1000baseT_Full;
277 *advertising |= ADVERTISED_Autoneg;
278 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
279 *advertising |= ADVERTISED_1000baseT_Full;
280 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
281 *supported |= SUPPORTED_100baseT_Full;
282 *advertising |= ADVERTISED_100baseT_Full;
283 }
284 }
285 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
286 phy_types & I40E_CAP_PHY_TYPE_XFI ||
287 phy_types & I40E_CAP_PHY_TYPE_SFI ||
288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC)
290 *supported |= SUPPORTED_10000baseT_Full;
291 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
292 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
293 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
294 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
295 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
296 *supported |= SUPPORTED_Autoneg |
297 SUPPORTED_10000baseT_Full;
298 *advertising |= ADVERTISED_Autoneg;
299 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
300 *advertising |= ADVERTISED_10000baseT_Full;
301 }
302 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
303 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
304 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
305 *supported |= SUPPORTED_40000baseCR4_Full;
306 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
307 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
308 *supported |= SUPPORTED_Autoneg |
309 SUPPORTED_40000baseCR4_Full;
310 *advertising |= ADVERTISED_Autoneg;
311 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
312 *advertising |= ADVERTISED_40000baseCR4_Full;
313 }
314 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
315 *supported |= SUPPORTED_Autoneg |
316 SUPPORTED_100baseT_Full;
317 *advertising |= ADVERTISED_Autoneg;
318 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
319 *advertising |= ADVERTISED_100baseT_Full;
320 }
321 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
322 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
323 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
324 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
325 *supported |= SUPPORTED_Autoneg |
326 SUPPORTED_1000baseT_Full;
327 *advertising |= ADVERTISED_Autoneg;
328 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
329 *advertising |= ADVERTISED_1000baseT_Full;
330 }
331 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
332 *supported |= SUPPORTED_40000baseSR4_Full;
333 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
334 *supported |= SUPPORTED_40000baseLR4_Full;
335 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
336 *supported |= SUPPORTED_40000baseKR4_Full |
337 SUPPORTED_Autoneg;
338 *advertising |= ADVERTISED_40000baseKR4_Full |
339 ADVERTISED_Autoneg;
340 }
341 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
342 *supported |= SUPPORTED_20000baseKR2_Full |
343 SUPPORTED_Autoneg;
344 *advertising |= ADVERTISED_Autoneg;
345 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
346 *advertising |= ADVERTISED_20000baseKR2_Full;
347 }
348 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {
349 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
350 *supported |= SUPPORTED_10000baseKR_Full |
351 SUPPORTED_Autoneg;
352 *advertising |= ADVERTISED_Autoneg;
353 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
354 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
355 *advertising |= ADVERTISED_10000baseKR_Full;
356 }
357 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
358 *supported |= SUPPORTED_10000baseKX4_Full |
359 SUPPORTED_Autoneg;
360 *advertising |= ADVERTISED_Autoneg;
361 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
362 *advertising |= ADVERTISED_10000baseKX4_Full;
363 }
364 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {
365 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
366 *supported |= SUPPORTED_1000baseKX_Full |
367 SUPPORTED_Autoneg;
368 *advertising |= ADVERTISED_Autoneg;
369 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
370 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
371 *advertising |= ADVERTISED_1000baseKX_Full;
372 }
373 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
374 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
375 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
376 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
377 *supported |= SUPPORTED_Autoneg;
378 *advertising |= ADVERTISED_Autoneg;
379 }
380}
381
382
383
384
385
386
387
388
389static void i40e_get_settings_link_up(struct i40e_hw *hw,
390 struct ethtool_cmd *ecmd,
391 struct net_device *netdev,
392 struct i40e_pf *pf)
393{
394 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
395 u32 link_speed = hw_link_info->link_speed;
396 u32 e_advertising = 0x0;
397 u32 e_supported = 0x0;
398
399
400 switch (hw_link_info->phy_type) {
401 case I40E_PHY_TYPE_40GBASE_CR4:
402 case I40E_PHY_TYPE_40GBASE_CR4_CU:
403 ecmd->supported = SUPPORTED_Autoneg |
404 SUPPORTED_40000baseCR4_Full;
405 ecmd->advertising = ADVERTISED_Autoneg |
406 ADVERTISED_40000baseCR4_Full;
407 break;
408 case I40E_PHY_TYPE_XLAUI:
409 case I40E_PHY_TYPE_XLPPI:
410 case I40E_PHY_TYPE_40GBASE_AOC:
411 ecmd->supported = SUPPORTED_40000baseCR4_Full;
412 break;
413 case I40E_PHY_TYPE_40GBASE_SR4:
414 ecmd->supported = SUPPORTED_40000baseSR4_Full;
415 break;
416 case I40E_PHY_TYPE_40GBASE_LR4:
417 ecmd->supported = SUPPORTED_40000baseLR4_Full;
418 break;
419 case I40E_PHY_TYPE_10GBASE_SR:
420 case I40E_PHY_TYPE_10GBASE_LR:
421 case I40E_PHY_TYPE_1000BASE_SX:
422 case I40E_PHY_TYPE_1000BASE_LX:
423 ecmd->supported = SUPPORTED_10000baseT_Full;
424 if (hw_link_info->module_type[2] &
425 I40E_MODULE_TYPE_1000BASE_SX ||
426 hw_link_info->module_type[2] &
427 I40E_MODULE_TYPE_1000BASE_LX) {
428 ecmd->supported |= SUPPORTED_1000baseT_Full;
429 if (hw_link_info->requested_speeds &
430 I40E_LINK_SPEED_1GB)
431 ecmd->advertising |= ADVERTISED_1000baseT_Full;
432 }
433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
434 ecmd->advertising |= ADVERTISED_10000baseT_Full;
435 break;
436 case I40E_PHY_TYPE_10GBASE_T:
437 case I40E_PHY_TYPE_1000BASE_T:
438 case I40E_PHY_TYPE_100BASE_TX:
439 ecmd->supported = SUPPORTED_Autoneg |
440 SUPPORTED_10000baseT_Full |
441 SUPPORTED_1000baseT_Full |
442 SUPPORTED_100baseT_Full;
443 ecmd->advertising = ADVERTISED_Autoneg;
444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
445 ecmd->advertising |= ADVERTISED_10000baseT_Full;
446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
447 ecmd->advertising |= ADVERTISED_1000baseT_Full;
448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
449 ecmd->advertising |= ADVERTISED_100baseT_Full;
450 break;
451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
452 ecmd->supported = SUPPORTED_Autoneg |
453 SUPPORTED_1000baseT_Full;
454 ecmd->advertising = ADVERTISED_Autoneg |
455 ADVERTISED_1000baseT_Full;
456 break;
457 case I40E_PHY_TYPE_10GBASE_CR1_CU:
458 case I40E_PHY_TYPE_10GBASE_CR1:
459 ecmd->supported = SUPPORTED_Autoneg |
460 SUPPORTED_10000baseT_Full;
461 ecmd->advertising = ADVERTISED_Autoneg |
462 ADVERTISED_10000baseT_Full;
463 break;
464 case I40E_PHY_TYPE_XAUI:
465 case I40E_PHY_TYPE_XFI:
466 case I40E_PHY_TYPE_SFI:
467 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
468 case I40E_PHY_TYPE_10GBASE_AOC:
469 ecmd->supported = SUPPORTED_10000baseT_Full;
470 ecmd->advertising = SUPPORTED_10000baseT_Full;
471 break;
472 case I40E_PHY_TYPE_SGMII:
473 ecmd->supported = SUPPORTED_Autoneg |
474 SUPPORTED_1000baseT_Full;
475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
476 ecmd->advertising |= ADVERTISED_1000baseT_Full;
477 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
478 ecmd->supported |= SUPPORTED_100baseT_Full;
479 if (hw_link_info->requested_speeds &
480 I40E_LINK_SPEED_100MB)
481 ecmd->advertising |= ADVERTISED_100baseT_Full;
482 }
483 break;
484 case I40E_PHY_TYPE_40GBASE_KR4:
485 case I40E_PHY_TYPE_20GBASE_KR2:
486 case I40E_PHY_TYPE_10GBASE_KR:
487 case I40E_PHY_TYPE_10GBASE_KX4:
488 case I40E_PHY_TYPE_1000BASE_KX:
489 ecmd->supported |= SUPPORTED_40000baseKR4_Full |
490 SUPPORTED_20000baseKR2_Full |
491 SUPPORTED_10000baseKR_Full |
492 SUPPORTED_10000baseKX4_Full |
493 SUPPORTED_1000baseKX_Full |
494 SUPPORTED_Autoneg;
495 ecmd->advertising |= ADVERTISED_40000baseKR4_Full |
496 ADVERTISED_20000baseKR2_Full |
497 ADVERTISED_10000baseKR_Full |
498 ADVERTISED_10000baseKX4_Full |
499 ADVERTISED_1000baseKX_Full |
500 ADVERTISED_Autoneg;
501 break;
502 case I40E_PHY_TYPE_25GBASE_KR:
503 case I40E_PHY_TYPE_25GBASE_CR:
504 case I40E_PHY_TYPE_25GBASE_SR:
505 case I40E_PHY_TYPE_25GBASE_LR:
506 ecmd->supported = SUPPORTED_Autoneg;
507 ecmd->advertising = ADVERTISED_Autoneg;
508
509 break;
510 default:
511
512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
513 hw_link_info->phy_type);
514 }
515
516
517
518
519
520 i40e_phy_type_to_ethtool(pf, &e_supported,
521 &e_advertising);
522
523 ecmd->supported = ecmd->supported & e_supported;
524 ecmd->advertising = ecmd->advertising & e_advertising;
525
526
527 switch (link_speed) {
528 case I40E_LINK_SPEED_40GB:
529 ethtool_cmd_speed_set(ecmd, SPEED_40000);
530 break;
531 case I40E_LINK_SPEED_25GB:
532#ifdef SPEED_25000
533 ethtool_cmd_speed_set(ecmd, SPEED_25000);
534#else
535 netdev_info(netdev,
536 "Speed is 25G, display not supported by this version of ethtool.\n");
537#endif
538 break;
539 case I40E_LINK_SPEED_20GB:
540 ethtool_cmd_speed_set(ecmd, SPEED_20000);
541 break;
542 case I40E_LINK_SPEED_10GB:
543 ethtool_cmd_speed_set(ecmd, SPEED_10000);
544 break;
545 case I40E_LINK_SPEED_1GB:
546 ethtool_cmd_speed_set(ecmd, SPEED_1000);
547 break;
548 case I40E_LINK_SPEED_100MB:
549 ethtool_cmd_speed_set(ecmd, SPEED_100);
550 break;
551 default:
552 break;
553 }
554 ecmd->duplex = DUPLEX_FULL;
555}
556
557
558
559
560
561
562
563
564static void i40e_get_settings_link_down(struct i40e_hw *hw,
565 struct ethtool_cmd *ecmd,
566 struct i40e_pf *pf)
567{
568
569
570
571 i40e_phy_type_to_ethtool(pf, &ecmd->supported,
572 &ecmd->advertising);
573
574
575 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
576 ecmd->duplex = DUPLEX_UNKNOWN;
577}
578
579
580
581
582
583
584
585
586static int i40e_get_settings(struct net_device *netdev,
587 struct ethtool_cmd *ecmd)
588{
589 struct i40e_netdev_priv *np = netdev_priv(netdev);
590 struct i40e_pf *pf = np->vsi->back;
591 struct i40e_hw *hw = &pf->hw;
592 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
593 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
594
595 if (link_up)
596 i40e_get_settings_link_up(hw, ecmd, netdev, pf);
597 else
598 i40e_get_settings_link_down(hw, ecmd, pf);
599
600
601
602 ecmd->autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
603 AUTONEG_ENABLE : AUTONEG_DISABLE);
604
605 switch (hw->phy.media_type) {
606 case I40E_MEDIA_TYPE_BACKPLANE:
607 ecmd->supported |= SUPPORTED_Autoneg |
608 SUPPORTED_Backplane;
609 ecmd->advertising |= ADVERTISED_Autoneg |
610 ADVERTISED_Backplane;
611 ecmd->port = PORT_NONE;
612 break;
613 case I40E_MEDIA_TYPE_BASET:
614 ecmd->supported |= SUPPORTED_TP;
615 ecmd->advertising |= ADVERTISED_TP;
616 ecmd->port = PORT_TP;
617 break;
618 case I40E_MEDIA_TYPE_DA:
619 case I40E_MEDIA_TYPE_CX4:
620 ecmd->supported |= SUPPORTED_FIBRE;
621 ecmd->advertising |= ADVERTISED_FIBRE;
622 ecmd->port = PORT_DA;
623 break;
624 case I40E_MEDIA_TYPE_FIBER:
625 ecmd->supported |= SUPPORTED_FIBRE;
626 ecmd->port = PORT_FIBRE;
627 break;
628 case I40E_MEDIA_TYPE_UNKNOWN:
629 default:
630 ecmd->port = PORT_OTHER;
631 break;
632 }
633
634
635 ecmd->transceiver = XCVR_EXTERNAL;
636
637
638 ecmd->supported |= SUPPORTED_Pause;
639
640 switch (hw->fc.requested_mode) {
641 case I40E_FC_FULL:
642 ecmd->advertising |= ADVERTISED_Pause;
643 break;
644 case I40E_FC_TX_PAUSE:
645 ecmd->advertising |= ADVERTISED_Asym_Pause;
646 break;
647 case I40E_FC_RX_PAUSE:
648 ecmd->advertising |= (ADVERTISED_Pause |
649 ADVERTISED_Asym_Pause);
650 break;
651 default:
652 ecmd->advertising &= ~(ADVERTISED_Pause |
653 ADVERTISED_Asym_Pause);
654 break;
655 }
656
657 return 0;
658}
659
660
661
662
663
664
665
666
667static int i40e_set_settings(struct net_device *netdev,
668 struct ethtool_cmd *ecmd)
669{
670 struct i40e_netdev_priv *np = netdev_priv(netdev);
671 struct i40e_aq_get_phy_abilities_resp abilities;
672 struct i40e_aq_set_phy_config config;
673 struct i40e_pf *pf = np->vsi->back;
674 struct i40e_vsi *vsi = np->vsi;
675 struct i40e_hw *hw = &pf->hw;
676 struct ethtool_cmd safe_ecmd;
677 i40e_status status = 0;
678 bool change = false;
679 int err = 0;
680 u8 autoneg;
681 u32 advertise;
682
683
684
685
686 if (hw->partition_id != 1) {
687 i40e_partition_setting_complaint(pf);
688 return -EOPNOTSUPP;
689 }
690
691 if (vsi != pf->vsi[pf->lan_vsi])
692 return -EOPNOTSUPP;
693
694 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
695 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
696 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
697 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
698 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
699 return -EOPNOTSUPP;
700
701 if (hw->device_id == I40E_DEV_ID_KX_B ||
702 hw->device_id == I40E_DEV_ID_KX_C ||
703 hw->device_id == I40E_DEV_ID_20G_KR2 ||
704 hw->device_id == I40E_DEV_ID_20G_KR2_A) {
705 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
706 return -EOPNOTSUPP;
707 }
708
709
710 memset(&safe_ecmd, 0, sizeof(struct ethtool_cmd));
711 i40e_get_settings(netdev, &safe_ecmd);
712
713
714 autoneg = ecmd->autoneg;
715 advertise = ecmd->advertising;
716
717
718 ecmd->autoneg = safe_ecmd.autoneg;
719 ecmd->advertising = safe_ecmd.advertising;
720
721 ecmd->cmd = safe_ecmd.cmd;
722
723
724
725 if (memcmp(ecmd, &safe_ecmd, sizeof(struct ethtool_cmd)))
726 return -EOPNOTSUPP;
727
728 while (test_bit(__I40E_CONFIG_BUSY, &vsi->state))
729 usleep_range(1000, 2000);
730
731
732 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
733 NULL);
734 if (status)
735 return -EAGAIN;
736
737
738
739
740 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
741 config.abilities = abilities.abilities;
742
743
744 if (autoneg == AUTONEG_ENABLE) {
745
746 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
747
748 if (!(safe_ecmd.supported & SUPPORTED_Autoneg)) {
749 netdev_info(netdev, "Autoneg not supported on this phy\n");
750 return -EINVAL;
751 }
752
753 config.abilities = abilities.abilities |
754 I40E_AQ_PHY_ENABLE_AN;
755 change = true;
756 }
757 } else {
758
759 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
760
761
762
763 if (safe_ecmd.supported & SUPPORTED_Autoneg &&
764 hw->phy.link_info.phy_type !=
765 I40E_PHY_TYPE_10GBASE_T) {
766 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
767 return -EINVAL;
768 }
769
770 config.abilities = abilities.abilities &
771 ~I40E_AQ_PHY_ENABLE_AN;
772 change = true;
773 }
774 }
775
776 if (advertise & ~safe_ecmd.supported)
777 return -EINVAL;
778
779 if (advertise & ADVERTISED_100baseT_Full)
780 config.link_speed |= I40E_LINK_SPEED_100MB;
781 if (advertise & ADVERTISED_1000baseT_Full ||
782 advertise & ADVERTISED_1000baseKX_Full)
783 config.link_speed |= I40E_LINK_SPEED_1GB;
784 if (advertise & ADVERTISED_10000baseT_Full ||
785 advertise & ADVERTISED_10000baseKX4_Full ||
786 advertise & ADVERTISED_10000baseKR_Full)
787 config.link_speed |= I40E_LINK_SPEED_10GB;
788 if (advertise & ADVERTISED_20000baseKR2_Full)
789 config.link_speed |= I40E_LINK_SPEED_20GB;
790 if (advertise & ADVERTISED_40000baseKR4_Full ||
791 advertise & ADVERTISED_40000baseCR4_Full ||
792 advertise & ADVERTISED_40000baseSR4_Full ||
793 advertise & ADVERTISED_40000baseLR4_Full)
794 config.link_speed |= I40E_LINK_SPEED_40GB;
795
796
797
798
799
800 if (!config.link_speed)
801 config.link_speed = abilities.link_speed;
802
803 if (change || (abilities.link_speed != config.link_speed)) {
804
805 config.phy_type = abilities.phy_type;
806 config.eee_capability = abilities.eee_capability;
807 config.eeer = abilities.eeer_val;
808 config.low_power_ctrl = abilities.d3_lpan;
809
810
811 hw->phy.link_info.requested_speeds = config.link_speed;
812
813 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
814
815 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
816
817
818
819 i40e_print_link_message(vsi, false);
820 netif_carrier_off(netdev);
821 netif_tx_stop_all_queues(netdev);
822 }
823
824
825 status = i40e_aq_set_phy_config(hw, &config, NULL);
826 if (status) {
827 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n",
828 i40e_stat_str(hw, status),
829 i40e_aq_str(hw, hw->aq.asq_last_status));
830 return -EAGAIN;
831 }
832
833 status = i40e_update_link_info(hw);
834 if (status)
835 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n",
836 i40e_stat_str(hw, status),
837 i40e_aq_str(hw, hw->aq.asq_last_status));
838
839 } else {
840 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
841 }
842
843 return err;
844}
845
846static int i40e_nway_reset(struct net_device *netdev)
847{
848
849 struct i40e_netdev_priv *np = netdev_priv(netdev);
850 struct i40e_pf *pf = np->vsi->back;
851 struct i40e_hw *hw = &pf->hw;
852 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
853 i40e_status ret = 0;
854
855 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
856 if (ret) {
857 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
858 i40e_stat_str(hw, ret),
859 i40e_aq_str(hw, hw->aq.asq_last_status));
860 return -EIO;
861 }
862
863 return 0;
864}
865
866
867
868
869
870static void i40e_get_pauseparam(struct net_device *netdev,
871 struct ethtool_pauseparam *pause)
872{
873 struct i40e_netdev_priv *np = netdev_priv(netdev);
874 struct i40e_pf *pf = np->vsi->back;
875 struct i40e_hw *hw = &pf->hw;
876 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
877 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
878
879 pause->autoneg =
880 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
881 AUTONEG_ENABLE : AUTONEG_DISABLE);
882
883
884 if (dcbx_cfg->pfc.pfcenable) {
885 pause->rx_pause = 0;
886 pause->tx_pause = 0;
887 return;
888 }
889
890 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
891 pause->rx_pause = 1;
892 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
893 pause->tx_pause = 1;
894 } else if (hw->fc.current_mode == I40E_FC_FULL) {
895 pause->rx_pause = 1;
896 pause->tx_pause = 1;
897 }
898}
899
900
901
902
903
904
905static int i40e_set_pauseparam(struct net_device *netdev,
906 struct ethtool_pauseparam *pause)
907{
908 struct i40e_netdev_priv *np = netdev_priv(netdev);
909 struct i40e_pf *pf = np->vsi->back;
910 struct i40e_vsi *vsi = np->vsi;
911 struct i40e_hw *hw = &pf->hw;
912 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
913 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
914 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
915 i40e_status status;
916 u8 aq_failures;
917 int err = 0;
918
919
920
921
922 if (hw->partition_id != 1) {
923 i40e_partition_setting_complaint(pf);
924 return -EOPNOTSUPP;
925 }
926
927 if (vsi != pf->vsi[pf->lan_vsi])
928 return -EOPNOTSUPP;
929
930 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
931 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
932 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
933 return -EOPNOTSUPP;
934 }
935
936
937 if (!test_bit(__I40E_DOWN, &pf->state) &&
938 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
939
940 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
941 }
942
943 if (dcbx_cfg->pfc.pfcenable) {
944 netdev_info(netdev,
945 "Priority flow control enabled. Cannot set link flow control.\n");
946 return -EOPNOTSUPP;
947 }
948
949 if (pause->rx_pause && pause->tx_pause)
950 hw->fc.requested_mode = I40E_FC_FULL;
951 else if (pause->rx_pause && !pause->tx_pause)
952 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
953 else if (!pause->rx_pause && pause->tx_pause)
954 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
955 else if (!pause->rx_pause && !pause->tx_pause)
956 hw->fc.requested_mode = I40E_FC_NONE;
957 else
958 return -EINVAL;
959
960
961
962
963 i40e_print_link_message(vsi, false);
964 netif_carrier_off(netdev);
965 netif_tx_stop_all_queues(netdev);
966
967
968 status = i40e_set_fc(hw, &aq_failures, link_up);
969
970 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
971 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
972 i40e_stat_str(hw, status),
973 i40e_aq_str(hw, hw->aq.asq_last_status));
974 err = -EAGAIN;
975 }
976 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
977 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
978 i40e_stat_str(hw, status),
979 i40e_aq_str(hw, hw->aq.asq_last_status));
980 err = -EAGAIN;
981 }
982 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
983 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
984 i40e_stat_str(hw, status),
985 i40e_aq_str(hw, hw->aq.asq_last_status));
986 err = -EAGAIN;
987 }
988
989 if (!test_bit(__I40E_DOWN, &pf->state)) {
990
991 msleep(75);
992 if (!test_bit(__I40E_DOWN, &pf->state))
993 return i40e_nway_reset(netdev);
994 }
995
996 return err;
997}
998
999static u32 i40e_get_msglevel(struct net_device *netdev)
1000{
1001 struct i40e_netdev_priv *np = netdev_priv(netdev);
1002 struct i40e_pf *pf = np->vsi->back;
1003 u32 debug_mask = pf->hw.debug_mask;
1004
1005 if (debug_mask)
1006 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1007
1008 return pf->msg_enable;
1009}
1010
1011static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1012{
1013 struct i40e_netdev_priv *np = netdev_priv(netdev);
1014 struct i40e_pf *pf = np->vsi->back;
1015
1016 if (I40E_DEBUG_USER & data)
1017 pf->hw.debug_mask = data;
1018 else
1019 pf->msg_enable = data;
1020}
1021
1022static int i40e_get_regs_len(struct net_device *netdev)
1023{
1024 int reg_count = 0;
1025 int i;
1026
1027 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1028 reg_count += i40e_reg_list[i].elements;
1029
1030 return reg_count * sizeof(u32);
1031}
1032
1033static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1034 void *p)
1035{
1036 struct i40e_netdev_priv *np = netdev_priv(netdev);
1037 struct i40e_pf *pf = np->vsi->back;
1038 struct i40e_hw *hw = &pf->hw;
1039 u32 *reg_buf = p;
1040 int i, j, ri;
1041 u32 reg;
1042
1043
1044
1045
1046
1047
1048
1049
1050 regs->version = 1;
1051
1052
1053 ri = 0;
1054 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1055 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1056 reg = i40e_reg_list[i].offset
1057 + (j * i40e_reg_list[i].stride);
1058 reg_buf[ri++] = rd32(hw, reg);
1059 }
1060 }
1061
1062}
1063
1064static int i40e_get_eeprom(struct net_device *netdev,
1065 struct ethtool_eeprom *eeprom, u8 *bytes)
1066{
1067 struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 struct i40e_hw *hw = &np->vsi->back->hw;
1069 struct i40e_pf *pf = np->vsi->back;
1070 int ret_val = 0, len, offset;
1071 u8 *eeprom_buff;
1072 u16 i, sectors;
1073 bool last;
1074 u32 magic;
1075
1076#define I40E_NVM_SECTOR_SIZE 4096
1077 if (eeprom->len == 0)
1078 return -EINVAL;
1079
1080
1081 magic = hw->vendor_id | (hw->device_id << 16);
1082 if (eeprom->magic && eeprom->magic != magic) {
1083 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1084 int errno = 0;
1085
1086
1087 if ((eeprom->magic >> 16) != hw->device_id)
1088 errno = -EINVAL;
1089 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
1090 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
1091 errno = -EBUSY;
1092 else
1093 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1094
1095 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1096 dev_info(&pf->pdev->dev,
1097 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1098 ret_val, hw->aq.asq_last_status, errno,
1099 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1100 cmd->offset, cmd->data_size);
1101
1102 return errno;
1103 }
1104
1105
1106 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1107
1108 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1109 if (!eeprom_buff)
1110 return -ENOMEM;
1111
1112 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1113 if (ret_val) {
1114 dev_info(&pf->pdev->dev,
1115 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1116 ret_val, hw->aq.asq_last_status);
1117 goto free_buff;
1118 }
1119
1120 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1121 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1122 len = I40E_NVM_SECTOR_SIZE;
1123 last = false;
1124 for (i = 0; i < sectors; i++) {
1125 if (i == (sectors - 1)) {
1126 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1127 last = true;
1128 }
1129 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1130 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1131 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1132 last, NULL);
1133 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1134 dev_info(&pf->pdev->dev,
1135 "read NVM failed, invalid offset 0x%x\n",
1136 offset);
1137 break;
1138 } else if (ret_val &&
1139 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1140 dev_info(&pf->pdev->dev,
1141 "read NVM failed, access, offset 0x%x\n",
1142 offset);
1143 break;
1144 } else if (ret_val) {
1145 dev_info(&pf->pdev->dev,
1146 "read NVM failed offset %d err=%d status=0x%x\n",
1147 offset, ret_val, hw->aq.asq_last_status);
1148 break;
1149 }
1150 }
1151
1152 i40e_release_nvm(hw);
1153 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1154free_buff:
1155 kfree(eeprom_buff);
1156 return ret_val;
1157}
1158
1159static int i40e_get_eeprom_len(struct net_device *netdev)
1160{
1161 struct i40e_netdev_priv *np = netdev_priv(netdev);
1162 struct i40e_hw *hw = &np->vsi->back->hw;
1163 u32 val;
1164
1165 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1166 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1167 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1168
1169 val = (64 * 1024) * BIT(val);
1170 return val;
1171}
1172
1173static int i40e_set_eeprom(struct net_device *netdev,
1174 struct ethtool_eeprom *eeprom, u8 *bytes)
1175{
1176 struct i40e_netdev_priv *np = netdev_priv(netdev);
1177 struct i40e_hw *hw = &np->vsi->back->hw;
1178 struct i40e_pf *pf = np->vsi->back;
1179 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1180 int ret_val = 0;
1181 int errno = 0;
1182 u32 magic;
1183
1184
1185 magic = hw->vendor_id | (hw->device_id << 16);
1186 if (eeprom->magic == magic)
1187 errno = -EOPNOTSUPP;
1188
1189 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1190 errno = -EINVAL;
1191 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
1192 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
1193 errno = -EBUSY;
1194 else
1195 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1196
1197 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1198 dev_info(&pf->pdev->dev,
1199 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1200 ret_val, hw->aq.asq_last_status, errno,
1201 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1202 cmd->offset, cmd->data_size);
1203
1204 return errno;
1205}
1206
1207static void i40e_get_drvinfo(struct net_device *netdev,
1208 struct ethtool_drvinfo *drvinfo)
1209{
1210 struct i40e_netdev_priv *np = netdev_priv(netdev);
1211 struct i40e_vsi *vsi = np->vsi;
1212 struct i40e_pf *pf = vsi->back;
1213
1214 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1215 strlcpy(drvinfo->version, i40e_driver_version_str,
1216 sizeof(drvinfo->version));
1217 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1218 sizeof(drvinfo->fw_version));
1219 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1220 sizeof(drvinfo->bus_info));
1221 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1222 if (pf->hw.pf_id == 0)
1223 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1224}
1225
1226static void i40e_get_ringparam(struct net_device *netdev,
1227 struct ethtool_ringparam *ring)
1228{
1229 struct i40e_netdev_priv *np = netdev_priv(netdev);
1230 struct i40e_pf *pf = np->vsi->back;
1231 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1232
1233 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1234 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1235 ring->rx_mini_max_pending = 0;
1236 ring->rx_jumbo_max_pending = 0;
1237 ring->rx_pending = vsi->rx_rings[0]->count;
1238 ring->tx_pending = vsi->tx_rings[0]->count;
1239 ring->rx_mini_pending = 0;
1240 ring->rx_jumbo_pending = 0;
1241}
1242
1243static int i40e_set_ringparam(struct net_device *netdev,
1244 struct ethtool_ringparam *ring)
1245{
1246 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1247 struct i40e_netdev_priv *np = netdev_priv(netdev);
1248 struct i40e_hw *hw = &np->vsi->back->hw;
1249 struct i40e_vsi *vsi = np->vsi;
1250 struct i40e_pf *pf = vsi->back;
1251 u32 new_rx_count, new_tx_count;
1252 int i, err = 0;
1253
1254 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1255 return -EINVAL;
1256
1257 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1258 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1259 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1260 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1261 netdev_info(netdev,
1262 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1263 ring->tx_pending, ring->rx_pending,
1264 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1265 return -EINVAL;
1266 }
1267
1268 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1269 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1270
1271
1272 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1273 (new_rx_count == vsi->rx_rings[0]->count))
1274 return 0;
1275
1276 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
1277 usleep_range(1000, 2000);
1278
1279 if (!netif_running(vsi->netdev)) {
1280
1281 for (i = 0; i < vsi->num_queue_pairs; i++) {
1282 vsi->tx_rings[i]->count = new_tx_count;
1283 vsi->rx_rings[i]->count = new_rx_count;
1284 }
1285 goto done;
1286 }
1287
1288
1289
1290
1291
1292
1293
1294 if (new_tx_count != vsi->tx_rings[0]->count) {
1295 netdev_info(netdev,
1296 "Changing Tx descriptor count from %d to %d.\n",
1297 vsi->tx_rings[0]->count, new_tx_count);
1298 tx_rings = kcalloc(vsi->alloc_queue_pairs,
1299 sizeof(struct i40e_ring), GFP_KERNEL);
1300 if (!tx_rings) {
1301 err = -ENOMEM;
1302 goto done;
1303 }
1304
1305 for (i = 0; i < vsi->num_queue_pairs; i++) {
1306
1307 tx_rings[i] = *vsi->tx_rings[i];
1308 tx_rings[i].count = new_tx_count;
1309
1310
1311
1312 tx_rings[i].desc = NULL;
1313 tx_rings[i].rx_bi = NULL;
1314 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1315 if (err) {
1316 while (i) {
1317 i--;
1318 i40e_free_tx_resources(&tx_rings[i]);
1319 }
1320 kfree(tx_rings);
1321 tx_rings = NULL;
1322
1323 goto done;
1324 }
1325 }
1326 }
1327
1328
1329 if (new_rx_count != vsi->rx_rings[0]->count) {
1330 netdev_info(netdev,
1331 "Changing Rx descriptor count from %d to %d\n",
1332 vsi->rx_rings[0]->count, new_rx_count);
1333 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1334 sizeof(struct i40e_ring), GFP_KERNEL);
1335 if (!rx_rings) {
1336 err = -ENOMEM;
1337 goto free_tx;
1338 }
1339
1340 for (i = 0; i < vsi->num_queue_pairs; i++) {
1341 struct i40e_ring *ring;
1342 u16 unused;
1343
1344
1345 rx_rings[i] = *vsi->rx_rings[i];
1346 rx_rings[i].count = new_rx_count;
1347
1348
1349
1350 rx_rings[i].desc = NULL;
1351 rx_rings[i].rx_bi = NULL;
1352
1353
1354
1355 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
1356 err = i40e_setup_rx_descriptors(&rx_rings[i]);
1357 if (err)
1358 goto rx_unwind;
1359
1360
1361
1362
1363 ring = &rx_rings[i];
1364 unused = I40E_DESC_UNUSED(ring);
1365 err = i40e_alloc_rx_buffers(ring, unused);
1366rx_unwind:
1367 if (err) {
1368 do {
1369 i40e_free_rx_resources(&rx_rings[i]);
1370 } while (i--);
1371 kfree(rx_rings);
1372 rx_rings = NULL;
1373
1374 goto free_tx;
1375 }
1376 }
1377 }
1378
1379
1380
1381
1382 i40e_down(vsi);
1383
1384 if (tx_rings) {
1385 for (i = 0; i < vsi->num_queue_pairs; i++) {
1386 i40e_free_tx_resources(vsi->tx_rings[i]);
1387 *vsi->tx_rings[i] = tx_rings[i];
1388 }
1389 kfree(tx_rings);
1390 tx_rings = NULL;
1391 }
1392
1393 if (rx_rings) {
1394 for (i = 0; i < vsi->num_queue_pairs; i++) {
1395 i40e_free_rx_resources(vsi->rx_rings[i]);
1396
1397 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1398
1399
1400
1401
1402
1403 rx_rings[i].next_to_use = 0;
1404 rx_rings[i].next_to_clean = 0;
1405 rx_rings[i].next_to_alloc = 0;
1406
1407 *vsi->rx_rings[i] = rx_rings[i];
1408 }
1409 kfree(rx_rings);
1410 rx_rings = NULL;
1411 }
1412
1413 i40e_up(vsi);
1414
1415free_tx:
1416
1417 if (tx_rings) {
1418 for (i = 0; i < vsi->num_queue_pairs; i++)
1419 i40e_free_tx_resources(&tx_rings[i]);
1420 kfree(tx_rings);
1421 tx_rings = NULL;
1422 }
1423
1424done:
1425 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
1426
1427 return err;
1428}
1429
1430static int i40e_get_sset_count(struct net_device *netdev, int sset)
1431{
1432 struct i40e_netdev_priv *np = netdev_priv(netdev);
1433 struct i40e_vsi *vsi = np->vsi;
1434 struct i40e_pf *pf = vsi->back;
1435
1436 switch (sset) {
1437 case ETH_SS_TEST:
1438 return I40E_TEST_LEN;
1439 case ETH_SS_STATS:
1440 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
1441 int len = I40E_PF_STATS_LEN(netdev);
1442
1443 if ((pf->lan_veb != I40E_NO_VEB) &&
1444 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
1445 len += I40E_VEB_STATS_TOTAL;
1446 return len;
1447 } else {
1448 return I40E_VSI_STATS_LEN(netdev);
1449 }
1450 case ETH_SS_PRIV_FLAGS:
1451 return I40E_PRIV_FLAGS_STR_LEN +
1452 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
1453 default:
1454 return -EOPNOTSUPP;
1455 }
1456}
1457
1458static void i40e_get_ethtool_stats(struct net_device *netdev,
1459 struct ethtool_stats *stats, u64 *data)
1460{
1461 struct i40e_netdev_priv *np = netdev_priv(netdev);
1462 struct i40e_ring *tx_ring, *rx_ring;
1463 struct i40e_vsi *vsi = np->vsi;
1464 struct i40e_pf *pf = vsi->back;
1465 int i = 0;
1466 char *p;
1467 int j;
1468 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
1469 unsigned int start;
1470
1471 i40e_update_stats(vsi);
1472
1473 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1474 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1475 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1476 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1477 }
1478 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1479 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1480 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1481 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1482 }
1483#ifdef I40E_FCOE
1484 for (j = 0; j < I40E_FCOE_STATS_LEN; j++) {
1485 p = (char *)vsi + i40e_gstrings_fcoe_stats[j].stat_offset;
1486 data[i++] = (i40e_gstrings_fcoe_stats[j].sizeof_stat ==
1487 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1488 }
1489#endif
1490 rcu_read_lock();
1491 for (j = 0; j < vsi->num_queue_pairs; j++) {
1492 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]);
1493
1494 if (!tx_ring)
1495 continue;
1496
1497
1498 do {
1499 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
1500 data[i] = tx_ring->stats.packets;
1501 data[i + 1] = tx_ring->stats.bytes;
1502 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1503 i += 2;
1504
1505
1506 rx_ring = &tx_ring[1];
1507 do {
1508 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
1509 data[i] = rx_ring->stats.packets;
1510 data[i + 1] = rx_ring->stats.bytes;
1511 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
1512 i += 2;
1513 }
1514 rcu_read_unlock();
1515 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1516 return;
1517
1518 if ((pf->lan_veb != I40E_NO_VEB) &&
1519 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1520 struct i40e_veb *veb = pf->veb[pf->lan_veb];
1521
1522 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1523 p = (char *)veb;
1524 p += i40e_gstrings_veb_stats[j].stat_offset;
1525 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1526 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1527 }
1528 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1529 data[i++] = veb->tc_stats.tc_tx_packets[j];
1530 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1531 data[i++] = veb->tc_stats.tc_rx_packets[j];
1532 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1533 }
1534 }
1535 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1536 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1537 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1538 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1539 }
1540 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1541 data[i++] = pf->stats.priority_xon_tx[j];
1542 data[i++] = pf->stats.priority_xoff_tx[j];
1543 }
1544 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1545 data[i++] = pf->stats.priority_xon_rx[j];
1546 data[i++] = pf->stats.priority_xoff_rx[j];
1547 }
1548 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1549 data[i++] = pf->stats.priority_xon_2_xoff[j];
1550}
1551
1552static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1553 u8 *data)
1554{
1555 struct i40e_netdev_priv *np = netdev_priv(netdev);
1556 struct i40e_vsi *vsi = np->vsi;
1557 struct i40e_pf *pf = vsi->back;
1558 char *p = (char *)data;
1559 int i;
1560
1561 switch (stringset) {
1562 case ETH_SS_TEST:
1563 memcpy(data, i40e_gstrings_test,
1564 I40E_TEST_LEN * ETH_GSTRING_LEN);
1565 break;
1566 case ETH_SS_STATS:
1567 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1568 snprintf(p, ETH_GSTRING_LEN, "%s",
1569 i40e_gstrings_net_stats[i].stat_string);
1570 p += ETH_GSTRING_LEN;
1571 }
1572 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1573 snprintf(p, ETH_GSTRING_LEN, "%s",
1574 i40e_gstrings_misc_stats[i].stat_string);
1575 p += ETH_GSTRING_LEN;
1576 }
1577#ifdef I40E_FCOE
1578 for (i = 0; i < I40E_FCOE_STATS_LEN; i++) {
1579 snprintf(p, ETH_GSTRING_LEN, "%s",
1580 i40e_gstrings_fcoe_stats[i].stat_string);
1581 p += ETH_GSTRING_LEN;
1582 }
1583#endif
1584 for (i = 0; i < vsi->num_queue_pairs; i++) {
1585 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
1586 p += ETH_GSTRING_LEN;
1587 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
1588 p += ETH_GSTRING_LEN;
1589 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
1590 p += ETH_GSTRING_LEN;
1591 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
1592 p += ETH_GSTRING_LEN;
1593 }
1594 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1595 return;
1596
1597 if ((pf->lan_veb != I40E_NO_VEB) &&
1598 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1599 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1600 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1601 i40e_gstrings_veb_stats[i].stat_string);
1602 p += ETH_GSTRING_LEN;
1603 }
1604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1605 snprintf(p, ETH_GSTRING_LEN,
1606 "veb.tc_%d_tx_packets", i);
1607 p += ETH_GSTRING_LEN;
1608 snprintf(p, ETH_GSTRING_LEN,
1609 "veb.tc_%d_tx_bytes", i);
1610 p += ETH_GSTRING_LEN;
1611 snprintf(p, ETH_GSTRING_LEN,
1612 "veb.tc_%d_rx_packets", i);
1613 p += ETH_GSTRING_LEN;
1614 snprintf(p, ETH_GSTRING_LEN,
1615 "veb.tc_%d_rx_bytes", i);
1616 p += ETH_GSTRING_LEN;
1617 }
1618 }
1619 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1620 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1621 i40e_gstrings_stats[i].stat_string);
1622 p += ETH_GSTRING_LEN;
1623 }
1624 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1625 snprintf(p, ETH_GSTRING_LEN,
1626 "port.tx_priority_%d_xon", i);
1627 p += ETH_GSTRING_LEN;
1628 snprintf(p, ETH_GSTRING_LEN,
1629 "port.tx_priority_%d_xoff", i);
1630 p += ETH_GSTRING_LEN;
1631 }
1632 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1633 snprintf(p, ETH_GSTRING_LEN,
1634 "port.rx_priority_%d_xon", i);
1635 p += ETH_GSTRING_LEN;
1636 snprintf(p, ETH_GSTRING_LEN,
1637 "port.rx_priority_%d_xoff", i);
1638 p += ETH_GSTRING_LEN;
1639 }
1640 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1641 snprintf(p, ETH_GSTRING_LEN,
1642 "port.rx_priority_%d_xon_2_xoff", i);
1643 p += ETH_GSTRING_LEN;
1644 }
1645
1646 break;
1647 case ETH_SS_PRIV_FLAGS:
1648 memcpy(data, i40e_priv_flags_strings,
1649 I40E_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1650 data += I40E_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN;
1651 if (pf->hw.pf_id == 0)
1652 memcpy(data, i40e_gl_priv_flags_strings,
1653 I40E_GL_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1654 break;
1655 default:
1656 break;
1657 }
1658}
1659
1660static int i40e_get_ts_info(struct net_device *dev,
1661 struct ethtool_ts_info *info)
1662{
1663 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1664
1665
1666 if (!(pf->flags & I40E_FLAG_PTP))
1667 return ethtool_op_get_ts_info(dev, info);
1668
1669 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1670 SOF_TIMESTAMPING_RX_SOFTWARE |
1671 SOF_TIMESTAMPING_SOFTWARE |
1672 SOF_TIMESTAMPING_TX_HARDWARE |
1673 SOF_TIMESTAMPING_RX_HARDWARE |
1674 SOF_TIMESTAMPING_RAW_HARDWARE;
1675
1676 if (pf->ptp_clock)
1677 info->phc_index = ptp_clock_index(pf->ptp_clock);
1678 else
1679 info->phc_index = -1;
1680
1681 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
1682
1683 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1684 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1685 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1686 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1687
1688 if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE)
1689 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1690 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1691 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1692 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1693 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1694 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1695 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1696 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1697
1698 return 0;
1699}
1700
1701static int i40e_link_test(struct net_device *netdev, u64 *data)
1702{
1703 struct i40e_netdev_priv *np = netdev_priv(netdev);
1704 struct i40e_pf *pf = np->vsi->back;
1705 i40e_status status;
1706 bool link_up = false;
1707
1708 netif_info(pf, hw, netdev, "link test\n");
1709 status = i40e_get_link_status(&pf->hw, &link_up);
1710 if (status) {
1711 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1712 *data = 1;
1713 return *data;
1714 }
1715
1716 if (link_up)
1717 *data = 0;
1718 else
1719 *data = 1;
1720
1721 return *data;
1722}
1723
1724static int i40e_reg_test(struct net_device *netdev, u64 *data)
1725{
1726 struct i40e_netdev_priv *np = netdev_priv(netdev);
1727 struct i40e_pf *pf = np->vsi->back;
1728
1729 netif_info(pf, hw, netdev, "register test\n");
1730 *data = i40e_diag_reg_test(&pf->hw);
1731
1732 return *data;
1733}
1734
1735static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
1736{
1737 struct i40e_netdev_priv *np = netdev_priv(netdev);
1738 struct i40e_pf *pf = np->vsi->back;
1739
1740 netif_info(pf, hw, netdev, "eeprom test\n");
1741 *data = i40e_diag_eeprom_test(&pf->hw);
1742
1743
1744 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1745
1746 return *data;
1747}
1748
1749static int i40e_intr_test(struct net_device *netdev, u64 *data)
1750{
1751 struct i40e_netdev_priv *np = netdev_priv(netdev);
1752 struct i40e_pf *pf = np->vsi->back;
1753 u16 swc_old = pf->sw_int_count;
1754
1755 netif_info(pf, hw, netdev, "interrupt test\n");
1756 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1757 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
1758 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
1759 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
1760 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
1761 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
1762 usleep_range(1000, 2000);
1763 *data = (swc_old == pf->sw_int_count);
1764
1765 return *data;
1766}
1767
1768static inline bool i40e_active_vfs(struct i40e_pf *pf)
1769{
1770 struct i40e_vf *vfs = pf->vf;
1771 int i;
1772
1773 for (i = 0; i < pf->num_alloc_vfs; i++)
1774 if (test_bit(I40E_VF_STAT_ACTIVE, &vfs[i].vf_states))
1775 return true;
1776 return false;
1777}
1778
1779static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
1780{
1781 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
1782}
1783
1784static void i40e_diag_test(struct net_device *netdev,
1785 struct ethtool_test *eth_test, u64 *data)
1786{
1787 struct i40e_netdev_priv *np = netdev_priv(netdev);
1788 bool if_running = netif_running(netdev);
1789 struct i40e_pf *pf = np->vsi->back;
1790
1791 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1792
1793 netif_info(pf, drv, netdev, "offline testing starting\n");
1794
1795 set_bit(__I40E_TESTING, &pf->state);
1796
1797 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
1798 dev_warn(&pf->pdev->dev,
1799 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
1800 data[I40E_ETH_TEST_REG] = 1;
1801 data[I40E_ETH_TEST_EEPROM] = 1;
1802 data[I40E_ETH_TEST_INTR] = 1;
1803 data[I40E_ETH_TEST_LINK] = 1;
1804 eth_test->flags |= ETH_TEST_FL_FAILED;
1805 clear_bit(__I40E_TESTING, &pf->state);
1806 goto skip_ol_tests;
1807 }
1808
1809
1810 if (if_running)
1811
1812 i40e_close(netdev);
1813 else
1814
1815
1816
1817
1818
1819 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
1820
1821 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1822 eth_test->flags |= ETH_TEST_FL_FAILED;
1823
1824 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
1825 eth_test->flags |= ETH_TEST_FL_FAILED;
1826
1827 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
1828 eth_test->flags |= ETH_TEST_FL_FAILED;
1829
1830
1831 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
1832 eth_test->flags |= ETH_TEST_FL_FAILED;
1833
1834 clear_bit(__I40E_TESTING, &pf->state);
1835 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
1836
1837 if (if_running)
1838 i40e_open(netdev);
1839 } else {
1840
1841 netif_info(pf, drv, netdev, "online testing starting\n");
1842
1843 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1844 eth_test->flags |= ETH_TEST_FL_FAILED;
1845
1846
1847 data[I40E_ETH_TEST_REG] = 0;
1848 data[I40E_ETH_TEST_EEPROM] = 0;
1849 data[I40E_ETH_TEST_INTR] = 0;
1850 }
1851
1852skip_ol_tests:
1853
1854 netif_info(pf, drv, netdev, "testing finished\n");
1855}
1856
1857static void i40e_get_wol(struct net_device *netdev,
1858 struct ethtool_wolinfo *wol)
1859{
1860 struct i40e_netdev_priv *np = netdev_priv(netdev);
1861 struct i40e_pf *pf = np->vsi->back;
1862 struct i40e_hw *hw = &pf->hw;
1863 u16 wol_nvm_bits;
1864
1865
1866 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1867 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
1868 wol->supported = 0;
1869 wol->wolopts = 0;
1870 } else {
1871 wol->supported = WAKE_MAGIC;
1872 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
1873 }
1874}
1875
1876
1877
1878
1879
1880
1881static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1882{
1883 struct i40e_netdev_priv *np = netdev_priv(netdev);
1884 struct i40e_pf *pf = np->vsi->back;
1885 struct i40e_vsi *vsi = np->vsi;
1886 struct i40e_hw *hw = &pf->hw;
1887 u16 wol_nvm_bits;
1888
1889
1890 if (hw->partition_id != 1) {
1891 i40e_partition_setting_complaint(pf);
1892 return -EOPNOTSUPP;
1893 }
1894
1895 if (vsi != pf->vsi[pf->lan_vsi])
1896 return -EOPNOTSUPP;
1897
1898
1899 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1900 if (BIT(hw->port) & wol_nvm_bits)
1901 return -EOPNOTSUPP;
1902
1903
1904 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
1905 return -EOPNOTSUPP;
1906
1907
1908 if (pf->wol_en != !!wol->wolopts) {
1909 pf->wol_en = !!wol->wolopts;
1910 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
1911 }
1912
1913 return 0;
1914}
1915
1916static int i40e_set_phys_id(struct net_device *netdev,
1917 enum ethtool_phys_id_state state)
1918{
1919 struct i40e_netdev_priv *np = netdev_priv(netdev);
1920 i40e_status ret = 0;
1921 struct i40e_pf *pf = np->vsi->back;
1922 struct i40e_hw *hw = &pf->hw;
1923 int blink_freq = 2;
1924 u16 temp_status;
1925
1926 switch (state) {
1927 case ETHTOOL_ID_ACTIVE:
1928 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {
1929 pf->led_status = i40e_led_get(hw);
1930 } else {
1931 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL);
1932 ret = i40e_led_get_phy(hw, &temp_status,
1933 &pf->phy_led_val);
1934 pf->led_status = temp_status;
1935 }
1936 return blink_freq;
1937 case ETHTOOL_ID_ON:
1938 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))
1939 i40e_led_set(hw, 0xf, false);
1940 else
1941 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
1942 break;
1943 case ETHTOOL_ID_OFF:
1944 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))
1945 i40e_led_set(hw, 0x0, false);
1946 else
1947 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
1948 break;
1949 case ETHTOOL_ID_INACTIVE:
1950 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {
1951 i40e_led_set(hw, pf->led_status, false);
1952 } else {
1953 ret = i40e_led_set_phy(hw, false, pf->led_status,
1954 (pf->phy_led_val |
1955 I40E_PHY_LED_MODE_ORIG));
1956 i40e_aq_set_phy_debug(hw, 0, NULL);
1957 }
1958 break;
1959 default:
1960 break;
1961 }
1962 if (ret)
1963 return -ENOENT;
1964 else
1965 return 0;
1966}
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983static int __i40e_get_coalesce(struct net_device *netdev,
1984 struct ethtool_coalesce *ec,
1985 int queue)
1986{
1987 struct i40e_netdev_priv *np = netdev_priv(netdev);
1988 struct i40e_ring *rx_ring, *tx_ring;
1989 struct i40e_vsi *vsi = np->vsi;
1990
1991 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
1992 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
1993
1994
1995
1996
1997 if (queue < 0) {
1998 queue = 0;
1999 } else if (queue >= vsi->num_queue_pairs) {
2000 return -EINVAL;
2001 }
2002
2003 rx_ring = vsi->rx_rings[queue];
2004 tx_ring = vsi->tx_rings[queue];
2005
2006 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting))
2007 ec->use_adaptive_rx_coalesce = 1;
2008
2009 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting))
2010 ec->use_adaptive_tx_coalesce = 1;
2011
2012 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC;
2013 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC;
2014
2015
2016
2017
2018
2019
2020
2021
2022 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2023 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2024
2025 return 0;
2026}
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037static int i40e_get_coalesce(struct net_device *netdev,
2038 struct ethtool_coalesce *ec)
2039{
2040 return __i40e_get_coalesce(netdev, ec, -1);
2041}
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2052 struct ethtool_coalesce *ec)
2053{
2054 return __i40e_get_coalesce(netdev, ec, queue);
2055}
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2067 struct ethtool_coalesce *ec,
2068 int queue)
2069{
2070 struct i40e_pf *pf = vsi->back;
2071 struct i40e_hw *hw = &pf->hw;
2072 struct i40e_q_vector *q_vector;
2073 u16 vector, intrl;
2074
2075 intrl = INTRL_USEC_TO_REG(vsi->int_rate_limit);
2076
2077 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs;
2078 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs;
2079
2080 if (ec->use_adaptive_rx_coalesce)
2081 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC;
2082 else
2083 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
2084
2085 if (ec->use_adaptive_tx_coalesce)
2086 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC;
2087 else
2088 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
2089
2090 q_vector = vsi->rx_rings[queue]->q_vector;
2091 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting);
2092 vector = vsi->base_vector + q_vector->v_idx;
2093 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);
2094
2095 q_vector = vsi->tx_rings[queue]->q_vector;
2096 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting);
2097 vector = vsi->base_vector + q_vector->v_idx;
2098 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);
2099
2100 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
2101 i40e_flush(hw);
2102}
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112static int __i40e_set_coalesce(struct net_device *netdev,
2113 struct ethtool_coalesce *ec,
2114 int queue)
2115{
2116 struct i40e_netdev_priv *np = netdev_priv(netdev);
2117 struct i40e_vsi *vsi = np->vsi;
2118 struct i40e_pf *pf = vsi->back;
2119 int i;
2120
2121 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2122 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2123
2124
2125 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2126 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2127 return -EINVAL;
2128 }
2129
2130 if (ec->rx_coalesce_usecs_high >= INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2131 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-235\n");
2132 return -EINVAL;
2133 }
2134
2135 if (ec->rx_coalesce_usecs == 0) {
2136 if (ec->use_adaptive_rx_coalesce)
2137 netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n");
2138 } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
2139 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
2140 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2141 return -EINVAL;
2142 }
2143
2144 vsi->int_rate_limit = ec->rx_coalesce_usecs_high;
2145
2146 if (ec->tx_coalesce_usecs == 0) {
2147 if (ec->use_adaptive_tx_coalesce)
2148 netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n");
2149 } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
2150 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
2151 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2152 return -EINVAL;
2153 }
2154
2155
2156
2157
2158 if (queue < 0) {
2159 for (i = 0; i < vsi->num_queue_pairs; i++)
2160 i40e_set_itr_per_queue(vsi, ec, i);
2161 } else if (queue < vsi->num_queue_pairs) {
2162 i40e_set_itr_per_queue(vsi, ec, queue);
2163 } else {
2164 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2165 vsi->num_queue_pairs - 1);
2166 return -EINVAL;
2167 }
2168
2169 return 0;
2170}
2171
2172
2173
2174
2175
2176
2177
2178
2179static int i40e_set_coalesce(struct net_device *netdev,
2180 struct ethtool_coalesce *ec)
2181{
2182 return __i40e_set_coalesce(netdev, ec, -1);
2183}
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2194 struct ethtool_coalesce *ec)
2195{
2196 return __i40e_set_coalesce(netdev, ec, queue);
2197}
2198
2199
2200
2201
2202
2203
2204
2205
2206static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2207{
2208 struct i40e_hw *hw = &pf->hw;
2209 u8 flow_pctype = 0;
2210 u64 i_set = 0;
2211
2212 cmd->data = 0;
2213
2214 switch (cmd->flow_type) {
2215 case TCP_V4_FLOW:
2216 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2217 break;
2218 case UDP_V4_FLOW:
2219 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2220 break;
2221 case TCP_V6_FLOW:
2222 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2223 break;
2224 case UDP_V6_FLOW:
2225 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2226 break;
2227 case SCTP_V4_FLOW:
2228 case AH_ESP_V4_FLOW:
2229 case AH_V4_FLOW:
2230 case ESP_V4_FLOW:
2231 case IPV4_FLOW:
2232 case SCTP_V6_FLOW:
2233 case AH_ESP_V6_FLOW:
2234 case AH_V6_FLOW:
2235 case ESP_V6_FLOW:
2236 case IPV6_FLOW:
2237
2238 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2239 break;
2240 default:
2241 return -EINVAL;
2242 }
2243
2244
2245 if (flow_pctype) {
2246 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2247 flow_pctype)) |
2248 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2249 flow_pctype)) << 32);
2250 }
2251
2252
2253 if (i_set) {
2254 if (i_set & I40E_L4_SRC_MASK)
2255 cmd->data |= RXH_L4_B_0_1;
2256 if (i_set & I40E_L4_DST_MASK)
2257 cmd->data |= RXH_L4_B_2_3;
2258
2259 if (cmd->flow_type == TCP_V4_FLOW ||
2260 cmd->flow_type == UDP_V4_FLOW) {
2261 if (i_set & I40E_L3_SRC_MASK)
2262 cmd->data |= RXH_IP_SRC;
2263 if (i_set & I40E_L3_DST_MASK)
2264 cmd->data |= RXH_IP_DST;
2265 } else if (cmd->flow_type == TCP_V6_FLOW ||
2266 cmd->flow_type == UDP_V6_FLOW) {
2267 if (i_set & I40E_L3_V6_SRC_MASK)
2268 cmd->data |= RXH_IP_SRC;
2269 if (i_set & I40E_L3_V6_DST_MASK)
2270 cmd->data |= RXH_IP_DST;
2271 }
2272 }
2273
2274 return 0;
2275}
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2289 struct ethtool_rxnfc *cmd,
2290 u32 *rule_locs)
2291{
2292 struct i40e_fdir_filter *rule;
2293 struct hlist_node *node2;
2294 int cnt = 0;
2295
2296
2297 cmd->data = i40e_get_fd_cnt_all(pf);
2298
2299 hlist_for_each_entry_safe(rule, node2,
2300 &pf->fdir_filter_list, fdir_node) {
2301 if (cnt == cmd->rule_cnt)
2302 return -EMSGSIZE;
2303
2304 rule_locs[cnt] = rule->fd_id;
2305 cnt++;
2306 }
2307
2308 cmd->rule_cnt = cnt;
2309
2310 return 0;
2311}
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2324 struct ethtool_rxnfc *cmd)
2325{
2326 struct ethtool_rx_flow_spec *fsp =
2327 (struct ethtool_rx_flow_spec *)&cmd->fs;
2328 struct i40e_fdir_filter *rule = NULL;
2329 struct hlist_node *node2;
2330
2331 hlist_for_each_entry_safe(rule, node2,
2332 &pf->fdir_filter_list, fdir_node) {
2333 if (fsp->location <= rule->fd_id)
2334 break;
2335 }
2336
2337 if (!rule || fsp->location != rule->fd_id)
2338 return -EINVAL;
2339
2340 fsp->flow_type = rule->flow_type;
2341 if (fsp->flow_type == IP_USER_FLOW) {
2342 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2343 fsp->h_u.usr_ip4_spec.proto = 0;
2344 fsp->m_u.usr_ip4_spec.proto = 0;
2345 }
2346
2347
2348
2349
2350 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2351 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
2352 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip[0];
2353 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip[0];
2354
2355 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2356 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2357 else
2358 fsp->ring_cookie = rule->q_index;
2359
2360 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2361 struct i40e_vsi *vsi;
2362
2363 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2364 if (vsi && vsi->type == I40E_VSI_SRIOV) {
2365 fsp->h_ext.data[1] = htonl(vsi->vf_id);
2366 fsp->m_ext.data[1] = htonl(0x1);
2367 }
2368 }
2369
2370 return 0;
2371}
2372
2373
2374
2375
2376
2377
2378
2379
2380static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2381 u32 *rule_locs)
2382{
2383 struct i40e_netdev_priv *np = netdev_priv(netdev);
2384 struct i40e_vsi *vsi = np->vsi;
2385 struct i40e_pf *pf = vsi->back;
2386 int ret = -EOPNOTSUPP;
2387
2388 switch (cmd->cmd) {
2389 case ETHTOOL_GRXRINGS:
2390 cmd->data = vsi->num_queue_pairs;
2391 ret = 0;
2392 break;
2393 case ETHTOOL_GRXFH:
2394 ret = i40e_get_rss_hash_opts(pf, cmd);
2395 break;
2396 case ETHTOOL_GRXCLSRLCNT:
2397 cmd->rule_cnt = pf->fdir_pf_active_filters;
2398
2399 cmd->data = i40e_get_fd_cnt_all(pf);
2400 ret = 0;
2401 break;
2402 case ETHTOOL_GRXCLSRULE:
2403 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
2404 break;
2405 case ETHTOOL_GRXCLSRLALL:
2406 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2407 break;
2408 default:
2409 break;
2410 }
2411
2412 return ret;
2413}
2414
2415
2416
2417
2418
2419
2420
2421
2422static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
2423{
2424 u64 i_set = i_setc;
2425 u64 src_l3 = 0, dst_l3 = 0;
2426
2427 if (nfc->data & RXH_L4_B_0_1)
2428 i_set |= I40E_L4_SRC_MASK;
2429 else
2430 i_set &= ~I40E_L4_SRC_MASK;
2431 if (nfc->data & RXH_L4_B_2_3)
2432 i_set |= I40E_L4_DST_MASK;
2433 else
2434 i_set &= ~I40E_L4_DST_MASK;
2435
2436 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2437 src_l3 = I40E_L3_V6_SRC_MASK;
2438 dst_l3 = I40E_L3_V6_DST_MASK;
2439 } else if (nfc->flow_type == TCP_V4_FLOW ||
2440 nfc->flow_type == UDP_V4_FLOW) {
2441 src_l3 = I40E_L3_SRC_MASK;
2442 dst_l3 = I40E_L3_DST_MASK;
2443 } else {
2444
2445 return i_set;
2446 }
2447
2448 if (nfc->data & RXH_IP_SRC)
2449 i_set |= src_l3;
2450 else
2451 i_set &= ~src_l3;
2452 if (nfc->data & RXH_IP_DST)
2453 i_set |= dst_l3;
2454 else
2455 i_set &= ~dst_l3;
2456
2457 return i_set;
2458}
2459
2460
2461
2462
2463
2464
2465
2466
2467static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2468{
2469 struct i40e_hw *hw = &pf->hw;
2470 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2471 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
2472 u8 flow_pctype = 0;
2473 u64 i_set, i_setc;
2474
2475
2476
2477
2478 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2479 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2480 return -EINVAL;
2481
2482 switch (nfc->flow_type) {
2483 case TCP_V4_FLOW:
2484 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2485 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2486 hena |=
2487 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2488 break;
2489 case TCP_V6_FLOW:
2490 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2491 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2492 hena |=
2493 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2494 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2495 hena |=
2496 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
2497 break;
2498 case UDP_V4_FLOW:
2499 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2500 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2501 hena |=
2502 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2503 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
2504
2505 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2506 break;
2507 case UDP_V6_FLOW:
2508 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2509 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2510 hena |=
2511 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2512 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
2513
2514 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2515 break;
2516 case AH_ESP_V4_FLOW:
2517 case AH_V4_FLOW:
2518 case ESP_V4_FLOW:
2519 case SCTP_V4_FLOW:
2520 if ((nfc->data & RXH_L4_B_0_1) ||
2521 (nfc->data & RXH_L4_B_2_3))
2522 return -EINVAL;
2523 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2524 break;
2525 case AH_ESP_V6_FLOW:
2526 case AH_V6_FLOW:
2527 case ESP_V6_FLOW:
2528 case SCTP_V6_FLOW:
2529 if ((nfc->data & RXH_L4_B_0_1) ||
2530 (nfc->data & RXH_L4_B_2_3))
2531 return -EINVAL;
2532 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2533 break;
2534 case IPV4_FLOW:
2535 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2536 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2537 break;
2538 case IPV6_FLOW:
2539 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2540 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2541 break;
2542 default:
2543 return -EINVAL;
2544 }
2545
2546 if (flow_pctype) {
2547 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2548 flow_pctype)) |
2549 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2550 flow_pctype)) << 32);
2551 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
2552 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
2553 (u32)i_set);
2554 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
2555 (u32)(i_set >> 32));
2556 hena |= BIT_ULL(flow_pctype);
2557 }
2558
2559 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2560 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
2561 i40e_flush(hw);
2562
2563 return 0;
2564}
2565
2566
2567
2568
2569
2570
2571
2572
2573static bool i40e_match_fdir_input_set(struct i40e_fdir_filter *rule,
2574 struct i40e_fdir_filter *input)
2575{
2576 if ((rule->dst_ip[0] != input->dst_ip[0]) ||
2577 (rule->src_ip[0] != input->src_ip[0]) ||
2578 (rule->dst_port != input->dst_port) ||
2579 (rule->src_port != input->src_port))
2580 return false;
2581 return true;
2582}
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
2597 struct i40e_fdir_filter *input,
2598 u16 sw_idx,
2599 struct ethtool_rxnfc *cmd)
2600{
2601 struct i40e_fdir_filter *rule, *parent;
2602 struct i40e_pf *pf = vsi->back;
2603 struct hlist_node *node2;
2604 int err = -EINVAL;
2605
2606 parent = NULL;
2607 rule = NULL;
2608
2609 hlist_for_each_entry_safe(rule, node2,
2610 &pf->fdir_filter_list, fdir_node) {
2611
2612 if (rule->fd_id >= sw_idx)
2613 break;
2614 parent = rule;
2615 }
2616
2617
2618 if (rule && (rule->fd_id == sw_idx)) {
2619 if (input && !i40e_match_fdir_input_set(rule, input))
2620 err = i40e_add_del_fdir(vsi, rule, false);
2621 else if (!input)
2622 err = i40e_add_del_fdir(vsi, rule, false);
2623 hlist_del(&rule->fdir_node);
2624 kfree(rule);
2625 pf->fdir_pf_active_filters--;
2626 }
2627
2628
2629
2630
2631 if (!input)
2632 return err;
2633
2634
2635 INIT_HLIST_NODE(&input->fdir_node);
2636
2637
2638 if (parent)
2639 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2640 else
2641 hlist_add_head(&input->fdir_node,
2642 &pf->fdir_filter_list);
2643
2644
2645 pf->fdir_pf_active_filters++;
2646
2647 return 0;
2648}
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
2661 struct ethtool_rxnfc *cmd)
2662{
2663 struct ethtool_rx_flow_spec *fsp =
2664 (struct ethtool_rx_flow_spec *)&cmd->fs;
2665 struct i40e_pf *pf = vsi->back;
2666 int ret = 0;
2667
2668 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
2669 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
2670 return -EBUSY;
2671
2672 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
2673 return -EBUSY;
2674
2675 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
2676
2677 i40e_fdir_check_and_reenable(pf);
2678 return ret;
2679}
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
2690 struct ethtool_rxnfc *cmd)
2691{
2692 struct ethtool_rx_flow_spec *fsp;
2693 struct i40e_fdir_filter *input;
2694 struct i40e_pf *pf;
2695 int ret = -EINVAL;
2696 u16 vf_id;
2697
2698 if (!vsi)
2699 return -EINVAL;
2700 pf = vsi->back;
2701
2702 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2703 return -EOPNOTSUPP;
2704
2705 if (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)
2706 return -ENOSPC;
2707
2708 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
2709 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
2710 return -EBUSY;
2711
2712 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
2713 return -EBUSY;
2714
2715 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
2716
2717 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
2718 pf->hw.func_caps.fd_filters_guaranteed)) {
2719 return -EINVAL;
2720 }
2721
2722 if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2723 (fsp->ring_cookie >= vsi->num_queue_pairs))
2724 return -EINVAL;
2725
2726 input = kzalloc(sizeof(*input), GFP_KERNEL);
2727
2728 if (!input)
2729 return -ENOMEM;
2730
2731 input->fd_id = fsp->location;
2732
2733 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2734 input->dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
2735 else
2736 input->dest_ctl =
2737 I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
2738
2739 input->q_index = fsp->ring_cookie;
2740 input->flex_off = 0;
2741 input->pctype = 0;
2742 input->dest_vsi = vsi->id;
2743 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
2744 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
2745 input->flow_type = fsp->flow_type;
2746 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
2747
2748
2749
2750
2751 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
2752 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
2753 input->dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2754 input->src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2755
2756 if (ntohl(fsp->m_ext.data[1])) {
2757 vf_id = ntohl(fsp->h_ext.data[1]);
2758 if (vf_id >= pf->num_alloc_vfs) {
2759 netif_info(pf, drv, vsi->netdev,
2760 "Invalid VF id %d\n", vf_id);
2761 goto free_input;
2762 }
2763
2764 input->dest_vsi = pf->vf[vf_id].lan_vsi_id;
2765 if (input->q_index >= pf->vf[vf_id].num_queue_pairs) {
2766 netif_info(pf, drv, vsi->netdev,
2767 "Invalid queue id %d for VF %d\n",
2768 input->q_index, vf_id);
2769 goto free_input;
2770 }
2771 }
2772
2773 ret = i40e_add_del_fdir(vsi, input, true);
2774free_input:
2775 if (ret)
2776 kfree(input);
2777 else
2778 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
2779
2780 return ret;
2781}
2782
2783
2784
2785
2786
2787
2788
2789
2790static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
2791{
2792 struct i40e_netdev_priv *np = netdev_priv(netdev);
2793 struct i40e_vsi *vsi = np->vsi;
2794 struct i40e_pf *pf = vsi->back;
2795 int ret = -EOPNOTSUPP;
2796
2797 switch (cmd->cmd) {
2798 case ETHTOOL_SRXFH:
2799 ret = i40e_set_rss_hash_opt(pf, cmd);
2800 break;
2801 case ETHTOOL_SRXCLSRLINS:
2802 ret = i40e_add_fdir_ethtool(vsi, cmd);
2803 break;
2804 case ETHTOOL_SRXCLSRLDEL:
2805 ret = i40e_del_fdir_entry(vsi, cmd);
2806 break;
2807 default:
2808 break;
2809 }
2810
2811 return ret;
2812}
2813
2814
2815
2816
2817
2818static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
2819{
2820
2821 return vsi->alloc_queue_pairs;
2822}
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834static void i40e_get_channels(struct net_device *dev,
2835 struct ethtool_channels *ch)
2836{
2837 struct i40e_netdev_priv *np = netdev_priv(dev);
2838 struct i40e_vsi *vsi = np->vsi;
2839 struct i40e_pf *pf = vsi->back;
2840
2841
2842 ch->max_combined = i40e_max_channels(vsi);
2843
2844
2845 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
2846 ch->max_other = ch->other_count;
2847
2848
2849 ch->combined_count = vsi->num_queue_pairs;
2850}
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860static int i40e_set_channels(struct net_device *dev,
2861 struct ethtool_channels *ch)
2862{
2863 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
2864 struct i40e_netdev_priv *np = netdev_priv(dev);
2865 unsigned int count = ch->combined_count;
2866 struct i40e_vsi *vsi = np->vsi;
2867 struct i40e_pf *pf = vsi->back;
2868 struct i40e_fdir_filter *rule;
2869 struct hlist_node *node2;
2870 int new_count;
2871 int err = 0;
2872
2873
2874 if (vsi->type != I40E_VSI_MAIN)
2875 return -EINVAL;
2876
2877
2878 if (!count || ch->rx_count || ch->tx_count)
2879 return -EINVAL;
2880
2881
2882 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
2883 return -EINVAL;
2884
2885
2886 if (count > i40e_max_channels(vsi))
2887 return -EINVAL;
2888
2889
2890
2891
2892 hlist_for_each_entry_safe(rule, node2,
2893 &pf->fdir_filter_list, fdir_node) {
2894 if (rule->dest_ctl != drop && count <= rule->q_index) {
2895 dev_warn(&pf->pdev->dev,
2896 "Existing user defined filter %d assigns flow to queue %d\n",
2897 rule->fd_id, rule->q_index);
2898 err = -EINVAL;
2899 }
2900 }
2901
2902 if (err) {
2903 dev_err(&pf->pdev->dev,
2904 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
2905 count);
2906 return err;
2907 }
2908
2909
2910
2911
2912
2913
2914
2915 new_count = i40e_reconfig_rss_queues(pf, count);
2916 if (new_count > 0)
2917 return 0;
2918 else
2919 return -EINVAL;
2920}
2921
2922
2923
2924
2925
2926
2927
2928static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
2929{
2930 return I40E_HKEY_ARRAY_SIZE;
2931}
2932
2933
2934
2935
2936
2937
2938
2939static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
2940{
2941 return I40E_HLUT_ARRAY_SIZE;
2942}
2943
2944static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
2945 u8 *hfunc)
2946{
2947 struct i40e_netdev_priv *np = netdev_priv(netdev);
2948 struct i40e_vsi *vsi = np->vsi;
2949 u8 *lut, *seed = NULL;
2950 int ret;
2951 u16 i;
2952
2953 if (hfunc)
2954 *hfunc = ETH_RSS_HASH_TOP;
2955
2956 if (!indir)
2957 return 0;
2958
2959 seed = key;
2960 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
2961 if (!lut)
2962 return -ENOMEM;
2963 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
2964 if (ret)
2965 goto out;
2966 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
2967 indir[i] = (u32)(lut[i]);
2968
2969out:
2970 kfree(lut);
2971
2972 return ret;
2973}
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
2985 const u8 *key, const u8 hfunc)
2986{
2987 struct i40e_netdev_priv *np = netdev_priv(netdev);
2988 struct i40e_vsi *vsi = np->vsi;
2989 struct i40e_pf *pf = vsi->back;
2990 u8 *seed = NULL;
2991 u16 i;
2992
2993 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
2994 return -EOPNOTSUPP;
2995
2996 if (key) {
2997 if (!vsi->rss_hkey_user) {
2998 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
2999 GFP_KERNEL);
3000 if (!vsi->rss_hkey_user)
3001 return -ENOMEM;
3002 }
3003 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
3004 seed = vsi->rss_hkey_user;
3005 }
3006 if (!vsi->rss_lut_user) {
3007 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
3008 if (!vsi->rss_lut_user)
3009 return -ENOMEM;
3010 }
3011
3012
3013 if (indir)
3014 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
3015 vsi->rss_lut_user[i] = (u8)(indir[i]);
3016 else
3017 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
3018 vsi->rss_size);
3019
3020 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
3021 I40E_HLUT_ARRAY_SIZE);
3022}
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034static u32 i40e_get_priv_flags(struct net_device *dev)
3035{
3036 struct i40e_netdev_priv *np = netdev_priv(dev);
3037 struct i40e_vsi *vsi = np->vsi;
3038 struct i40e_pf *pf = vsi->back;
3039 u32 ret_flags = 0;
3040
3041 ret_flags |= pf->flags & I40E_FLAG_LINK_POLLING_ENABLED ?
3042 I40E_PRIV_FLAGS_LINKPOLL_FLAG : 0;
3043 ret_flags |= pf->flags & I40E_FLAG_FD_ATR_ENABLED ?
3044 I40E_PRIV_FLAGS_FD_ATR : 0;
3045 ret_flags |= pf->flags & I40E_FLAG_VEB_STATS_ENABLED ?
3046 I40E_PRIV_FLAGS_VEB_STATS : 0;
3047 ret_flags |= pf->auto_disable_flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE ?
3048 0 : I40E_PRIV_FLAGS_HW_ATR_EVICT;
3049 if (pf->hw.pf_id == 0) {
3050 ret_flags |= pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT ?
3051 I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT : 0;
3052 }
3053
3054 return ret_flags;
3055}
3056
3057
3058
3059
3060
3061
3062static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
3063{
3064 struct i40e_netdev_priv *np = netdev_priv(dev);
3065 struct i40e_vsi *vsi = np->vsi;
3066 struct i40e_pf *pf = vsi->back;
3067 u16 sw_flags = 0, valid_flags = 0;
3068 bool reset_required = false;
3069 bool promisc_change = false;
3070 int ret;
3071
3072
3073
3074 if (flags & I40E_PRIV_FLAGS_LINKPOLL_FLAG)
3075 pf->flags |= I40E_FLAG_LINK_POLLING_ENABLED;
3076 else
3077 pf->flags &= ~I40E_FLAG_LINK_POLLING_ENABLED;
3078
3079
3080
3081
3082
3083 if (flags & I40E_PRIV_FLAGS_FD_ATR) {
3084 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
3085 } else {
3086 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
3087 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
3088
3089
3090 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
3091 }
3092
3093 if ((flags & I40E_PRIV_FLAGS_VEB_STATS) &&
3094 !(pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
3095 pf->flags |= I40E_FLAG_VEB_STATS_ENABLED;
3096 reset_required = true;
3097 } else if (!(flags & I40E_PRIV_FLAGS_VEB_STATS) &&
3098 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
3099 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
3100 reset_required = true;
3101 }
3102
3103 if (pf->hw.pf_id == 0) {
3104 if ((flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) &&
3105 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
3106 pf->flags |= I40E_FLAG_TRUE_PROMISC_SUPPORT;
3107 promisc_change = true;
3108 } else if (!(flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) &&
3109 (pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
3110 pf->flags &= ~I40E_FLAG_TRUE_PROMISC_SUPPORT;
3111 promisc_change = true;
3112 }
3113 }
3114 if (promisc_change) {
3115 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
3116 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
3117 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
3118 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
3119 NULL);
3120 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
3121 dev_info(&pf->pdev->dev,
3122 "couldn't set switch config bits, err %s aq_err %s\n",
3123 i40e_stat_str(&pf->hw, ret),
3124 i40e_aq_str(&pf->hw,
3125 pf->hw.aq.asq_last_status));
3126
3127 }
3128 }
3129
3130 if ((flags & I40E_PRIV_FLAGS_HW_ATR_EVICT) &&
3131 (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE))
3132 pf->auto_disable_flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE;
3133 else
3134 pf->auto_disable_flags |= I40E_FLAG_HW_ATR_EVICT_CAPABLE;
3135
3136
3137 if (reset_required)
3138 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
3139
3140 return 0;
3141}
3142
3143static const struct ethtool_ops i40e_ethtool_ops = {
3144 .get_settings = i40e_get_settings,
3145 .set_settings = i40e_set_settings,
3146 .get_drvinfo = i40e_get_drvinfo,
3147 .get_regs_len = i40e_get_regs_len,
3148 .get_regs = i40e_get_regs,
3149 .nway_reset = i40e_nway_reset,
3150 .get_link = ethtool_op_get_link,
3151 .get_wol = i40e_get_wol,
3152 .set_wol = i40e_set_wol,
3153 .set_eeprom = i40e_set_eeprom,
3154 .get_eeprom_len = i40e_get_eeprom_len,
3155 .get_eeprom = i40e_get_eeprom,
3156 .get_ringparam = i40e_get_ringparam,
3157 .set_ringparam = i40e_set_ringparam,
3158 .get_pauseparam = i40e_get_pauseparam,
3159 .set_pauseparam = i40e_set_pauseparam,
3160 .get_msglevel = i40e_get_msglevel,
3161 .set_msglevel = i40e_set_msglevel,
3162 .get_rxnfc = i40e_get_rxnfc,
3163 .set_rxnfc = i40e_set_rxnfc,
3164 .self_test = i40e_diag_test,
3165 .get_strings = i40e_get_strings,
3166 .set_phys_id = i40e_set_phys_id,
3167 .get_sset_count = i40e_get_sset_count,
3168 .get_ethtool_stats = i40e_get_ethtool_stats,
3169 .get_coalesce = i40e_get_coalesce,
3170 .set_coalesce = i40e_set_coalesce,
3171 .get_rxfh_key_size = i40e_get_rxfh_key_size,
3172 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
3173 .get_rxfh = i40e_get_rxfh,
3174 .set_rxfh = i40e_set_rxfh,
3175 .get_channels = i40e_get_channels,
3176 .set_channels = i40e_set_channels,
3177 .get_ts_info = i40e_get_ts_info,
3178 .get_priv_flags = i40e_get_priv_flags,
3179 .set_priv_flags = i40e_set_priv_flags,
3180 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
3181 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
3182};
3183
3184void i40e_set_ethtool_ops(struct net_device *netdev)
3185{
3186 netdev->ethtool_ops = &i40e_ethtool_ops;
3187}
3188
