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17#include <linux/nl80211.h>
18#include <linux/delay.h>
19#include "ath9k.h"
20#include "btcoex.h"
21
22u8 ath9k_parse_mpdudensity(u8 mpdudensity)
23{
24
25
26
27
28
29
30
31
32
33
34
35 switch (mpdudensity) {
36 case 0:
37 return 0;
38 case 1:
39 case 2:
40 case 3:
41
42
43 return 1;
44 case 4:
45 return 2;
46 case 5:
47 return 4;
48 case 6:
49 return 8;
50 case 7:
51 return 16;
52 default:
53 return 0;
54 }
55}
56
57static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
58 bool sw_pending)
59{
60 bool pending = false;
61
62 spin_lock_bh(&txq->axq_lock);
63
64 if (txq->axq_depth) {
65 pending = true;
66 goto out;
67 }
68
69 if (!sw_pending)
70 goto out;
71
72 if (txq->mac80211_qnum >= 0) {
73 struct list_head *list;
74
75 list = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(list))
77 pending = true;
78 }
79out:
80 spin_unlock_bh(&txq->axq_lock);
81 return pending;
82}
83
84static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85{
86 unsigned long flags;
87 bool ret;
88
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92
93 return ret;
94}
95
96void ath_ps_full_sleep(unsigned long data)
97{
98 struct ath_softc *sc = (struct ath_softc *) data;
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
100 bool reset;
101
102 spin_lock(&common->cc_lock);
103 ath_hw_cycle_counters_update(common);
104 spin_unlock(&common->cc_lock);
105
106 ath9k_hw_setrxabort(sc->sc_ah, 1);
107 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
108
109 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
110}
111
112void ath9k_ps_wakeup(struct ath_softc *sc)
113{
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
115 unsigned long flags;
116 enum ath9k_power_mode power_mode;
117
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (++sc->ps_usecount != 1)
120 goto unlock;
121
122 del_timer_sync(&sc->sleep_timer);
123 power_mode = sc->sc_ah->power_mode;
124 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
125
126
127
128
129
130
131 if (power_mode != ATH9K_PM_AWAKE) {
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
135 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
136 spin_unlock(&common->cc_lock);
137 }
138
139 unlock:
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
141}
142
143void ath9k_ps_restore(struct ath_softc *sc)
144{
145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
146 enum ath9k_power_mode mode;
147 unsigned long flags;
148
149 spin_lock_irqsave(&sc->sc_pm_lock, flags);
150 if (--sc->ps_usecount != 0)
151 goto unlock;
152
153 if (sc->ps_idle) {
154 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
155 goto unlock;
156 }
157
158 if (sc->ps_enabled &&
159 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
160 PS_WAIT_FOR_CAB |
161 PS_WAIT_FOR_PSPOLL_DATA |
162 PS_WAIT_FOR_TX_ACK |
163 PS_WAIT_FOR_ANI))) {
164 mode = ATH9K_PM_NETWORK_SLEEP;
165 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
166 ath9k_btcoex_stop_gen_timer(sc);
167 } else {
168 goto unlock;
169 }
170
171 spin_lock(&common->cc_lock);
172 ath_hw_cycle_counters_update(common);
173 spin_unlock(&common->cc_lock);
174
175 ath9k_hw_setpower(sc->sc_ah, mode);
176
177 unlock:
178 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
179}
180
181static void __ath_cancel_work(struct ath_softc *sc)
182{
183 cancel_work_sync(&sc->paprd_work);
184 cancel_delayed_work_sync(&sc->tx_complete_work);
185 cancel_delayed_work_sync(&sc->hw_pll_work);
186
187#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
189 cancel_work_sync(&sc->mci_work);
190#endif
191}
192
193void ath_cancel_work(struct ath_softc *sc)
194{
195 __ath_cancel_work(sc);
196 cancel_work_sync(&sc->hw_reset_work);
197}
198
199void ath_restart_work(struct ath_softc *sc)
200{
201 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
202
203 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
204 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
206
207 ath_start_ani(sc);
208}
209
210static bool ath_prepare_reset(struct ath_softc *sc)
211{
212 struct ath_hw *ah = sc->sc_ah;
213 bool ret = true;
214
215 ieee80211_stop_queues(sc->hw);
216 ath_stop_ani(sc);
217 ath9k_hw_disable_interrupts(ah);
218
219 if (AR_SREV_9300_20_OR_LATER(ah)) {
220 ret &= ath_stoprecv(sc);
221 ret &= ath_drain_all_txq(sc);
222 } else {
223 ret &= ath_drain_all_txq(sc);
224 ret &= ath_stoprecv(sc);
225 }
226
227 return ret;
228}
229
230static bool ath_complete_reset(struct ath_softc *sc, bool start)
231{
232 struct ath_hw *ah = sc->sc_ah;
233 struct ath_common *common = ath9k_hw_common(ah);
234 unsigned long flags;
235
236 ath9k_calculate_summary_state(sc, sc->cur_chan);
237 ath_startrecv(sc);
238 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
239 sc->cur_chan->txpower,
240 &sc->cur_chan->cur_txpower);
241 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
242
243 if (!sc->cur_chan->offchannel && start) {
244
245 if (sc->cur_chan->tsf_val) {
246 u32 offset;
247
248 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
249 NULL);
250 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
251 }
252
253
254 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
255 goto work;
256
257 if (ah->opmode == NL80211_IFTYPE_STATION &&
258 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
259 spin_lock_irqsave(&sc->sc_pm_lock, flags);
260 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
261 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
262 } else {
263 ath9k_set_beacon(sc);
264 }
265 work:
266 ath_restart_work(sc);
267 ath_txq_schedule_all(sc);
268 }
269
270 sc->gtt_cnt = 0;
271
272 ath9k_hw_set_interrupts(ah);
273 ath9k_hw_enable_interrupts(ah);
274 ieee80211_wake_queues(sc->hw);
275 ath9k_p2p_ps_timer(sc);
276
277 return true;
278}
279
280static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
281{
282 struct ath_hw *ah = sc->sc_ah;
283 struct ath_common *common = ath9k_hw_common(ah);
284 struct ath9k_hw_cal_data *caldata = NULL;
285 bool fastcc = true;
286 int r;
287
288 __ath_cancel_work(sc);
289
290 disable_irq(sc->irq);
291 tasklet_disable(&sc->intr_tq);
292 tasklet_disable(&sc->bcon_tasklet);
293 spin_lock_bh(&sc->sc_pcu_lock);
294
295 if (!sc->cur_chan->offchannel) {
296 fastcc = false;
297 caldata = &sc->cur_chan->caldata;
298 }
299
300 if (!hchan) {
301 fastcc = false;
302 hchan = ah->curchan;
303 }
304
305 if (!ath_prepare_reset(sc))
306 fastcc = false;
307
308 if (ath9k_is_chanctx_enabled())
309 fastcc = false;
310
311 spin_lock_bh(&sc->chan_lock);
312 sc->cur_chandef = sc->cur_chan->chandef;
313 spin_unlock_bh(&sc->chan_lock);
314
315 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
316 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
317
318 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
319 if (r) {
320 ath_err(common,
321 "Unable to reset channel, reset status %d\n", r);
322
323 ath9k_hw_enable_interrupts(ah);
324 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
325
326 goto out;
327 }
328
329 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
330 sc->cur_chan->offchannel)
331 ath9k_mci_set_txpower(sc, true, false);
332
333 if (!ath_complete_reset(sc, true))
334 r = -EIO;
335
336out:
337 enable_irq(sc->irq);
338 spin_unlock_bh(&sc->sc_pcu_lock);
339 tasklet_enable(&sc->bcon_tasklet);
340 tasklet_enable(&sc->intr_tq);
341
342 return r;
343}
344
345static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
346 struct ieee80211_vif *vif)
347{
348 struct ath_node *an;
349 an = (struct ath_node *)sta->drv_priv;
350
351 an->sc = sc;
352 an->sta = sta;
353 an->vif = vif;
354 memset(&an->key_idx, 0, sizeof(an->key_idx));
355
356 ath_tx_node_init(sc, an);
357
358 ath_dynack_node_init(sc->sc_ah, an);
359}
360
361static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
362{
363 struct ath_node *an = (struct ath_node *)sta->drv_priv;
364 ath_tx_node_cleanup(sc, an);
365
366 ath_dynack_node_deinit(sc->sc_ah, an);
367}
368
369void ath9k_tasklet(unsigned long data)
370{
371 struct ath_softc *sc = (struct ath_softc *)data;
372 struct ath_hw *ah = sc->sc_ah;
373 struct ath_common *common = ath9k_hw_common(ah);
374 enum ath_reset_type type;
375 unsigned long flags;
376 u32 status = sc->intrstatus;
377 u32 rxmask;
378
379 ath9k_ps_wakeup(sc);
380 spin_lock(&sc->sc_pcu_lock);
381
382 if (status & ATH9K_INT_FATAL) {
383 type = RESET_TYPE_FATAL_INT;
384 ath9k_queue_reset(sc, type);
385
386
387
388
389
390 atomic_inc(&ah->intr_ref_cnt);
391 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
392 goto out;
393 }
394
395 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
396 (status & ATH9K_INT_BB_WATCHDOG)) {
397 spin_lock(&common->cc_lock);
398 ath_hw_cycle_counters_update(common);
399 ar9003_hw_bb_watchdog_dbg_info(ah);
400 spin_unlock(&common->cc_lock);
401
402 if (ar9003_hw_bb_watchdog_check(ah)) {
403 type = RESET_TYPE_BB_WATCHDOG;
404 ath9k_queue_reset(sc, type);
405
406
407
408
409
410 atomic_inc(&ah->intr_ref_cnt);
411 ath_dbg(common, RESET,
412 "BB_WATCHDOG: Skipping interrupts\n");
413 goto out;
414 }
415 }
416
417 if (status & ATH9K_INT_GTT) {
418 sc->gtt_cnt++;
419
420 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
421 type = RESET_TYPE_TX_GTT;
422 ath9k_queue_reset(sc, type);
423 atomic_inc(&ah->intr_ref_cnt);
424 ath_dbg(common, RESET,
425 "GTT: Skipping interrupts\n");
426 goto out;
427 }
428 }
429
430 spin_lock_irqsave(&sc->sc_pm_lock, flags);
431 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
432
433
434
435
436 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
437 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
438 }
439 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
440
441 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
442 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
443 ATH9K_INT_RXORN);
444 else
445 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
446
447 if (status & rxmask) {
448
449 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
450 (status & ATH9K_INT_RXHP))
451 ath_rx_tasklet(sc, 0, true);
452
453 ath_rx_tasklet(sc, 0, false);
454 }
455
456 if (status & ATH9K_INT_TX) {
457 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
458
459
460
461
462
463
464 sc->gtt_cnt = 0;
465
466 ath_tx_edma_tasklet(sc);
467 } else {
468 ath_tx_tasklet(sc);
469 }
470
471 wake_up(&sc->tx_wait);
472 }
473
474 if (status & ATH9K_INT_GENTIMER)
475 ath_gen_timer_isr(sc->sc_ah);
476
477 ath9k_btcoex_handle_interrupt(sc, status);
478
479
480 ath9k_hw_enable_interrupts(ah);
481out:
482 spin_unlock(&sc->sc_pcu_lock);
483 ath9k_ps_restore(sc);
484}
485
486irqreturn_t ath_isr(int irq, void *dev)
487{
488#define SCHED_INTR ( \
489 ATH9K_INT_FATAL | \
490 ATH9K_INT_BB_WATCHDOG | \
491 ATH9K_INT_RXORN | \
492 ATH9K_INT_RXEOL | \
493 ATH9K_INT_RX | \
494 ATH9K_INT_RXLP | \
495 ATH9K_INT_RXHP | \
496 ATH9K_INT_TX | \
497 ATH9K_INT_BMISS | \
498 ATH9K_INT_CST | \
499 ATH9K_INT_GTT | \
500 ATH9K_INT_TSFOOR | \
501 ATH9K_INT_GENTIMER | \
502 ATH9K_INT_MCI)
503
504 struct ath_softc *sc = dev;
505 struct ath_hw *ah = sc->sc_ah;
506 struct ath_common *common = ath9k_hw_common(ah);
507 enum ath9k_int status;
508 u32 sync_cause = 0;
509 bool sched = false;
510
511
512
513
514
515
516 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
517 return IRQ_NONE;
518
519
520 if (!ath9k_hw_intrpend(ah))
521 return IRQ_NONE;
522
523
524
525
526
527
528
529 ath9k_hw_getisr(ah, &status, &sync_cause);
530 ath9k_debug_sync_cause(sc, sync_cause);
531 status &= ah->imask;
532
533 if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
534 return IRQ_HANDLED;
535
536
537
538
539
540 if (!status)
541 return IRQ_NONE;
542
543
544 sc->intrstatus = status;
545
546 if (status & SCHED_INTR)
547 sched = true;
548
549
550
551
552
553 if (status & ATH9K_INT_FATAL)
554 goto chip_reset;
555
556 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
557 (status & ATH9K_INT_BB_WATCHDOG))
558 goto chip_reset;
559
560 if (status & ATH9K_INT_SWBA)
561 tasklet_schedule(&sc->bcon_tasklet);
562
563 if (status & ATH9K_INT_TXURN)
564 ath9k_hw_updatetxtriglevel(ah, true);
565
566 if (status & ATH9K_INT_RXEOL) {
567 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
568 ath9k_hw_set_interrupts(ah);
569 }
570
571 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
572 if (status & ATH9K_INT_TIM_TIMER) {
573 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
574 goto chip_reset;
575
576
577 ath9k_setpower(sc, ATH9K_PM_AWAKE);
578 spin_lock(&sc->sc_pm_lock);
579 ath9k_hw_setrxabort(sc->sc_ah, 0);
580 sc->ps_flags |= PS_WAIT_FOR_BEACON;
581 spin_unlock(&sc->sc_pm_lock);
582 }
583
584chip_reset:
585
586 ath_debug_stat_interrupt(sc, status);
587
588 if (sched) {
589
590 ath9k_hw_disable_interrupts(ah);
591 tasklet_schedule(&sc->intr_tq);
592 }
593
594 return IRQ_HANDLED;
595
596#undef SCHED_INTR
597}
598
599
600
601
602
603int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
604{
605 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
606 int r;
607
608 ath9k_hw_kill_interrupts(sc->sc_ah);
609 set_bit(ATH_OP_HW_RESET, &common->op_flags);
610
611 ath9k_ps_wakeup(sc);
612 r = ath_reset_internal(sc, hchan);
613 ath9k_ps_restore(sc);
614
615 return r;
616}
617
618
619
620
621
622
623void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
624{
625 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
626#ifdef CONFIG_ATH9K_DEBUGFS
627 RESET_STAT_INC(sc, type);
628#endif
629 ath9k_hw_kill_interrupts(sc->sc_ah);
630 set_bit(ATH_OP_HW_RESET, &common->op_flags);
631 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
632}
633
634void ath_reset_work(struct work_struct *work)
635{
636 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
637
638 ath9k_ps_wakeup(sc);
639 ath_reset_internal(sc, NULL);
640 ath9k_ps_restore(sc);
641}
642
643
644
645
646
647static int ath9k_start(struct ieee80211_hw *hw)
648{
649 struct ath_softc *sc = hw->priv;
650 struct ath_hw *ah = sc->sc_ah;
651 struct ath_common *common = ath9k_hw_common(ah);
652 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
653 struct ath_chanctx *ctx = sc->cur_chan;
654 struct ath9k_channel *init_channel;
655 int r;
656
657 ath_dbg(common, CONFIG,
658 "Starting driver with initial channel: %d MHz\n",
659 curchan->center_freq);
660
661 ath9k_ps_wakeup(sc);
662 mutex_lock(&sc->mutex);
663
664 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
665 sc->cur_chandef = hw->conf.chandef;
666
667
668 ath9k_hw_configpcipowersave(ah, false);
669
670
671
672
673
674
675
676
677 spin_lock_bh(&sc->sc_pcu_lock);
678
679 atomic_set(&ah->intr_ref_cnt, -1);
680
681 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
682 if (r) {
683 ath_err(common,
684 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
685 r, curchan->center_freq);
686 ah->reset_power_on = false;
687 }
688
689
690 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
691 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
692 ATH9K_INT_GLOBAL;
693
694 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
695 ah->imask |= ATH9K_INT_RXHP |
696 ATH9K_INT_RXLP;
697 else
698 ah->imask |= ATH9K_INT_RX;
699
700 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
701 ah->imask |= ATH9K_INT_BB_WATCHDOG;
702
703
704
705
706
707 if (AR_SREV_9300_20_OR_LATER(ah))
708 ah->imask |= ATH9K_INT_GTT;
709
710 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
711 ah->imask |= ATH9K_INT_CST;
712
713 ath_mci_enable(sc);
714
715 clear_bit(ATH_OP_INVALID, &common->op_flags);
716 sc->sc_ah->is_monitoring = false;
717
718 if (!ath_complete_reset(sc, false))
719 ah->reset_power_on = false;
720
721 if (ah->led_pin >= 0) {
722 ath9k_hw_set_gpio(ah, ah->led_pin,
723 (ah->config.led_active_high) ? 1 : 0);
724 ath9k_hw_gpio_request_out(ah, ah->led_pin, NULL,
725 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
726 }
727
728
729
730
731
732 ath9k_cmn_init_crypto(sc->sc_ah);
733
734 ath9k_hw_reset_tsf(ah);
735
736 spin_unlock_bh(&sc->sc_pcu_lock);
737
738 mutex_unlock(&sc->mutex);
739
740 ath9k_ps_restore(sc);
741
742 ath9k_rng_start(sc);
743
744 return 0;
745}
746
747static void ath9k_tx(struct ieee80211_hw *hw,
748 struct ieee80211_tx_control *control,
749 struct sk_buff *skb)
750{
751 struct ath_softc *sc = hw->priv;
752 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
753 struct ath_tx_control txctl;
754 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
755 unsigned long flags;
756
757 if (sc->ps_enabled) {
758
759
760
761
762 if (ieee80211_is_data(hdr->frame_control) &&
763 !ieee80211_is_nullfunc(hdr->frame_control) &&
764 !ieee80211_has_pm(hdr->frame_control)) {
765 ath_dbg(common, PS,
766 "Add PM=1 for a TX frame while in PS mode\n");
767 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
768 }
769 }
770
771 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
772
773
774
775
776
777 ath9k_ps_wakeup(sc);
778 spin_lock_irqsave(&sc->sc_pm_lock, flags);
779 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
780 ath9k_hw_setrxabort(sc->sc_ah, 0);
781 if (ieee80211_is_pspoll(hdr->frame_control)) {
782 ath_dbg(common, PS,
783 "Sending PS-Poll to pick a buffered frame\n");
784 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
785 } else {
786 ath_dbg(common, PS, "Wake up to complete TX\n");
787 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
788 }
789
790
791
792
793
794 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
795 ath9k_ps_restore(sc);
796 }
797
798
799
800
801
802 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
803 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
804 goto exit;
805 }
806
807 memset(&txctl, 0, sizeof(struct ath_tx_control));
808 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
809 txctl.sta = control->sta;
810
811 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
812
813 if (ath_tx_start(hw, skb, &txctl) != 0) {
814 ath_dbg(common, XMIT, "TX failed\n");
815 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
816 goto exit;
817 }
818
819 return;
820exit:
821 ieee80211_free_txskb(hw, skb);
822}
823
824static void ath9k_stop(struct ieee80211_hw *hw)
825{
826 struct ath_softc *sc = hw->priv;
827 struct ath_hw *ah = sc->sc_ah;
828 struct ath_common *common = ath9k_hw_common(ah);
829 bool prev_idle;
830
831 ath9k_deinit_channel_context(sc);
832
833 ath9k_rng_stop(sc);
834
835 mutex_lock(&sc->mutex);
836
837 ath_cancel_work(sc);
838
839 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
840 ath_dbg(common, ANY, "Device not present\n");
841 mutex_unlock(&sc->mutex);
842 return;
843 }
844
845
846 ath9k_ps_wakeup(sc);
847
848 spin_lock_bh(&sc->sc_pcu_lock);
849
850
851 ah->imask &= ~ATH9K_INT_GLOBAL;
852
853
854
855 ath9k_hw_disable_interrupts(ah);
856
857 spin_unlock_bh(&sc->sc_pcu_lock);
858
859
860
861 synchronize_irq(sc->irq);
862 tasklet_kill(&sc->intr_tq);
863 tasklet_kill(&sc->bcon_tasklet);
864
865 prev_idle = sc->ps_idle;
866 sc->ps_idle = true;
867
868 spin_lock_bh(&sc->sc_pcu_lock);
869
870 if (ah->led_pin >= 0) {
871 ath9k_hw_set_gpio(ah, ah->led_pin,
872 (ah->config.led_active_high) ? 0 : 1);
873 ath9k_hw_gpio_request_in(ah, ah->led_pin, NULL);
874 }
875
876 ath_prepare_reset(sc);
877
878 if (sc->rx.frag) {
879 dev_kfree_skb_any(sc->rx.frag);
880 sc->rx.frag = NULL;
881 }
882
883 if (!ah->curchan)
884 ah->curchan = ath9k_cmn_get_channel(hw, ah,
885 &sc->cur_chan->chandef);
886
887 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
888
889 set_bit(ATH_OP_INVALID, &common->op_flags);
890
891 ath9k_hw_phy_disable(ah);
892
893 ath9k_hw_configpcipowersave(ah, true);
894
895 spin_unlock_bh(&sc->sc_pcu_lock);
896
897 ath9k_ps_restore(sc);
898
899 sc->ps_idle = prev_idle;
900
901 mutex_unlock(&sc->mutex);
902
903 ath_dbg(common, CONFIG, "Driver halt\n");
904}
905
906static bool ath9k_uses_beacons(int type)
907{
908 switch (type) {
909 case NL80211_IFTYPE_AP:
910 case NL80211_IFTYPE_ADHOC:
911 case NL80211_IFTYPE_MESH_POINT:
912 return true;
913 default:
914 return false;
915 }
916}
917
918static void ath9k_vif_iter_set_beacon(struct ath9k_vif_iter_data *iter_data,
919 struct ieee80211_vif *vif)
920{
921
922 if (!iter_data->primary_beacon_vif) {
923 iter_data->primary_beacon_vif = vif;
924 } else {
925 if (iter_data->primary_beacon_vif->type != NL80211_IFTYPE_AP &&
926 vif->type == NL80211_IFTYPE_AP)
927 iter_data->primary_beacon_vif = vif;
928 }
929
930 iter_data->beacons = true;
931 iter_data->nbcnvifs += 1;
932}
933
934static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
935 u8 *mac, struct ieee80211_vif *vif)
936{
937 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
938 int i;
939
940 if (iter_data->has_hw_macaddr) {
941 for (i = 0; i < ETH_ALEN; i++)
942 iter_data->mask[i] &=
943 ~(iter_data->hw_macaddr[i] ^ mac[i]);
944 } else {
945 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
946 iter_data->has_hw_macaddr = true;
947 }
948
949 if (!vif->bss_conf.use_short_slot)
950 iter_data->slottime = 20;
951
952 switch (vif->type) {
953 case NL80211_IFTYPE_AP:
954 iter_data->naps++;
955 if (vif->bss_conf.enable_beacon)
956 ath9k_vif_iter_set_beacon(iter_data, vif);
957 break;
958 case NL80211_IFTYPE_STATION:
959 iter_data->nstations++;
960 if (avp->assoc && !iter_data->primary_sta)
961 iter_data->primary_sta = vif;
962 break;
963 case NL80211_IFTYPE_OCB:
964 iter_data->nocbs++;
965 break;
966 case NL80211_IFTYPE_ADHOC:
967 iter_data->nadhocs++;
968 if (vif->bss_conf.enable_beacon)
969 ath9k_vif_iter_set_beacon(iter_data, vif);
970 break;
971 case NL80211_IFTYPE_MESH_POINT:
972 iter_data->nmeshes++;
973 if (vif->bss_conf.enable_beacon)
974 ath9k_vif_iter_set_beacon(iter_data, vif);
975 break;
976 case NL80211_IFTYPE_WDS:
977 iter_data->nwds++;
978 break;
979 default:
980 break;
981 }
982}
983
984static void ath9k_update_bssid_mask(struct ath_softc *sc,
985 struct ath_chanctx *ctx,
986 struct ath9k_vif_iter_data *iter_data)
987{
988 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
989 struct ath_vif *avp;
990 int i;
991
992 if (!ath9k_is_chanctx_enabled())
993 return;
994
995 list_for_each_entry(avp, &ctx->vifs, list) {
996 if (ctx->nvifs_assigned != 1)
997 continue;
998
999 if (!iter_data->has_hw_macaddr)
1000 continue;
1001
1002 ether_addr_copy(common->curbssid, avp->bssid);
1003
1004
1005 for (i = 0; i < ETH_ALEN; i++)
1006 iter_data->mask[i] &=
1007 ~(iter_data->hw_macaddr[i] ^
1008 sc->hw->wiphy->perm_addr[i]);
1009 }
1010}
1011
1012
1013void ath9k_calculate_iter_data(struct ath_softc *sc,
1014 struct ath_chanctx *ctx,
1015 struct ath9k_vif_iter_data *iter_data)
1016{
1017 struct ath_vif *avp;
1018
1019
1020
1021
1022
1023 memset(iter_data, 0, sizeof(*iter_data));
1024 eth_broadcast_addr(iter_data->mask);
1025 iter_data->slottime = 9;
1026
1027 list_for_each_entry(avp, &ctx->vifs, list)
1028 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1029
1030 ath9k_update_bssid_mask(sc, ctx, iter_data);
1031}
1032
1033static void ath9k_set_assoc_state(struct ath_softc *sc,
1034 struct ieee80211_vif *vif, bool changed)
1035{
1036 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1037 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1038 unsigned long flags;
1039
1040 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1041
1042 ether_addr_copy(common->curbssid, avp->bssid);
1043 common->curaid = avp->aid;
1044 ath9k_hw_write_associd(sc->sc_ah);
1045
1046 if (changed) {
1047 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1048 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1049
1050 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1051 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1052 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1053 }
1054
1055 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1056 ath9k_mci_update_wlan_channels(sc, false);
1057
1058 ath_dbg(common, CONFIG,
1059 "Primary Station interface: %pM, BSSID: %pM\n",
1060 vif->addr, common->curbssid);
1061}
1062
1063#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1064static void ath9k_set_offchannel_state(struct ath_softc *sc)
1065{
1066 struct ath_hw *ah = sc->sc_ah;
1067 struct ath_common *common = ath9k_hw_common(ah);
1068 struct ieee80211_vif *vif = NULL;
1069
1070 ath9k_ps_wakeup(sc);
1071
1072 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1073 vif = sc->offchannel.scan_vif;
1074 else
1075 vif = sc->offchannel.roc_vif;
1076
1077 if (WARN_ON(!vif))
1078 goto exit;
1079
1080 eth_zero_addr(common->curbssid);
1081 eth_broadcast_addr(common->bssidmask);
1082 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1083 common->curaid = 0;
1084 ah->opmode = vif->type;
1085 ah->imask &= ~ATH9K_INT_SWBA;
1086 ah->imask &= ~ATH9K_INT_TSFOOR;
1087 ah->slottime = 9;
1088
1089 ath_hw_setbssidmask(common);
1090 ath9k_hw_setopmode(ah);
1091 ath9k_hw_write_associd(sc->sc_ah);
1092 ath9k_hw_set_interrupts(ah);
1093 ath9k_hw_init_global_settings(ah);
1094
1095exit:
1096 ath9k_ps_restore(sc);
1097}
1098#endif
1099
1100
1101void ath9k_calculate_summary_state(struct ath_softc *sc,
1102 struct ath_chanctx *ctx)
1103{
1104 struct ath_hw *ah = sc->sc_ah;
1105 struct ath_common *common = ath9k_hw_common(ah);
1106 struct ath9k_vif_iter_data iter_data;
1107
1108 ath_chanctx_check_active(sc, ctx);
1109
1110 if (ctx != sc->cur_chan)
1111 return;
1112
1113#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1114 if (ctx == &sc->offchannel.chan)
1115 return ath9k_set_offchannel_state(sc);
1116#endif
1117
1118 ath9k_ps_wakeup(sc);
1119 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1120
1121 if (iter_data.has_hw_macaddr)
1122 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1123
1124 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1125 ath_hw_setbssidmask(common);
1126
1127 if (iter_data.naps > 0) {
1128 ath9k_hw_set_tsfadjust(ah, true);
1129 ah->opmode = NL80211_IFTYPE_AP;
1130 } else {
1131 ath9k_hw_set_tsfadjust(ah, false);
1132 if (iter_data.beacons)
1133 ath9k_beacon_ensure_primary_slot(sc);
1134
1135 if (iter_data.nmeshes)
1136 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1137 else if (iter_data.nocbs)
1138 ah->opmode = NL80211_IFTYPE_OCB;
1139 else if (iter_data.nwds)
1140 ah->opmode = NL80211_IFTYPE_AP;
1141 else if (iter_data.nadhocs)
1142 ah->opmode = NL80211_IFTYPE_ADHOC;
1143 else
1144 ah->opmode = NL80211_IFTYPE_STATION;
1145 }
1146
1147 ath9k_hw_setopmode(ah);
1148
1149 ctx->switch_after_beacon = false;
1150 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1151 ah->imask |= ATH9K_INT_TSFOOR;
1152 else {
1153 ah->imask &= ~ATH9K_INT_TSFOOR;
1154 if (iter_data.naps == 1 && iter_data.beacons)
1155 ctx->switch_after_beacon = true;
1156 }
1157
1158 if (ah->opmode == NL80211_IFTYPE_STATION) {
1159 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1160
1161 if (iter_data.primary_sta) {
1162 iter_data.primary_beacon_vif = iter_data.primary_sta;
1163 iter_data.beacons = true;
1164 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1165 changed);
1166 ctx->primary_sta = iter_data.primary_sta;
1167 } else {
1168 ctx->primary_sta = NULL;
1169 eth_zero_addr(common->curbssid);
1170 common->curaid = 0;
1171 ath9k_hw_write_associd(sc->sc_ah);
1172 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1173 ath9k_mci_update_wlan_channels(sc, true);
1174 }
1175 }
1176 sc->nbcnvifs = iter_data.nbcnvifs;
1177 ath9k_beacon_config(sc, iter_data.primary_beacon_vif,
1178 iter_data.beacons);
1179 ath9k_hw_set_interrupts(ah);
1180
1181 if (ah->slottime != iter_data.slottime) {
1182 ah->slottime = iter_data.slottime;
1183 ath9k_hw_init_global_settings(ah);
1184 }
1185
1186 if (iter_data.primary_sta)
1187 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1188 else
1189 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1190
1191 ath_dbg(common, CONFIG,
1192 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1193 common->macaddr, common->curbssid, common->bssidmask);
1194
1195 ath9k_ps_restore(sc);
1196}
1197
1198static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1199{
1200 int *power = (int *)data;
1201
1202 if (*power < vif->bss_conf.txpower)
1203 *power = vif->bss_conf.txpower;
1204}
1205
1206
1207void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1208{
1209 int power;
1210 struct ath_hw *ah = sc->sc_ah;
1211 struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1212
1213 ath9k_ps_wakeup(sc);
1214 if (ah->tpc_enabled) {
1215 power = (vif) ? vif->bss_conf.txpower : -1;
1216 ieee80211_iterate_active_interfaces_atomic(
1217 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1218 ath9k_tpc_vif_iter, &power);
1219 if (power == -1)
1220 power = sc->hw->conf.power_level;
1221 } else {
1222 power = sc->hw->conf.power_level;
1223 }
1224 sc->cur_chan->txpower = 2 * power;
1225 ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1226 sc->cur_chan->cur_txpower = reg->max_power_level;
1227 ath9k_ps_restore(sc);
1228}
1229
1230static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1231 struct ieee80211_vif *vif)
1232{
1233 int i;
1234
1235 if (!ath9k_is_chanctx_enabled())
1236 return;
1237
1238 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1239 vif->hw_queue[i] = i;
1240
1241 if (vif->type == NL80211_IFTYPE_AP ||
1242 vif->type == NL80211_IFTYPE_MESH_POINT)
1243 vif->cab_queue = hw->queues - 2;
1244 else
1245 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1246}
1247
1248static int ath9k_add_interface(struct ieee80211_hw *hw,
1249 struct ieee80211_vif *vif)
1250{
1251 struct ath_softc *sc = hw->priv;
1252 struct ath_hw *ah = sc->sc_ah;
1253 struct ath_common *common = ath9k_hw_common(ah);
1254 struct ath_vif *avp = (void *)vif->drv_priv;
1255 struct ath_node *an = &avp->mcast_node;
1256
1257 mutex_lock(&sc->mutex);
1258
1259 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1260 if (sc->cur_chan->nvifs >= 1) {
1261 mutex_unlock(&sc->mutex);
1262 return -EOPNOTSUPP;
1263 }
1264 sc->tx99_vif = vif;
1265 }
1266
1267 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1268 sc->cur_chan->nvifs++;
1269
1270 if (vif->type == NL80211_IFTYPE_STATION && ath9k_is_chanctx_enabled())
1271 vif->driver_flags |= IEEE80211_VIF_GET_NOA_UPDATE;
1272
1273 if (ath9k_uses_beacons(vif->type))
1274 ath9k_beacon_assign_slot(sc, vif);
1275
1276 avp->vif = vif;
1277 if (!ath9k_is_chanctx_enabled()) {
1278 avp->chanctx = sc->cur_chan;
1279 list_add_tail(&avp->list, &avp->chanctx->vifs);
1280 }
1281
1282 ath9k_calculate_summary_state(sc, avp->chanctx);
1283
1284 ath9k_assign_hw_queues(hw, vif);
1285
1286 ath9k_set_txpower(sc, vif);
1287
1288 an->sc = sc;
1289 an->sta = NULL;
1290 an->vif = vif;
1291 an->no_ps_filter = true;
1292 ath_tx_node_init(sc, an);
1293
1294 mutex_unlock(&sc->mutex);
1295 return 0;
1296}
1297
1298static int ath9k_change_interface(struct ieee80211_hw *hw,
1299 struct ieee80211_vif *vif,
1300 enum nl80211_iftype new_type,
1301 bool p2p)
1302{
1303 struct ath_softc *sc = hw->priv;
1304 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1305 struct ath_vif *avp = (void *)vif->drv_priv;
1306
1307 mutex_lock(&sc->mutex);
1308
1309 if (IS_ENABLED(CONFIG_ATH9K_TX99)) {
1310 mutex_unlock(&sc->mutex);
1311 return -EOPNOTSUPP;
1312 }
1313
1314 ath_dbg(common, CONFIG, "Change Interface\n");
1315
1316 if (ath9k_uses_beacons(vif->type))
1317 ath9k_beacon_remove_slot(sc, vif);
1318
1319 vif->type = new_type;
1320 vif->p2p = p2p;
1321
1322 if (ath9k_uses_beacons(vif->type))
1323 ath9k_beacon_assign_slot(sc, vif);
1324
1325 ath9k_assign_hw_queues(hw, vif);
1326 ath9k_calculate_summary_state(sc, avp->chanctx);
1327
1328 ath9k_set_txpower(sc, vif);
1329
1330 mutex_unlock(&sc->mutex);
1331 return 0;
1332}
1333
1334static void ath9k_remove_interface(struct ieee80211_hw *hw,
1335 struct ieee80211_vif *vif)
1336{
1337 struct ath_softc *sc = hw->priv;
1338 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1339 struct ath_vif *avp = (void *)vif->drv_priv;
1340
1341 ath_dbg(common, CONFIG, "Detach Interface\n");
1342
1343 mutex_lock(&sc->mutex);
1344
1345 ath9k_p2p_remove_vif(sc, vif);
1346
1347 sc->cur_chan->nvifs--;
1348 sc->tx99_vif = NULL;
1349 if (!ath9k_is_chanctx_enabled())
1350 list_del(&avp->list);
1351
1352 if (ath9k_uses_beacons(vif->type))
1353 ath9k_beacon_remove_slot(sc, vif);
1354
1355 ath_tx_node_cleanup(sc, &avp->mcast_node);
1356
1357 ath9k_calculate_summary_state(sc, avp->chanctx);
1358
1359 ath9k_set_txpower(sc, NULL);
1360
1361 mutex_unlock(&sc->mutex);
1362}
1363
1364static void ath9k_enable_ps(struct ath_softc *sc)
1365{
1366 struct ath_hw *ah = sc->sc_ah;
1367 struct ath_common *common = ath9k_hw_common(ah);
1368
1369 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1370 return;
1371
1372 sc->ps_enabled = true;
1373 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1374 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1375 ah->imask |= ATH9K_INT_TIM_TIMER;
1376 ath9k_hw_set_interrupts(ah);
1377 }
1378 ath9k_hw_setrxabort(ah, 1);
1379 }
1380 ath_dbg(common, PS, "PowerSave enabled\n");
1381}
1382
1383static void ath9k_disable_ps(struct ath_softc *sc)
1384{
1385 struct ath_hw *ah = sc->sc_ah;
1386 struct ath_common *common = ath9k_hw_common(ah);
1387
1388 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1389 return;
1390
1391 sc->ps_enabled = false;
1392 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1393 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1394 ath9k_hw_setrxabort(ah, 0);
1395 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1396 PS_WAIT_FOR_CAB |
1397 PS_WAIT_FOR_PSPOLL_DATA |
1398 PS_WAIT_FOR_TX_ACK);
1399 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1400 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1401 ath9k_hw_set_interrupts(ah);
1402 }
1403 }
1404 ath_dbg(common, PS, "PowerSave disabled\n");
1405}
1406
1407static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1408{
1409 struct ath_softc *sc = hw->priv;
1410 struct ath_hw *ah = sc->sc_ah;
1411 struct ath_common *common = ath9k_hw_common(ah);
1412 struct ieee80211_conf *conf = &hw->conf;
1413 struct ath_chanctx *ctx = sc->cur_chan;
1414
1415 ath9k_ps_wakeup(sc);
1416 mutex_lock(&sc->mutex);
1417
1418 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1419 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1420 if (sc->ps_idle) {
1421 ath_cancel_work(sc);
1422 ath9k_stop_btcoex(sc);
1423 } else {
1424 ath9k_start_btcoex(sc);
1425
1426
1427
1428
1429 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1430 }
1431 }
1432
1433
1434
1435
1436
1437
1438
1439 if (changed & IEEE80211_CONF_CHANGE_PS) {
1440 unsigned long flags;
1441 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1442 if (conf->flags & IEEE80211_CONF_PS)
1443 ath9k_enable_ps(sc);
1444 else
1445 ath9k_disable_ps(sc);
1446 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1447 }
1448
1449 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1450 if (conf->flags & IEEE80211_CONF_MONITOR) {
1451 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1452 sc->sc_ah->is_monitoring = true;
1453 } else {
1454 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1455 sc->sc_ah->is_monitoring = false;
1456 }
1457 }
1458
1459 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1460 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1461 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1462 }
1463
1464 mutex_unlock(&sc->mutex);
1465 ath9k_ps_restore(sc);
1466
1467 return 0;
1468}
1469
1470#define SUPPORTED_FILTERS \
1471 (FIF_ALLMULTI | \
1472 FIF_CONTROL | \
1473 FIF_PSPOLL | \
1474 FIF_OTHER_BSS | \
1475 FIF_BCN_PRBRESP_PROMISC | \
1476 FIF_PROBE_REQ | \
1477 FIF_FCSFAIL)
1478
1479
1480static void ath9k_configure_filter(struct ieee80211_hw *hw,
1481 unsigned int changed_flags,
1482 unsigned int *total_flags,
1483 u64 multicast)
1484{
1485 struct ath_softc *sc = hw->priv;
1486 struct ath_chanctx *ctx;
1487 u32 rfilt;
1488
1489 changed_flags &= SUPPORTED_FILTERS;
1490 *total_flags &= SUPPORTED_FILTERS;
1491
1492 spin_lock_bh(&sc->chan_lock);
1493 ath_for_each_chanctx(sc, ctx)
1494 ctx->rxfilter = *total_flags;
1495#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1496 sc->offchannel.chan.rxfilter = *total_flags;
1497#endif
1498 spin_unlock_bh(&sc->chan_lock);
1499
1500 ath9k_ps_wakeup(sc);
1501 rfilt = ath_calcrxfilter(sc);
1502 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1503 ath9k_ps_restore(sc);
1504
1505 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1506 rfilt);
1507}
1508
1509static int ath9k_sta_add(struct ieee80211_hw *hw,
1510 struct ieee80211_vif *vif,
1511 struct ieee80211_sta *sta)
1512{
1513 struct ath_softc *sc = hw->priv;
1514 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1515 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1516 struct ieee80211_key_conf ps_key = { };
1517 int key;
1518
1519 ath_node_attach(sc, sta, vif);
1520
1521 if (vif->type != NL80211_IFTYPE_AP &&
1522 vif->type != NL80211_IFTYPE_AP_VLAN)
1523 return 0;
1524
1525 key = ath_key_config(common, vif, sta, &ps_key);
1526 if (key > 0) {
1527 an->ps_key = key;
1528 an->key_idx[0] = key;
1529 }
1530
1531 return 0;
1532}
1533
1534static void ath9k_del_ps_key(struct ath_softc *sc,
1535 struct ieee80211_vif *vif,
1536 struct ieee80211_sta *sta)
1537{
1538 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1539 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1540 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1541
1542 if (!an->ps_key)
1543 return;
1544
1545 ath_key_delete(common, &ps_key);
1546 an->ps_key = 0;
1547 an->key_idx[0] = 0;
1548}
1549
1550static int ath9k_sta_remove(struct ieee80211_hw *hw,
1551 struct ieee80211_vif *vif,
1552 struct ieee80211_sta *sta)
1553{
1554 struct ath_softc *sc = hw->priv;
1555
1556 ath9k_del_ps_key(sc, vif, sta);
1557 ath_node_detach(sc, sta);
1558
1559 return 0;
1560}
1561
1562static int ath9k_sta_state(struct ieee80211_hw *hw,
1563 struct ieee80211_vif *vif,
1564 struct ieee80211_sta *sta,
1565 enum ieee80211_sta_state old_state,
1566 enum ieee80211_sta_state new_state)
1567{
1568 struct ath_softc *sc = hw->priv;
1569 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1570 int ret = 0;
1571
1572 if (old_state == IEEE80211_STA_NOTEXIST &&
1573 new_state == IEEE80211_STA_NONE) {
1574 ret = ath9k_sta_add(hw, vif, sta);
1575 ath_dbg(common, CONFIG,
1576 "Add station: %pM\n", sta->addr);
1577 } else if (old_state == IEEE80211_STA_NONE &&
1578 new_state == IEEE80211_STA_NOTEXIST) {
1579 ret = ath9k_sta_remove(hw, vif, sta);
1580 ath_dbg(common, CONFIG,
1581 "Remove station: %pM\n", sta->addr);
1582 }
1583
1584 if (ath9k_is_chanctx_enabled()) {
1585 if (vif->type == NL80211_IFTYPE_STATION) {
1586 if (old_state == IEEE80211_STA_ASSOC &&
1587 new_state == IEEE80211_STA_AUTHORIZED)
1588 ath_chanctx_event(sc, vif,
1589 ATH_CHANCTX_EVENT_AUTHORIZED);
1590 }
1591 }
1592
1593 return ret;
1594}
1595
1596static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1597 struct ath_node *an,
1598 bool set)
1599{
1600 int i;
1601
1602 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1603 if (!an->key_idx[i])
1604 continue;
1605 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1606 }
1607}
1608
1609static void ath9k_sta_notify(struct ieee80211_hw *hw,
1610 struct ieee80211_vif *vif,
1611 enum sta_notify_cmd cmd,
1612 struct ieee80211_sta *sta)
1613{
1614 struct ath_softc *sc = hw->priv;
1615 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1616
1617 switch (cmd) {
1618 case STA_NOTIFY_SLEEP:
1619 an->sleeping = true;
1620 ath_tx_aggr_sleep(sta, sc, an);
1621 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1622 break;
1623 case STA_NOTIFY_AWAKE:
1624 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1625 an->sleeping = false;
1626 ath_tx_aggr_wakeup(sc, an);
1627 break;
1628 }
1629}
1630
1631static int ath9k_conf_tx(struct ieee80211_hw *hw,
1632 struct ieee80211_vif *vif, u16 queue,
1633 const struct ieee80211_tx_queue_params *params)
1634{
1635 struct ath_softc *sc = hw->priv;
1636 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1637 struct ath_txq *txq;
1638 struct ath9k_tx_queue_info qi;
1639 int ret = 0;
1640
1641 if (queue >= IEEE80211_NUM_ACS)
1642 return 0;
1643
1644 txq = sc->tx.txq_map[queue];
1645
1646 ath9k_ps_wakeup(sc);
1647 mutex_lock(&sc->mutex);
1648
1649 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1650
1651 qi.tqi_aifs = params->aifs;
1652 qi.tqi_cwmin = params->cw_min;
1653 qi.tqi_cwmax = params->cw_max;
1654 qi.tqi_burstTime = params->txop * 32;
1655
1656 ath_dbg(common, CONFIG,
1657 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1658 queue, txq->axq_qnum, params->aifs, params->cw_min,
1659 params->cw_max, params->txop);
1660
1661 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1662 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1663 if (ret)
1664 ath_err(common, "TXQ Update failed\n");
1665
1666 mutex_unlock(&sc->mutex);
1667 ath9k_ps_restore(sc);
1668
1669 return ret;
1670}
1671
1672static int ath9k_set_key(struct ieee80211_hw *hw,
1673 enum set_key_cmd cmd,
1674 struct ieee80211_vif *vif,
1675 struct ieee80211_sta *sta,
1676 struct ieee80211_key_conf *key)
1677{
1678 struct ath_softc *sc = hw->priv;
1679 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1680 struct ath_node *an = NULL;
1681 int ret = 0, i;
1682
1683 if (ath9k_modparam_nohwcrypt)
1684 return -ENOSPC;
1685
1686 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1687 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1688 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1689 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1690 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1691
1692
1693
1694
1695
1696
1697
1698 return -EOPNOTSUPP;
1699 }
1700
1701 mutex_lock(&sc->mutex);
1702 ath9k_ps_wakeup(sc);
1703 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1704 if (sta)
1705 an = (struct ath_node *)sta->drv_priv;
1706
1707 switch (cmd) {
1708 case SET_KEY:
1709 if (sta)
1710 ath9k_del_ps_key(sc, vif, sta);
1711
1712 key->hw_key_idx = 0;
1713 ret = ath_key_config(common, vif, sta, key);
1714 if (ret >= 0) {
1715 key->hw_key_idx = ret;
1716
1717 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1718 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1719 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1720 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1721 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1722 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1723 ret = 0;
1724 }
1725 if (an && key->hw_key_idx) {
1726 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1727 if (an->key_idx[i])
1728 continue;
1729 an->key_idx[i] = key->hw_key_idx;
1730 break;
1731 }
1732 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1733 }
1734 break;
1735 case DISABLE_KEY:
1736 ath_key_delete(common, key);
1737 if (an) {
1738 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1739 if (an->key_idx[i] != key->hw_key_idx)
1740 continue;
1741 an->key_idx[i] = 0;
1742 break;
1743 }
1744 }
1745 key->hw_key_idx = 0;
1746 break;
1747 default:
1748 ret = -EINVAL;
1749 }
1750
1751 ath9k_ps_restore(sc);
1752 mutex_unlock(&sc->mutex);
1753
1754 return ret;
1755}
1756
1757static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1758 struct ieee80211_vif *vif,
1759 struct ieee80211_bss_conf *bss_conf,
1760 u32 changed)
1761{
1762#define CHECK_ANI \
1763 (BSS_CHANGED_ASSOC | \
1764 BSS_CHANGED_IBSS | \
1765 BSS_CHANGED_BEACON_ENABLED)
1766
1767 struct ath_softc *sc = hw->priv;
1768 struct ath_hw *ah = sc->sc_ah;
1769 struct ath_common *common = ath9k_hw_common(ah);
1770 struct ath_vif *avp = (void *)vif->drv_priv;
1771 int slottime;
1772
1773 ath9k_ps_wakeup(sc);
1774 mutex_lock(&sc->mutex);
1775
1776 if (changed & BSS_CHANGED_ASSOC) {
1777 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1778 bss_conf->bssid, bss_conf->assoc);
1779
1780 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1781 avp->aid = bss_conf->aid;
1782 avp->assoc = bss_conf->assoc;
1783
1784 ath9k_calculate_summary_state(sc, avp->chanctx);
1785 }
1786
1787 if ((changed & BSS_CHANGED_IBSS) ||
1788 (changed & BSS_CHANGED_OCB)) {
1789 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1790 common->curaid = bss_conf->aid;
1791 ath9k_hw_write_associd(sc->sc_ah);
1792 }
1793
1794 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1795 (changed & BSS_CHANGED_BEACON_INT) ||
1796 (changed & BSS_CHANGED_BEACON_INFO)) {
1797 ath9k_calculate_summary_state(sc, avp->chanctx);
1798 }
1799
1800 if ((avp->chanctx == sc->cur_chan) &&
1801 (changed & BSS_CHANGED_ERP_SLOT)) {
1802 if (bss_conf->use_short_slot)
1803 slottime = 9;
1804 else
1805 slottime = 20;
1806
1807 if (vif->type == NL80211_IFTYPE_AP) {
1808
1809
1810
1811
1812
1813 sc->beacon.slottime = slottime;
1814 sc->beacon.updateslot = UPDATE;
1815 } else {
1816 ah->slottime = slottime;
1817 ath9k_hw_init_global_settings(ah);
1818 }
1819 }
1820
1821 if (changed & BSS_CHANGED_P2P_PS)
1822 ath9k_p2p_bss_info_changed(sc, vif);
1823
1824 if (changed & CHECK_ANI)
1825 ath_check_ani(sc);
1826
1827 if (changed & BSS_CHANGED_TXPOWER) {
1828 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1829 vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1830 ath9k_set_txpower(sc, vif);
1831 }
1832
1833 mutex_unlock(&sc->mutex);
1834 ath9k_ps_restore(sc);
1835
1836#undef CHECK_ANI
1837}
1838
1839static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1840{
1841 struct ath_softc *sc = hw->priv;
1842 struct ath_vif *avp = (void *)vif->drv_priv;
1843 u64 tsf;
1844
1845 mutex_lock(&sc->mutex);
1846 ath9k_ps_wakeup(sc);
1847
1848 if (sc->cur_chan == avp->chanctx) {
1849 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1850 } else {
1851 tsf = sc->cur_chan->tsf_val +
1852 ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts, NULL);
1853 }
1854 tsf += le64_to_cpu(avp->tsf_adjust);
1855 ath9k_ps_restore(sc);
1856 mutex_unlock(&sc->mutex);
1857
1858 return tsf;
1859}
1860
1861static void ath9k_set_tsf(struct ieee80211_hw *hw,
1862 struct ieee80211_vif *vif,
1863 u64 tsf)
1864{
1865 struct ath_softc *sc = hw->priv;
1866 struct ath_vif *avp = (void *)vif->drv_priv;
1867
1868 mutex_lock(&sc->mutex);
1869 ath9k_ps_wakeup(sc);
1870 tsf -= le64_to_cpu(avp->tsf_adjust);
1871 getrawmonotonic(&avp->chanctx->tsf_ts);
1872 if (sc->cur_chan == avp->chanctx)
1873 ath9k_hw_settsf64(sc->sc_ah, tsf);
1874 avp->chanctx->tsf_val = tsf;
1875 ath9k_ps_restore(sc);
1876 mutex_unlock(&sc->mutex);
1877}
1878
1879static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1880{
1881 struct ath_softc *sc = hw->priv;
1882 struct ath_vif *avp = (void *)vif->drv_priv;
1883
1884 mutex_lock(&sc->mutex);
1885
1886 ath9k_ps_wakeup(sc);
1887 getrawmonotonic(&avp->chanctx->tsf_ts);
1888 if (sc->cur_chan == avp->chanctx)
1889 ath9k_hw_reset_tsf(sc->sc_ah);
1890 avp->chanctx->tsf_val = 0;
1891 ath9k_ps_restore(sc);
1892
1893 mutex_unlock(&sc->mutex);
1894}
1895
1896static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1897 struct ieee80211_vif *vif,
1898 struct ieee80211_ampdu_params *params)
1899{
1900 struct ath_softc *sc = hw->priv;
1901 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1902 bool flush = false;
1903 int ret = 0;
1904 struct ieee80211_sta *sta = params->sta;
1905 struct ath_node *an = (struct ath_node *)sta->drv_priv;
1906 enum ieee80211_ampdu_mlme_action action = params->action;
1907 u16 tid = params->tid;
1908 u16 *ssn = ¶ms->ssn;
1909 struct ath_atx_tid *atid;
1910
1911 mutex_lock(&sc->mutex);
1912
1913 switch (action) {
1914 case IEEE80211_AMPDU_RX_START:
1915 break;
1916 case IEEE80211_AMPDU_RX_STOP:
1917 break;
1918 case IEEE80211_AMPDU_TX_START:
1919 if (ath9k_is_chanctx_enabled()) {
1920 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1921 ret = -EBUSY;
1922 break;
1923 }
1924 }
1925 ath9k_ps_wakeup(sc);
1926 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1927 if (!ret)
1928 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1929 ath9k_ps_restore(sc);
1930 break;
1931 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1932 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1933 flush = true;
1934 case IEEE80211_AMPDU_TX_STOP_CONT:
1935 ath9k_ps_wakeup(sc);
1936 ath_tx_aggr_stop(sc, sta, tid);
1937 if (!flush)
1938 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1939 ath9k_ps_restore(sc);
1940 break;
1941 case IEEE80211_AMPDU_TX_OPERATIONAL:
1942 atid = ath_node_to_tid(an, tid);
1943 atid->baw_size = IEEE80211_MIN_AMPDU_BUF <<
1944 sta->ht_cap.ampdu_factor;
1945 break;
1946 default:
1947 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1948 }
1949
1950 mutex_unlock(&sc->mutex);
1951
1952 return ret;
1953}
1954
1955static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1956 struct survey_info *survey)
1957{
1958 struct ath_softc *sc = hw->priv;
1959 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1960 struct ieee80211_supported_band *sband;
1961 struct ieee80211_channel *chan;
1962 int pos;
1963
1964 if (IS_ENABLED(CONFIG_ATH9K_TX99))
1965 return -EOPNOTSUPP;
1966
1967 spin_lock_bh(&common->cc_lock);
1968 if (idx == 0)
1969 ath_update_survey_stats(sc);
1970
1971 sband = hw->wiphy->bands[NL80211_BAND_2GHZ];
1972 if (sband && idx >= sband->n_channels) {
1973 idx -= sband->n_channels;
1974 sband = NULL;
1975 }
1976
1977 if (!sband)
1978 sband = hw->wiphy->bands[NL80211_BAND_5GHZ];
1979
1980 if (!sband || idx >= sband->n_channels) {
1981 spin_unlock_bh(&common->cc_lock);
1982 return -ENOENT;
1983 }
1984
1985 chan = &sband->channels[idx];
1986 pos = chan->hw_value;
1987 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1988 survey->channel = chan;
1989 spin_unlock_bh(&common->cc_lock);
1990
1991 return 0;
1992}
1993
1994static void ath9k_enable_dynack(struct ath_softc *sc)
1995{
1996#ifdef CONFIG_ATH9K_DYNACK
1997 u32 rfilt;
1998 struct ath_hw *ah = sc->sc_ah;
1999
2000 ath_dynack_reset(ah);
2001
2002 ah->dynack.enabled = true;
2003 rfilt = ath_calcrxfilter(sc);
2004 ath9k_hw_setrxfilter(ah, rfilt);
2005#endif
2006}
2007
2008static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
2009 s16 coverage_class)
2010{
2011 struct ath_softc *sc = hw->priv;
2012 struct ath_hw *ah = sc->sc_ah;
2013
2014 if (IS_ENABLED(CONFIG_ATH9K_TX99))
2015 return;
2016
2017 mutex_lock(&sc->mutex);
2018
2019 if (coverage_class >= 0) {
2020 ah->coverage_class = coverage_class;
2021 if (ah->dynack.enabled) {
2022 u32 rfilt;
2023
2024 ah->dynack.enabled = false;
2025 rfilt = ath_calcrxfilter(sc);
2026 ath9k_hw_setrxfilter(ah, rfilt);
2027 }
2028 ath9k_ps_wakeup(sc);
2029 ath9k_hw_init_global_settings(ah);
2030 ath9k_ps_restore(sc);
2031 } else if (!ah->dynack.enabled) {
2032 ath9k_enable_dynack(sc);
2033 }
2034
2035 mutex_unlock(&sc->mutex);
2036}
2037
2038static bool ath9k_has_tx_pending(struct ath_softc *sc,
2039 bool sw_pending)
2040{
2041 int i, npend = 0;
2042
2043 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2044 if (!ATH_TXQ_SETUP(sc, i))
2045 continue;
2046
2047 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2048 sw_pending);
2049 if (npend)
2050 break;
2051 }
2052
2053 return !!npend;
2054}
2055
2056static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2057 u32 queues, bool drop)
2058{
2059 struct ath_softc *sc = hw->priv;
2060 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2061
2062 if (ath9k_is_chanctx_enabled()) {
2063 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2064 goto flush;
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076 __ath9k_flush(hw, queues, drop, true, true);
2077 return;
2078 }
2079flush:
2080 mutex_lock(&sc->mutex);
2081 __ath9k_flush(hw, queues, drop, true, false);
2082 mutex_unlock(&sc->mutex);
2083}
2084
2085void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2086 bool sw_pending, bool timeout_override)
2087{
2088 struct ath_softc *sc = hw->priv;
2089 struct ath_hw *ah = sc->sc_ah;
2090 struct ath_common *common = ath9k_hw_common(ah);
2091 int timeout;
2092 bool drain_txq;
2093
2094 cancel_delayed_work_sync(&sc->tx_complete_work);
2095
2096 if (ah->ah_flags & AH_UNPLUGGED) {
2097 ath_dbg(common, ANY, "Device has been unplugged!\n");
2098 return;
2099 }
2100
2101 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2102 ath_dbg(common, ANY, "Device not present\n");
2103 return;
2104 }
2105
2106 spin_lock_bh(&sc->chan_lock);
2107 if (timeout_override)
2108 timeout = HZ / 5;
2109 else
2110 timeout = sc->cur_chan->flush_timeout;
2111 spin_unlock_bh(&sc->chan_lock);
2112
2113 ath_dbg(common, CHAN_CTX,
2114 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2115
2116 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2117 timeout) > 0)
2118 drop = false;
2119
2120 if (drop) {
2121 ath9k_ps_wakeup(sc);
2122 spin_lock_bh(&sc->sc_pcu_lock);
2123 drain_txq = ath_drain_all_txq(sc);
2124 spin_unlock_bh(&sc->sc_pcu_lock);
2125
2126 if (!drain_txq)
2127 ath_reset(sc, NULL);
2128
2129 ath9k_ps_restore(sc);
2130 }
2131
2132 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2133}
2134
2135static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2136{
2137 struct ath_softc *sc = hw->priv;
2138
2139 return ath9k_has_tx_pending(sc, true);
2140}
2141
2142static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2143{
2144 struct ath_softc *sc = hw->priv;
2145 struct ath_hw *ah = sc->sc_ah;
2146 struct ieee80211_vif *vif;
2147 struct ath_vif *avp;
2148 struct ath_buf *bf;
2149 struct ath_tx_status ts;
2150 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2151 int status;
2152
2153 vif = sc->beacon.bslot[0];
2154 if (!vif)
2155 return 0;
2156
2157 if (!vif->bss_conf.enable_beacon)
2158 return 0;
2159
2160 avp = (void *)vif->drv_priv;
2161
2162 if (!sc->beacon.tx_processed && !edma) {
2163 tasklet_disable(&sc->bcon_tasklet);
2164
2165 bf = avp->av_bcbuf;
2166 if (!bf || !bf->bf_mpdu)
2167 goto skip;
2168
2169 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2170 if (status == -EINPROGRESS)
2171 goto skip;
2172
2173 sc->beacon.tx_processed = true;
2174 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2175
2176skip:
2177 tasklet_enable(&sc->bcon_tasklet);
2178 }
2179
2180 return sc->beacon.tx_last;
2181}
2182
2183static int ath9k_get_stats(struct ieee80211_hw *hw,
2184 struct ieee80211_low_level_stats *stats)
2185{
2186 struct ath_softc *sc = hw->priv;
2187 struct ath_hw *ah = sc->sc_ah;
2188 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2189
2190 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2191 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2192 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2193 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2194 return 0;
2195}
2196
2197static u32 fill_chainmask(u32 cap, u32 new)
2198{
2199 u32 filled = 0;
2200 int i;
2201
2202 for (i = 0; cap && new; i++, cap >>= 1) {
2203 if (!(cap & BIT(0)))
2204 continue;
2205
2206 if (new & BIT(0))
2207 filled |= BIT(i);
2208
2209 new >>= 1;
2210 }
2211
2212 return filled;
2213}
2214
2215static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2216{
2217 if (AR_SREV_9300_20_OR_LATER(ah))
2218 return true;
2219
2220 switch (val & 0x7) {
2221 case 0x1:
2222 case 0x3:
2223 case 0x7:
2224 return true;
2225 case 0x2:
2226 return (ah->caps.rx_chainmask == 1);
2227 default:
2228 return false;
2229 }
2230}
2231
2232static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2233{
2234 struct ath_softc *sc = hw->priv;
2235 struct ath_hw *ah = sc->sc_ah;
2236
2237 if (ah->caps.rx_chainmask != 1)
2238 rx_ant |= tx_ant;
2239
2240 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2241 return -EINVAL;
2242
2243 sc->ant_rx = rx_ant;
2244 sc->ant_tx = tx_ant;
2245
2246 if (ah->caps.rx_chainmask == 1)
2247 return 0;
2248
2249
2250 if (AR_SREV_9100(ah))
2251 ah->rxchainmask = 0x7;
2252 else
2253 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2254
2255 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2256 ath9k_cmn_reload_chainmask(ah);
2257
2258 return 0;
2259}
2260
2261static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2262{
2263 struct ath_softc *sc = hw->priv;
2264
2265 *tx_ant = sc->ant_tx;
2266 *rx_ant = sc->ant_rx;
2267 return 0;
2268}
2269
2270static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2271 struct ieee80211_vif *vif,
2272 const u8 *mac_addr)
2273{
2274 struct ath_softc *sc = hw->priv;
2275 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2276 set_bit(ATH_OP_SCANNING, &common->op_flags);
2277}
2278
2279static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2280 struct ieee80211_vif *vif)
2281{
2282 struct ath_softc *sc = hw->priv;
2283 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2284 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2285}
2286
2287#ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2288
2289static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2290{
2291 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2292
2293 if (sc->offchannel.roc_vif) {
2294 ath_dbg(common, CHAN_CTX,
2295 "%s: Aborting RoC\n", __func__);
2296
2297 del_timer_sync(&sc->offchannel.timer);
2298 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2299 ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2300 }
2301
2302 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2303 ath_dbg(common, CHAN_CTX,
2304 "%s: Aborting HW scan\n", __func__);
2305
2306 del_timer_sync(&sc->offchannel.timer);
2307 ath_scan_complete(sc, true);
2308 }
2309}
2310
2311static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2312 struct ieee80211_scan_request *hw_req)
2313{
2314 struct cfg80211_scan_request *req = &hw_req->req;
2315 struct ath_softc *sc = hw->priv;
2316 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2317 int ret = 0;
2318
2319 mutex_lock(&sc->mutex);
2320
2321 if (WARN_ON(sc->offchannel.scan_req)) {
2322 ret = -EBUSY;
2323 goto out;
2324 }
2325
2326 ath9k_ps_wakeup(sc);
2327 set_bit(ATH_OP_SCANNING, &common->op_flags);
2328 sc->offchannel.scan_vif = vif;
2329 sc->offchannel.scan_req = req;
2330 sc->offchannel.scan_idx = 0;
2331
2332 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2333 vif->addr);
2334
2335 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2336 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2337 ath_offchannel_next(sc);
2338 }
2339
2340out:
2341 mutex_unlock(&sc->mutex);
2342
2343 return ret;
2344}
2345
2346static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2347 struct ieee80211_vif *vif)
2348{
2349 struct ath_softc *sc = hw->priv;
2350 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2351
2352 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2353
2354 mutex_lock(&sc->mutex);
2355 del_timer_sync(&sc->offchannel.timer);
2356 ath_scan_complete(sc, true);
2357 mutex_unlock(&sc->mutex);
2358}
2359
2360static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2361 struct ieee80211_vif *vif,
2362 struct ieee80211_channel *chan, int duration,
2363 enum ieee80211_roc_type type)
2364{
2365 struct ath_softc *sc = hw->priv;
2366 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2367 int ret = 0;
2368
2369 mutex_lock(&sc->mutex);
2370
2371 if (WARN_ON(sc->offchannel.roc_vif)) {
2372 ret = -EBUSY;
2373 goto out;
2374 }
2375
2376 ath9k_ps_wakeup(sc);
2377 sc->offchannel.roc_vif = vif;
2378 sc->offchannel.roc_chan = chan;
2379 sc->offchannel.roc_duration = duration;
2380
2381 ath_dbg(common, CHAN_CTX,
2382 "RoC request on vif: %pM, type: %d duration: %d\n",
2383 vif->addr, type, duration);
2384
2385 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2386 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2387 ath_offchannel_next(sc);
2388 }
2389
2390out:
2391 mutex_unlock(&sc->mutex);
2392
2393 return ret;
2394}
2395
2396static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2397{
2398 struct ath_softc *sc = hw->priv;
2399 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2400
2401 mutex_lock(&sc->mutex);
2402
2403 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2404 del_timer_sync(&sc->offchannel.timer);
2405
2406 if (sc->offchannel.roc_vif) {
2407 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2408 ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2409 }
2410
2411 mutex_unlock(&sc->mutex);
2412
2413 return 0;
2414}
2415
2416static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2417 struct ieee80211_chanctx_conf *conf)
2418{
2419 struct ath_softc *sc = hw->priv;
2420 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2421 struct ath_chanctx *ctx, **ptr;
2422 int pos;
2423
2424 mutex_lock(&sc->mutex);
2425
2426 ath_for_each_chanctx(sc, ctx) {
2427 if (ctx->assigned)
2428 continue;
2429
2430 ptr = (void *) conf->drv_priv;
2431 *ptr = ctx;
2432 ctx->assigned = true;
2433 pos = ctx - &sc->chanctx[0];
2434 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2435
2436 ath_dbg(common, CHAN_CTX,
2437 "Add channel context: %d MHz\n",
2438 conf->def.chan->center_freq);
2439
2440 ath_chanctx_set_channel(sc, ctx, &conf->def);
2441
2442 mutex_unlock(&sc->mutex);
2443 return 0;
2444 }
2445
2446 mutex_unlock(&sc->mutex);
2447 return -ENOSPC;
2448}
2449
2450
2451static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2452 struct ieee80211_chanctx_conf *conf)
2453{
2454 struct ath_softc *sc = hw->priv;
2455 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2456 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2457
2458 mutex_lock(&sc->mutex);
2459
2460 ath_dbg(common, CHAN_CTX,
2461 "Remove channel context: %d MHz\n",
2462 conf->def.chan->center_freq);
2463
2464 ctx->assigned = false;
2465 ctx->hw_queue_base = 0;
2466 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2467
2468 mutex_unlock(&sc->mutex);
2469}
2470
2471static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2472 struct ieee80211_chanctx_conf *conf,
2473 u32 changed)
2474{
2475 struct ath_softc *sc = hw->priv;
2476 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2477 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2478
2479 mutex_lock(&sc->mutex);
2480 ath_dbg(common, CHAN_CTX,
2481 "Change channel context: %d MHz\n",
2482 conf->def.chan->center_freq);
2483 ath_chanctx_set_channel(sc, ctx, &conf->def);
2484 mutex_unlock(&sc->mutex);
2485}
2486
2487static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2488 struct ieee80211_vif *vif,
2489 struct ieee80211_chanctx_conf *conf)
2490{
2491 struct ath_softc *sc = hw->priv;
2492 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2493 struct ath_vif *avp = (void *)vif->drv_priv;
2494 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2495 int i;
2496
2497 ath9k_cancel_pending_offchannel(sc);
2498
2499 mutex_lock(&sc->mutex);
2500
2501 ath_dbg(common, CHAN_CTX,
2502 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2503 vif->addr, vif->type, vif->p2p,
2504 conf->def.chan->center_freq);
2505
2506 avp->chanctx = ctx;
2507 ctx->nvifs_assigned++;
2508 list_add_tail(&avp->list, &ctx->vifs);
2509 ath9k_calculate_summary_state(sc, ctx);
2510 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2511 vif->hw_queue[i] = ctx->hw_queue_base + i;
2512
2513 mutex_unlock(&sc->mutex);
2514
2515 return 0;
2516}
2517
2518static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2519 struct ieee80211_vif *vif,
2520 struct ieee80211_chanctx_conf *conf)
2521{
2522 struct ath_softc *sc = hw->priv;
2523 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2524 struct ath_vif *avp = (void *)vif->drv_priv;
2525 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2526 int ac;
2527
2528 ath9k_cancel_pending_offchannel(sc);
2529
2530 mutex_lock(&sc->mutex);
2531
2532 ath_dbg(common, CHAN_CTX,
2533 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2534 vif->addr, vif->type, vif->p2p,
2535 conf->def.chan->center_freq);
2536
2537 avp->chanctx = NULL;
2538 ctx->nvifs_assigned--;
2539 list_del(&avp->list);
2540 ath9k_calculate_summary_state(sc, ctx);
2541 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2542 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2543
2544 mutex_unlock(&sc->mutex);
2545}
2546
2547static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2548 struct ieee80211_vif *vif)
2549{
2550 struct ath_softc *sc = hw->priv;
2551 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2552 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2553 struct ath_beacon_config *cur_conf;
2554 struct ath_chanctx *go_ctx;
2555 unsigned long timeout;
2556 bool changed = false;
2557 u32 beacon_int;
2558
2559 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2560 return;
2561
2562 if (!avp->chanctx)
2563 return;
2564
2565 mutex_lock(&sc->mutex);
2566
2567 spin_lock_bh(&sc->chan_lock);
2568 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2569 changed = true;
2570 spin_unlock_bh(&sc->chan_lock);
2571
2572 if (!changed)
2573 goto out;
2574
2575 ath9k_cancel_pending_offchannel(sc);
2576
2577 go_ctx = ath_is_go_chanctx_present(sc);
2578
2579 if (go_ctx) {
2580
2581
2582
2583
2584 spin_lock_bh(&sc->chan_lock);
2585 sc->sched.mgd_prepare_tx = true;
2586 cur_conf = &go_ctx->beacon;
2587 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2588 spin_unlock_bh(&sc->chan_lock);
2589
2590 timeout = usecs_to_jiffies(beacon_int * 2);
2591 init_completion(&sc->go_beacon);
2592
2593 mutex_unlock(&sc->mutex);
2594
2595 if (wait_for_completion_timeout(&sc->go_beacon,
2596 timeout) == 0) {
2597 ath_dbg(common, CHAN_CTX,
2598 "Failed to send new NoA\n");
2599
2600 spin_lock_bh(&sc->chan_lock);
2601 sc->sched.mgd_prepare_tx = false;
2602 spin_unlock_bh(&sc->chan_lock);
2603 }
2604
2605 mutex_lock(&sc->mutex);
2606 }
2607
2608 ath_dbg(common, CHAN_CTX,
2609 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2610 __func__, vif->addr);
2611
2612 spin_lock_bh(&sc->chan_lock);
2613 sc->next_chan = avp->chanctx;
2614 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2615 spin_unlock_bh(&sc->chan_lock);
2616
2617 ath_chanctx_set_next(sc, true);
2618out:
2619 mutex_unlock(&sc->mutex);
2620}
2621
2622void ath9k_fill_chanctx_ops(void)
2623{
2624 if (!ath9k_is_chanctx_enabled())
2625 return;
2626
2627 ath9k_ops.hw_scan = ath9k_hw_scan;
2628 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2629 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2630 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2631 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2632 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2633 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2634 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2635 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2636 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2637}
2638
2639#endif
2640
2641static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2642 int *dbm)
2643{
2644 struct ath_softc *sc = hw->priv;
2645 struct ath_vif *avp = (void *)vif->drv_priv;
2646
2647 mutex_lock(&sc->mutex);
2648 if (avp->chanctx)
2649 *dbm = avp->chanctx->cur_txpower;
2650 else
2651 *dbm = sc->cur_chan->cur_txpower;
2652 mutex_unlock(&sc->mutex);
2653
2654 *dbm /= 2;
2655
2656 return 0;
2657}
2658
2659struct ieee80211_ops ath9k_ops = {
2660 .tx = ath9k_tx,
2661 .start = ath9k_start,
2662 .stop = ath9k_stop,
2663 .add_interface = ath9k_add_interface,
2664 .change_interface = ath9k_change_interface,
2665 .remove_interface = ath9k_remove_interface,
2666 .config = ath9k_config,
2667 .configure_filter = ath9k_configure_filter,
2668 .sta_state = ath9k_sta_state,
2669 .sta_notify = ath9k_sta_notify,
2670 .conf_tx = ath9k_conf_tx,
2671 .bss_info_changed = ath9k_bss_info_changed,
2672 .set_key = ath9k_set_key,
2673 .get_tsf = ath9k_get_tsf,
2674 .set_tsf = ath9k_set_tsf,
2675 .reset_tsf = ath9k_reset_tsf,
2676 .ampdu_action = ath9k_ampdu_action,
2677 .get_survey = ath9k_get_survey,
2678 .rfkill_poll = ath9k_rfkill_poll_state,
2679 .set_coverage_class = ath9k_set_coverage_class,
2680 .flush = ath9k_flush,
2681 .tx_frames_pending = ath9k_tx_frames_pending,
2682 .tx_last_beacon = ath9k_tx_last_beacon,
2683 .release_buffered_frames = ath9k_release_buffered_frames,
2684 .get_stats = ath9k_get_stats,
2685 .set_antenna = ath9k_set_antenna,
2686 .get_antenna = ath9k_get_antenna,
2687
2688#ifdef CONFIG_ATH9K_WOW
2689 .suspend = ath9k_suspend,
2690 .resume = ath9k_resume,
2691 .set_wakeup = ath9k_set_wakeup,
2692#endif
2693
2694#ifdef CONFIG_ATH9K_DEBUGFS
2695 .get_et_sset_count = ath9k_get_et_sset_count,
2696 .get_et_stats = ath9k_get_et_stats,
2697 .get_et_strings = ath9k_get_et_strings,
2698#endif
2699
2700#if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2701 .sta_add_debugfs = ath9k_sta_add_debugfs,
2702#endif
2703 .sw_scan_start = ath9k_sw_scan_start,
2704 .sw_scan_complete = ath9k_sw_scan_complete,
2705 .get_txpower = ath9k_get_txpower,
2706 .wake_tx_queue = ath9k_wake_tx_queue,
2707};
2708