1#include <linux/prefetch.h>
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13static inline unsigned int
14iommu_fill_pdir(struct ioc *ioc, struct scatterlist *startsg, int nents,
15 unsigned long hint,
16 void (*iommu_io_pdir_entry)(u64 *, space_t, unsigned long,
17 unsigned long))
18{
19 struct scatterlist *dma_sg = startsg;
20 unsigned int n_mappings = 0;
21 unsigned long dma_offset = 0, dma_len = 0;
22 u64 *pdirp = NULL;
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25
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27 dma_sg--;
28
29 while (nents-- > 0) {
30 unsigned long vaddr;
31 long size;
32
33 DBG_RUN_SG(" %d : %08lx/%05x %p/%05x\n", nents,
34 (unsigned long)sg_dma_address(startsg), cnt,
35 sg_virt(startsg), startsg->length
36 );
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43 if (sg_dma_address(startsg) & PIDE_FLAG) {
44 u32 pide = sg_dma_address(startsg) & ~PIDE_FLAG;
45
46 BUG_ON(pdirp && (dma_len != sg_dma_len(dma_sg)));
47
48 dma_sg++;
49
50 dma_len = sg_dma_len(startsg);
51 sg_dma_len(startsg) = 0;
52 dma_offset = (unsigned long) pide & ~IOVP_MASK;
53 n_mappings++;
54#if defined(ZX1_SUPPORT)
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56 sg_dma_address(dma_sg) = pide | ioc->ibase;
57#else
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59
60
61 sg_dma_address(dma_sg) = pide;
62#endif
63 pdirp = &(ioc->pdir_base[pide >> IOVP_SHIFT]);
64 prefetchw(pdirp);
65 }
66
67 BUG_ON(pdirp == NULL);
68
69 vaddr = (unsigned long)sg_virt(startsg);
70 sg_dma_len(dma_sg) += startsg->length;
71 size = startsg->length + dma_offset;
72 dma_offset = 0;
73#ifdef IOMMU_MAP_STATS
74 ioc->msg_pages += startsg->length >> IOVP_SHIFT;
75#endif
76 do {
77 iommu_io_pdir_entry(pdirp, KERNEL_SPACE,
78 vaddr, hint);
79 vaddr += IOVP_SIZE;
80 size -= IOVP_SIZE;
81 pdirp++;
82 } while(unlikely(size > 0));
83 startsg++;
84 }
85 return(n_mappings);
86}
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98
99static inline unsigned int
100iommu_coalesce_chunks(struct ioc *ioc, struct device *dev,
101 struct scatterlist *startsg, int nents,
102 int (*iommu_alloc_range)(struct ioc *, struct device *, size_t))
103{
104 struct scatterlist *contig_sg;
105 unsigned long dma_offset, dma_len;
106 unsigned int n_mappings = 0;
107 unsigned int max_seg_size = min(dma_get_max_seg_size(dev),
108 (unsigned)DMA_CHUNK_SIZE);
109 unsigned int max_seg_boundary = dma_get_seg_boundary(dev) + 1;
110 if (max_seg_boundary)
111 max_seg_size = min(max_seg_size, max_seg_boundary);
112
113 while (nents > 0) {
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118 contig_sg = startsg;
119 dma_len = startsg->length;
120 dma_offset = startsg->offset;
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122
123 sg_dma_address(startsg) = 0;
124 sg_dma_len(startsg) = 0;
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129
130 while(--nents > 0) {
131 unsigned long prev_end, sg_start;
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133 prev_end = (unsigned long)sg_virt(startsg) +
134 startsg->length;
135
136 startsg++;
137 sg_start = (unsigned long)sg_virt(startsg);
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140 sg_dma_address(startsg) = 0;
141 sg_dma_len(startsg) = 0;
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148 if (unlikely(ALIGN(dma_len + dma_offset + startsg->length, IOVP_SIZE) >
149 max_seg_size))
150 break;
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157
158 if (unlikely((prev_end != sg_start) ||
159 ((prev_end | sg_start) & ~PAGE_MASK)))
160 break;
161
162 dma_len += startsg->length;
163 }
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170 sg_dma_len(contig_sg) = dma_len;
171 dma_len = ALIGN(dma_len + dma_offset, IOVP_SIZE);
172 sg_dma_address(contig_sg) =
173 PIDE_FLAG
174 | (iommu_alloc_range(ioc, dev, dma_len) << IOVP_SHIFT)
175 | dma_offset;
176 n_mappings++;
177 }
178
179 return n_mappings;
180}
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182