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20#ifndef _BEISCSI_MAIN_
21#define _BEISCSI_MAIN_
22
23#include <linux/kernel.h>
24#include <linux/pci.h>
25#include <linux/if_ether.h>
26#include <linux/in.h>
27#include <linux/ctype.h>
28#include <linux/module.h>
29#include <linux/aer.h>
30#include <scsi/scsi.h>
31#include <scsi/scsi_cmnd.h>
32#include <scsi/scsi_device.h>
33#include <scsi/scsi_host.h>
34#include <scsi/iscsi_proto.h>
35#include <scsi/libiscsi.h>
36#include <scsi/scsi_transport_iscsi.h>
37
38#define DRV_NAME "be2iscsi"
39#define BUILD_STR "11.2.0.0"
40#define BE_NAME "Emulex OneConnect" \
41 "Open-iSCSI Driver version" BUILD_STR
42#define DRV_DESC BE_NAME " " "Driver"
43
44#define BE_VENDOR_ID 0x19A2
45#define ELX_VENDOR_ID 0x10DF
46
47#define BE_DEVICE_ID1 0x212
48#define OC_DEVICE_ID1 0x702
49#define OC_DEVICE_ID2 0x703
50
51
52#define BE_DEVICE_ID2 0x222
53#define OC_DEVICE_ID3 0x712
54
55
56#define OC_SKH_ID1 0x722
57
58#define BE2_IO_DEPTH 1024
59#define BE2_MAX_SESSIONS 256
60#define BE2_CMDS_PER_CXN 128
61#define BE2_TMFS 16
62#define BE2_NOPOUT_REQ 16
63#define BE2_SGE 32
64#define BE2_DEFPDU_HDR_SZ 64
65#define BE2_DEFPDU_DATA_SZ 8192
66#define BE2_MAX_NUM_CQ_PROC 512
67
68#define MAX_CPUS 64
69#define BEISCSI_MAX_NUM_CPUS 7
70
71#define BEISCSI_VER_STRLEN 32
72
73#define BEISCSI_SGLIST_ELEMENTS 30
74
75#define BEISCSI_CMD_PER_LUN 128
76#define BEISCSI_MAX_SECTORS 1024
77#define BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE 128
78
79#define BEISCSI_MAX_CMD_LEN 16
80#define BEISCSI_NUM_MAX_LUN 256
81#define BEISCSI_NUM_DEVICES_SUPPORTED 0x01
82#define BEISCSI_MAX_FRAGS_INIT 192
83#define BE_NUM_MSIX_ENTRIES 1
84
85#define BE_SENSE_INFO_SIZE 258
86#define BE_ISCSI_PDU_HEADER_SIZE 64
87#define BE_MIN_MEM_SIZE 16384
88#define MAX_CMD_SZ 65536
89#define IIOC_SCSI_DATA 0x05
90
91
92
93
94
95
96#define HWI_GET_ASYNC_PDU_CTX(phwi, ulp_num) \
97 (phwi->phwi_ctxt->pasync_ctx[ulp_num])
98
99
100#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
101
102
103
104
105
106
107
108#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29)
109
110
111#define CEV_ISR0_OFFSET 0xC18
112#define CEV_ISR_SIZE 4
113
114
115
116
117
118
119#define DB_TXULP0_OFFSET 0x40
120#define DB_RXULP0_OFFSET 0xA0
121
122#define DB_EQ_OFFSET DB_CQ_OFFSET
123#define DB_EQ_RING_ID_LOW_MASK 0x1FF
124
125#define DB_EQ_CLR_SHIFT (9)
126
127#define DB_EQ_EVNT_SHIFT (10)
128
129#define DB_EQ_RING_ID_HIGH_MASK 0x1F
130#define DB_EQ_HIGH_SET_SHIFT 11
131#define DB_EQ_HIGH_FEILD_SHIFT 9
132
133#define DB_EQ_NUM_POPPED_SHIFT (16)
134
135#define DB_EQ_REARM_SHIFT (29)
136
137
138#define DB_CQ_OFFSET 0x120
139#define DB_CQ_RING_ID_LOW_MASK 0x3FF
140
141#define DB_CQ_RING_ID_HIGH_MASK 0x1F
142#define DB_CQ_HIGH_SET_SHIFT 11
143#define DB_CQ_HIGH_FEILD_SHIFT 10
144
145
146#define DB_CQ_NUM_POPPED_SHIFT (16)
147
148#define DB_CQ_REARM_SHIFT (29)
149
150#define GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr)
151#define HWI_GET_DEF_BUFQ_ID(pc, ulp_num) (((struct hwi_controller *)\
152 (GET_HWI_CONTROLLER_WS(pc)))->default_pdu_data[ulp_num].id)
153#define HWI_GET_DEF_HDRQ_ID(pc, ulp_num) (((struct hwi_controller *)\
154 (GET_HWI_CONTROLLER_WS(pc)))->default_pdu_hdr[ulp_num].id)
155
156#define PAGES_REQUIRED(x) \
157 ((x < PAGE_SIZE) ? 1 : ((x + PAGE_SIZE - 1) / PAGE_SIZE))
158
159#define BEISCSI_MSI_NAME 20
160
161#define MEM_DESCR_OFFSET 8
162#define BEISCSI_DEFQ_HDR 1
163#define BEISCSI_DEFQ_DATA 0
164enum be_mem_enum {
165 HWI_MEM_ADDN_CONTEXT,
166 HWI_MEM_WRB,
167 HWI_MEM_WRBH,
168 HWI_MEM_SGLH,
169 HWI_MEM_SGE,
170 HWI_MEM_TEMPLATE_HDR_ULP0,
171 HWI_MEM_ASYNC_HEADER_BUF_ULP0,
172 HWI_MEM_ASYNC_DATA_BUF_ULP0,
173 HWI_MEM_ASYNC_HEADER_RING_ULP0,
174 HWI_MEM_ASYNC_DATA_RING_ULP0,
175 HWI_MEM_ASYNC_HEADER_HANDLE_ULP0,
176 HWI_MEM_ASYNC_DATA_HANDLE_ULP0,
177 HWI_MEM_ASYNC_PDU_CONTEXT_ULP0,
178 HWI_MEM_TEMPLATE_HDR_ULP1,
179 HWI_MEM_ASYNC_HEADER_BUF_ULP1,
180 HWI_MEM_ASYNC_DATA_BUF_ULP1,
181 HWI_MEM_ASYNC_HEADER_RING_ULP1,
182 HWI_MEM_ASYNC_DATA_RING_ULP1,
183 HWI_MEM_ASYNC_HEADER_HANDLE_ULP1,
184 HWI_MEM_ASYNC_DATA_HANDLE_ULP1,
185 HWI_MEM_ASYNC_PDU_CONTEXT_ULP1,
186 ISCSI_MEM_GLOBAL_HEADER,
187 SE_MEM_MAX
188};
189
190struct be_bus_address32 {
191 unsigned int address_lo;
192 unsigned int address_hi;
193};
194
195struct be_bus_address64 {
196 unsigned long long address;
197};
198
199struct be_bus_address {
200 union {
201 struct be_bus_address32 a32;
202 struct be_bus_address64 a64;
203 } u;
204};
205
206struct mem_array {
207 struct be_bus_address bus_address;
208 void *virtual_address;
209 unsigned int size;
210};
211
212struct be_mem_descriptor {
213 unsigned int index;
214 unsigned int category;
215 unsigned int num_elements;
216
217
218 unsigned int alignment_mask;
219 unsigned int size_in_bytes;
220 struct mem_array *mem_array;
221};
222
223struct sgl_handle {
224 unsigned int sgl_index;
225 unsigned int type;
226 unsigned int cid;
227 struct iscsi_task *task;
228 struct iscsi_sge *pfrag;
229};
230
231struct hba_parameters {
232 unsigned int ios_per_ctrl;
233 unsigned int cxns_per_ctrl;
234 unsigned int asyncpdus_per_ctrl;
235 unsigned int icds_per_ctrl;
236 unsigned int num_sge_per_io;
237 unsigned int defpdu_hdr_sz;
238 unsigned int defpdu_data_sz;
239 unsigned int num_cq_entries;
240 unsigned int num_eq_entries;
241 unsigned int wrbs_per_cxn;
242 unsigned int crashmode;
243 unsigned int hba_num;
244
245 unsigned int mgmt_ws_sz;
246 unsigned int hwi_ws_sz;
247
248 unsigned int eto;
249 unsigned int ldto;
250
251 unsigned int dbg_flags;
252 unsigned int num_cxn;
253
254 unsigned int eq_timer;
255
256
257
258
259 unsigned int num_mcc_pages;
260 unsigned int num_mcc_cq_pages;
261 unsigned int num_cq_pages;
262 unsigned int num_eq_pages;
263
264 unsigned int num_async_pdu_buf_pages;
265 unsigned int num_async_pdu_buf_sgl_pages;
266 unsigned int num_async_pdu_buf_cq_pages;
267
268 unsigned int num_async_pdu_hdr_pages;
269 unsigned int num_async_pdu_hdr_sgl_pages;
270 unsigned int num_async_pdu_hdr_cq_pages;
271
272 unsigned int num_sge;
273};
274
275struct invalidate_command_table {
276 unsigned short icd;
277 unsigned short cid;
278} __packed;
279
280#define BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cri) \
281 (phwi_ctrlr->wrb_context[cri].ulp_num)
282struct hwi_wrb_context {
283 spinlock_t wrb_lock;
284 struct list_head wrb_handle_list;
285 struct list_head wrb_handle_drvr_list;
286 struct wrb_handle **pwrb_handle_base;
287 struct wrb_handle **pwrb_handle_basestd;
288 struct iscsi_wrb *plast_wrb;
289 unsigned short alloc_index;
290 unsigned short free_index;
291 unsigned short wrb_handles_available;
292 unsigned short cid;
293 uint8_t ulp_num;
294 uint16_t register_set;
295 uint16_t doorbell_format;
296 uint32_t doorbell_offset;
297};
298
299struct ulp_cid_info {
300 unsigned short *cid_array;
301 unsigned short avlbl_cids;
302 unsigned short cid_alloc;
303 unsigned short cid_free;
304};
305
306#include "be.h"
307#define chip_be2(phba) (phba->generation == BE_GEN2)
308#define chip_be3_r(phba) (phba->generation == BE_GEN3)
309#define is_chip_be2_be3r(phba) (chip_be3_r(phba) || (chip_be2(phba)))
310
311#define BEISCSI_ULP0 0
312#define BEISCSI_ULP1 1
313#define BEISCSI_ULP_COUNT 2
314#define BEISCSI_ULP0_LOADED 0x01
315#define BEISCSI_ULP1_LOADED 0x02
316
317#define BEISCSI_ULP_AVLBL_CID(phba, ulp_num) \
318 (((struct ulp_cid_info *)phba->cid_array_info[ulp_num])->avlbl_cids)
319#define BEISCSI_ULP0_AVLBL_CID(phba) \
320 BEISCSI_ULP_AVLBL_CID(phba, BEISCSI_ULP0)
321#define BEISCSI_ULP1_AVLBL_CID(phba) \
322 BEISCSI_ULP_AVLBL_CID(phba, BEISCSI_ULP1)
323
324struct beiscsi_hba {
325 struct hba_parameters params;
326 struct hwi_controller *phwi_ctrlr;
327 unsigned int mem_req[SE_MEM_MAX];
328
329 u8 __iomem *csr_va;
330 u8 __iomem *db_va;
331 u8 __iomem *pci_va;
332 struct be_bus_address csr_pa;
333 struct be_bus_address db_pa;
334 struct be_bus_address pci_pa;
335
336 struct pci_dev *pcidev;
337 unsigned short asic_revision;
338 unsigned int num_cpus;
339 unsigned int nxt_cqid;
340 struct msix_entry msix_entries[MAX_CPUS];
341 char *msi_name[MAX_CPUS];
342 bool msix_enabled;
343 struct be_mem_descriptor *init_mem;
344
345 unsigned short io_sgl_alloc_index;
346 unsigned short io_sgl_free_index;
347 unsigned short io_sgl_hndl_avbl;
348 struct sgl_handle **io_sgl_hndl_base;
349 struct sgl_handle **sgl_hndl_array;
350
351 unsigned short eh_sgl_alloc_index;
352 unsigned short eh_sgl_free_index;
353 unsigned short eh_sgl_hndl_avbl;
354 struct sgl_handle **eh_sgl_hndl_base;
355 spinlock_t io_sgl_lock;
356 spinlock_t mgmt_sgl_lock;
357 spinlock_t async_pdu_lock;
358 unsigned int age;
359 struct list_head hba_queue;
360#define BE_MAX_SESSION 2048
361#define BE_SET_CID_TO_CRI(cri_index, cid) \
362 (phba->cid_to_cri_map[cid] = cri_index)
363#define BE_GET_CRI_FROM_CID(cid) (phba->cid_to_cri_map[cid])
364 unsigned short cid_to_cri_map[BE_MAX_SESSION];
365 struct ulp_cid_info *cid_array_info[BEISCSI_ULP_COUNT];
366 struct iscsi_endpoint **ep_array;
367 struct beiscsi_conn **conn_table;
368 struct Scsi_Host *shost;
369 struct iscsi_iface *ipv4_iface;
370 struct iscsi_iface *ipv6_iface;
371 struct {
372
373
374
375
376#define BEISCSI_PHYS_PORT_MAX 4
377 unsigned int phys_port;
378
379 unsigned int eqid_count;
380 unsigned int cqid_count;
381 unsigned int iscsi_cid_start[BEISCSI_ULP_COUNT];
382#define BEISCSI_GET_CID_COUNT(phba, ulp_num) \
383 (phba->fw_config.iscsi_cid_count[ulp_num])
384 unsigned int iscsi_cid_count[BEISCSI_ULP_COUNT];
385 unsigned int iscsi_icd_count[BEISCSI_ULP_COUNT];
386 unsigned int iscsi_icd_start[BEISCSI_ULP_COUNT];
387 unsigned int iscsi_chain_start[BEISCSI_ULP_COUNT];
388 unsigned int iscsi_chain_count[BEISCSI_ULP_COUNT];
389
390 unsigned short iscsi_features;
391 uint16_t dual_ulp_aware;
392 unsigned long ulp_supported;
393 } fw_config;
394
395 unsigned long state;
396#define BEISCSI_HBA_ONLINE 0
397#define BEISCSI_HBA_LINK_UP 1
398#define BEISCSI_HBA_BOOT_FOUND 2
399#define BEISCSI_HBA_BOOT_WORK 3
400#define BEISCSI_HBA_UER_SUPP 4
401#define BEISCSI_HBA_PCI_ERR 5
402#define BEISCSI_HBA_FW_TIMEOUT 6
403#define BEISCSI_HBA_IN_UE 7
404#define BEISCSI_HBA_IN_TPE 8
405
406
407#define BEISCSI_HBA_IN_ERR ((1 << BEISCSI_HBA_PCI_ERR) | \
408 (1 << BEISCSI_HBA_FW_TIMEOUT) | \
409 (1 << BEISCSI_HBA_IN_UE) | \
410 (1 << BEISCSI_HBA_IN_TPE))
411
412 u8 optic_state;
413 struct delayed_work eqd_update;
414
415#define BEISCSI_EQD_UPDATE_INTERVAL 1000
416 struct timer_list hw_check;
417
418#define BEISCSI_UE_DETECT_INTERVAL 1000
419 u32 ue2rp;
420 struct delayed_work recover_port;
421 struct work_struct sess_work;
422
423 bool mac_addr_set;
424 u8 mac_address[ETH_ALEN];
425 u8 port_name;
426 u8 port_speed;
427 char fw_ver_str[BEISCSI_VER_STRLEN];
428 char wq_name[20];
429 struct workqueue_struct *wq;
430 struct be_ctrl_info ctrl;
431 unsigned int generation;
432 unsigned int interface_handle;
433 struct invalidate_command_table inv_tbl[128];
434
435 struct be_aic_obj aic_obj[MAX_CPUS];
436 unsigned int attr_log_enable;
437 int (*iotask_fn)(struct iscsi_task *,
438 struct scatterlist *sg,
439 uint32_t num_sg, uint32_t xferlen,
440 uint32_t writedir);
441 struct boot_struct {
442 int retry;
443 unsigned int tag;
444 unsigned int s_handle;
445 struct be_dma_mem nonemb_cmd;
446 enum {
447 BEISCSI_BOOT_REOPEN_SESS = 1,
448 BEISCSI_BOOT_GET_SHANDLE,
449 BEISCSI_BOOT_GET_SINFO,
450 BEISCSI_BOOT_LOGOUT_SESS,
451 BEISCSI_BOOT_CREATE_KSET,
452 } action;
453 struct mgmt_session_info boot_sess;
454 struct iscsi_boot_kset *boot_kset;
455 } boot_struct;
456 struct work_struct boot_work;
457};
458
459#define beiscsi_hba_in_error(phba) ((phba)->state & BEISCSI_HBA_IN_ERR)
460#define beiscsi_hba_is_online(phba) \
461 (!beiscsi_hba_in_error((phba)) && \
462 test_bit(BEISCSI_HBA_ONLINE, &phba->state))
463
464struct beiscsi_session {
465 struct pci_pool *bhs_pool;
466};
467
468
469
470
471struct beiscsi_conn {
472 struct iscsi_conn *conn;
473 struct beiscsi_hba *phba;
474 u32 exp_statsn;
475 u32 doorbell_offset;
476 u32 beiscsi_conn_cid;
477 struct beiscsi_endpoint *ep;
478 unsigned short login_in_progress;
479 struct wrb_handle *plogin_wrb_handle;
480 struct sgl_handle *plogin_sgl_handle;
481 struct beiscsi_session *beiscsi_sess;
482 struct iscsi_task *task;
483};
484
485
486struct pdu_data_out {
487 u32 dw[12];
488};
489
490
491
492
493struct amap_pdu_data_out {
494 u8 opcode[6];
495 u8 rsvd0[2];
496 u8 rsvd1[7];
497 u8 final_bit;
498 u8 rsvd2[16];
499 u8 ahs_length[8];
500 u8 data_len_hi[8];
501 u8 data_len_lo[16];
502 u8 lun[64];
503 u8 itt[32];
504 u8 ttt[32];
505 u8 rsvd3[32];
506 u8 exp_stat_sn[32];
507 u8 rsvd4[32];
508 u8 data_sn[32];
509 u8 buffer_offset[32];
510 u8 rsvd5[32];
511};
512
513struct be_cmd_bhs {
514 struct iscsi_scsi_req iscsi_hdr;
515 unsigned char pad1[16];
516 struct pdu_data_out iscsi_data_pdu;
517 unsigned char pad2[BE_SENSE_INFO_SIZE -
518 sizeof(struct pdu_data_out)];
519};
520
521struct beiscsi_io_task {
522 struct wrb_handle *pwrb_handle;
523 struct sgl_handle *psgl_handle;
524 struct beiscsi_conn *conn;
525 struct scsi_cmnd *scsi_cmnd;
526 int num_sg;
527 struct hwi_wrb_context *pwrb_context;
528 unsigned int cmd_sn;
529 unsigned int flags;
530 unsigned short cid;
531 unsigned short header_len;
532 itt_t libiscsi_itt;
533 struct be_cmd_bhs *cmd_bhs;
534 struct be_bus_address bhs_pa;
535 unsigned short bhs_len;
536 dma_addr_t mtask_addr;
537 uint32_t mtask_data_count;
538 uint8_t wrb_type;
539};
540
541struct be_nonio_bhs {
542 struct iscsi_hdr iscsi_hdr;
543 unsigned char pad1[16];
544 struct pdu_data_out iscsi_data_pdu;
545 unsigned char pad2[BE_SENSE_INFO_SIZE -
546 sizeof(struct pdu_data_out)];
547};
548
549struct be_status_bhs {
550 struct iscsi_scsi_req iscsi_hdr;
551 unsigned char pad1[16];
552
553
554
555
556 unsigned char sense_info[BE_SENSE_INFO_SIZE];
557};
558
559struct iscsi_sge {
560 u32 dw[4];
561};
562
563
564
565
566
567struct amap_iscsi_sge {
568 u8 addr_hi[32];
569 u8 addr_lo[32];
570 u8 sge_offset[22];
571 u8 rsvd0[9];
572 u8 last_sge;
573 u8 len[17];
574 u8 rsvd1[15];
575};
576
577struct beiscsi_offload_params {
578 u32 dw[6];
579};
580
581#define OFFLD_PARAMS_ERL 0x00000003
582#define OFFLD_PARAMS_DDE 0x00000004
583#define OFFLD_PARAMS_HDE 0x00000008
584#define OFFLD_PARAMS_IR2T 0x00000010
585#define OFFLD_PARAMS_IMD 0x00000020
586#define OFFLD_PARAMS_DATA_SEQ_INORDER 0x00000040
587#define OFFLD_PARAMS_PDU_SEQ_INORDER 0x00000080
588#define OFFLD_PARAMS_MAX_R2T 0x00FFFF00
589
590
591
592
593
594struct amap_beiscsi_offload_params {
595 u8 max_burst_length[32];
596 u8 max_send_data_segment_length[32];
597 u8 first_burst_length[32];
598 u8 erl[2];
599 u8 dde[1];
600 u8 hde[1];
601 u8 ir2t[1];
602 u8 imd[1];
603 u8 data_seq_inorder[1];
604 u8 pdu_seq_inorder[1];
605 u8 max_r2t[16];
606 u8 pad[8];
607 u8 exp_statsn[32];
608 u8 max_recv_data_segment_length[32];
609};
610
611struct hd_async_handle {
612 struct list_head link;
613 struct be_bus_address pa;
614 void *pbuffer;
615 u32 buffer_len;
616 u16 index;
617 u16 cri;
618 u8 is_header;
619 u8 is_final;
620};
621
622
623
624
625
626
627
628
629
630struct hd_async_entry {
631 struct cri_wait_queue {
632 unsigned short hdr_len;
633 unsigned int bytes_received;
634 unsigned int bytes_needed;
635 struct list_head list;
636 } wq;
637
638 struct hd_async_handle *header;
639 struct hd_async_handle *data;
640};
641
642struct hd_async_buf_context {
643 struct be_bus_address pa_base;
644 void *va_base;
645 void *ring_base;
646 struct hd_async_handle *handle_base;
647 u16 free_entries;
648 u32 buffer_size;
649
650
651
652
653
654 struct list_head free_list;
655};
656
657
658
659
660struct hd_async_context {
661 struct hd_async_buf_context async_header;
662 struct hd_async_buf_context async_data;
663 u16 num_entries;
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678#define BE_GET_ASYNC_CRI_FROM_CID(cid) (pasync_ctx->cid_to_async_cri_map[cid])
679 unsigned short cid_to_async_cri_map[BE_MAX_SESSION];
680
681
682
683 struct hd_async_entry *async_entry;
684};
685
686struct i_t_dpdu_cqe {
687 u32 dw[4];
688} __packed;
689
690
691
692
693
694struct amap_i_t_dpdu_cqe {
695 u8 db_addr_hi[32];
696 u8 db_addr_lo[32];
697 u8 code[6];
698 u8 cid[10];
699 u8 dpl[16];
700 u8 index[16];
701 u8 num_cons[10];
702 u8 rsvd0[4];
703 u8 final;
704 u8 valid;
705} __packed;
706
707struct amap_i_t_dpdu_cqe_v2 {
708 u8 db_addr_hi[32];
709 u8 db_addr_lo[32];
710 u8 code[6];
711 u8 num_cons;
712 u8 rsvd0[8];
713 u8 dpl[17];
714 u8 index[16];
715 u8 cid[13];
716 u8 rsvd1;
717 u8 final;
718 u8 valid;
719} __packed;
720
721#define CQE_VALID_MASK 0x80000000
722#define CQE_CODE_MASK 0x0000003F
723#define CQE_CID_MASK 0x0000FFC0
724
725#define EQE_VALID_MASK 0x00000001
726#define EQE_MAJORCODE_MASK 0x0000000E
727#define EQE_RESID_MASK 0xFFFF0000
728
729struct be_eq_entry {
730 u32 dw[1];
731} __packed;
732
733
734
735
736
737struct amap_eq_entry {
738 u8 valid;
739 u8 major_code[3];
740 u8 minor_code[12];
741 u8 resource_id[16];
742
743} __packed;
744
745struct cq_db {
746 u32 dw[1];
747} __packed;
748
749
750
751
752
753struct amap_cq_db {
754 u8 qid[10];
755 u8 event[1];
756 u8 rsvd0[5];
757 u8 num_popped[13];
758 u8 rearm[1];
759 u8 rsvd1[2];
760} __packed;
761
762void beiscsi_process_eq(struct beiscsi_hba *phba);
763
764struct iscsi_wrb {
765 u32 dw[16];
766} __packed;
767
768#define WRB_TYPE_MASK 0xF0000000
769#define SKH_WRB_TYPE_OFFSET 27
770#define BE_WRB_TYPE_OFFSET 28
771
772#define ADAPTER_SET_WRB_TYPE(pwrb, wrb_type, type_offset) \
773 (pwrb->dw[0] |= (wrb_type << type_offset))
774
775
776
777
778
779struct amap_iscsi_wrb {
780 u8 lun[14];
781 u8 lt;
782 u8 invld;
783 u8 wrb_idx[8];
784 u8 dsp;
785 u8 dmsg;
786 u8 undr_run;
787 u8 over_run;
788 u8 type[4];
789 u8 ptr2nextwrb[8];
790 u8 r2t_exp_dtl[24];
791 u8 sgl_icd_idx[12];
792 u8 rsvd0[20];
793 u8 exp_data_sn[32];
794 u8 iscsi_bhs_addr_hi[32];
795 u8 iscsi_bhs_addr_lo[32];
796 u8 cmdsn_itt[32];
797 u8 dif_ref_tag[32];
798 u8 sge0_addr_hi[32];
799 u8 sge0_addr_lo[32];
800 u8 sge0_offset[22];
801 u8 pbs;
802 u8 dif_mode[2];
803 u8 rsvd1[6];
804 u8 sge0_last;
805 u8 sge0_len[17];
806 u8 dif_meta_tag[14];
807 u8 sge0_in_ddr;
808 u8 sge1_addr_hi[32];
809 u8 sge1_addr_lo[32];
810 u8 sge1_r2t_offset[22];
811 u8 rsvd2[9];
812 u8 sge1_last;
813 u8 sge1_len[17];
814 u8 ref_sgl_icd_idx[12];
815 u8 rsvd3[2];
816 u8 sge1_in_ddr;
817
818} __packed;
819
820struct amap_iscsi_wrb_v2 {
821 u8 r2t_exp_dtl[25];
822 u8 rsvd0[2];
823 u8 type[5];
824 u8 ptr2nextwrb[8];
825 u8 wrb_idx[8];
826 u8 lun[16];
827 u8 sgl_idx[16];
828 u8 ref_sgl_icd_idx[16];
829 u8 exp_data_sn[32];
830 u8 iscsi_bhs_addr_hi[32];
831 u8 iscsi_bhs_addr_lo[32];
832 u8 cq_id[16];
833 u8 rsvd1[16];
834 u8 cmdsn_itt[32];
835 u8 sge0_addr_hi[32];
836 u8 sge0_addr_lo[32];
837 u8 sge0_offset[24];
838 u8 rsvd2[7];
839 u8 sge0_last;
840 u8 sge0_len[17];
841 u8 rsvd3[7];
842 u8 diff_enbl;
843 u8 u_run;
844 u8 o_run;
845 u8 invalid;
846 u8 dsp;
847 u8 dmsg;
848 u8 rsvd4;
849 u8 lt;
850 u8 sge1_addr_hi[32];
851 u8 sge1_addr_lo[32];
852 u8 sge1_r2t_offset[24];
853 u8 rsvd5[7];
854 u8 sge1_last;
855 u8 sge1_len[17];
856 u8 rsvd6[15];
857} __packed;
858
859
860struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
861 struct hwi_wrb_context **pcontext);
862void
863free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle);
864
865void beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
866 struct iscsi_task *task);
867
868void hwi_ring_cq_db(struct beiscsi_hba *phba,
869 unsigned int id, unsigned int num_processed,
870 unsigned char rearm);
871
872unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget);
873void beiscsi_process_mcc_cq(struct beiscsi_hba *phba);
874
875struct pdu_nop_out {
876 u32 dw[12];
877};
878
879
880
881
882
883struct amap_pdu_nop_out {
884 u8 opcode[6];
885 u8 i_bit;
886 u8 x_bit;
887 u8 fp_bit_filler1[7];
888 u8 f_bit;
889 u8 reserved1[16];
890 u8 ahs_length[8];
891 u8 data_len_hi[8];
892 u8 data_len_lo[16];
893 u8 lun[64];
894 u8 itt[32];
895 u8 ttt[32];
896 u8 cmd_sn[32];
897 u8 exp_stat_sn[32];
898 u8 reserved5[128];
899};
900
901#define PDUBASE_OPCODE_MASK 0x0000003F
902#define PDUBASE_DATALENHI_MASK 0x0000FF00
903#define PDUBASE_DATALENLO_MASK 0xFFFF0000
904
905struct pdu_base {
906 u32 dw[16];
907} __packed;
908
909
910
911
912
913struct amap_pdu_base {
914 u8 opcode[6];
915 u8 i_bit;
916 u8 x_bit;
917 u8 reserved1[24];
918 u8 ahs_length[8];
919 u8 data_len_hi[8];
920 u8 data_len_lo[16];
921 u8 lun[64];
922 u8 itt[32];
923 u8 reserved4[224];
924};
925
926struct iscsi_target_context_update_wrb {
927 u32 dw[16];
928} __packed;
929
930
931
932
933
934#define BE_TGT_CTX_UPDT_CMD 0x07
935struct amap_iscsi_target_context_update_wrb {
936 u8 lun[14];
937 u8 lt;
938 u8 invld;
939 u8 wrb_idx[8];
940 u8 dsp;
941 u8 dmsg;
942 u8 undr_run;
943 u8 over_run;
944 u8 type[4];
945 u8 ptr2nextwrb[8];
946 u8 max_burst_length[19];
947 u8 rsvd0[5];
948 u8 rsvd1[15];
949 u8 max_send_data_segment_length[17];
950 u8 first_burst_length[14];
951 u8 rsvd2[2];
952 u8 tx_wrbindex_drv_msg[8];
953 u8 rsvd3[5];
954 u8 session_state[3];
955 u8 rsvd4[16];
956 u8 tx_jumbo;
957 u8 hde;
958 u8 dde;
959 u8 erl[2];
960 u8 domain_id[5];
961 u8 mode;
962 u8 imd;
963 u8 ir2t;
964 u8 notpredblq[2];
965 u8 compltonack;
966 u8 stat_sn[32];
967 u8 pad_buffer_addr_hi[32];
968 u8 pad_buffer_addr_lo[32];
969 u8 pad_addr_hi[32];
970 u8 pad_addr_lo[32];
971 u8 rsvd5[32];
972 u8 rsvd6[32];
973 u8 rsvd7[32];
974 u8 rsvd8[32];
975 u8 rsvd9[32];
976 u8 rsvd10[32];
977
978} __packed;
979
980#define BEISCSI_MAX_RECV_DATASEG_LEN (64 * 1024)
981#define BEISCSI_MAX_CXNS 1
982struct amap_iscsi_target_context_update_wrb_v2 {
983 u8 max_burst_length[24];
984 u8 rsvd0[3];
985 u8 type[5];
986 u8 ptr2nextwrb[8];
987 u8 wrb_idx[8];
988 u8 rsvd1[16];
989 u8 max_send_data_segment_length[24];
990 u8 rsvd2[8];
991 u8 first_burst_length[24];
992 u8 rsvd3[8];
993 u8 max_r2t[16];
994 u8 rsvd4;
995 u8 hde;
996 u8 dde;
997 u8 erl[2];
998 u8 rsvd5[6];
999 u8 imd;
1000 u8 ir2t;
1001 u8 rsvd6[3];
1002 u8 stat_sn[32];
1003 u8 rsvd7[32];
1004 u8 rsvd8[32];
1005 u8 max_recv_dataseg_len[24];
1006 u8 rsvd9[8];
1007 u8 rsvd10[32];
1008 u8 rsvd11[32];
1009 u8 max_cxns[16];
1010 u8 rsvd12[11];
1011 u8 invld;
1012 u8 rsvd13;
1013 u8 dmsg;
1014 u8 data_seq_inorder;
1015 u8 pdu_seq_inorder;
1016 u8 rsvd14[32];
1017 u8 rsvd15[32];
1018 u8 rsvd16[32];
1019 u8 rsvd17[32];
1020} __packed;
1021
1022
1023struct be_ring {
1024 u32 pages;
1025 u32 id;
1026 u32 num;
1027 u32 cidx;
1028 u32 pidx;
1029 u32 item_size;
1030 u8 ulp_num;
1031 u16 register_set;
1032 u16 doorbell_format;
1033 u32 doorbell_offset;
1034
1035 void *va;
1036
1037
1038
1039};
1040
1041struct hwi_controller {
1042 struct list_head io_sgl_list;
1043 struct list_head eh_sgl_list;
1044 struct sgl_handle *psgl_handle_base;
1045 unsigned int wrb_mem_index;
1046
1047 struct hwi_wrb_context *wrb_context;
1048 struct mcc_wrb *pmcc_wrb_base;
1049 struct be_ring default_pdu_hdr[BEISCSI_ULP_COUNT];
1050 struct be_ring default_pdu_data[BEISCSI_ULP_COUNT];
1051 struct hwi_context_memory *phwi_ctxt;
1052};
1053
1054enum hwh_type_enum {
1055 HWH_TYPE_IO = 1,
1056 HWH_TYPE_LOGOUT = 2,
1057 HWH_TYPE_TMF = 3,
1058 HWH_TYPE_NOP = 4,
1059 HWH_TYPE_IO_RD = 5,
1060 HWH_TYPE_LOGIN = 11,
1061 HWH_TYPE_INVALID = 0xFFFFFFFF
1062};
1063
1064struct wrb_handle {
1065 enum hwh_type_enum type;
1066 unsigned short wrb_index;
1067
1068 struct iscsi_task *pio_handle;
1069 struct iscsi_wrb *pwrb;
1070};
1071
1072struct hwi_context_memory {
1073
1074 u16 min_eqd;
1075 u16 max_eqd;
1076 u16 cur_eqd;
1077 struct be_eq_obj be_eq[MAX_CPUS];
1078 struct be_queue_info be_cq[MAX_CPUS - 1];
1079
1080 struct be_queue_info *be_wrbq;
1081
1082
1083
1084
1085
1086 struct be_queue_info be_def_hdrq[BEISCSI_ULP_COUNT];
1087 struct be_queue_info be_def_dataq[BEISCSI_ULP_COUNT];
1088 struct hd_async_context *pasync_ctx[BEISCSI_ULP_COUNT];
1089};
1090
1091void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle);
1092
1093
1094#define BEISCSI_LOG_INIT 0x0001
1095#define BEISCSI_LOG_MBOX 0x0002
1096#define BEISCSI_LOG_MISC 0x0004
1097#define BEISCSI_LOG_EH 0x0008
1098#define BEISCSI_LOG_IO 0x0010
1099#define BEISCSI_LOG_CONFIG 0x0020
1100#define BEISCSI_LOG_ISCSI 0x0040
1101
1102#define __beiscsi_log(phba, level, fmt, arg...) \
1103 shost_printk(level, phba->shost, fmt, __LINE__, ##arg)
1104
1105#define beiscsi_log(phba, level, mask, fmt, arg...) \
1106do { \
1107 uint32_t log_value = phba->attr_log_enable; \
1108 if (((mask) & log_value) || (level[1] <= '3')) \
1109 __beiscsi_log(phba, level, fmt, ##arg); \
1110} while (0);
1111
1112#endif
1113