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23#include <linux/blkdev.h>
24#include <linux/kthread.h>
25#include <linux/sched.h>
26#include <linux/vmalloc.h>
27
28#include "rtsx.h"
29#include "ms.h"
30
31static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
32{
33 struct ms_info *ms_card = &chip->ms_card;
34
35 ms_card->err_code = err_code;
36}
37
38static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
39{
40 struct ms_info *ms_card = &chip->ms_card;
41
42 return (ms_card->err_code == err_code);
43}
44
45static int ms_parse_err_code(struct rtsx_chip *chip)
46{
47 rtsx_trace(chip);
48 return STATUS_FAIL;
49}
50
51static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
52 u8 tpc, u8 cnt, u8 cfg)
53{
54 struct ms_info *ms_card = &chip->ms_card;
55 int retval;
56 u8 *ptr;
57
58 dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
59
60 rtsx_init_cmd(chip);
61
62 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
63 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
64 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
65 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
66 0x01, PINGPONG_BUFFER);
67
68 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
69 0xFF, MS_TRANSFER_START | trans_mode);
70 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
71 MS_TRANSFER_END, MS_TRANSFER_END);
72
73 rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
74
75 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
76 if (retval < 0) {
77 rtsx_clear_ms_error(chip);
78 ms_set_err_code(chip, MS_TO_ERROR);
79 rtsx_trace(chip);
80 return ms_parse_err_code(chip);
81 }
82
83 ptr = rtsx_get_cmd_data(chip) + 1;
84
85 if (!(tpc & 0x08)) {
86 if (*ptr & MS_CRC16_ERR) {
87 ms_set_err_code(chip, MS_CRC16_ERROR);
88 rtsx_trace(chip);
89 return ms_parse_err_code(chip);
90 }
91 } else {
92 if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
93 if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
94 ms_set_err_code(chip, MS_CMD_NK);
95 rtsx_trace(chip);
96 return ms_parse_err_code(chip);
97 }
98 }
99 }
100
101 if (*ptr & MS_RDY_TIMEOUT) {
102 rtsx_clear_ms_error(chip);
103 ms_set_err_code(chip, MS_TO_ERROR);
104 rtsx_trace(chip);
105 return ms_parse_err_code(chip);
106 }
107
108 return STATUS_SUCCESS;
109}
110
111static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
112 u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
113 int use_sg, void *buf, int buf_len)
114{
115 int retval;
116 u8 val, err_code = 0;
117 enum dma_data_direction dir;
118
119 if (!buf || !buf_len) {
120 rtsx_trace(chip);
121 return STATUS_FAIL;
122 }
123
124 if (trans_mode == MS_TM_AUTO_READ) {
125 dir = DMA_FROM_DEVICE;
126 err_code = MS_FLASH_READ_ERROR;
127 } else if (trans_mode == MS_TM_AUTO_WRITE) {
128 dir = DMA_TO_DEVICE;
129 err_code = MS_FLASH_WRITE_ERROR;
130 } else {
131 rtsx_trace(chip);
132 return STATUS_FAIL;
133 }
134
135 rtsx_init_cmd(chip);
136
137 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
138 rtsx_add_cmd(chip, WRITE_REG_CMD,
139 MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
140 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
141 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
142
143 if (mode_2k) {
144 rtsx_add_cmd(chip, WRITE_REG_CMD,
145 MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
146 } else {
147 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
148 }
149
150 trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
151
152 rtsx_add_cmd(chip, WRITE_REG_CMD,
153 MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
154 rtsx_add_cmd(chip, CHECK_REG_CMD,
155 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
156
157 rtsx_send_cmd_no_wait(chip);
158
159 retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
160 use_sg, dir, chip->mspro_timeout);
161 if (retval < 0) {
162 ms_set_err_code(chip, err_code);
163 if (retval == -ETIMEDOUT)
164 retval = STATUS_TIMEDOUT;
165 else
166 retval = STATUS_FAIL;
167
168 rtsx_trace(chip);
169 return retval;
170 }
171
172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
173 if (retval) {
174 rtsx_trace(chip);
175 return retval;
176 }
177 if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
178 rtsx_trace(chip);
179 return STATUS_FAIL;
180 }
181
182 return STATUS_SUCCESS;
183}
184
185static int ms_write_bytes(struct rtsx_chip *chip,
186 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
187{
188 struct ms_info *ms_card = &chip->ms_card;
189 int retval, i;
190
191 if (!data || (data_len < cnt)) {
192 rtsx_trace(chip);
193 return STATUS_ERROR;
194 }
195
196 rtsx_init_cmd(chip);
197
198 for (i = 0; i < cnt; i++) {
199 rtsx_add_cmd(chip, WRITE_REG_CMD,
200 PPBUF_BASE2 + i, 0xFF, data[i]);
201 }
202 if (cnt % 2)
203 rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
204
205 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
206 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
207 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
208 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
209 0x01, PINGPONG_BUFFER);
210
211 rtsx_add_cmd(chip, WRITE_REG_CMD,
212 MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
213 rtsx_add_cmd(chip, CHECK_REG_CMD,
214 MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
215
216 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
217 if (retval < 0) {
218 u8 val = 0;
219
220 rtsx_read_register(chip, MS_TRANS_CFG, &val);
221 dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
222
223 rtsx_clear_ms_error(chip);
224
225 if (!(tpc & 0x08)) {
226 if (val & MS_CRC16_ERR) {
227 ms_set_err_code(chip, MS_CRC16_ERROR);
228 rtsx_trace(chip);
229 return ms_parse_err_code(chip);
230 }
231 } else {
232 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
233 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
234 ms_set_err_code(chip, MS_CMD_NK);
235 rtsx_trace(chip);
236 return ms_parse_err_code(chip);
237 }
238 }
239 }
240
241 if (val & MS_RDY_TIMEOUT) {
242 ms_set_err_code(chip, MS_TO_ERROR);
243 rtsx_trace(chip);
244 return ms_parse_err_code(chip);
245 }
246
247 ms_set_err_code(chip, MS_TO_ERROR);
248 rtsx_trace(chip);
249 return ms_parse_err_code(chip);
250 }
251
252 return STATUS_SUCCESS;
253}
254
255static int ms_read_bytes(struct rtsx_chip *chip,
256 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
257{
258 struct ms_info *ms_card = &chip->ms_card;
259 int retval, i;
260 u8 *ptr;
261
262 if (!data) {
263 rtsx_trace(chip);
264 return STATUS_ERROR;
265 }
266
267 rtsx_init_cmd(chip);
268
269 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
270 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
271 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
272 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
273 0x01, PINGPONG_BUFFER);
274
275 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
276 MS_TRANSFER_START | MS_TM_READ_BYTES);
277 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
278 MS_TRANSFER_END, MS_TRANSFER_END);
279
280 for (i = 0; i < data_len - 1; i++)
281 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
282
283 if (data_len % 2)
284 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
285 else
286 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
287 0, 0);
288
289 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
290 if (retval < 0) {
291 u8 val = 0;
292
293 rtsx_read_register(chip, MS_TRANS_CFG, &val);
294 rtsx_clear_ms_error(chip);
295
296 if (!(tpc & 0x08)) {
297 if (val & MS_CRC16_ERR) {
298 ms_set_err_code(chip, MS_CRC16_ERROR);
299 rtsx_trace(chip);
300 return ms_parse_err_code(chip);
301 }
302 } else {
303 if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
304 if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
305 ms_set_err_code(chip, MS_CMD_NK);
306 rtsx_trace(chip);
307 return ms_parse_err_code(chip);
308 }
309 }
310 }
311
312 if (val & MS_RDY_TIMEOUT) {
313 ms_set_err_code(chip, MS_TO_ERROR);
314 rtsx_trace(chip);
315 return ms_parse_err_code(chip);
316 }
317
318 ms_set_err_code(chip, MS_TO_ERROR);
319 rtsx_trace(chip);
320 return ms_parse_err_code(chip);
321 }
322
323 ptr = rtsx_get_cmd_data(chip) + 1;
324
325 for (i = 0; i < data_len; i++)
326 data[i] = ptr[i];
327
328 if ((tpc == PRO_READ_SHORT_DATA) && (data_len == 8)) {
329 dev_dbg(rtsx_dev(chip), "Read format progress:\n");
330 print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
331 cnt);
332 }
333
334 return STATUS_SUCCESS;
335}
336
337static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
338 u8 read_cnt, u8 write_start, u8 write_cnt)
339{
340 int retval, i;
341 u8 data[4];
342
343 data[0] = read_start;
344 data[1] = read_cnt;
345 data[2] = write_start;
346 data[3] = write_cnt;
347
348 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
349 retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
350 NO_WAIT_INT, data, 4);
351 if (retval == STATUS_SUCCESS)
352 return STATUS_SUCCESS;
353 rtsx_clear_ms_error(chip);
354 }
355
356 rtsx_trace(chip);
357 return STATUS_FAIL;
358}
359
360static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
361{
362 u8 data[2];
363
364 data[0] = cmd;
365 data[1] = 0;
366
367 return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
368}
369
370static int ms_set_init_para(struct rtsx_chip *chip)
371{
372 struct ms_info *ms_card = &chip->ms_card;
373 int retval;
374
375 if (CHK_HG8BIT(ms_card)) {
376 if (chip->asic_code)
377 ms_card->ms_clock = chip->asic_ms_hg_clk;
378 else
379 ms_card->ms_clock = chip->fpga_ms_hg_clk;
380
381 } else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
382 if (chip->asic_code)
383 ms_card->ms_clock = chip->asic_ms_4bit_clk;
384 else
385 ms_card->ms_clock = chip->fpga_ms_4bit_clk;
386
387 } else {
388 if (chip->asic_code)
389 ms_card->ms_clock = chip->asic_ms_1bit_clk;
390 else
391 ms_card->ms_clock = chip->fpga_ms_1bit_clk;
392 }
393
394 retval = switch_clock(chip, ms_card->ms_clock);
395 if (retval != STATUS_SUCCESS) {
396 rtsx_trace(chip);
397 return STATUS_FAIL;
398 }
399
400 retval = select_card(chip, MS_CARD);
401 if (retval != STATUS_SUCCESS) {
402 rtsx_trace(chip);
403 return STATUS_FAIL;
404 }
405
406 return STATUS_SUCCESS;
407}
408
409static int ms_switch_clock(struct rtsx_chip *chip)
410{
411 struct ms_info *ms_card = &chip->ms_card;
412 int retval;
413
414 retval = select_card(chip, MS_CARD);
415 if (retval != STATUS_SUCCESS) {
416 rtsx_trace(chip);
417 return STATUS_FAIL;
418 }
419
420 retval = switch_clock(chip, ms_card->ms_clock);
421 if (retval != STATUS_SUCCESS) {
422 rtsx_trace(chip);
423 return STATUS_FAIL;
424 }
425
426 return STATUS_SUCCESS;
427}
428
429static int ms_pull_ctl_disable(struct rtsx_chip *chip)
430{
431 int retval;
432
433 if (CHECK_PID(chip, 0x5208)) {
434 retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
435 MS_D1_PD | MS_D2_PD | MS_CLK_PD |
436 MS_D6_PD);
437 if (retval) {
438 rtsx_trace(chip);
439 return retval;
440 }
441 retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
442 MS_D3_PD | MS_D0_PD | MS_BS_PD |
443 XD_D4_PD);
444 if (retval) {
445 rtsx_trace(chip);
446 return retval;
447 }
448 retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
449 MS_D7_PD | XD_CE_PD | XD_CLE_PD |
450 XD_CD_PU);
451 if (retval) {
452 rtsx_trace(chip);
453 return retval;
454 }
455 retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
456 XD_RDY_PD | SD_D3_PD | SD_D2_PD |
457 XD_ALE_PD);
458 if (retval) {
459 rtsx_trace(chip);
460 return retval;
461 }
462 retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
463 MS_INS_PU | SD_WP_PD | SD_CD_PU |
464 SD_CMD_PD);
465 if (retval) {
466 rtsx_trace(chip);
467 return retval;
468 }
469 retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
470 MS_D5_PD | MS_D4_PD);
471 if (retval) {
472 rtsx_trace(chip);
473 return retval;
474 }
475 } else if (CHECK_PID(chip, 0x5288)) {
476 if (CHECK_BARO_PKG(chip, QFN)) {
477 retval = rtsx_write_register(chip, CARD_PULL_CTL1,
478 0xFF, 0x55);
479 if (retval) {
480 rtsx_trace(chip);
481 return retval;
482 }
483 retval = rtsx_write_register(chip, CARD_PULL_CTL2,
484 0xFF, 0x55);
485 if (retval) {
486 rtsx_trace(chip);
487 return retval;
488 }
489 retval = rtsx_write_register(chip, CARD_PULL_CTL3,
490 0xFF, 0x4B);
491 if (retval) {
492 rtsx_trace(chip);
493 return retval;
494 }
495 retval = rtsx_write_register(chip, CARD_PULL_CTL4,
496 0xFF, 0x69);
497 if (retval) {
498 rtsx_trace(chip);
499 return retval;
500 }
501 }
502 }
503
504 return STATUS_SUCCESS;
505}
506
507static int ms_pull_ctl_enable(struct rtsx_chip *chip)
508{
509 int retval;
510
511 rtsx_init_cmd(chip);
512
513 if (CHECK_PID(chip, 0x5208)) {
514 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
515 MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
516 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
517 MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
518 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
519 MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
520 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
521 XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
522 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
523 MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
524 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
525 MS_D5_PD | MS_D4_PD);
526 } else if (CHECK_PID(chip, 0x5288)) {
527 if (CHECK_BARO_PKG(chip, QFN)) {
528 rtsx_add_cmd(chip, WRITE_REG_CMD,
529 CARD_PULL_CTL1, 0xFF, 0x55);
530 rtsx_add_cmd(chip, WRITE_REG_CMD,
531 CARD_PULL_CTL2, 0xFF, 0x45);
532 rtsx_add_cmd(chip, WRITE_REG_CMD,
533 CARD_PULL_CTL3, 0xFF, 0x4B);
534 rtsx_add_cmd(chip, WRITE_REG_CMD,
535 CARD_PULL_CTL4, 0xFF, 0x29);
536 }
537 }
538
539 retval = rtsx_send_cmd(chip, MS_CARD, 100);
540 if (retval < 0) {
541 rtsx_trace(chip);
542 return STATUS_FAIL;
543 }
544
545 return STATUS_SUCCESS;
546}
547
548static int ms_prepare_reset(struct rtsx_chip *chip)
549{
550 struct ms_info *ms_card = &chip->ms_card;
551 int retval;
552 u8 oc_mask = 0;
553
554 ms_card->ms_type = 0;
555 ms_card->check_ms_flow = 0;
556 ms_card->switch_8bit_fail = 0;
557 ms_card->delay_write.delay_write_flag = 0;
558
559 ms_card->pro_under_formatting = 0;
560
561 retval = ms_power_off_card3v3(chip);
562 if (retval != STATUS_SUCCESS) {
563 rtsx_trace(chip);
564 return STATUS_FAIL;
565 }
566
567 if (!chip->ft2_fast_mode)
568 wait_timeout(250);
569
570 retval = enable_card_clock(chip, MS_CARD);
571 if (retval != STATUS_SUCCESS) {
572 rtsx_trace(chip);
573 return STATUS_FAIL;
574 }
575
576 if (chip->asic_code) {
577 retval = ms_pull_ctl_enable(chip);
578 if (retval != STATUS_SUCCESS) {
579 rtsx_trace(chip);
580 return STATUS_FAIL;
581 }
582 } else {
583 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
584 FPGA_MS_PULL_CTL_BIT | 0x20, 0);
585 if (retval) {
586 rtsx_trace(chip);
587 return retval;
588 }
589 }
590
591 if (!chip->ft2_fast_mode) {
592 retval = card_power_on(chip, MS_CARD);
593 if (retval != STATUS_SUCCESS) {
594 rtsx_trace(chip);
595 return STATUS_FAIL;
596 }
597
598 wait_timeout(150);
599
600#ifdef SUPPORT_OCP
601 if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
602 oc_mask = MS_OC_NOW | MS_OC_EVER;
603 else
604 oc_mask = SD_OC_NOW | SD_OC_EVER;
605
606 if (chip->ocp_stat & oc_mask) {
607 dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
608 chip->ocp_stat);
609 rtsx_trace(chip);
610 return STATUS_FAIL;
611 }
612#endif
613 }
614
615 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
616 MS_OUTPUT_EN);
617 if (retval) {
618 rtsx_trace(chip);
619 return retval;
620 }
621
622 if (chip->asic_code) {
623 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
624 SAMPLE_TIME_RISING |
625 PUSH_TIME_DEFAULT |
626 NO_EXTEND_TOGGLE |
627 MS_BUS_WIDTH_1);
628 if (retval) {
629 rtsx_trace(chip);
630 return retval;
631 }
632 } else {
633 retval = rtsx_write_register(chip, MS_CFG, 0xFF,
634 SAMPLE_TIME_FALLING |
635 PUSH_TIME_DEFAULT |
636 NO_EXTEND_TOGGLE |
637 MS_BUS_WIDTH_1);
638 if (retval) {
639 rtsx_trace(chip);
640 return retval;
641 }
642 }
643 retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
644 NO_WAIT_INT | NO_AUTO_READ_INT_REG);
645 if (retval) {
646 rtsx_trace(chip);
647 return retval;
648 }
649 retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
650 MS_STOP | MS_CLR_ERR);
651 if (retval) {
652 rtsx_trace(chip);
653 return retval;
654 }
655
656 retval = ms_set_init_para(chip);
657 if (retval != STATUS_SUCCESS) {
658 rtsx_trace(chip);
659 return STATUS_FAIL;
660 }
661
662 return STATUS_SUCCESS;
663}
664
665static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
666{
667 struct ms_info *ms_card = &chip->ms_card;
668 int retval, i;
669 u8 val;
670
671 retval = ms_set_rw_reg_addr(chip, Pro_StatusReg, 6, SystemParm, 1);
672 if (retval != STATUS_SUCCESS) {
673 rtsx_trace(chip);
674 return STATUS_FAIL;
675 }
676
677 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
678 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
679 6, NO_WAIT_INT);
680 if (retval == STATUS_SUCCESS)
681 break;
682 }
683 if (i == MS_MAX_RETRY_COUNT) {
684 rtsx_trace(chip);
685 return STATUS_FAIL;
686 }
687
688 retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
689 if (retval) {
690 rtsx_trace(chip);
691 return retval;
692 }
693 dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
694 if (val != 0x01) {
695 if (val != 0x02)
696 ms_card->check_ms_flow = 1;
697
698 rtsx_trace(chip);
699 return STATUS_FAIL;
700 }
701
702 retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
703 if (retval) {
704 rtsx_trace(chip);
705 return retval;
706 }
707 dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
708 if (val != 0) {
709 ms_card->check_ms_flow = 1;
710 rtsx_trace(chip);
711 return STATUS_FAIL;
712 }
713
714 retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
715 if (retval) {
716 rtsx_trace(chip);
717 return retval;
718 }
719 dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
720 if (val == 0) {
721 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
722 if (retval) {
723 rtsx_trace(chip);
724 return retval;
725 }
726 if (val & WRT_PRTCT)
727 chip->card_wp |= MS_CARD;
728 else
729 chip->card_wp &= ~MS_CARD;
730
731 } else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
732 chip->card_wp |= MS_CARD;
733 } else {
734 ms_card->check_ms_flow = 1;
735 rtsx_trace(chip);
736 return STATUS_FAIL;
737 }
738
739 ms_card->ms_type |= TYPE_MSPRO;
740
741 retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
742 if (retval) {
743 rtsx_trace(chip);
744 return retval;
745 }
746 dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
747 if (val == 0) {
748 ms_card->ms_type &= 0x0F;
749 } else if (val == 7) {
750 if (switch_8bit_bus)
751 ms_card->ms_type |= MS_HG;
752 else
753 ms_card->ms_type &= 0x0F;
754
755 } else {
756 rtsx_trace(chip);
757 return STATUS_FAIL;
758 }
759
760 return STATUS_SUCCESS;
761}
762
763static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
764{
765 int retval, i, k;
766 u8 val;
767
768
769 k = 0;
770 do {
771 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
772 ms_set_err_code(chip, MS_NO_CARD);
773 rtsx_trace(chip);
774 return STATUS_FAIL;
775 }
776
777 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
778 retval = ms_read_bytes(chip, GET_INT, 1,
779 NO_WAIT_INT, &val, 1);
780 if (retval == STATUS_SUCCESS)
781 break;
782 }
783 if (i == MS_MAX_RETRY_COUNT) {
784 rtsx_trace(chip);
785 return STATUS_FAIL;
786 }
787
788 if (k > 100) {
789 rtsx_trace(chip);
790 return STATUS_FAIL;
791 }
792
793 k++;
794 wait_timeout(100);
795 } while (!(val & INT_REG_CED));
796
797 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
798 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
799 if (retval == STATUS_SUCCESS)
800 break;
801 }
802 if (i == MS_MAX_RETRY_COUNT) {
803 rtsx_trace(chip);
804 return STATUS_FAIL;
805 }
806
807 if (val & INT_REG_ERR) {
808 if (val & INT_REG_CMDNK) {
809 chip->card_wp |= (MS_CARD);
810 } else {
811 rtsx_trace(chip);
812 return STATUS_FAIL;
813 }
814 }
815
816
817 return STATUS_SUCCESS;
818}
819
820static int ms_switch_parallel_bus(struct rtsx_chip *chip)
821{
822 int retval, i;
823 u8 data[2];
824
825 data[0] = PARALLEL_4BIT_IF;
826 data[1] = 0;
827 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
828 retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
829 data, 2);
830 if (retval == STATUS_SUCCESS)
831 break;
832 }
833 if (retval != STATUS_SUCCESS) {
834 rtsx_trace(chip);
835 return STATUS_FAIL;
836 }
837
838 return STATUS_SUCCESS;
839}
840
841static int ms_switch_8bit_bus(struct rtsx_chip *chip)
842{
843 struct ms_info *ms_card = &chip->ms_card;
844 int retval, i;
845 u8 data[2];
846
847 data[0] = PARALLEL_8BIT_IF;
848 data[1] = 0;
849 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
850 retval = ms_write_bytes(chip, WRITE_REG, 1,
851 NO_WAIT_INT, data, 2);
852 if (retval == STATUS_SUCCESS)
853 break;
854 }
855 if (retval != STATUS_SUCCESS) {
856 rtsx_trace(chip);
857 return STATUS_FAIL;
858 }
859
860 retval = rtsx_write_register(chip, MS_CFG, 0x98,
861 MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
862 if (retval) {
863 rtsx_trace(chip);
864 return retval;
865 }
866 ms_card->ms_type |= MS_8BIT;
867 retval = ms_set_init_para(chip);
868 if (retval != STATUS_SUCCESS) {
869 rtsx_trace(chip);
870 return STATUS_FAIL;
871 }
872
873 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
874 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
875 1, NO_WAIT_INT);
876 if (retval != STATUS_SUCCESS) {
877 rtsx_trace(chip);
878 return STATUS_FAIL;
879 }
880 }
881
882 return STATUS_SUCCESS;
883}
884
885static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
886{
887 struct ms_info *ms_card = &chip->ms_card;
888 int retval, i;
889
890 for (i = 0; i < 3; i++) {
891 retval = ms_prepare_reset(chip);
892 if (retval != STATUS_SUCCESS) {
893 rtsx_trace(chip);
894 return STATUS_FAIL;
895 }
896
897 retval = ms_identify_media_type(chip, switch_8bit_bus);
898 if (retval != STATUS_SUCCESS) {
899 rtsx_trace(chip);
900 return STATUS_FAIL;
901 }
902
903 retval = ms_confirm_cpu_startup(chip);
904 if (retval != STATUS_SUCCESS) {
905 rtsx_trace(chip);
906 return STATUS_FAIL;
907 }
908
909 retval = ms_switch_parallel_bus(chip);
910 if (retval != STATUS_SUCCESS) {
911 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
912 ms_set_err_code(chip, MS_NO_CARD);
913 rtsx_trace(chip);
914 return STATUS_FAIL;
915 }
916 continue;
917 } else {
918 break;
919 }
920 }
921
922 if (retval != STATUS_SUCCESS) {
923 rtsx_trace(chip);
924 return STATUS_FAIL;
925 }
926
927
928 retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
929 if (retval) {
930 rtsx_trace(chip);
931 return retval;
932 }
933 retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
934 PUSH_TIME_ODD);
935 if (retval) {
936 rtsx_trace(chip);
937 return retval;
938 }
939
940 retval = ms_set_init_para(chip);
941 if (retval != STATUS_SUCCESS) {
942 rtsx_trace(chip);
943 return STATUS_FAIL;
944 }
945
946
947 if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
948 retval = ms_switch_8bit_bus(chip);
949 if (retval != STATUS_SUCCESS) {
950 ms_card->switch_8bit_fail = 1;
951 rtsx_trace(chip);
952 return STATUS_FAIL;
953 }
954 }
955
956 return STATUS_SUCCESS;
957}
958
959#ifdef XC_POWERCLASS
960static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
961{
962 int retval;
963 u8 buf[6];
964
965 ms_cleanup_work(chip);
966
967 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
968 if (retval != STATUS_SUCCESS) {
969 rtsx_trace(chip);
970 return STATUS_FAIL;
971 }
972
973 buf[0] = 0;
974 buf[1] = mode;
975 buf[2] = 0;
976 buf[3] = 0;
977 buf[4] = 0;
978 buf[5] = 0;
979
980 retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
981 if (retval != STATUS_SUCCESS) {
982 rtsx_trace(chip);
983 return STATUS_FAIL;
984 }
985
986 retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
987 if (retval != STATUS_SUCCESS) {
988 rtsx_trace(chip);
989 return STATUS_FAIL;
990 }
991
992 retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
993 if (retval) {
994 rtsx_trace(chip);
995 return retval;
996 }
997 if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR)) {
998 rtsx_trace(chip);
999 return STATUS_FAIL;
1000 }
1001
1002 return STATUS_SUCCESS;
1003}
1004#endif
1005
1006static int ms_read_attribute_info(struct rtsx_chip *chip)
1007{
1008 struct ms_info *ms_card = &chip->ms_card;
1009 int retval, i;
1010 u8 val, *buf, class_code, device_type, sub_class, data[16];
1011 u16 total_blk = 0, blk_size = 0;
1012#ifdef SUPPORT_MSXC
1013 u32 xc_total_blk = 0, xc_blk_size = 0;
1014#endif
1015 u32 sys_info_addr = 0, sys_info_size;
1016#ifdef SUPPORT_PCGL_1P18
1017 u32 model_name_addr = 0, model_name_size;
1018 int found_sys_info = 0, found_model_name = 0;
1019#endif
1020
1021 retval = ms_set_rw_reg_addr(chip, Pro_IntReg, 2, Pro_SystemParm, 7);
1022 if (retval != STATUS_SUCCESS) {
1023 rtsx_trace(chip);
1024 return STATUS_FAIL;
1025 }
1026
1027 if (CHK_MS8BIT(ms_card))
1028 data[0] = PARALLEL_8BIT_IF;
1029 else
1030 data[0] = PARALLEL_4BIT_IF;
1031
1032 data[1] = 0;
1033
1034 data[2] = 0x40;
1035 data[3] = 0;
1036 data[4] = 0;
1037 data[5] = 0;
1038 data[6] = 0;
1039 data[7] = 0;
1040
1041 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1042 retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
1043 data, 8);
1044 if (retval == STATUS_SUCCESS)
1045 break;
1046 }
1047 if (retval != STATUS_SUCCESS) {
1048 rtsx_trace(chip);
1049 return STATUS_FAIL;
1050 }
1051
1052 buf = kmalloc(64 * 512, GFP_KERNEL);
1053 if (!buf) {
1054 rtsx_trace(chip);
1055 return STATUS_ERROR;
1056 }
1057
1058 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1059 retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
1060 if (retval != STATUS_SUCCESS)
1061 continue;
1062
1063 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1064 if (retval != STATUS_SUCCESS) {
1065 kfree(buf);
1066 rtsx_trace(chip);
1067 return STATUS_FAIL;
1068 }
1069 if (!(val & MS_INT_BREQ)) {
1070 kfree(buf);
1071 rtsx_trace(chip);
1072 return STATUS_FAIL;
1073 }
1074 retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
1075 PRO_READ_LONG_DATA, 0x40, WAIT_INT,
1076 0, 0, buf, 64 * 512);
1077 if (retval == STATUS_SUCCESS)
1078 break;
1079
1080 rtsx_clear_ms_error(chip);
1081 }
1082 if (retval != STATUS_SUCCESS) {
1083 kfree(buf);
1084 rtsx_trace(chip);
1085 return STATUS_FAIL;
1086 }
1087
1088 i = 0;
1089 do {
1090 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
1091 if (retval != STATUS_SUCCESS) {
1092 kfree(buf);
1093 rtsx_trace(chip);
1094 return STATUS_FAIL;
1095 }
1096
1097 if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
1098 break;
1099
1100 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
1101 PRO_READ_LONG_DATA, 0, WAIT_INT);
1102 if (retval != STATUS_SUCCESS) {
1103 kfree(buf);
1104 rtsx_trace(chip);
1105 return STATUS_FAIL;
1106 }
1107
1108 i++;
1109 } while (i < 1024);
1110
1111 if (retval != STATUS_SUCCESS) {
1112 kfree(buf);
1113 rtsx_trace(chip);
1114 return STATUS_FAIL;
1115 }
1116
1117 if ((buf[0] != 0xa5) && (buf[1] != 0xc3)) {
1118
1119 kfree(buf);
1120 rtsx_trace(chip);
1121 return STATUS_FAIL;
1122 }
1123
1124 if ((buf[4] < 1) || (buf[4] > 12)) {
1125 kfree(buf);
1126 rtsx_trace(chip);
1127 return STATUS_FAIL;
1128 }
1129
1130 for (i = 0; i < buf[4]; i++) {
1131 int cur_addr_off = 16 + i * 12;
1132
1133#ifdef SUPPORT_MSXC
1134 if ((buf[cur_addr_off + 8] == 0x10) ||
1135 (buf[cur_addr_off + 8] == 0x13)) {
1136#else
1137 if (buf[cur_addr_off + 8] == 0x10) {
1138#endif
1139 sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1140 ((u32)buf[cur_addr_off + 1] << 16) |
1141 ((u32)buf[cur_addr_off + 2] << 8) |
1142 buf[cur_addr_off + 3];
1143 sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
1144 ((u32)buf[cur_addr_off + 5] << 16) |
1145 ((u32)buf[cur_addr_off + 6] << 8) |
1146 buf[cur_addr_off + 7];
1147 dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
1148 sys_info_addr, sys_info_size);
1149 if (sys_info_size != 96) {
1150 kfree(buf);
1151 rtsx_trace(chip);
1152 return STATUS_FAIL;
1153 }
1154 if (sys_info_addr < 0x1A0) {
1155 kfree(buf);
1156 rtsx_trace(chip);
1157 return STATUS_FAIL;
1158 }
1159 if ((sys_info_size + sys_info_addr) > 0x8000) {
1160 kfree(buf);
1161 rtsx_trace(chip);
1162 return STATUS_FAIL;
1163 }
1164
1165#ifdef SUPPORT_MSXC
1166 if (buf[cur_addr_off + 8] == 0x13)
1167 ms_card->ms_type |= MS_XC;
1168#endif
1169#ifdef SUPPORT_PCGL_1P18
1170 found_sys_info = 1;
1171#else
1172 break;
1173#endif
1174 }
1175#ifdef SUPPORT_PCGL_1P18
1176 if (buf[cur_addr_off + 8] == 0x15) {
1177 model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1178 ((u32)buf[cur_addr_off + 1] << 16) |
1179 ((u32)buf[cur_addr_off + 2] << 8) |
1180 buf[cur_addr_off + 3];
1181 model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1182 ((u32)buf[cur_addr_off + 5] << 16) |
1183 ((u32)buf[cur_addr_off + 6] << 8) |
1184 buf[cur_addr_off + 7];
1185 dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1186 model_name_addr, model_name_size);
1187 if (model_name_size != 48) {
1188 kfree(buf);
1189 rtsx_trace(chip);
1190 return STATUS_FAIL;
1191 }
1192 if (model_name_addr < 0x1A0) {
1193 kfree(buf);
1194 rtsx_trace(chip);
1195 return STATUS_FAIL;
1196 }
1197 if ((model_name_size + model_name_addr) > 0x8000) {
1198 kfree(buf);
1199 rtsx_trace(chip);
1200 return STATUS_FAIL;
1201 }
1202
1203 found_model_name = 1;
1204 }
1205
1206 if (found_sys_info && found_model_name)
1207 break;
1208#endif
1209 }
1210
1211 if (i == buf[4]) {
1212 kfree(buf);
1213 rtsx_trace(chip);
1214 return STATUS_FAIL;
1215 }
1216
1217 class_code = buf[sys_info_addr + 0];
1218 device_type = buf[sys_info_addr + 56];
1219 sub_class = buf[sys_info_addr + 46];
1220#ifdef SUPPORT_MSXC
1221 if (CHK_MSXC(ms_card)) {
1222 xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1223 ((u32)buf[sys_info_addr + 7] << 16) |
1224 ((u32)buf[sys_info_addr + 8] << 8) |
1225 buf[sys_info_addr + 9];
1226 xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1227 ((u32)buf[sys_info_addr + 33] << 16) |
1228 ((u32)buf[sys_info_addr + 34] << 8) |
1229 buf[sys_info_addr + 35];
1230 dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1231 xc_total_blk, xc_blk_size);
1232 } else {
1233 total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1234 buf[sys_info_addr + 7];
1235 blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1236 buf[sys_info_addr + 3];
1237 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1238 total_blk, blk_size);
1239 }
1240#else
1241 total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1242 blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1243 dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1244 total_blk, blk_size);
1245#endif
1246
1247 dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1248 class_code, device_type, sub_class);
1249
1250 memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1251#ifdef SUPPORT_PCGL_1P18
1252 memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1253#endif
1254
1255 kfree(buf);
1256
1257#ifdef SUPPORT_MSXC
1258 if (CHK_MSXC(ms_card)) {
1259 if (class_code != 0x03) {
1260 rtsx_trace(chip);
1261 return STATUS_FAIL;
1262 }
1263 } else {
1264 if (class_code != 0x02) {
1265 rtsx_trace(chip);
1266 return STATUS_FAIL;
1267 }
1268 }
1269#else
1270 if (class_code != 0x02) {
1271 rtsx_trace(chip);
1272 return STATUS_FAIL;
1273 }
1274#endif
1275
1276 if (device_type != 0x00) {
1277 if ((device_type == 0x01) || (device_type == 0x02) ||
1278 (device_type == 0x03)) {
1279 chip->card_wp |= MS_CARD;
1280 } else {
1281 rtsx_trace(chip);
1282 return STATUS_FAIL;
1283 }
1284 }
1285
1286 if (sub_class & 0xC0) {
1287 rtsx_trace(chip);
1288 return STATUS_FAIL;
1289 }
1290
1291 dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1292 class_code, device_type, sub_class);
1293
1294#ifdef SUPPORT_MSXC
1295 if (CHK_MSXC(ms_card)) {
1296 chip->capacity[chip->card2lun[MS_CARD]] =
1297 ms_card->capacity = xc_total_blk * xc_blk_size;
1298 } else {
1299 chip->capacity[chip->card2lun[MS_CARD]] =
1300 ms_card->capacity = total_blk * blk_size;
1301 }
1302#else
1303 ms_card->capacity = total_blk * blk_size;
1304 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1305#endif
1306
1307 return STATUS_SUCCESS;
1308}
1309
1310#ifdef SUPPORT_MAGIC_GATE
1311static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1312 int type, u8 mg_entry_num);
1313#endif
1314
1315static int reset_ms_pro(struct rtsx_chip *chip)
1316{
1317 struct ms_info *ms_card = &chip->ms_card;
1318 int retval;
1319#ifdef XC_POWERCLASS
1320 u8 change_power_class;
1321
1322 if (chip->ms_power_class_en & 0x02)
1323 change_power_class = 2;
1324 else if (chip->ms_power_class_en & 0x01)
1325 change_power_class = 1;
1326 else
1327 change_power_class = 0;
1328#endif
1329
1330#ifdef XC_POWERCLASS
1331retry:
1332#endif
1333 retval = ms_pro_reset_flow(chip, 1);
1334 if (retval != STATUS_SUCCESS) {
1335 if (ms_card->switch_8bit_fail) {
1336 retval = ms_pro_reset_flow(chip, 0);
1337 if (retval != STATUS_SUCCESS) {
1338 rtsx_trace(chip);
1339 return STATUS_FAIL;
1340 }
1341 } else {
1342 rtsx_trace(chip);
1343 return STATUS_FAIL;
1344 }
1345 }
1346
1347 retval = ms_read_attribute_info(chip);
1348 if (retval != STATUS_SUCCESS) {
1349 rtsx_trace(chip);
1350 return STATUS_FAIL;
1351 }
1352
1353#ifdef XC_POWERCLASS
1354 if (CHK_HG8BIT(ms_card))
1355 change_power_class = 0;
1356
1357 if (change_power_class && CHK_MSXC(ms_card)) {
1358 u8 power_class_en = chip->ms_power_class_en;
1359
1360 dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1361 power_class_en);
1362 dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1363 change_power_class);
1364
1365 if (change_power_class)
1366 power_class_en &= (1 << (change_power_class - 1));
1367 else
1368 power_class_en = 0;
1369
1370 if (power_class_en) {
1371 u8 power_class_mode =
1372 (ms_card->raw_sys_info[46] & 0x18) >> 3;
1373 dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1374 power_class_mode);
1375 if (change_power_class > power_class_mode)
1376 change_power_class = power_class_mode;
1377 if (change_power_class) {
1378 retval = msxc_change_power(chip,
1379 change_power_class);
1380 if (retval != STATUS_SUCCESS) {
1381 change_power_class--;
1382 goto retry;
1383 }
1384 }
1385 }
1386 }
1387#endif
1388
1389#ifdef SUPPORT_MAGIC_GATE
1390 retval = mg_set_tpc_para_sub(chip, 0, 0);
1391 if (retval != STATUS_SUCCESS) {
1392 rtsx_trace(chip);
1393 return STATUS_FAIL;
1394 }
1395#endif
1396
1397 if (CHK_HG8BIT(ms_card))
1398 chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1399 else
1400 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1401
1402 return STATUS_SUCCESS;
1403}
1404
1405static int ms_read_status_reg(struct rtsx_chip *chip)
1406{
1407 int retval;
1408 u8 val[2];
1409
1410 retval = ms_set_rw_reg_addr(chip, StatusReg0, 2, 0, 0);
1411 if (retval != STATUS_SUCCESS) {
1412 rtsx_trace(chip);
1413 return STATUS_FAIL;
1414 }
1415
1416 retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1417 if (retval != STATUS_SUCCESS) {
1418 rtsx_trace(chip);
1419 return STATUS_FAIL;
1420 }
1421
1422 if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1423 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1424 rtsx_trace(chip);
1425 return STATUS_FAIL;
1426 }
1427
1428 return STATUS_SUCCESS;
1429}
1430
1431static int ms_read_extra_data(struct rtsx_chip *chip,
1432 u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1433{
1434 struct ms_info *ms_card = &chip->ms_card;
1435 int retval, i;
1436 u8 val, data[10];
1437
1438 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1439 SystemParm, 6);
1440 if (retval != STATUS_SUCCESS) {
1441 rtsx_trace(chip);
1442 return STATUS_FAIL;
1443 }
1444
1445 if (CHK_MS4BIT(ms_card)) {
1446
1447 data[0] = 0x88;
1448 } else {
1449
1450 data[0] = 0x80;
1451 }
1452 data[1] = 0;
1453 data[2] = (u8)(block_addr >> 8);
1454 data[3] = (u8)block_addr;
1455 data[4] = 0x40;
1456 data[5] = page_num;
1457
1458 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1459 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1460 data, 6);
1461 if (retval == STATUS_SUCCESS)
1462 break;
1463 }
1464 if (i == MS_MAX_RETRY_COUNT) {
1465 rtsx_trace(chip);
1466 return STATUS_FAIL;
1467 }
1468
1469 ms_set_err_code(chip, MS_NO_ERROR);
1470
1471 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1472 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1473 if (retval == STATUS_SUCCESS)
1474 break;
1475 }
1476 if (i == MS_MAX_RETRY_COUNT) {
1477 rtsx_trace(chip);
1478 return STATUS_FAIL;
1479 }
1480
1481 ms_set_err_code(chip, MS_NO_ERROR);
1482 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1483 if (retval != STATUS_SUCCESS) {
1484 rtsx_trace(chip);
1485 return STATUS_FAIL;
1486 }
1487
1488 if (val & INT_REG_CMDNK) {
1489 ms_set_err_code(chip, MS_CMD_NK);
1490 rtsx_trace(chip);
1491 return STATUS_FAIL;
1492 }
1493 if (val & INT_REG_CED) {
1494 if (val & INT_REG_ERR) {
1495 retval = ms_read_status_reg(chip);
1496 if (retval != STATUS_SUCCESS) {
1497 rtsx_trace(chip);
1498 return STATUS_FAIL;
1499 }
1500
1501 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1502 MS_EXTRA_SIZE, SystemParm,
1503 6);
1504 if (retval != STATUS_SUCCESS) {
1505 rtsx_trace(chip);
1506 return STATUS_FAIL;
1507 }
1508 }
1509 }
1510
1511 retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1512 data, MS_EXTRA_SIZE);
1513 if (retval != STATUS_SUCCESS) {
1514 rtsx_trace(chip);
1515 return STATUS_FAIL;
1516 }
1517
1518 if (buf && buf_len) {
1519 if (buf_len > MS_EXTRA_SIZE)
1520 buf_len = MS_EXTRA_SIZE;
1521 memcpy(buf, data, buf_len);
1522 }
1523
1524 return STATUS_SUCCESS;
1525}
1526
1527static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1528 u8 page_num, u8 *buf, int buf_len)
1529{
1530 struct ms_info *ms_card = &chip->ms_card;
1531 int retval, i;
1532 u8 val, data[16];
1533
1534 if (!buf || (buf_len < MS_EXTRA_SIZE)) {
1535 rtsx_trace(chip);
1536 return STATUS_FAIL;
1537 }
1538
1539 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1540 SystemParm, 6 + MS_EXTRA_SIZE);
1541 if (retval != STATUS_SUCCESS) {
1542 rtsx_trace(chip);
1543 return STATUS_FAIL;
1544 }
1545
1546 if (CHK_MS4BIT(ms_card))
1547 data[0] = 0x88;
1548 else
1549 data[0] = 0x80;
1550
1551 data[1] = 0;
1552 data[2] = (u8)(block_addr >> 8);
1553 data[3] = (u8)block_addr;
1554 data[4] = 0x40;
1555 data[5] = page_num;
1556
1557 for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1558 data[i] = buf[i - 6];
1559
1560 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1561 NO_WAIT_INT, data, 16);
1562 if (retval != STATUS_SUCCESS) {
1563 rtsx_trace(chip);
1564 return STATUS_FAIL;
1565 }
1566
1567 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1568 if (retval != STATUS_SUCCESS) {
1569 rtsx_trace(chip);
1570 return STATUS_FAIL;
1571 }
1572
1573 ms_set_err_code(chip, MS_NO_ERROR);
1574 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1575 if (retval != STATUS_SUCCESS) {
1576 rtsx_trace(chip);
1577 return STATUS_FAIL;
1578 }
1579
1580 if (val & INT_REG_CMDNK) {
1581 ms_set_err_code(chip, MS_CMD_NK);
1582 rtsx_trace(chip);
1583 return STATUS_FAIL;
1584 }
1585 if (val & INT_REG_CED) {
1586 if (val & INT_REG_ERR) {
1587 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1588 rtsx_trace(chip);
1589 return STATUS_FAIL;
1590 }
1591 }
1592
1593 return STATUS_SUCCESS;
1594}
1595
1596static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1597{
1598 struct ms_info *ms_card = &chip->ms_card;
1599 int retval;
1600 u8 val, data[6];
1601
1602 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1603 SystemParm, 6);
1604 if (retval != STATUS_SUCCESS) {
1605 rtsx_trace(chip);
1606 return STATUS_FAIL;
1607 }
1608
1609 if (CHK_MS4BIT(ms_card))
1610 data[0] = 0x88;
1611 else
1612 data[0] = 0x80;
1613
1614 data[1] = 0;
1615 data[2] = (u8)(block_addr >> 8);
1616 data[3] = (u8)block_addr;
1617 data[4] = 0x20;
1618 data[5] = page_num;
1619
1620 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1621 if (retval != STATUS_SUCCESS) {
1622 rtsx_trace(chip);
1623 return STATUS_FAIL;
1624 }
1625
1626 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1627 if (retval != STATUS_SUCCESS) {
1628 rtsx_trace(chip);
1629 return STATUS_FAIL;
1630 }
1631
1632 ms_set_err_code(chip, MS_NO_ERROR);
1633 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1634 if (retval != STATUS_SUCCESS) {
1635 rtsx_trace(chip);
1636 return STATUS_FAIL;
1637 }
1638
1639 if (val & INT_REG_CMDNK) {
1640 ms_set_err_code(chip, MS_CMD_NK);
1641 rtsx_trace(chip);
1642 return STATUS_FAIL;
1643 }
1644
1645 if (val & INT_REG_CED) {
1646 if (val & INT_REG_ERR) {
1647 if (!(val & INT_REG_BREQ)) {
1648 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1649 rtsx_trace(chip);
1650 return STATUS_FAIL;
1651 }
1652 retval = ms_read_status_reg(chip);
1653 if (retval != STATUS_SUCCESS)
1654 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1655
1656 } else {
1657 if (!(val & INT_REG_BREQ)) {
1658 ms_set_err_code(chip, MS_BREQ_ERROR);
1659 rtsx_trace(chip);
1660 return STATUS_FAIL;
1661 }
1662 }
1663 }
1664
1665 retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1666 0, NO_WAIT_INT);
1667 if (retval != STATUS_SUCCESS) {
1668 rtsx_trace(chip);
1669 return STATUS_FAIL;
1670 }
1671
1672 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1673 rtsx_trace(chip);
1674 return STATUS_FAIL;
1675 }
1676
1677 return STATUS_SUCCESS;
1678}
1679
1680static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1681{
1682 struct ms_info *ms_card = &chip->ms_card;
1683 int retval;
1684 u8 val, data[8], extra[MS_EXTRA_SIZE];
1685
1686 retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1687 if (retval != STATUS_SUCCESS) {
1688 rtsx_trace(chip);
1689 return STATUS_FAIL;
1690 }
1691
1692 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1693 SystemParm, 7);
1694 if (retval != STATUS_SUCCESS) {
1695 rtsx_trace(chip);
1696 return STATUS_FAIL;
1697 }
1698
1699 ms_set_err_code(chip, MS_NO_ERROR);
1700
1701 if (CHK_MS4BIT(ms_card))
1702 data[0] = 0x88;
1703 else
1704 data[0] = 0x80;
1705
1706 data[1] = 0;
1707 data[2] = (u8)(phy_blk >> 8);
1708 data[3] = (u8)phy_blk;
1709 data[4] = 0x80;
1710 data[5] = 0;
1711 data[6] = extra[0] & 0x7F;
1712 data[7] = 0xFF;
1713
1714 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1715 if (retval != STATUS_SUCCESS) {
1716 rtsx_trace(chip);
1717 return STATUS_FAIL;
1718 }
1719
1720 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1721 if (retval != STATUS_SUCCESS) {
1722 rtsx_trace(chip);
1723 return STATUS_FAIL;
1724 }
1725
1726 ms_set_err_code(chip, MS_NO_ERROR);
1727 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1728 if (retval != STATUS_SUCCESS) {
1729 rtsx_trace(chip);
1730 return STATUS_FAIL;
1731 }
1732
1733 if (val & INT_REG_CMDNK) {
1734 ms_set_err_code(chip, MS_CMD_NK);
1735 rtsx_trace(chip);
1736 return STATUS_FAIL;
1737 }
1738
1739 if (val & INT_REG_CED) {
1740 if (val & INT_REG_ERR) {
1741 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1742 rtsx_trace(chip);
1743 return STATUS_FAIL;
1744 }
1745 }
1746
1747 return STATUS_SUCCESS;
1748}
1749
1750static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1751{
1752 struct ms_info *ms_card = &chip->ms_card;
1753 int retval, i = 0;
1754 u8 val, data[6];
1755
1756 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
1757 SystemParm, 6);
1758 if (retval != STATUS_SUCCESS) {
1759 rtsx_trace(chip);
1760 return STATUS_FAIL;
1761 }
1762
1763 ms_set_err_code(chip, MS_NO_ERROR);
1764
1765 if (CHK_MS4BIT(ms_card))
1766 data[0] = 0x88;
1767 else
1768 data[0] = 0x80;
1769
1770 data[1] = 0;
1771 data[2] = (u8)(phy_blk >> 8);
1772 data[3] = (u8)phy_blk;
1773 data[4] = 0;
1774 data[5] = 0;
1775
1776 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1777 if (retval != STATUS_SUCCESS) {
1778 rtsx_trace(chip);
1779 return STATUS_FAIL;
1780 }
1781
1782ERASE_RTY:
1783 retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1784 if (retval != STATUS_SUCCESS) {
1785 rtsx_trace(chip);
1786 return STATUS_FAIL;
1787 }
1788
1789 ms_set_err_code(chip, MS_NO_ERROR);
1790 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1791 if (retval != STATUS_SUCCESS) {
1792 rtsx_trace(chip);
1793 return STATUS_FAIL;
1794 }
1795
1796 if (val & INT_REG_CMDNK) {
1797 if (i < 3) {
1798 i++;
1799 goto ERASE_RTY;
1800 }
1801
1802 ms_set_err_code(chip, MS_CMD_NK);
1803 ms_set_bad_block(chip, phy_blk);
1804 rtsx_trace(chip);
1805 return STATUS_FAIL;
1806 }
1807
1808 if (val & INT_REG_CED) {
1809 if (val & INT_REG_ERR) {
1810 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1811 rtsx_trace(chip);
1812 return STATUS_FAIL;
1813 }
1814 }
1815
1816 return STATUS_SUCCESS;
1817}
1818
1819static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1820{
1821 if (!extra || (extra_len < MS_EXTRA_SIZE))
1822 return;
1823
1824 memset(extra, 0xFF, MS_EXTRA_SIZE);
1825
1826 if (type == setPS_NG) {
1827
1828 extra[0] = 0xB8;
1829 } else {
1830
1831 extra[0] = 0x98;
1832 }
1833
1834 extra[2] = (u8)(log_blk >> 8);
1835 extra[3] = (u8)log_blk;
1836}
1837
1838static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1839 u8 start_page, u8 end_page)
1840{
1841 int retval;
1842 u8 extra[MS_EXTRA_SIZE], i;
1843
1844 memset(extra, 0xff, MS_EXTRA_SIZE);
1845
1846 extra[0] = 0xf8;
1847 extra[1] = 0xff;
1848 extra[2] = (u8)(log_blk >> 8);
1849 extra[3] = (u8)log_blk;
1850
1851 for (i = start_page; i < end_page; i++) {
1852 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1853 ms_set_err_code(chip, MS_NO_CARD);
1854 rtsx_trace(chip);
1855 return STATUS_FAIL;
1856 }
1857
1858 retval = ms_write_extra_data(chip, phy_blk, i,
1859 extra, MS_EXTRA_SIZE);
1860 if (retval != STATUS_SUCCESS) {
1861 rtsx_trace(chip);
1862 return STATUS_FAIL;
1863 }
1864 }
1865
1866 return STATUS_SUCCESS;
1867}
1868
1869static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1870 u16 log_blk, u8 start_page, u8 end_page)
1871{
1872 struct ms_info *ms_card = &chip->ms_card;
1873 bool uncorrect_flag = false;
1874 int retval, rty_cnt;
1875 u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1876
1877 dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1878 old_blk, new_blk, log_blk);
1879 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1880 start_page, end_page);
1881
1882 retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1883 if (retval != STATUS_SUCCESS) {
1884 rtsx_trace(chip);
1885 return STATUS_FAIL;
1886 }
1887
1888 retval = ms_read_status_reg(chip);
1889 if (retval != STATUS_SUCCESS) {
1890 rtsx_trace(chip);
1891 return STATUS_FAIL;
1892 }
1893
1894 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1895 if (retval) {
1896 rtsx_trace(chip);
1897 return retval;
1898 }
1899
1900 if (val & BUF_FULL) {
1901 retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1902 if (retval != STATUS_SUCCESS) {
1903 rtsx_trace(chip);
1904 return STATUS_FAIL;
1905 }
1906
1907 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1908 if (retval != STATUS_SUCCESS) {
1909 rtsx_trace(chip);
1910 return STATUS_FAIL;
1911 }
1912
1913 if (!(val & INT_REG_CED)) {
1914 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1915 rtsx_trace(chip);
1916 return STATUS_FAIL;
1917 }
1918 }
1919
1920 for (i = start_page; i < end_page; i++) {
1921 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1922 ms_set_err_code(chip, MS_NO_CARD);
1923 rtsx_trace(chip);
1924 return STATUS_FAIL;
1925 }
1926
1927 ms_read_extra_data(chip, old_blk, i, extra, MS_EXTRA_SIZE);
1928
1929 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
1930 MS_EXTRA_SIZE, SystemParm, 6);
1931 if (retval != STATUS_SUCCESS) {
1932 rtsx_trace(chip);
1933 return STATUS_FAIL;
1934 }
1935
1936 ms_set_err_code(chip, MS_NO_ERROR);
1937
1938 if (CHK_MS4BIT(ms_card))
1939 data[0] = 0x88;
1940 else
1941 data[0] = 0x80;
1942
1943 data[1] = 0;
1944 data[2] = (u8)(old_blk >> 8);
1945 data[3] = (u8)old_blk;
1946 data[4] = 0x20;
1947 data[5] = i;
1948
1949 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1950 data, 6);
1951 if (retval != STATUS_SUCCESS) {
1952 rtsx_trace(chip);
1953 return STATUS_FAIL;
1954 }
1955
1956 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1957 if (retval != STATUS_SUCCESS) {
1958 rtsx_trace(chip);
1959 return STATUS_FAIL;
1960 }
1961
1962 ms_set_err_code(chip, MS_NO_ERROR);
1963 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1964 if (retval != STATUS_SUCCESS) {
1965 rtsx_trace(chip);
1966 return STATUS_FAIL;
1967 }
1968
1969 if (val & INT_REG_CMDNK) {
1970 ms_set_err_code(chip, MS_CMD_NK);
1971 rtsx_trace(chip);
1972 return STATUS_FAIL;
1973 }
1974
1975 if (val & INT_REG_CED) {
1976 if (val & INT_REG_ERR) {
1977 retval = ms_read_status_reg(chip);
1978 if (retval != STATUS_SUCCESS) {
1979 uncorrect_flag = true;
1980 dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1981 } else {
1982 uncorrect_flag = false;
1983 }
1984
1985 retval = ms_transfer_tpc(chip,
1986 MS_TM_NORMAL_READ,
1987 READ_PAGE_DATA,
1988 0, NO_WAIT_INT);
1989 if (retval != STATUS_SUCCESS) {
1990 rtsx_trace(chip);
1991 return STATUS_FAIL;
1992 }
1993
1994 if (uncorrect_flag) {
1995 ms_set_page_status(log_blk, setPS_NG,
1996 extra,
1997 MS_EXTRA_SIZE);
1998 if (i == 0)
1999 extra[0] &= 0xEF;
2000
2001 ms_write_extra_data(chip, old_blk, i,
2002 extra,
2003 MS_EXTRA_SIZE);
2004 dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
2005 i, extra[0]);
2006 MS_SET_BAD_BLOCK_FLG(ms_card);
2007
2008 ms_set_page_status(log_blk, setPS_Error,
2009 extra,
2010 MS_EXTRA_SIZE);
2011 ms_write_extra_data(chip, new_blk, i,
2012 extra,
2013 MS_EXTRA_SIZE);
2014 continue;
2015 }
2016
2017 for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
2018 rty_cnt++) {
2019 retval = ms_transfer_tpc(
2020 chip,
2021 MS_TM_NORMAL_WRITE,
2022 WRITE_PAGE_DATA,
2023 0, NO_WAIT_INT);
2024 if (retval == STATUS_SUCCESS)
2025 break;
2026 }
2027 if (rty_cnt == MS_MAX_RETRY_COUNT) {
2028 rtsx_trace(chip);
2029 return STATUS_FAIL;
2030 }
2031 }
2032
2033 if (!(val & INT_REG_BREQ)) {
2034 ms_set_err_code(chip, MS_BREQ_ERROR);
2035 rtsx_trace(chip);
2036 return STATUS_FAIL;
2037 }
2038 }
2039
2040 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
2041 SystemParm, (6 + MS_EXTRA_SIZE));
2042
2043 ms_set_err_code(chip, MS_NO_ERROR);
2044
2045 if (CHK_MS4BIT(ms_card))
2046 data[0] = 0x88;
2047 else
2048 data[0] = 0x80;
2049
2050 data[1] = 0;
2051 data[2] = (u8)(new_blk >> 8);
2052 data[3] = (u8)new_blk;
2053 data[4] = 0x20;
2054 data[5] = i;
2055
2056 if ((extra[0] & 0x60) != 0x60)
2057 data[6] = extra[0];
2058 else
2059 data[6] = 0xF8;
2060
2061 data[6 + 1] = 0xFF;
2062 data[6 + 2] = (u8)(log_blk >> 8);
2063 data[6 + 3] = (u8)log_blk;
2064
2065 for (j = 4; j <= MS_EXTRA_SIZE; j++)
2066 data[6 + j] = 0xFF;
2067
2068 retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
2069 NO_WAIT_INT, data, 16);
2070 if (retval != STATUS_SUCCESS) {
2071 rtsx_trace(chip);
2072 return STATUS_FAIL;
2073 }
2074
2075 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2076 if (retval != STATUS_SUCCESS) {
2077 rtsx_trace(chip);
2078 return STATUS_FAIL;
2079 }
2080
2081 ms_set_err_code(chip, MS_NO_ERROR);
2082 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
2083 if (retval != STATUS_SUCCESS) {
2084 rtsx_trace(chip);
2085 return STATUS_FAIL;
2086 }
2087
2088 if (val & INT_REG_CMDNK) {
2089 ms_set_err_code(chip, MS_CMD_NK);
2090 rtsx_trace(chip);
2091 return STATUS_FAIL;
2092 }
2093
2094 if (val & INT_REG_CED) {
2095 if (val & INT_REG_ERR) {
2096 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
2097 rtsx_trace(chip);
2098 return STATUS_FAIL;
2099 }
2100 }
2101
2102 if (i == 0) {
2103 retval = ms_set_rw_reg_addr(chip, OverwriteFlag,
2104 MS_EXTRA_SIZE, SystemParm,
2105 7);
2106 if (retval != STATUS_SUCCESS) {
2107 rtsx_trace(chip);
2108 return STATUS_FAIL;
2109 }
2110
2111 ms_set_err_code(chip, MS_NO_ERROR);
2112
2113 if (CHK_MS4BIT(ms_card))
2114 data[0] = 0x88;
2115 else
2116 data[0] = 0x80;
2117
2118 data[1] = 0;
2119 data[2] = (u8)(old_blk >> 8);
2120 data[3] = (u8)old_blk;
2121 data[4] = 0x80;
2122 data[5] = 0;
2123 data[6] = 0xEF;
2124 data[7] = 0xFF;
2125
2126 retval = ms_write_bytes(chip, WRITE_REG, 7,
2127 NO_WAIT_INT, data, 8);
2128 if (retval != STATUS_SUCCESS) {
2129 rtsx_trace(chip);
2130 return STATUS_FAIL;
2131 }
2132
2133 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
2134 if (retval != STATUS_SUCCESS) {
2135 rtsx_trace(chip);
2136 return STATUS_FAIL;
2137 }
2138
2139 ms_set_err_code(chip, MS_NO_ERROR);
2140 retval = ms_read_bytes(chip, GET_INT, 1,
2141 NO_WAIT_INT, &val, 1);
2142 if (retval != STATUS_SUCCESS) {
2143 rtsx_trace(chip);
2144 return STATUS_FAIL;
2145 }
2146
2147 if (val & INT_REG_CMDNK) {
2148 ms_set_err_code(chip, MS_CMD_NK);
2149 rtsx_trace(chip);
2150 return STATUS_FAIL;
2151 }
2152
2153 if (val & INT_REG_CED) {
2154 if (val & INT_REG_ERR) {
2155 ms_set_err_code(chip,
2156 MS_FLASH_WRITE_ERROR);
2157 rtsx_trace(chip);
2158 return STATUS_FAIL;
2159 }
2160 }
2161 }
2162 }
2163
2164 return STATUS_SUCCESS;
2165}
2166
2167static int reset_ms(struct rtsx_chip *chip)
2168{
2169 struct ms_info *ms_card = &chip->ms_card;
2170 int retval;
2171 u16 i, reg_addr, block_size;
2172 u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
2173#ifndef SUPPORT_MAGIC_GATE
2174 u16 eblock_cnt;
2175#endif
2176
2177 retval = ms_prepare_reset(chip);
2178 if (retval != STATUS_SUCCESS) {
2179 rtsx_trace(chip);
2180 return STATUS_FAIL;
2181 }
2182
2183 ms_card->ms_type |= TYPE_MS;
2184
2185 retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
2186 if (retval != STATUS_SUCCESS) {
2187 rtsx_trace(chip);
2188 return STATUS_FAIL;
2189 }
2190
2191 retval = ms_read_status_reg(chip);
2192 if (retval != STATUS_SUCCESS) {
2193 rtsx_trace(chip);
2194 return STATUS_FAIL;
2195 }
2196
2197 retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
2198 if (retval) {
2199 rtsx_trace(chip);
2200 return retval;
2201 }
2202 if (val & WRT_PRTCT)
2203 chip->card_wp |= MS_CARD;
2204 else
2205 chip->card_wp &= ~MS_CARD;
2206
2207 i = 0;
2208
2209RE_SEARCH:
2210
2211 while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
2212 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2213 ms_set_err_code(chip, MS_NO_CARD);
2214 rtsx_trace(chip);
2215 return STATUS_FAIL;
2216 }
2217
2218 retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
2219 if (retval != STATUS_SUCCESS) {
2220 i++;
2221 continue;
2222 }
2223
2224 if (extra[0] & BLOCK_OK) {
2225 if (!(extra[1] & NOT_BOOT_BLOCK)) {
2226 ms_card->boot_block = i;
2227 break;
2228 }
2229 }
2230 i++;
2231 }
2232
2233 if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
2234 dev_dbg(rtsx_dev(chip), "No boot block found!");
2235 rtsx_trace(chip);
2236 return STATUS_FAIL;
2237 }
2238
2239 for (j = 0; j < 3; j++) {
2240 retval = ms_read_page(chip, ms_card->boot_block, j);
2241 if (retval != STATUS_SUCCESS) {
2242 if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
2243 i = ms_card->boot_block + 1;
2244 ms_set_err_code(chip, MS_NO_ERROR);
2245 goto RE_SEARCH;
2246 }
2247 }
2248 }
2249
2250 retval = ms_read_page(chip, ms_card->boot_block, 0);
2251 if (retval != STATUS_SUCCESS) {
2252 rtsx_trace(chip);
2253 return STATUS_FAIL;
2254 }
2255
2256
2257 rtsx_init_cmd(chip);
2258
2259 for (i = 0; i < 96; i++)
2260 rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
2261
2262 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2263 if (retval < 0) {
2264 rtsx_trace(chip);
2265 return STATUS_FAIL;
2266 }
2267
2268 ptr = rtsx_get_cmd_data(chip);
2269 memcpy(ms_card->raw_sys_info, ptr, 96);
2270
2271
2272 rtsx_init_cmd(chip);
2273
2274 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
2275 rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
2276
2277 for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
2278 reg_addr++)
2279 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2280
2281 for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
2282 rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
2283
2284 rtsx_add_cmd(chip, READ_REG_CMD, MS_Device_Type, 0, 0);
2285 rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_Support, 0, 0);
2286
2287 retval = rtsx_send_cmd(chip, MS_CARD, 100);
2288 if (retval < 0) {
2289 rtsx_trace(chip);
2290 return STATUS_FAIL;
2291 }
2292
2293 ptr = rtsx_get_cmd_data(chip);
2294
2295 dev_dbg(rtsx_dev(chip), "Boot block data:\n");
2296 dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
2297
2298
2299
2300
2301 if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2302 i = ms_card->boot_block + 1;
2303 goto RE_SEARCH;
2304 }
2305
2306
2307
2308
2309 if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2310 i = ms_card->boot_block + 1;
2311 goto RE_SEARCH;
2312 }
2313
2314 if ((ptr[14] == 1) || (ptr[14] == 3))
2315 chip->card_wp |= MS_CARD;
2316
2317
2318 block_size = ((u16)ptr[6] << 8) | ptr[7];
2319 if (block_size == 0x0010) {
2320
2321 ms_card->block_shift = 5;
2322 ms_card->page_off = 0x1F;
2323 } else if (block_size == 0x0008) {
2324
2325 ms_card->block_shift = 4;
2326 ms_card->page_off = 0x0F;
2327 }
2328
2329
2330 ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2331
2332#ifdef SUPPORT_MAGIC_GATE
2333 j = ptr[10];
2334
2335 if (ms_card->block_shift == 4) {
2336 if (j < 2) {
2337 ms_card->capacity = 0x1EE0;
2338 } else {
2339 ms_card->capacity = 0x3DE0;
2340 }
2341 } else {
2342 if (j < 5) {
2343 ms_card->capacity = 0x7BC0;
2344 } else if (j < 0xA) {
2345 ms_card->capacity = 0xF7C0;
2346 } else if (j < 0x11) {
2347 ms_card->capacity = 0x1EF80;
2348 } else {
2349 ms_card->capacity = 0x3DF00;
2350 }
2351 }
2352#else
2353
2354 eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2355
2356 ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2357#endif
2358
2359 chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2360
2361
2362 if (ptr[15]) {
2363 retval = ms_set_rw_reg_addr(chip, 0, 0, SystemParm, 1);
2364 if (retval != STATUS_SUCCESS) {
2365 rtsx_trace(chip);
2366 return STATUS_FAIL;
2367 }
2368
2369 retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2370 if (retval) {
2371 rtsx_trace(chip);
2372 return retval;
2373 }
2374 retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2375 if (retval) {
2376 rtsx_trace(chip);
2377 return retval;
2378 }
2379
2380 retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2381 NO_WAIT_INT);
2382 if (retval != STATUS_SUCCESS) {
2383 rtsx_trace(chip);
2384 return STATUS_FAIL;
2385 }
2386
2387 retval = rtsx_write_register(chip, MS_CFG,
2388 0x58 | MS_NO_CHECK_INT,
2389 MS_BUS_WIDTH_4 |
2390 PUSH_TIME_ODD |
2391 MS_NO_CHECK_INT);
2392 if (retval) {
2393 rtsx_trace(chip);
2394 return retval;
2395 }
2396
2397 ms_card->ms_type |= MS_4BIT;
2398 }
2399
2400 if (CHK_MS4BIT(ms_card))
2401 chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2402 else
2403 chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2404
2405 return STATUS_SUCCESS;
2406}
2407
2408static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2409{
2410 struct ms_info *ms_card = &chip->ms_card;
2411 int size, i, seg_no, retval;
2412 u16 defect_block, reg_addr;
2413 u8 val1, val2;
2414
2415 ms_card->segment_cnt = ms_card->total_block >> 9;
2416 dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2417 ms_card->segment_cnt);
2418
2419 size = ms_card->segment_cnt * sizeof(struct zone_entry);
2420 ms_card->segment = vzalloc(size);
2421 if (!ms_card->segment) {
2422 rtsx_trace(chip);
2423 return STATUS_FAIL;
2424 }
2425
2426 retval = ms_read_page(chip, ms_card->boot_block, 1);
2427 if (retval != STATUS_SUCCESS) {
2428 rtsx_trace(chip);
2429 goto INIT_FAIL;
2430 }
2431
2432 reg_addr = PPBUF_BASE2;
2433 for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2434 int block_no;
2435
2436 retval = rtsx_read_register(chip, reg_addr++, &val1);
2437 if (retval != STATUS_SUCCESS) {
2438 rtsx_trace(chip);
2439 goto INIT_FAIL;
2440 }
2441
2442 retval = rtsx_read_register(chip, reg_addr++, &val2);
2443 if (retval != STATUS_SUCCESS) {
2444 rtsx_trace(chip);
2445 goto INIT_FAIL;
2446 }
2447
2448 defect_block = ((u16)val1 << 8) | val2;
2449 if (defect_block == 0xFFFF)
2450 break;
2451
2452 seg_no = defect_block / 512;
2453
2454 block_no = ms_card->segment[seg_no].disable_count++;
2455 ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2456 }
2457
2458 for (i = 0; i < ms_card->segment_cnt; i++) {
2459 ms_card->segment[i].build_flag = 0;
2460 ms_card->segment[i].l2p_table = NULL;
2461 ms_card->segment[i].free_table = NULL;
2462 ms_card->segment[i].get_index = 0;
2463 ms_card->segment[i].set_index = 0;
2464 ms_card->segment[i].unused_blk_cnt = 0;
2465
2466 dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2467 i, ms_card->segment[i].disable_count);
2468 }
2469
2470 return STATUS_SUCCESS;
2471
2472INIT_FAIL:
2473 vfree(ms_card->segment);
2474 ms_card->segment = NULL;
2475
2476 return STATUS_FAIL;
2477}
2478
2479static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2480{
2481 struct ms_info *ms_card = &chip->ms_card;
2482 struct zone_entry *segment;
2483
2484 if (!ms_card->segment)
2485 return 0xFFFF;
2486
2487 segment = &ms_card->segment[seg_no];
2488
2489 if (segment->l2p_table)
2490 return segment->l2p_table[log_off];
2491
2492 return 0xFFFF;
2493}
2494
2495static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2496 int seg_no, u16 log_off, u16 phy_blk)
2497{
2498 struct ms_info *ms_card = &chip->ms_card;
2499 struct zone_entry *segment;
2500
2501 if (!ms_card->segment)
2502 return;
2503
2504 segment = &ms_card->segment[seg_no];
2505 if (segment->l2p_table)
2506 segment->l2p_table[log_off] = phy_blk;
2507}
2508
2509static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2510{
2511 struct ms_info *ms_card = &chip->ms_card;
2512 struct zone_entry *segment;
2513 int seg_no;
2514
2515 seg_no = (int)phy_blk >> 9;
2516 segment = &ms_card->segment[seg_no];
2517
2518 segment->free_table[segment->set_index++] = phy_blk;
2519 if (segment->set_index >= MS_FREE_TABLE_CNT)
2520 segment->set_index = 0;
2521
2522 segment->unused_blk_cnt++;
2523}
2524
2525static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2526{
2527 struct ms_info *ms_card = &chip->ms_card;
2528 struct zone_entry *segment;
2529 u16 phy_blk;
2530
2531 segment = &ms_card->segment[seg_no];
2532
2533 if (segment->unused_blk_cnt <= 0)
2534 return 0xFFFF;
2535
2536 phy_blk = segment->free_table[segment->get_index];
2537 segment->free_table[segment->get_index++] = 0xFFFF;
2538 if (segment->get_index >= MS_FREE_TABLE_CNT)
2539 segment->get_index = 0;
2540
2541 segment->unused_blk_cnt--;
2542
2543 return phy_blk;
2544}
2545
2546static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2547 2974, 3470, 3966, 4462, 4958,
2548 5454, 5950, 6446, 6942, 7438,
2549 7934};
2550
2551static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2552 u16 log_off, u8 us1, u8 us2)
2553{
2554 struct ms_info *ms_card = &chip->ms_card;
2555 struct zone_entry *segment;
2556 int seg_no;
2557 u16 tmp_blk;
2558
2559 seg_no = (int)phy_blk >> 9;
2560 segment = &ms_card->segment[seg_no];
2561 tmp_blk = segment->l2p_table[log_off];
2562
2563 if (us1 != us2) {
2564 if (us1 == 0) {
2565 if (!(chip->card_wp & MS_CARD))
2566 ms_erase_block(chip, tmp_blk);
2567
2568 ms_set_unused_block(chip, tmp_blk);
2569 segment->l2p_table[log_off] = phy_blk;
2570 } else {
2571 if (!(chip->card_wp & MS_CARD))
2572 ms_erase_block(chip, phy_blk);
2573
2574 ms_set_unused_block(chip, phy_blk);
2575 }
2576 } else {
2577 if (phy_blk < tmp_blk) {
2578 if (!(chip->card_wp & MS_CARD))
2579 ms_erase_block(chip, phy_blk);
2580
2581 ms_set_unused_block(chip, phy_blk);
2582 } else {
2583 if (!(chip->card_wp & MS_CARD))
2584 ms_erase_block(chip, tmp_blk);
2585
2586 ms_set_unused_block(chip, tmp_blk);
2587 segment->l2p_table[log_off] = phy_blk;
2588 }
2589 }
2590
2591 return STATUS_SUCCESS;
2592}
2593
2594static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2595{
2596 struct ms_info *ms_card = &chip->ms_card;
2597 struct zone_entry *segment;
2598 bool defect_flag;
2599 int retval, table_size, disable_cnt, i;
2600 u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2601 u8 extra[MS_EXTRA_SIZE], us1, us2;
2602
2603 dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
2604
2605 if (!ms_card->segment) {
2606 retval = ms_init_l2p_tbl(chip);
2607 if (retval != STATUS_SUCCESS) {
2608 rtsx_trace(chip);
2609 return retval;
2610 }
2611 }
2612
2613 if (ms_card->segment[seg_no].build_flag) {
2614 dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2615 seg_no);
2616 return STATUS_SUCCESS;
2617 }
2618
2619 if (seg_no == 0)
2620 table_size = 494;
2621 else
2622 table_size = 496;
2623
2624 segment = &ms_card->segment[seg_no];
2625
2626 if (!segment->l2p_table) {
2627 segment->l2p_table = vmalloc(table_size * 2);
2628 if (!segment->l2p_table) {
2629 rtsx_trace(chip);
2630 goto BUILD_FAIL;
2631 }
2632 }
2633 memset((u8 *)(segment->l2p_table), 0xff, table_size * 2);
2634
2635 if (!segment->free_table) {
2636 segment->free_table = vmalloc(MS_FREE_TABLE_CNT * 2);
2637 if (!segment->free_table) {
2638 rtsx_trace(chip);
2639 goto BUILD_FAIL;
2640 }
2641 }
2642 memset((u8 *)(segment->free_table), 0xff, MS_FREE_TABLE_CNT * 2);
2643
2644 start = (u16)seg_no << 9;
2645 end = (u16)(seg_no + 1) << 9;
2646
2647 disable_cnt = segment->disable_count;
2648
2649 segment->get_index = 0;
2650 segment->set_index = 0;
2651 segment->unused_blk_cnt = 0;
2652
2653 for (phy_blk = start; phy_blk < end; phy_blk++) {
2654 if (disable_cnt) {
2655 defect_flag = false;
2656 for (i = 0; i < segment->disable_count; i++) {
2657 if (phy_blk == segment->defect_list[i]) {
2658 defect_flag = true;
2659 break;
2660 }
2661 }
2662 if (defect_flag) {
2663 disable_cnt--;
2664 continue;
2665 }
2666 }
2667
2668 retval = ms_read_extra_data(chip, phy_blk, 0,
2669 extra, MS_EXTRA_SIZE);
2670 if (retval != STATUS_SUCCESS) {
2671 dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2672 ms_set_bad_block(chip, phy_blk);
2673 continue;
2674 }
2675
2676 if (seg_no == ms_card->segment_cnt - 1) {
2677 if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2678 if (!(chip->card_wp & MS_CARD)) {
2679 retval = ms_erase_block(chip, phy_blk);
2680 if (retval != STATUS_SUCCESS)
2681 continue;
2682 extra[2] = 0xff;
2683 extra[3] = 0xff;
2684 }
2685 }
2686 }
2687
2688 if (!(extra[0] & BLOCK_OK))
2689 continue;
2690 if (!(extra[1] & NOT_BOOT_BLOCK))
2691 continue;
2692 if ((extra[0] & PAGE_OK) != PAGE_OK)
2693 continue;
2694
2695 log_blk = ((u16)extra[2] << 8) | extra[3];
2696
2697 if (log_blk == 0xFFFF) {
2698 if (!(chip->card_wp & MS_CARD)) {
2699 retval = ms_erase_block(chip, phy_blk);
2700 if (retval != STATUS_SUCCESS)
2701 continue;
2702 }
2703 ms_set_unused_block(chip, phy_blk);
2704 continue;
2705 }
2706
2707 if ((log_blk < ms_start_idx[seg_no]) ||
2708 (log_blk >= ms_start_idx[seg_no + 1])) {
2709 if (!(chip->card_wp & MS_CARD)) {
2710 retval = ms_erase_block(chip, phy_blk);
2711 if (retval != STATUS_SUCCESS)
2712 continue;
2713 }
2714 ms_set_unused_block(chip, phy_blk);
2715 continue;
2716 }
2717
2718 idx = log_blk - ms_start_idx[seg_no];
2719
2720 if (segment->l2p_table[idx] == 0xFFFF) {
2721 segment->l2p_table[idx] = phy_blk;
2722 continue;
2723 }
2724
2725 us1 = extra[0] & 0x10;
2726 tmp_blk = segment->l2p_table[idx];
2727 retval = ms_read_extra_data(chip, tmp_blk, 0,
2728 extra, MS_EXTRA_SIZE);
2729 if (retval != STATUS_SUCCESS)
2730 continue;
2731 us2 = extra[0] & 0x10;
2732
2733 (void)ms_arbitrate_l2p(chip, phy_blk,
2734 log_blk - ms_start_idx[seg_no], us1, us2);
2735 continue;
2736 }
2737
2738 segment->build_flag = 1;
2739
2740 dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2741 segment->unused_blk_cnt);
2742
2743
2744 if (seg_no == ms_card->segment_cnt - 1) {
2745 if (segment->unused_blk_cnt < 2)
2746 chip->card_wp |= MS_CARD;
2747 } else {
2748 if (segment->unused_blk_cnt < 1)
2749 chip->card_wp |= MS_CARD;
2750 }
2751
2752 if (chip->card_wp & MS_CARD)
2753 return STATUS_SUCCESS;
2754
2755 for (log_blk = ms_start_idx[seg_no];
2756 log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2757 idx = log_blk - ms_start_idx[seg_no];
2758 if (segment->l2p_table[idx] == 0xFFFF) {
2759 phy_blk = ms_get_unused_block(chip, seg_no);
2760 if (phy_blk == 0xFFFF) {
2761 chip->card_wp |= MS_CARD;
2762 return STATUS_SUCCESS;
2763 }
2764 retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2765 if (retval != STATUS_SUCCESS) {
2766 rtsx_trace(chip);
2767 goto BUILD_FAIL;
2768 }
2769
2770 segment->l2p_table[idx] = phy_blk;
2771 if (seg_no == ms_card->segment_cnt - 1) {
2772 if (segment->unused_blk_cnt < 2) {
2773 chip->card_wp |= MS_CARD;
2774 return STATUS_SUCCESS;
2775 }
2776 } else {
2777 if (segment->unused_blk_cnt < 1) {
2778 chip->card_wp |= MS_CARD;
2779 return STATUS_SUCCESS;
2780 }
2781 }
2782 }
2783 }
2784
2785
2786 if (seg_no == 0) {
2787 for (log_blk = 0; log_blk < 494; log_blk++) {
2788 tmp_blk = segment->l2p_table[log_blk];
2789 if (tmp_blk < ms_card->boot_block) {
2790 dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2791
2792 if (chip->card_wp & MS_CARD)
2793 break;
2794
2795 phy_blk = ms_get_unused_block(chip, 0);
2796 retval = ms_copy_page(chip, tmp_blk, phy_blk,
2797 log_blk, 0,
2798 ms_card->page_off + 1);
2799 if (retval != STATUS_SUCCESS) {
2800 rtsx_trace(chip);
2801 return STATUS_FAIL;
2802 }
2803
2804 segment->l2p_table[log_blk] = phy_blk;
2805
2806 retval = ms_set_bad_block(chip, tmp_blk);
2807 if (retval != STATUS_SUCCESS) {
2808 rtsx_trace(chip);
2809 return STATUS_FAIL;
2810 }
2811 }
2812 }
2813 }
2814
2815 return STATUS_SUCCESS;
2816
2817BUILD_FAIL:
2818 segment->build_flag = 0;
2819 vfree(segment->l2p_table);
2820 segment->l2p_table = NULL;
2821 vfree(segment->free_table);
2822 segment->free_table = NULL;
2823
2824 return STATUS_FAIL;
2825}
2826
2827int reset_ms_card(struct rtsx_chip *chip)
2828{
2829 struct ms_info *ms_card = &chip->ms_card;
2830 int retval;
2831
2832 memset(ms_card, 0, sizeof(struct ms_info));
2833
2834 retval = enable_card_clock(chip, MS_CARD);
2835 if (retval != STATUS_SUCCESS) {
2836 rtsx_trace(chip);
2837 return STATUS_FAIL;
2838 }
2839
2840 retval = select_card(chip, MS_CARD);
2841 if (retval != STATUS_SUCCESS) {
2842 rtsx_trace(chip);
2843 return STATUS_FAIL;
2844 }
2845
2846 ms_card->ms_type = 0;
2847
2848 retval = reset_ms_pro(chip);
2849 if (retval != STATUS_SUCCESS) {
2850 if (ms_card->check_ms_flow) {
2851 retval = reset_ms(chip);
2852 if (retval != STATUS_SUCCESS) {
2853 rtsx_trace(chip);
2854 return STATUS_FAIL;
2855 }
2856 } else {
2857 rtsx_trace(chip);
2858 return STATUS_FAIL;
2859 }
2860 }
2861
2862 retval = ms_set_init_para(chip);
2863 if (retval != STATUS_SUCCESS) {
2864 rtsx_trace(chip);
2865 return STATUS_FAIL;
2866 }
2867
2868 if (!CHK_MSPRO(ms_card)) {
2869
2870
2871
2872 retval = ms_build_l2p_tbl(chip, ms_card->total_block / 512 - 1);
2873 if (retval != STATUS_SUCCESS) {
2874 rtsx_trace(chip);
2875 return STATUS_FAIL;
2876 }
2877 }
2878
2879 dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2880
2881 return STATUS_SUCCESS;
2882}
2883
2884static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2885 u32 start_sec, u16 sec_cnt, u8 cmd)
2886{
2887 int retval, i;
2888 u8 data[8];
2889
2890 data[0] = cmd;
2891 data[1] = (u8)(sec_cnt >> 8);
2892 data[2] = (u8)sec_cnt;
2893 data[3] = (u8)(start_sec >> 24);
2894 data[4] = (u8)(start_sec >> 16);
2895 data[5] = (u8)(start_sec >> 8);
2896 data[6] = (u8)start_sec;
2897 data[7] = 0;
2898
2899 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2900 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2901 WAIT_INT, data, 8);
2902 if (retval == STATUS_SUCCESS)
2903 break;
2904 }
2905 if (i == MS_MAX_RETRY_COUNT) {
2906 rtsx_trace(chip);
2907 return STATUS_FAIL;
2908 }
2909
2910 return STATUS_SUCCESS;
2911}
2912
2913void mspro_stop_seq_mode(struct rtsx_chip *chip)
2914{
2915 struct ms_info *ms_card = &chip->ms_card;
2916 int retval;
2917
2918 if (ms_card->seq_mode) {
2919 retval = ms_switch_clock(chip);
2920 if (retval != STATUS_SUCCESS)
2921 return;
2922
2923 ms_card->seq_mode = 0;
2924 ms_card->total_sec_cnt = 0;
2925 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2926
2927 rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2928 }
2929}
2930
2931static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2932{
2933 struct ms_info *ms_card = &chip->ms_card;
2934 int retval;
2935
2936 if (chip->asic_code) {
2937 if (ms_card->ms_clock > 30)
2938 ms_card->ms_clock -= 20;
2939 } else {
2940 if (ms_card->ms_clock == CLK_80)
2941 ms_card->ms_clock = CLK_60;
2942 else if (ms_card->ms_clock == CLK_60)
2943 ms_card->ms_clock = CLK_40;
2944 }
2945
2946 retval = ms_switch_clock(chip);
2947 if (retval != STATUS_SUCCESS) {
2948 rtsx_trace(chip);
2949 return STATUS_FAIL;
2950 }
2951
2952 return STATUS_SUCCESS;
2953}
2954
2955static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2956 struct rtsx_chip *chip, u32 start_sector,
2957 u16 sector_cnt)
2958{
2959 struct ms_info *ms_card = &chip->ms_card;
2960 bool mode_2k = false;
2961 int retval;
2962 u16 count;
2963 u8 val, trans_mode, rw_tpc, rw_cmd;
2964
2965 ms_set_err_code(chip, MS_NO_ERROR);
2966
2967 ms_card->cleanup_counter = 0;
2968
2969 if (CHK_MSHG(ms_card)) {
2970 if ((start_sector % 4) || (sector_cnt % 4)) {
2971 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2972 rw_tpc = PRO_READ_LONG_DATA;
2973 rw_cmd = PRO_READ_DATA;
2974 } else {
2975 rw_tpc = PRO_WRITE_LONG_DATA;
2976 rw_cmd = PRO_WRITE_DATA;
2977 }
2978 } else {
2979 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2980 rw_tpc = PRO_READ_QUAD_DATA;
2981 rw_cmd = PRO_READ_2K_DATA;
2982 } else {
2983 rw_tpc = PRO_WRITE_QUAD_DATA;
2984 rw_cmd = PRO_WRITE_2K_DATA;
2985 }
2986 mode_2k = true;
2987 }
2988 } else {
2989 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2990 rw_tpc = PRO_READ_LONG_DATA;
2991 rw_cmd = PRO_READ_DATA;
2992 } else {
2993 rw_tpc = PRO_WRITE_LONG_DATA;
2994 rw_cmd = PRO_WRITE_DATA;
2995 }
2996 }
2997
2998 retval = ms_switch_clock(chip);
2999 if (retval != STATUS_SUCCESS) {
3000 rtsx_trace(chip);
3001 return STATUS_FAIL;
3002 }
3003
3004 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3005 trans_mode = MS_TM_AUTO_READ;
3006 else
3007 trans_mode = MS_TM_AUTO_WRITE;
3008
3009 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3010 if (retval) {
3011 rtsx_trace(chip);
3012 return retval;
3013 }
3014
3015 if (ms_card->seq_mode) {
3016 if ((ms_card->pre_dir != srb->sc_data_direction) ||
3017 ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
3018 start_sector) ||
3019 (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
3020 (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
3021 !(val & MS_INT_BREQ) ||
3022 ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
3023 ms_card->seq_mode = 0;
3024 ms_card->total_sec_cnt = 0;
3025 if (val & MS_INT_BREQ) {
3026 retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3027 if (retval != STATUS_SUCCESS) {
3028 rtsx_trace(chip);
3029 return STATUS_FAIL;
3030 }
3031
3032 rtsx_write_register(chip, RBCTL, RB_FLUSH,
3033 RB_FLUSH);
3034 }
3035 }
3036 }
3037
3038 if (!ms_card->seq_mode) {
3039 ms_card->total_sec_cnt = 0;
3040 if (sector_cnt >= SEQ_START_CRITERIA) {
3041 if ((ms_card->capacity - start_sector) > 0xFE00)
3042 count = 0xFE00;
3043 else
3044 count = (u16)(ms_card->capacity - start_sector);
3045
3046 if (count > sector_cnt) {
3047 if (mode_2k)
3048 ms_card->seq_mode = MODE_2K_SEQ;
3049 else
3050 ms_card->seq_mode = MODE_512_SEQ;
3051 }
3052 } else {
3053 count = sector_cnt;
3054 }
3055 retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
3056 if (retval != STATUS_SUCCESS) {
3057 ms_card->seq_mode = 0;
3058 rtsx_trace(chip);
3059 return STATUS_FAIL;
3060 }
3061 }
3062
3063 retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
3064 WAIT_INT, mode_2k, scsi_sg_count(srb),
3065 scsi_sglist(srb), scsi_bufflen(srb));
3066 if (retval != STATUS_SUCCESS) {
3067 ms_card->seq_mode = 0;
3068 rtsx_read_register(chip, MS_TRANS_CFG, &val);
3069 rtsx_clear_ms_error(chip);
3070
3071 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3072 chip->rw_need_retry = 0;
3073 dev_dbg(rtsx_dev(chip), "No card exist, exit mspro_rw_multi_sector\n");
3074 rtsx_trace(chip);
3075 return STATUS_FAIL;
3076 }
3077
3078 if (val & MS_INT_BREQ)
3079 ms_send_cmd(chip, PRO_STOP, WAIT_INT);
3080
3081 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3082 dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
3083 chip->rw_need_retry = 1;
3084 ms_auto_tune_clock(chip);
3085 }
3086
3087 rtsx_trace(chip);
3088 return retval;
3089 }
3090
3091 if (ms_card->seq_mode) {
3092 ms_card->pre_sec_addr = start_sector;
3093 ms_card->pre_sec_cnt = sector_cnt;
3094 ms_card->pre_dir = srb->sc_data_direction;
3095 ms_card->total_sec_cnt += sector_cnt;
3096 }
3097
3098 return STATUS_SUCCESS;
3099}
3100
3101static int mspro_read_format_progress(struct rtsx_chip *chip,
3102 const int short_data_len)
3103{
3104 struct ms_info *ms_card = &chip->ms_card;
3105 int retval, i;
3106 u32 total_progress, cur_progress;
3107 u8 cnt, tmp;
3108 u8 data[8];
3109
3110 dev_dbg(rtsx_dev(chip), "mspro_read_format_progress, short_data_len = %d\n",
3111 short_data_len);
3112
3113 retval = ms_switch_clock(chip);
3114 if (retval != STATUS_SUCCESS) {
3115 ms_card->format_status = FORMAT_FAIL;
3116 rtsx_trace(chip);
3117 return STATUS_FAIL;
3118 }
3119
3120 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3121 if (retval != STATUS_SUCCESS) {
3122 ms_card->format_status = FORMAT_FAIL;
3123 rtsx_trace(chip);
3124 return STATUS_FAIL;
3125 }
3126
3127 if (!(tmp & MS_INT_BREQ)) {
3128 if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
3129 MS_INT_ERR)) == MS_INT_CED) {
3130 ms_card->format_status = FORMAT_SUCCESS;
3131 return STATUS_SUCCESS;
3132 }
3133 ms_card->format_status = FORMAT_FAIL;
3134 rtsx_trace(chip);
3135 return STATUS_FAIL;
3136 }
3137
3138 if (short_data_len >= 256)
3139 cnt = 0;
3140 else
3141 cnt = (u8)short_data_len;
3142
3143 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
3144 MS_NO_CHECK_INT);
3145 if (retval != STATUS_SUCCESS) {
3146 ms_card->format_status = FORMAT_FAIL;
3147 rtsx_trace(chip);
3148 return STATUS_FAIL;
3149 }
3150
3151 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
3152 data, 8);
3153 if (retval != STATUS_SUCCESS) {
3154 ms_card->format_status = FORMAT_FAIL;
3155 rtsx_trace(chip);
3156 return STATUS_FAIL;
3157 }
3158
3159 total_progress = (data[0] << 24) | (data[1] << 16) |
3160 (data[2] << 8) | data[3];
3161 cur_progress = (data[4] << 24) | (data[5] << 16) |
3162 (data[6] << 8) | data[7];
3163
3164 dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
3165 total_progress, cur_progress);
3166
3167 if (total_progress == 0) {
3168 ms_card->progress = 0;
3169 } else {
3170 u64 ulltmp = (u64)cur_progress * (u64)65535;
3171
3172 do_div(ulltmp, total_progress);
3173 ms_card->progress = (u16)ulltmp;
3174 }
3175 dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
3176
3177 for (i = 0; i < 5000; i++) {
3178 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3179 if (retval != STATUS_SUCCESS) {
3180 ms_card->format_status = FORMAT_FAIL;
3181 rtsx_trace(chip);
3182 return STATUS_FAIL;
3183 }
3184 if (tmp & (MS_INT_CED | MS_INT_CMDNK |
3185 MS_INT_BREQ | MS_INT_ERR))
3186 break;
3187
3188 wait_timeout(1);
3189 }
3190
3191 retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
3192 if (retval != STATUS_SUCCESS) {
3193 ms_card->format_status = FORMAT_FAIL;
3194 rtsx_trace(chip);
3195 return STATUS_FAIL;
3196 }
3197
3198 if (i == 5000) {
3199 ms_card->format_status = FORMAT_FAIL;
3200 rtsx_trace(chip);
3201 return STATUS_FAIL;
3202 }
3203
3204 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3205 ms_card->format_status = FORMAT_FAIL;
3206 rtsx_trace(chip);
3207 return STATUS_FAIL;
3208 }
3209
3210 if (tmp & MS_INT_CED) {
3211 ms_card->format_status = FORMAT_SUCCESS;
3212 ms_card->pro_under_formatting = 0;
3213 } else if (tmp & MS_INT_BREQ) {
3214 ms_card->format_status = FORMAT_IN_PROGRESS;
3215 } else {
3216 ms_card->format_status = FORMAT_FAIL;
3217 ms_card->pro_under_formatting = 0;
3218 rtsx_trace(chip);
3219 return STATUS_FAIL;
3220 }
3221
3222 return STATUS_SUCCESS;
3223}
3224
3225void mspro_polling_format_status(struct rtsx_chip *chip)
3226{
3227 struct ms_info *ms_card = &chip->ms_card;
3228 int i;
3229
3230 if (ms_card->pro_under_formatting &&
3231 (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
3232 rtsx_set_stat(chip, RTSX_STAT_RUN);
3233
3234 for (i = 0; i < 65535; i++) {
3235 mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
3236 if (ms_card->format_status != FORMAT_IN_PROGRESS)
3237 break;
3238 }
3239 }
3240}
3241
3242int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3243 int short_data_len, bool quick_format)
3244{
3245 struct ms_info *ms_card = &chip->ms_card;
3246 int retval, i;
3247 u8 buf[8], tmp;
3248 u16 para;
3249
3250 retval = ms_switch_clock(chip);
3251 if (retval != STATUS_SUCCESS) {
3252 rtsx_trace(chip);
3253 return STATUS_FAIL;
3254 }
3255
3256 retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, Pro_TPCParm, 0x01);
3257 if (retval != STATUS_SUCCESS) {
3258 rtsx_trace(chip);
3259 return STATUS_FAIL;
3260 }
3261
3262 memset(buf, 0, 2);
3263 switch (short_data_len) {
3264 case 32:
3265 buf[0] = 0;
3266 break;
3267 case 64:
3268 buf[0] = 1;
3269 break;
3270 case 128:
3271 buf[0] = 2;
3272 break;
3273 case 256:
3274 default:
3275 buf[0] = 3;
3276 break;
3277 }
3278
3279 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3280 retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
3281 NO_WAIT_INT, buf, 2);
3282 if (retval == STATUS_SUCCESS)
3283 break;
3284 }
3285 if (i == MS_MAX_RETRY_COUNT) {
3286 rtsx_trace(chip);
3287 return STATUS_FAIL;
3288 }
3289
3290 if (quick_format)
3291 para = 0x0000;
3292 else
3293 para = 0x0001;
3294
3295 retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
3296 if (retval != STATUS_SUCCESS) {
3297 rtsx_trace(chip);
3298 return STATUS_FAIL;
3299 }
3300
3301 retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
3302 if (retval) {
3303 rtsx_trace(chip);
3304 return retval;
3305 }
3306
3307 if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
3308 rtsx_trace(chip);
3309 return STATUS_FAIL;
3310 }
3311
3312 if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
3313 ms_card->pro_under_formatting = 1;
3314 ms_card->progress = 0;
3315 ms_card->format_status = FORMAT_IN_PROGRESS;
3316 return STATUS_SUCCESS;
3317 }
3318
3319 if (tmp & MS_INT_CED) {
3320 ms_card->pro_under_formatting = 0;
3321 ms_card->progress = 0;
3322 ms_card->format_status = FORMAT_SUCCESS;
3323 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
3324 return STATUS_SUCCESS;
3325 }
3326
3327 rtsx_trace(chip);
3328 return STATUS_FAIL;
3329}
3330
3331static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
3332 u16 log_blk, u8 start_page, u8 end_page,
3333 u8 *buf, unsigned int *index,
3334 unsigned int *offset)
3335{
3336 struct ms_info *ms_card = &chip->ms_card;
3337 int retval, i;
3338 u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
3339 u8 *ptr;
3340
3341 retval = ms_read_extra_data(chip, phy_blk, start_page,
3342 extra, MS_EXTRA_SIZE);
3343 if (retval == STATUS_SUCCESS) {
3344 if ((extra[1] & 0x30) != 0x30) {
3345 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3346 rtsx_trace(chip);
3347 return STATUS_FAIL;
3348 }
3349 }
3350
3351 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3352 SystemParm, 6);
3353 if (retval != STATUS_SUCCESS) {
3354 rtsx_trace(chip);
3355 return STATUS_FAIL;
3356 }
3357
3358 if (CHK_MS4BIT(ms_card))
3359 data[0] = 0x88;
3360 else
3361 data[0] = 0x80;
3362
3363 data[1] = 0;
3364 data[2] = (u8)(phy_blk >> 8);
3365 data[3] = (u8)phy_blk;
3366 data[4] = 0;
3367 data[5] = start_page;
3368
3369 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3370 retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
3371 data, 6);
3372 if (retval == STATUS_SUCCESS)
3373 break;
3374 }
3375 if (i == MS_MAX_RETRY_COUNT) {
3376 rtsx_trace(chip);
3377 return STATUS_FAIL;
3378 }
3379
3380 ms_set_err_code(chip, MS_NO_ERROR);
3381
3382 retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3383 if (retval != STATUS_SUCCESS) {
3384 rtsx_trace(chip);
3385 return STATUS_FAIL;
3386 }
3387
3388 ptr = buf;
3389
3390 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3391 ms_set_err_code(chip, MS_NO_ERROR);
3392
3393 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3394 ms_set_err_code(chip, MS_NO_CARD);
3395 rtsx_trace(chip);
3396 return STATUS_FAIL;
3397 }
3398
3399 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3400 if (retval != STATUS_SUCCESS) {
3401 rtsx_trace(chip);
3402 return STATUS_FAIL;
3403 }
3404
3405 if (val & INT_REG_CMDNK) {
3406 ms_set_err_code(chip, MS_CMD_NK);
3407 rtsx_trace(chip);
3408 return STATUS_FAIL;
3409 }
3410 if (val & INT_REG_ERR) {
3411 if (val & INT_REG_BREQ) {
3412 retval = ms_read_status_reg(chip);
3413 if (retval != STATUS_SUCCESS) {
3414 if (!(chip->card_wp & MS_CARD)) {
3415 reset_ms(chip);
3416 ms_set_page_status
3417 (log_blk, setPS_NG,
3418 extra,
3419 MS_EXTRA_SIZE);
3420 ms_write_extra_data
3421 (chip, phy_blk,
3422 page_addr, extra,
3423 MS_EXTRA_SIZE);
3424 }
3425 ms_set_err_code(chip,
3426 MS_FLASH_READ_ERROR);
3427 rtsx_trace(chip);
3428 return STATUS_FAIL;
3429 }
3430 } else {
3431 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3432 rtsx_trace(chip);
3433 return STATUS_FAIL;
3434 }
3435 } else {
3436 if (!(val & INT_REG_BREQ)) {
3437 ms_set_err_code(chip, MS_BREQ_ERROR);
3438 rtsx_trace(chip);
3439 return STATUS_FAIL;
3440 }
3441 }
3442
3443 if (page_addr == (end_page - 1)) {
3444 if (!(val & INT_REG_CED)) {
3445 retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3446 if (retval != STATUS_SUCCESS) {
3447 rtsx_trace(chip);
3448 return STATUS_FAIL;
3449 }
3450 }
3451
3452 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3453 &val, 1);
3454 if (retval != STATUS_SUCCESS) {
3455 rtsx_trace(chip);
3456 return STATUS_FAIL;
3457 }
3458
3459 if (!(val & INT_REG_CED)) {
3460 ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3461 rtsx_trace(chip);
3462 return STATUS_FAIL;
3463 }
3464
3465 trans_cfg = NO_WAIT_INT;
3466 } else {
3467 trans_cfg = WAIT_INT;
3468 }
3469
3470 rtsx_init_cmd(chip);
3471
3472 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3473 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3474 0xFF, trans_cfg);
3475 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3476 0x01, RING_BUFFER);
3477
3478 trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3479
3480 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3481 MS_TRANSFER_START | MS_TM_NORMAL_READ);
3482 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3483 MS_TRANSFER_END, MS_TRANSFER_END);
3484
3485 rtsx_send_cmd_no_wait(chip);
3486
3487 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3488 scsi_sg_count(chip->srb),
3489 index, offset,
3490 DMA_FROM_DEVICE,
3491 chip->ms_timeout);
3492 if (retval < 0) {
3493 if (retval == -ETIMEDOUT) {
3494 ms_set_err_code(chip, MS_TO_ERROR);
3495 rtsx_clear_ms_error(chip);
3496 rtsx_trace(chip);
3497 return STATUS_TIMEDOUT;
3498 }
3499
3500 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3501 if (retval != STATUS_SUCCESS) {
3502 ms_set_err_code(chip, MS_TO_ERROR);
3503 rtsx_clear_ms_error(chip);
3504 rtsx_trace(chip);
3505 return STATUS_TIMEDOUT;
3506 }
3507 if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3508 ms_set_err_code(chip, MS_CRC16_ERROR);
3509 rtsx_clear_ms_error(chip);
3510 rtsx_trace(chip);
3511 return STATUS_FAIL;
3512 }
3513 }
3514
3515 if (scsi_sg_count(chip->srb) == 0)
3516 ptr += 512;
3517 }
3518
3519 return STATUS_SUCCESS;
3520}
3521
3522static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3523 u16 new_blk, u16 log_blk, u8 start_page,
3524 u8 end_page, u8 *buf, unsigned int *index,
3525 unsigned int *offset)
3526{
3527 struct ms_info *ms_card = &chip->ms_card;
3528 int retval, i;
3529 u8 page_addr, val, data[16];
3530 u8 *ptr;
3531
3532 if (!start_page) {
3533 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3534 SystemParm, 7);
3535 if (retval != STATUS_SUCCESS) {
3536 rtsx_trace(chip);
3537 return STATUS_FAIL;
3538 }
3539
3540 if (CHK_MS4BIT(ms_card))
3541 data[0] = 0x88;
3542 else
3543 data[0] = 0x80;
3544
3545 data[1] = 0;
3546 data[2] = (u8)(old_blk >> 8);
3547 data[3] = (u8)old_blk;
3548 data[4] = 0x80;
3549 data[5] = 0;
3550 data[6] = 0xEF;
3551 data[7] = 0xFF;
3552
3553 retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3554 data, 8);
3555 if (retval != STATUS_SUCCESS) {
3556 rtsx_trace(chip);
3557 return STATUS_FAIL;
3558 }
3559
3560 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3561 if (retval != STATUS_SUCCESS) {
3562 rtsx_trace(chip);
3563 return STATUS_FAIL;
3564 }
3565
3566 ms_set_err_code(chip, MS_NO_ERROR);
3567 retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3568 NO_WAIT_INT);
3569 if (retval != STATUS_SUCCESS) {
3570 rtsx_trace(chip);
3571 return STATUS_FAIL;
3572 }
3573 }
3574
3575 retval = ms_set_rw_reg_addr(chip, OverwriteFlag, MS_EXTRA_SIZE,
3576 SystemParm, (6 + MS_EXTRA_SIZE));
3577 if (retval != STATUS_SUCCESS) {
3578 rtsx_trace(chip);
3579 return STATUS_FAIL;
3580 }
3581
3582 ms_set_err_code(chip, MS_NO_ERROR);
3583
3584 if (CHK_MS4BIT(ms_card))
3585 data[0] = 0x88;
3586 else
3587 data[0] = 0x80;
3588
3589 data[1] = 0;
3590 data[2] = (u8)(new_blk >> 8);
3591 data[3] = (u8)new_blk;
3592 if ((end_page - start_page) == 1)
3593 data[4] = 0x20;
3594 else
3595 data[4] = 0;
3596
3597 data[5] = start_page;
3598 data[6] = 0xF8;
3599 data[7] = 0xFF;
3600 data[8] = (u8)(log_blk >> 8);
3601 data[9] = (u8)log_blk;
3602
3603 for (i = 0x0A; i < 0x10; i++)
3604 data[i] = 0xFF;
3605
3606 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3607 retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3608 NO_WAIT_INT, data, 16);
3609 if (retval == STATUS_SUCCESS)
3610 break;
3611 }
3612 if (i == MS_MAX_RETRY_COUNT) {
3613 rtsx_trace(chip);
3614 return STATUS_FAIL;
3615 }
3616
3617 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3618 retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3619 if (retval == STATUS_SUCCESS)
3620 break;
3621 }
3622 if (i == MS_MAX_RETRY_COUNT) {
3623 rtsx_trace(chip);
3624 return STATUS_FAIL;
3625 }
3626
3627 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3628 if (retval != STATUS_SUCCESS) {
3629 rtsx_trace(chip);
3630 return STATUS_FAIL;
3631 }
3632
3633 ptr = buf;
3634 for (page_addr = start_page; page_addr < end_page; page_addr++) {
3635 ms_set_err_code(chip, MS_NO_ERROR);
3636
3637 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3638 ms_set_err_code(chip, MS_NO_CARD);
3639 rtsx_trace(chip);
3640 return STATUS_FAIL;
3641 }
3642
3643 if (val & INT_REG_CMDNK) {
3644 ms_set_err_code(chip, MS_CMD_NK);
3645 rtsx_trace(chip);
3646 return STATUS_FAIL;
3647 }
3648 if (val & INT_REG_ERR) {
3649 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3650 rtsx_trace(chip);
3651 return STATUS_FAIL;
3652 }
3653 if (!(val & INT_REG_BREQ)) {
3654 ms_set_err_code(chip, MS_BREQ_ERROR);
3655 rtsx_trace(chip);
3656 return STATUS_FAIL;
3657 }
3658
3659 udelay(30);
3660
3661 rtsx_init_cmd(chip);
3662
3663 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3664 0xFF, WRITE_PAGE_DATA);
3665 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3666 0xFF, WAIT_INT);
3667 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3668 0x01, RING_BUFFER);
3669
3670 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3671
3672 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3673 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
3674 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3675 MS_TRANSFER_END, MS_TRANSFER_END);
3676
3677 rtsx_send_cmd_no_wait(chip);
3678
3679 retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3680 scsi_sg_count(chip->srb),
3681 index, offset,
3682 DMA_TO_DEVICE,
3683 chip->ms_timeout);
3684 if (retval < 0) {
3685 ms_set_err_code(chip, MS_TO_ERROR);
3686 rtsx_clear_ms_error(chip);
3687
3688 if (retval == -ETIMEDOUT) {
3689 rtsx_trace(chip);
3690 return STATUS_TIMEDOUT;
3691 }
3692 rtsx_trace(chip);
3693 return STATUS_FAIL;
3694 }
3695
3696 retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3697 if (retval != STATUS_SUCCESS) {
3698 rtsx_trace(chip);
3699 return STATUS_FAIL;
3700 }
3701
3702 if ((end_page - start_page) == 1) {
3703 if (!(val & INT_REG_CED)) {
3704 ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3705 rtsx_trace(chip);
3706 return STATUS_FAIL;
3707 }
3708 } else {
3709 if (page_addr == (end_page - 1)) {
3710 if (!(val & INT_REG_CED)) {
3711 retval = ms_send_cmd(chip, BLOCK_END,
3712 WAIT_INT);
3713 if (retval != STATUS_SUCCESS) {
3714 rtsx_trace(chip);
3715 return STATUS_FAIL;
3716 }
3717 }
3718
3719 retval = ms_read_bytes(chip, GET_INT, 1,
3720 NO_WAIT_INT, &val, 1);
3721 if (retval != STATUS_SUCCESS) {
3722 rtsx_trace(chip);
3723 return STATUS_FAIL;
3724 }
3725 }
3726
3727 if ((page_addr == (end_page - 1)) ||
3728 (page_addr == ms_card->page_off)) {
3729 if (!(val & INT_REG_CED)) {
3730 ms_set_err_code(chip,
3731 MS_FLASH_WRITE_ERROR);
3732 rtsx_trace(chip);
3733 return STATUS_FAIL;
3734 }
3735 }
3736 }
3737
3738 if (scsi_sg_count(chip->srb) == 0)
3739 ptr += 512;
3740 }
3741
3742 return STATUS_SUCCESS;
3743}
3744
3745static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3746 u16 log_blk, u8 page_off)
3747{
3748 struct ms_info *ms_card = &chip->ms_card;
3749 int retval, seg_no;
3750
3751 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3752 page_off, ms_card->page_off + 1);
3753 if (retval != STATUS_SUCCESS) {
3754 rtsx_trace(chip);
3755 return STATUS_FAIL;
3756 }
3757
3758 seg_no = old_blk >> 9;
3759
3760 if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3761 MS_CLR_BAD_BLOCK_FLG(ms_card);
3762 ms_set_bad_block(chip, old_blk);
3763 } else {
3764 retval = ms_erase_block(chip, old_blk);
3765 if (retval == STATUS_SUCCESS)
3766 ms_set_unused_block(chip, old_blk);
3767 }
3768
3769 ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3770
3771 return STATUS_SUCCESS;
3772}
3773
3774static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3775 u16 log_blk, u8 start_page)
3776{
3777 int retval;
3778
3779 if (start_page) {
3780 retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3781 0, start_page);
3782 if (retval != STATUS_SUCCESS) {
3783 rtsx_trace(chip);
3784 return STATUS_FAIL;
3785 }
3786 }
3787
3788 return STATUS_SUCCESS;
3789}
3790
3791#ifdef MS_DELAY_WRITE
3792int ms_delay_write(struct rtsx_chip *chip)
3793{
3794 struct ms_info *ms_card = &chip->ms_card;
3795 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3796 int retval;
3797
3798 if (delay_write->delay_write_flag) {
3799 retval = ms_set_init_para(chip);
3800 if (retval != STATUS_SUCCESS) {
3801 rtsx_trace(chip);
3802 return STATUS_FAIL;
3803 }
3804
3805 delay_write->delay_write_flag = 0;
3806 retval = ms_finish_write(chip,
3807 delay_write->old_phyblock,
3808 delay_write->new_phyblock,
3809 delay_write->logblock,
3810 delay_write->pageoff);
3811 if (retval != STATUS_SUCCESS) {
3812 rtsx_trace(chip);
3813 return STATUS_FAIL;
3814 }
3815 }
3816
3817 return STATUS_SUCCESS;
3818}
3819#endif
3820
3821static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3822{
3823 if (srb->sc_data_direction == DMA_FROM_DEVICE)
3824 set_sense_type(chip, SCSI_LUN(srb),
3825 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3826 else
3827 set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3828}
3829
3830static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3831 u32 start_sector, u16 sector_cnt)
3832{
3833 struct ms_info *ms_card = &chip->ms_card;
3834 unsigned int lun = SCSI_LUN(srb);
3835 int retval, seg_no;
3836 unsigned int index = 0, offset = 0;
3837 u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3838 u8 start_page, end_page = 0, page_cnt;
3839 u8 *ptr;
3840#ifdef MS_DELAY_WRITE
3841 struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3842#endif
3843
3844 ms_set_err_code(chip, MS_NO_ERROR);
3845
3846 ms_card->cleanup_counter = 0;
3847
3848 ptr = (u8 *)scsi_sglist(srb);
3849
3850 retval = ms_switch_clock(chip);
3851 if (retval != STATUS_SUCCESS) {
3852 ms_rw_fail(srb, chip);
3853 rtsx_trace(chip);
3854 return STATUS_FAIL;
3855 }
3856
3857 log_blk = (u16)(start_sector >> ms_card->block_shift);
3858 start_page = (u8)(start_sector & ms_card->page_off);
3859
3860 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3861 if (log_blk < ms_start_idx[seg_no + 1])
3862 break;
3863 }
3864
3865 if (ms_card->segment[seg_no].build_flag == 0) {
3866 retval = ms_build_l2p_tbl(chip, seg_no);
3867 if (retval != STATUS_SUCCESS) {
3868 chip->card_fail |= MS_CARD;
3869 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3870 rtsx_trace(chip);
3871 return STATUS_FAIL;
3872 }
3873 }
3874
3875 if (srb->sc_data_direction == DMA_TO_DEVICE) {
3876#ifdef MS_DELAY_WRITE
3877 if (delay_write->delay_write_flag &&
3878 (delay_write->logblock == log_blk) &&
3879 (start_page > delay_write->pageoff)) {
3880 delay_write->delay_write_flag = 0;
3881 retval = ms_copy_page(chip,
3882 delay_write->old_phyblock,
3883 delay_write->new_phyblock,
3884 log_blk,
3885 delay_write->pageoff, start_page);
3886 if (retval != STATUS_SUCCESS) {
3887 set_sense_type(chip, lun,
3888 SENSE_TYPE_MEDIA_WRITE_ERR);
3889 rtsx_trace(chip);
3890 return STATUS_FAIL;
3891 }
3892 old_blk = delay_write->old_phyblock;
3893 new_blk = delay_write->new_phyblock;
3894 } else if (delay_write->delay_write_flag &&
3895 (delay_write->logblock == log_blk) &&
3896 (start_page == delay_write->pageoff)) {
3897 delay_write->delay_write_flag = 0;
3898 old_blk = delay_write->old_phyblock;
3899 new_blk = delay_write->new_phyblock;
3900 } else {
3901 retval = ms_delay_write(chip);
3902 if (retval != STATUS_SUCCESS) {
3903 set_sense_type(chip, lun,
3904 SENSE_TYPE_MEDIA_WRITE_ERR);
3905 rtsx_trace(chip);
3906 return STATUS_FAIL;
3907 }
3908#endif
3909 old_blk = ms_get_l2p_tbl
3910 (chip, seg_no,
3911 log_blk - ms_start_idx[seg_no]);
3912 new_blk = ms_get_unused_block(chip, seg_no);
3913 if ((old_blk == 0xFFFF) || (new_blk == 0xFFFF)) {
3914 set_sense_type(chip, lun,
3915 SENSE_TYPE_MEDIA_WRITE_ERR);
3916 rtsx_trace(chip);
3917 return STATUS_FAIL;
3918 }
3919
3920 retval = ms_prepare_write(chip, old_blk, new_blk,
3921 log_blk, start_page);
3922 if (retval != STATUS_SUCCESS) {
3923 if (detect_card_cd(chip, MS_CARD) !=
3924 STATUS_SUCCESS) {
3925 set_sense_type
3926 (chip, lun,
3927 SENSE_TYPE_MEDIA_NOT_PRESENT);
3928 rtsx_trace(chip);
3929 return STATUS_FAIL;
3930 }
3931 set_sense_type(chip, lun,
3932 SENSE_TYPE_MEDIA_WRITE_ERR);
3933 rtsx_trace(chip);
3934 return STATUS_FAIL;
3935 }
3936#ifdef MS_DELAY_WRITE
3937 }
3938#endif
3939 } else {
3940#ifdef MS_DELAY_WRITE
3941 retval = ms_delay_write(chip);
3942 if (retval != STATUS_SUCCESS) {
3943 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3944 set_sense_type(chip, lun,
3945 SENSE_TYPE_MEDIA_NOT_PRESENT);
3946 rtsx_trace(chip);
3947 return STATUS_FAIL;
3948 }
3949 set_sense_type(chip, lun,
3950 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3951 rtsx_trace(chip);
3952 return STATUS_FAIL;
3953 }
3954#endif
3955 old_blk = ms_get_l2p_tbl(chip, seg_no,
3956 log_blk - ms_start_idx[seg_no]);
3957 if (old_blk == 0xFFFF) {
3958 set_sense_type(chip, lun,
3959 SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3960 rtsx_trace(chip);
3961 return STATUS_FAIL;
3962 }
3963 }
3964
3965 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3966 seg_no, old_blk, new_blk);
3967
3968 while (total_sec_cnt) {
3969 if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3970 end_page = ms_card->page_off + 1;
3971 else
3972 end_page = start_page + (u8)total_sec_cnt;
3973
3974 page_cnt = end_page - start_page;
3975
3976 dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3977 start_page, end_page, page_cnt);
3978
3979 if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3980 retval = ms_read_multiple_pages(chip,
3981 old_blk, log_blk,
3982 start_page, end_page,
3983 ptr, &index, &offset);
3984 } else {
3985 retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3986 log_blk, start_page,
3987 end_page, ptr, &index,
3988 &offset);
3989 }
3990
3991 if (retval != STATUS_SUCCESS) {
3992 toggle_gpio(chip, 1);
3993 if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3994 set_sense_type(chip, lun,
3995 SENSE_TYPE_MEDIA_NOT_PRESENT);
3996 rtsx_trace(chip);
3997 return STATUS_FAIL;
3998 }
3999 ms_rw_fail(srb, chip);
4000 rtsx_trace(chip);
4001 return STATUS_FAIL;
4002 }
4003
4004 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4005 if (end_page == (ms_card->page_off + 1)) {
4006 retval = ms_erase_block(chip, old_blk);
4007 if (retval == STATUS_SUCCESS)
4008 ms_set_unused_block(chip, old_blk);
4009
4010 ms_set_l2p_tbl(chip, seg_no,
4011 log_blk - ms_start_idx[seg_no],
4012 new_blk);
4013 }
4014 }
4015
4016 total_sec_cnt -= page_cnt;
4017 if (scsi_sg_count(srb) == 0)
4018 ptr += page_cnt * 512;
4019
4020 if (total_sec_cnt == 0)
4021 break;
4022
4023 log_blk++;
4024
4025 for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
4026 seg_no++) {
4027 if (log_blk < ms_start_idx[seg_no + 1])
4028 break;
4029 }
4030
4031 if (ms_card->segment[seg_no].build_flag == 0) {
4032 retval = ms_build_l2p_tbl(chip, seg_no);
4033 if (retval != STATUS_SUCCESS) {
4034 chip->card_fail |= MS_CARD;
4035 set_sense_type(chip, lun,
4036 SENSE_TYPE_MEDIA_NOT_PRESENT);
4037 rtsx_trace(chip);
4038 return STATUS_FAIL;
4039 }
4040 }
4041
4042 old_blk = ms_get_l2p_tbl(chip, seg_no,
4043 log_blk - ms_start_idx[seg_no]);
4044 if (old_blk == 0xFFFF) {
4045 ms_rw_fail(srb, chip);
4046 rtsx_trace(chip);
4047 return STATUS_FAIL;
4048 }
4049
4050 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4051 new_blk = ms_get_unused_block(chip, seg_no);
4052 if (new_blk == 0xFFFF) {
4053 ms_rw_fail(srb, chip);
4054 rtsx_trace(chip);
4055 return STATUS_FAIL;
4056 }
4057 }
4058
4059 dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
4060 seg_no, old_blk, new_blk);
4061
4062 start_page = 0;
4063 }
4064
4065 if (srb->sc_data_direction == DMA_TO_DEVICE) {
4066 if (end_page < (ms_card->page_off + 1)) {
4067#ifdef MS_DELAY_WRITE
4068 delay_write->delay_write_flag = 1;
4069 delay_write->old_phyblock = old_blk;
4070 delay_write->new_phyblock = new_blk;
4071 delay_write->logblock = log_blk;
4072 delay_write->pageoff = end_page;
4073#else
4074 retval = ms_finish_write(chip, old_blk, new_blk,
4075 log_blk, end_page);
4076 if (retval != STATUS_SUCCESS) {
4077 if (detect_card_cd(chip, MS_CARD) !=
4078 STATUS_SUCCESS) {
4079 set_sense_type
4080 (chip, lun,
4081 SENSE_TYPE_MEDIA_NOT_PRESENT);
4082 rtsx_trace(chip);
4083 return STATUS_FAIL;
4084 }
4085
4086 ms_rw_fail(srb, chip);
4087 rtsx_trace(chip);
4088 return STATUS_FAIL;
4089 }
4090#endif
4091 }
4092 }
4093
4094 scsi_set_resid(srb, 0);
4095
4096 return STATUS_SUCCESS;
4097}
4098
4099int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
4100 u32 start_sector, u16 sector_cnt)
4101{
4102 struct ms_info *ms_card = &chip->ms_card;
4103 int retval;
4104
4105 if (CHK_MSPRO(ms_card))
4106 retval = mspro_rw_multi_sector(srb, chip, start_sector,
4107 sector_cnt);
4108 else
4109 retval = ms_rw_multi_sector(srb, chip, start_sector,
4110 sector_cnt);
4111
4112 return retval;
4113}
4114
4115void ms_free_l2p_tbl(struct rtsx_chip *chip)
4116{
4117 struct ms_info *ms_card = &chip->ms_card;
4118 int i = 0;
4119
4120 if (ms_card->segment) {
4121 for (i = 0; i < ms_card->segment_cnt; i++) {
4122 vfree(ms_card->segment[i].l2p_table);
4123 ms_card->segment[i].l2p_table = NULL;
4124 vfree(ms_card->segment[i].free_table);
4125 ms_card->segment[i].free_table = NULL;
4126 }
4127 vfree(ms_card->segment);
4128 ms_card->segment = NULL;
4129 }
4130}
4131
4132#ifdef SUPPORT_MAGIC_GATE
4133
4134#ifdef READ_BYTES_WAIT_INT
4135static int ms_poll_int(struct rtsx_chip *chip)
4136{
4137 int retval;
4138 u8 val;
4139
4140 rtsx_init_cmd(chip);
4141
4142 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
4143
4144 retval = rtsx_send_cmd(chip, MS_CARD, 5000);
4145 if (retval != STATUS_SUCCESS) {
4146 rtsx_trace(chip);
4147 return STATUS_FAIL;
4148 }
4149
4150 val = *rtsx_get_cmd_data(chip);
4151 if (val & MS_INT_ERR) {
4152 rtsx_trace(chip);
4153 return STATUS_FAIL;
4154 }
4155
4156 return STATUS_SUCCESS;
4157}
4158#endif
4159
4160#ifdef MS_SAMPLE_INT_ERR
4161static int check_ms_err(struct rtsx_chip *chip)
4162{
4163 int retval;
4164 u8 val;
4165
4166 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4167 if (retval != STATUS_SUCCESS)
4168 return 1;
4169 if (val & MS_TRANSFER_ERR)
4170 return 1;
4171
4172 retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
4173 if (retval != STATUS_SUCCESS)
4174 return 1;
4175
4176 if (val & (MS_INT_ERR | MS_INT_CMDNK))
4177 return 1;
4178
4179 return 0;
4180}
4181#else
4182static int check_ms_err(struct rtsx_chip *chip)
4183{
4184 int retval;
4185 u8 val;
4186
4187 retval = rtsx_read_register(chip, MS_TRANSFER, &val);
4188 if (retval != STATUS_SUCCESS)
4189 return 1;
4190 if (val & MS_TRANSFER_ERR)
4191 return 1;
4192
4193 return 0;
4194}
4195#endif
4196
4197static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
4198{
4199 int retval, i;
4200 u8 data[8];
4201
4202 data[0] = cmd;
4203 data[1] = 0;
4204 data[2] = 0;
4205 data[3] = 0;
4206 data[4] = 0;
4207 data[5] = 0;
4208 data[6] = entry_num;
4209 data[7] = 0;
4210
4211 for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
4212 retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
4213 data, 8);
4214 if (retval == STATUS_SUCCESS)
4215 break;
4216 }
4217 if (i == MS_MAX_RETRY_COUNT) {
4218 rtsx_trace(chip);
4219 return STATUS_FAIL;
4220 }
4221
4222 if (check_ms_err(chip)) {
4223 rtsx_clear_ms_error(chip);
4224 rtsx_trace(chip);
4225 return STATUS_FAIL;
4226 }
4227
4228 return STATUS_SUCCESS;
4229}
4230
4231static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
4232 u8 mg_entry_num)
4233{
4234 int retval;
4235 u8 buf[6];
4236
4237 if (type == 0)
4238 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_TPCParm, 1);
4239 else
4240 retval = ms_set_rw_reg_addr(chip, 0, 0, Pro_DataCount1, 6);
4241
4242 if (retval != STATUS_SUCCESS) {
4243 rtsx_trace(chip);
4244 return STATUS_FAIL;
4245 }
4246
4247 buf[0] = 0;
4248 buf[1] = 0;
4249 if (type == 1) {
4250 buf[2] = 0;
4251 buf[3] = 0;
4252 buf[4] = 0;
4253 buf[5] = mg_entry_num;
4254 }
4255 retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
4256 NO_WAIT_INT, buf, 6);
4257 if (retval != STATUS_SUCCESS) {
4258 rtsx_trace(chip);
4259 return STATUS_FAIL;
4260 }
4261
4262 return STATUS_SUCCESS;
4263}
4264
4265int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4266{
4267 int retval;
4268 int i;
4269 unsigned int lun = SCSI_LUN(srb);
4270 u8 buf1[32], buf2[12];
4271
4272 if (scsi_bufflen(srb) < 12) {
4273 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
4274 rtsx_trace(chip);
4275 return STATUS_FAIL;
4276 }
4277
4278 ms_cleanup_work(chip);
4279
4280 retval = ms_switch_clock(chip);
4281 if (retval != STATUS_SUCCESS) {
4282 rtsx_trace(chip);
4283 return STATUS_FAIL;
4284 }
4285
4286 retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
4287 if (retval != STATUS_SUCCESS) {
4288 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4289 rtsx_trace(chip);
4290 return STATUS_FAIL;
4291 }
4292
4293 memset(buf1, 0, 32);
4294 rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
4295 for (i = 0; i < 8; i++)
4296 buf1[8 + i] = buf2[4 + i];
4297
4298 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4299 buf1, 32);
4300 if (retval != STATUS_SUCCESS) {
4301 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4302 rtsx_trace(chip);
4303 return STATUS_FAIL;
4304 }
4305 if (check_ms_err(chip)) {
4306 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4307 rtsx_clear_ms_error(chip);
4308 rtsx_trace(chip);
4309 return STATUS_FAIL;
4310 }
4311
4312 return STATUS_SUCCESS;
4313}
4314
4315int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4316{
4317 int retval = STATUS_FAIL;
4318 int bufflen;
4319 unsigned int lun = SCSI_LUN(srb);
4320 u8 *buf = NULL;
4321
4322 ms_cleanup_work(chip);
4323
4324 retval = ms_switch_clock(chip);
4325 if (retval != STATUS_SUCCESS) {
4326 rtsx_trace(chip);
4327 return STATUS_FAIL;
4328 }
4329
4330 buf = kmalloc(1540, GFP_KERNEL);
4331 if (!buf) {
4332 rtsx_trace(chip);
4333 return STATUS_ERROR;
4334 }
4335
4336 buf[0] = 0x04;
4337 buf[1] = 0x1A;
4338 buf[2] = 0x00;
4339 buf[3] = 0x00;
4340
4341 retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
4342 if (retval != STATUS_SUCCESS) {
4343 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4344 rtsx_trace(chip);
4345 goto free_buffer;
4346 }
4347
4348 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4349 3, WAIT_INT, 0, 0, buf + 4, 1536);
4350 if (retval != STATUS_SUCCESS) {
4351 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4352 rtsx_clear_ms_error(chip);
4353 rtsx_trace(chip);
4354 goto free_buffer;
4355 }
4356 if (check_ms_err(chip)) {
4357 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4358 rtsx_clear_ms_error(chip);
4359 rtsx_trace(chip);
4360 retval = STATUS_FAIL;
4361 goto free_buffer;
4362 }
4363
4364 bufflen = min_t(int, 1052, scsi_bufflen(srb));
4365 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4366
4367free_buffer:
4368 kfree(buf);
4369 return retval;
4370}
4371
4372int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4373{
4374 struct ms_info *ms_card = &chip->ms_card;
4375 int retval;
4376 int bufflen;
4377 int i;
4378 unsigned int lun = SCSI_LUN(srb);
4379 u8 buf[32];
4380
4381 ms_cleanup_work(chip);
4382
4383 retval = ms_switch_clock(chip);
4384 if (retval != STATUS_SUCCESS) {
4385 rtsx_trace(chip);
4386 return STATUS_FAIL;
4387 }
4388
4389 retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
4390 if (retval != STATUS_SUCCESS) {
4391 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4392 rtsx_trace(chip);
4393 return STATUS_FAIL;
4394 }
4395
4396 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4397 buf, 32);
4398 if (retval != STATUS_SUCCESS) {
4399 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4400 rtsx_trace(chip);
4401 return STATUS_FAIL;
4402 }
4403 if (check_ms_err(chip)) {
4404 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4405 rtsx_clear_ms_error(chip);
4406 rtsx_trace(chip);
4407 return STATUS_FAIL;
4408 }
4409
4410 memcpy(ms_card->magic_gate_id, buf, 16);
4411
4412#ifdef READ_BYTES_WAIT_INT
4413 retval = ms_poll_int(chip);
4414 if (retval != STATUS_SUCCESS) {
4415 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4416 rtsx_trace(chip);
4417 return STATUS_FAIL;
4418 }
4419#endif
4420
4421 retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
4422 if (retval != STATUS_SUCCESS) {
4423 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4424 rtsx_trace(chip);
4425 return STATUS_FAIL;
4426 }
4427
4428 bufflen = min_t(int, 12, scsi_bufflen(srb));
4429 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4430
4431 for (i = 0; i < 8; i++)
4432 buf[i] = buf[4 + i];
4433
4434 for (i = 0; i < 24; i++)
4435 buf[8 + i] = 0;
4436
4437 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
4438 32, WAIT_INT, buf, 32);
4439 if (retval != STATUS_SUCCESS) {
4440 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4441 rtsx_trace(chip);
4442 return STATUS_FAIL;
4443 }
4444 if (check_ms_err(chip)) {
4445 set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
4446 rtsx_clear_ms_error(chip);
4447 rtsx_trace(chip);
4448 return STATUS_FAIL;
4449 }
4450
4451 ms_card->mg_auth = 0;
4452
4453 return STATUS_SUCCESS;
4454}
4455
4456int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4457{
4458 struct ms_info *ms_card = &chip->ms_card;
4459 int retval;
4460 int bufflen;
4461 unsigned int lun = SCSI_LUN(srb);
4462 u8 buf1[32], buf2[36];
4463
4464 ms_cleanup_work(chip);
4465
4466 retval = ms_switch_clock(chip);
4467 if (retval != STATUS_SUCCESS) {
4468 rtsx_trace(chip);
4469 return STATUS_FAIL;
4470 }
4471
4472 retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
4473 if (retval != STATUS_SUCCESS) {
4474 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4475 rtsx_trace(chip);
4476 return STATUS_FAIL;
4477 }
4478
4479 retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
4480 buf1, 32);
4481 if (retval != STATUS_SUCCESS) {
4482 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4483 rtsx_trace(chip);
4484 return STATUS_FAIL;
4485 }
4486 if (check_ms_err(chip)) {
4487 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4488 rtsx_clear_ms_error(chip);
4489 rtsx_trace(chip);
4490 return STATUS_FAIL;
4491 }
4492
4493 buf2[0] = 0x00;
4494 buf2[1] = 0x22;
4495 buf2[2] = 0x00;
4496 buf2[3] = 0x00;
4497
4498 memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4499 memcpy(buf2 + 20, buf1, 16);
4500
4501 bufflen = min_t(int, 36, scsi_bufflen(srb));
4502 rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4503
4504#ifdef READ_BYTES_WAIT_INT
4505 retval = ms_poll_int(chip);
4506 if (retval != STATUS_SUCCESS) {
4507 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4508 rtsx_trace(chip);
4509 return STATUS_FAIL;
4510 }
4511#endif
4512
4513 return STATUS_SUCCESS;
4514}
4515
4516int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4517{
4518 struct ms_info *ms_card = &chip->ms_card;
4519 int retval;
4520 int i;
4521 int bufflen;
4522 unsigned int lun = SCSI_LUN(srb);
4523 u8 buf[32];
4524
4525 ms_cleanup_work(chip);
4526
4527 retval = ms_switch_clock(chip);
4528 if (retval != STATUS_SUCCESS) {
4529 rtsx_trace(chip);
4530 return STATUS_FAIL;
4531 }
4532
4533 retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4534 if (retval != STATUS_SUCCESS) {
4535 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4536 rtsx_trace(chip);
4537 return STATUS_FAIL;
4538 }
4539
4540 bufflen = min_t(int, 12, scsi_bufflen(srb));
4541 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4542
4543 for (i = 0; i < 8; i++)
4544 buf[i] = buf[4 + i];
4545
4546 for (i = 0; i < 24; i++)
4547 buf[8 + i] = 0;
4548
4549 retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4550 buf, 32);
4551 if (retval != STATUS_SUCCESS) {
4552 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4553 rtsx_trace(chip);
4554 return STATUS_FAIL;
4555 }
4556 if (check_ms_err(chip)) {
4557 set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4558 rtsx_clear_ms_error(chip);
4559 rtsx_trace(chip);
4560 return STATUS_FAIL;
4561 }
4562
4563 ms_card->mg_auth = 1;
4564
4565 return STATUS_SUCCESS;
4566}
4567
4568int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4569{
4570 struct ms_info *ms_card = &chip->ms_card;
4571 int retval;
4572 int bufflen;
4573 unsigned int lun = SCSI_LUN(srb);
4574 u8 *buf = NULL;
4575
4576 ms_cleanup_work(chip);
4577
4578 retval = ms_switch_clock(chip);
4579 if (retval != STATUS_SUCCESS) {
4580 rtsx_trace(chip);
4581 return STATUS_FAIL;
4582 }
4583
4584 buf = kmalloc(1028, GFP_KERNEL);
4585 if (!buf) {
4586 rtsx_trace(chip);
4587 return STATUS_ERROR;
4588 }
4589
4590 buf[0] = 0x04;
4591 buf[1] = 0x02;
4592 buf[2] = 0x00;
4593 buf[3] = 0x00;
4594
4595 retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4596 if (retval != STATUS_SUCCESS) {
4597 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4598 rtsx_trace(chip);
4599 goto free_buffer;
4600 }
4601
4602 retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4603 2, WAIT_INT, 0, 0, buf + 4, 1024);
4604 if (retval != STATUS_SUCCESS) {
4605 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4606 rtsx_clear_ms_error(chip);
4607 rtsx_trace(chip);
4608 goto free_buffer;
4609 }
4610 if (check_ms_err(chip)) {
4611 set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4612 rtsx_clear_ms_error(chip);
4613 rtsx_trace(chip);
4614 retval = STATUS_FAIL;
4615 goto free_buffer;
4616 }
4617
4618 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4619 rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4620
4621free_buffer:
4622 kfree(buf);
4623 return retval;
4624}
4625
4626int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4627{
4628 struct ms_info *ms_card = &chip->ms_card;
4629 int retval;
4630 int bufflen;
4631#ifdef MG_SET_ICV_SLOW
4632 int i;
4633#endif
4634 unsigned int lun = SCSI_LUN(srb);
4635 u8 *buf = NULL;
4636
4637 ms_cleanup_work(chip);
4638
4639 retval = ms_switch_clock(chip);
4640 if (retval != STATUS_SUCCESS) {
4641 rtsx_trace(chip);
4642 return STATUS_FAIL;
4643 }
4644
4645 buf = kmalloc(1028, GFP_KERNEL);
4646 if (!buf) {
4647 rtsx_trace(chip);
4648 return STATUS_ERROR;
4649 }
4650
4651 bufflen = min_t(int, 1028, scsi_bufflen(srb));
4652 rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4653
4654 retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4655 if (retval != STATUS_SUCCESS) {
4656 if (ms_card->mg_auth == 0) {
4657 if ((buf[5] & 0xC0) != 0)
4658 set_sense_type
4659 (chip, lun,
4660 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4661 else
4662 set_sense_type(chip, lun,
4663 SENSE_TYPE_MG_WRITE_ERR);
4664 } else {
4665 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4666 }
4667 rtsx_trace(chip);
4668 goto SetICVFinish;
4669 }
4670
4671#ifdef MG_SET_ICV_SLOW
4672 for (i = 0; i < 2; i++) {
4673 udelay(50);
4674
4675 rtsx_init_cmd(chip);
4676
4677 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4678 0xFF, PRO_WRITE_LONG_DATA);
4679 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4680 rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4681 0x01, RING_BUFFER);
4682
4683 trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4684
4685 rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4686 MS_TRANSFER_START | MS_TM_NORMAL_WRITE);
4687 rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4688 MS_TRANSFER_END, MS_TRANSFER_END);
4689
4690 rtsx_send_cmd_no_wait(chip);
4691
4692 retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4693 512, 0, DMA_TO_DEVICE, 3000);
4694 if ((retval < 0) || check_ms_err(chip)) {
4695 rtsx_clear_ms_error(chip);
4696 if (ms_card->mg_auth == 0) {
4697 if ((buf[5] & 0xC0) != 0)
4698 set_sense_type
4699 (chip, lun,
4700 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4701 else
4702 set_sense_type(chip, lun,
4703 SENSE_TYPE_MG_WRITE_ERR);
4704 } else {
4705 set_sense_type(chip, lun,
4706 SENSE_TYPE_MG_WRITE_ERR);
4707 }
4708 retval = STATUS_FAIL;
4709 rtsx_trace(chip);
4710 goto SetICVFinish;
4711 }
4712 }
4713#else
4714 retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4715 2, WAIT_INT, 0, 0, buf + 4, 1024);
4716 if ((retval != STATUS_SUCCESS) || check_ms_err(chip)) {
4717 rtsx_clear_ms_error(chip);
4718 if (ms_card->mg_auth == 0) {
4719 if ((buf[5] & 0xC0) != 0)
4720 set_sense_type
4721 (chip, lun,
4722 SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4723 else
4724 set_sense_type(chip, lun,
4725 SENSE_TYPE_MG_WRITE_ERR);
4726 } else {
4727 set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4728 }
4729 rtsx_trace(chip);
4730 goto SetICVFinish;
4731 }
4732#endif
4733
4734SetICVFinish:
4735 kfree(buf);
4736 return retval;
4737}
4738
4739#endif
4740
4741void ms_cleanup_work(struct rtsx_chip *chip)
4742{
4743 struct ms_info *ms_card = &chip->ms_card;
4744
4745 if (CHK_MSPRO(ms_card)) {
4746 if (ms_card->seq_mode) {
4747 dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4748 mspro_stop_seq_mode(chip);
4749 ms_card->cleanup_counter = 0;
4750 }
4751 if (CHK_MSHG(ms_card)) {
4752 rtsx_write_register(chip, MS_CFG,
4753 MS_2K_SECTOR_MODE, 0x00);
4754 }
4755 }
4756#ifdef MS_DELAY_WRITE
4757 else if ((!CHK_MSPRO(ms_card)) &&
4758 ms_card->delay_write.delay_write_flag) {
4759 dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4760 ms_delay_write(chip);
4761 ms_card->cleanup_counter = 0;
4762 }
4763#endif
4764}
4765
4766int ms_power_off_card3v3(struct rtsx_chip *chip)
4767{
4768 int retval;
4769
4770 retval = disable_card_clock(chip, MS_CARD);
4771 if (retval != STATUS_SUCCESS) {
4772 rtsx_trace(chip);
4773 return STATUS_FAIL;
4774 }
4775
4776 if (chip->asic_code) {
4777 retval = ms_pull_ctl_disable(chip);
4778 if (retval != STATUS_SUCCESS) {
4779 rtsx_trace(chip);
4780 return STATUS_FAIL;
4781 }
4782 } else {
4783 retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4784 FPGA_MS_PULL_CTL_BIT | 0x20,
4785 FPGA_MS_PULL_CTL_BIT);
4786 if (retval) {
4787 rtsx_trace(chip);
4788 return retval;
4789 }
4790 }
4791 retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4792 if (retval) {
4793 rtsx_trace(chip);
4794 return retval;
4795 }
4796 if (!chip->ft2_fast_mode) {
4797 retval = card_power_off(chip, MS_CARD);
4798 if (retval != STATUS_SUCCESS) {
4799 rtsx_trace(chip);
4800 return STATUS_FAIL;
4801 }
4802 }
4803
4804 return STATUS_SUCCESS;
4805}
4806
4807int release_ms_card(struct rtsx_chip *chip)
4808{
4809 struct ms_info *ms_card = &chip->ms_card;
4810 int retval;
4811
4812#ifdef MS_DELAY_WRITE
4813 ms_card->delay_write.delay_write_flag = 0;
4814#endif
4815 ms_card->pro_under_formatting = 0;
4816
4817 chip->card_ready &= ~MS_CARD;
4818 chip->card_fail &= ~MS_CARD;
4819 chip->card_wp &= ~MS_CARD;
4820
4821 ms_free_l2p_tbl(chip);
4822
4823 memset(ms_card->raw_sys_info, 0, 96);
4824#ifdef SUPPORT_PCGL_1P18
4825 memset(ms_card->raw_model_name, 0, 48);
4826#endif
4827
4828 retval = ms_power_off_card3v3(chip);
4829 if (retval != STATUS_SUCCESS) {
4830 rtsx_trace(chip);
4831 return STATUS_FAIL;
4832 }
4833
4834 return STATUS_SUCCESS;
4835}
4836
