linux/include/uapi/drm/drm_mode.h
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   1/*
   2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
   3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
   4 * Copyright (c) 2008 Red Hat Inc.
   5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
   6 * Copyright (c) 2007-2008 Intel Corporation
   7 *
   8 * Permission is hereby granted, free of charge, to any person obtaining a
   9 * copy of this software and associated documentation files (the "Software"),
  10 * to deal in the Software without restriction, including without limitation
  11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12 * and/or sell copies of the Software, and to permit persons to whom the
  13 * Software is furnished to do so, subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in
  16 * all copies or substantial portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24 * IN THE SOFTWARE.
  25 */
  26
  27#ifndef _DRM_MODE_H
  28#define _DRM_MODE_H
  29
  30#include "drm.h"
  31
  32#if defined(__cplusplus)
  33extern "C" {
  34#endif
  35
  36#define DRM_DISPLAY_INFO_LEN    32
  37#define DRM_CONNECTOR_NAME_LEN  32
  38#define DRM_DISPLAY_MODE_LEN    32
  39#define DRM_PROP_NAME_LEN       32
  40
  41#define DRM_MODE_TYPE_BUILTIN   (1<<0)
  42#define DRM_MODE_TYPE_CLOCK_C   ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  43#define DRM_MODE_TYPE_CRTC_C    ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  44#define DRM_MODE_TYPE_PREFERRED (1<<3)
  45#define DRM_MODE_TYPE_DEFAULT   (1<<4)
  46#define DRM_MODE_TYPE_USERDEF   (1<<5)
  47#define DRM_MODE_TYPE_DRIVER    (1<<6)
  48
  49/* Video mode flags */
  50/* bit compatible with the xrandr RR_ definitions (bits 0-13)
  51 *
  52 * ABI warning: Existing userspace really expects
  53 * the mode flags to match the xrandr definitions. Any
  54 * changes that don't match the xrandr definitions will
  55 * likely need a new client cap or some other mechanism
  56 * to avoid breaking existing userspace. This includes
  57 * allocating new flags in the previously unused bits!
  58 */
  59#define DRM_MODE_FLAG_PHSYNC                    (1<<0)
  60#define DRM_MODE_FLAG_NHSYNC                    (1<<1)
  61#define DRM_MODE_FLAG_PVSYNC                    (1<<2)
  62#define DRM_MODE_FLAG_NVSYNC                    (1<<3)
  63#define DRM_MODE_FLAG_INTERLACE                 (1<<4)
  64#define DRM_MODE_FLAG_DBLSCAN                   (1<<5)
  65#define DRM_MODE_FLAG_CSYNC                     (1<<6)
  66#define DRM_MODE_FLAG_PCSYNC                    (1<<7)
  67#define DRM_MODE_FLAG_NCSYNC                    (1<<8)
  68#define DRM_MODE_FLAG_HSKEW                     (1<<9) /* hskew provided */
  69#define DRM_MODE_FLAG_BCAST                     (1<<10)
  70#define DRM_MODE_FLAG_PIXMUX                    (1<<11)
  71#define DRM_MODE_FLAG_DBLCLK                    (1<<12)
  72#define DRM_MODE_FLAG_CLKDIV2                   (1<<13)
  73 /*
  74  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  75  * (define not exposed to user space).
  76  */
  77#define DRM_MODE_FLAG_3D_MASK                   (0x1f<<14)
  78#define  DRM_MODE_FLAG_3D_NONE                  (0<<14)
  79#define  DRM_MODE_FLAG_3D_FRAME_PACKING         (1<<14)
  80#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE     (2<<14)
  81#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE      (3<<14)
  82#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL     (4<<14)
  83#define  DRM_MODE_FLAG_3D_L_DEPTH               (5<<14)
  84#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
  85#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM        (7<<14)
  86#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF     (8<<14)
  87
  88/* Picture aspect ratio options */
  89#define DRM_MODE_PICTURE_ASPECT_NONE            0
  90#define DRM_MODE_PICTURE_ASPECT_4_3             1
  91#define DRM_MODE_PICTURE_ASPECT_16_9            2
  92
  93/* Aspect ratio flag bitmask (4 bits 22:19) */
  94#define DRM_MODE_FLAG_PIC_AR_MASK               (0x0F<<19)
  95#define  DRM_MODE_FLAG_PIC_AR_NONE \
  96                        (DRM_MODE_PICTURE_ASPECT_NONE<<19)
  97#define  DRM_MODE_FLAG_PIC_AR_4_3 \
  98                        (DRM_MODE_PICTURE_ASPECT_4_3<<19)
  99#define  DRM_MODE_FLAG_PIC_AR_16_9 \
 100                        (DRM_MODE_PICTURE_ASPECT_16_9<<19)
 101
 102/* DPMS flags */
 103/* bit compatible with the xorg definitions. */
 104#define DRM_MODE_DPMS_ON        0
 105#define DRM_MODE_DPMS_STANDBY   1
 106#define DRM_MODE_DPMS_SUSPEND   2
 107#define DRM_MODE_DPMS_OFF       3
 108
 109/* Scaling mode options */
 110#define DRM_MODE_SCALE_NONE             0 /* Unmodified timing (display or
 111                                             software can still scale) */
 112#define DRM_MODE_SCALE_FULLSCREEN       1 /* Full screen, ignore aspect */
 113#define DRM_MODE_SCALE_CENTER           2 /* Centered, no scaling */
 114#define DRM_MODE_SCALE_ASPECT           3 /* Full screen, preserve aspect */
 115
 116/* Dithering mode options */
 117#define DRM_MODE_DITHERING_OFF  0
 118#define DRM_MODE_DITHERING_ON   1
 119#define DRM_MODE_DITHERING_AUTO 2
 120
 121/* Dirty info options */
 122#define DRM_MODE_DIRTY_OFF      0
 123#define DRM_MODE_DIRTY_ON       1
 124#define DRM_MODE_DIRTY_ANNOTATE 2
 125
 126struct drm_mode_modeinfo {
 127        __u32 clock;
 128        __u16 hdisplay;
 129        __u16 hsync_start;
 130        __u16 hsync_end;
 131        __u16 htotal;
 132        __u16 hskew;
 133        __u16 vdisplay;
 134        __u16 vsync_start;
 135        __u16 vsync_end;
 136        __u16 vtotal;
 137        __u16 vscan;
 138
 139        __u32 vrefresh;
 140
 141        __u32 flags;
 142        __u32 type;
 143        char name[DRM_DISPLAY_MODE_LEN];
 144};
 145
 146struct drm_mode_card_res {
 147        __u64 fb_id_ptr;
 148        __u64 crtc_id_ptr;
 149        __u64 connector_id_ptr;
 150        __u64 encoder_id_ptr;
 151        __u32 count_fbs;
 152        __u32 count_crtcs;
 153        __u32 count_connectors;
 154        __u32 count_encoders;
 155        __u32 min_width;
 156        __u32 max_width;
 157        __u32 min_height;
 158        __u32 max_height;
 159};
 160
 161struct drm_mode_crtc {
 162        __u64 set_connectors_ptr;
 163        __u32 count_connectors;
 164
 165        __u32 crtc_id; /**< Id */
 166        __u32 fb_id; /**< Id of framebuffer */
 167
 168        __u32 x; /**< x Position on the framebuffer */
 169        __u32 y; /**< y Position on the framebuffer */
 170
 171        __u32 gamma_size;
 172        __u32 mode_valid;
 173        struct drm_mode_modeinfo mode;
 174};
 175
 176#define DRM_MODE_PRESENT_TOP_FIELD      (1<<0)
 177#define DRM_MODE_PRESENT_BOTTOM_FIELD   (1<<1)
 178
 179/* Planes blend with or override other bits on the CRTC */
 180struct drm_mode_set_plane {
 181        __u32 plane_id;
 182        __u32 crtc_id;
 183        __u32 fb_id; /* fb object contains surface format type */
 184        __u32 flags; /* see above flags */
 185
 186        /* Signed dest location allows it to be partially off screen */
 187        __s32 crtc_x;
 188        __s32 crtc_y;
 189        __u32 crtc_w;
 190        __u32 crtc_h;
 191
 192        /* Source values are 16.16 fixed point */
 193        __u32 src_x;
 194        __u32 src_y;
 195        __u32 src_h;
 196        __u32 src_w;
 197};
 198
 199struct drm_mode_get_plane {
 200        __u32 plane_id;
 201
 202        __u32 crtc_id;
 203        __u32 fb_id;
 204
 205        __u32 possible_crtcs;
 206        __u32 gamma_size;
 207
 208        __u32 count_format_types;
 209        __u64 format_type_ptr;
 210};
 211
 212struct drm_mode_get_plane_res {
 213        __u64 plane_id_ptr;
 214        __u32 count_planes;
 215};
 216
 217#define DRM_MODE_ENCODER_NONE   0
 218#define DRM_MODE_ENCODER_DAC    1
 219#define DRM_MODE_ENCODER_TMDS   2
 220#define DRM_MODE_ENCODER_LVDS   3
 221#define DRM_MODE_ENCODER_TVDAC  4
 222#define DRM_MODE_ENCODER_VIRTUAL 5
 223#define DRM_MODE_ENCODER_DSI    6
 224#define DRM_MODE_ENCODER_DPMST  7
 225#define DRM_MODE_ENCODER_DPI    8
 226
 227struct drm_mode_get_encoder {
 228        __u32 encoder_id;
 229        __u32 encoder_type;
 230
 231        __u32 crtc_id; /**< Id of crtc */
 232
 233        __u32 possible_crtcs;
 234        __u32 possible_clones;
 235};
 236
 237/* This is for connectors with multiple signal types. */
 238/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
 239enum drm_mode_subconnector {
 240        DRM_MODE_SUBCONNECTOR_Automatic = 0,
 241        DRM_MODE_SUBCONNECTOR_Unknown = 0,
 242        DRM_MODE_SUBCONNECTOR_DVID = 3,
 243        DRM_MODE_SUBCONNECTOR_DVIA = 4,
 244        DRM_MODE_SUBCONNECTOR_Composite = 5,
 245        DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
 246        DRM_MODE_SUBCONNECTOR_Component = 8,
 247        DRM_MODE_SUBCONNECTOR_SCART = 9,
 248};
 249
 250#define DRM_MODE_CONNECTOR_Unknown      0
 251#define DRM_MODE_CONNECTOR_VGA          1
 252#define DRM_MODE_CONNECTOR_DVII         2
 253#define DRM_MODE_CONNECTOR_DVID         3
 254#define DRM_MODE_CONNECTOR_DVIA         4
 255#define DRM_MODE_CONNECTOR_Composite    5
 256#define DRM_MODE_CONNECTOR_SVIDEO       6
 257#define DRM_MODE_CONNECTOR_LVDS         7
 258#define DRM_MODE_CONNECTOR_Component    8
 259#define DRM_MODE_CONNECTOR_9PinDIN      9
 260#define DRM_MODE_CONNECTOR_DisplayPort  10
 261#define DRM_MODE_CONNECTOR_HDMIA        11
 262#define DRM_MODE_CONNECTOR_HDMIB        12
 263#define DRM_MODE_CONNECTOR_TV           13
 264#define DRM_MODE_CONNECTOR_eDP          14
 265#define DRM_MODE_CONNECTOR_VIRTUAL      15
 266#define DRM_MODE_CONNECTOR_DSI          16
 267#define DRM_MODE_CONNECTOR_DPI          17
 268
 269struct drm_mode_get_connector {
 270
 271        __u64 encoders_ptr;
 272        __u64 modes_ptr;
 273        __u64 props_ptr;
 274        __u64 prop_values_ptr;
 275
 276        __u32 count_modes;
 277        __u32 count_props;
 278        __u32 count_encoders;
 279
 280        __u32 encoder_id; /**< Current Encoder */
 281        __u32 connector_id; /**< Id */
 282        __u32 connector_type;
 283        __u32 connector_type_id;
 284
 285        __u32 connection;
 286        __u32 mm_width;  /**< width in millimeters */
 287        __u32 mm_height; /**< height in millimeters */
 288        __u32 subpixel;
 289
 290        __u32 pad;
 291};
 292
 293#define DRM_MODE_PROP_PENDING   (1<<0)
 294#define DRM_MODE_PROP_RANGE     (1<<1)
 295#define DRM_MODE_PROP_IMMUTABLE (1<<2)
 296#define DRM_MODE_PROP_ENUM      (1<<3) /* enumerated type with text strings */
 297#define DRM_MODE_PROP_BLOB      (1<<4)
 298#define DRM_MODE_PROP_BITMASK   (1<<5) /* bitmask of enumerated types */
 299
 300/* non-extended types: legacy bitmask, one bit per type: */
 301#define DRM_MODE_PROP_LEGACY_TYPE  ( \
 302                DRM_MODE_PROP_RANGE | \
 303                DRM_MODE_PROP_ENUM | \
 304                DRM_MODE_PROP_BLOB | \
 305                DRM_MODE_PROP_BITMASK)
 306
 307/* extended-types: rather than continue to consume a bit per type,
 308 * grab a chunk of the bits to use as integer type id.
 309 */
 310#define DRM_MODE_PROP_EXTENDED_TYPE     0x0000ffc0
 311#define DRM_MODE_PROP_TYPE(n)           ((n) << 6)
 312#define DRM_MODE_PROP_OBJECT            DRM_MODE_PROP_TYPE(1)
 313#define DRM_MODE_PROP_SIGNED_RANGE      DRM_MODE_PROP_TYPE(2)
 314
 315/* the PROP_ATOMIC flag is used to hide properties from userspace that
 316 * is not aware of atomic properties.  This is mostly to work around
 317 * older userspace (DDX drivers) that read/write each prop they find,
 318 * witout being aware that this could be triggering a lengthy modeset.
 319 */
 320#define DRM_MODE_PROP_ATOMIC        0x80000000
 321
 322struct drm_mode_property_enum {
 323        __u64 value;
 324        char name[DRM_PROP_NAME_LEN];
 325};
 326
 327struct drm_mode_get_property {
 328        __u64 values_ptr; /* values and blob lengths */
 329        __u64 enum_blob_ptr; /* enum and blob id ptrs */
 330
 331        __u32 prop_id;
 332        __u32 flags;
 333        char name[DRM_PROP_NAME_LEN];
 334
 335        __u32 count_values;
 336        /* This is only used to count enum values, not blobs. The _blobs is
 337         * simply because of a historical reason, i.e. backwards compat. */
 338        __u32 count_enum_blobs;
 339};
 340
 341struct drm_mode_connector_set_property {
 342        __u64 value;
 343        __u32 prop_id;
 344        __u32 connector_id;
 345};
 346
 347#define DRM_MODE_OBJECT_CRTC 0xcccccccc
 348#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
 349#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
 350#define DRM_MODE_OBJECT_MODE 0xdededede
 351#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
 352#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
 353#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
 354#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
 355#define DRM_MODE_OBJECT_ANY 0
 356
 357struct drm_mode_obj_get_properties {
 358        __u64 props_ptr;
 359        __u64 prop_values_ptr;
 360        __u32 count_props;
 361        __u32 obj_id;
 362        __u32 obj_type;
 363};
 364
 365struct drm_mode_obj_set_property {
 366        __u64 value;
 367        __u32 prop_id;
 368        __u32 obj_id;
 369        __u32 obj_type;
 370};
 371
 372struct drm_mode_get_blob {
 373        __u32 blob_id;
 374        __u32 length;
 375        __u64 data;
 376};
 377
 378struct drm_mode_fb_cmd {
 379        __u32 fb_id;
 380        __u32 width;
 381        __u32 height;
 382        __u32 pitch;
 383        __u32 bpp;
 384        __u32 depth;
 385        /* driver specific handle */
 386        __u32 handle;
 387};
 388
 389#define DRM_MODE_FB_INTERLACED  (1<<0) /* for interlaced framebuffers */
 390#define DRM_MODE_FB_MODIFIERS   (1<<1) /* enables ->modifer[] */
 391
 392struct drm_mode_fb_cmd2 {
 393        __u32 fb_id;
 394        __u32 width;
 395        __u32 height;
 396        __u32 pixel_format; /* fourcc code from drm_fourcc.h */
 397        __u32 flags; /* see above flags */
 398
 399        /*
 400         * In case of planar formats, this ioctl allows up to 4
 401         * buffer objects with offsets and pitches per plane.
 402         * The pitch and offset order is dictated by the fourcc,
 403         * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
 404         *
 405         *   YUV 4:2:0 image with a plane of 8 bit Y samples
 406         *   followed by an interleaved U/V plane containing
 407         *   8 bit 2x2 subsampled colour difference samples.
 408         *
 409         * So it would consist of Y as offsets[0] and UV as
 410         * offsets[1].  Note that offsets[0] will generally
 411         * be 0 (but this is not required).
 412         *
 413         * To accommodate tiled, compressed, etc formats, a
 414         * modifier can be specified.  The default value of zero
 415         * indicates "native" format as specified by the fourcc.
 416         * Vendor specific modifier token.  Note that even though
 417         * it looks like we have a modifier per-plane, we in fact
 418         * do not. The modifier for each plane must be identical.
 419         * Thus all combinations of different data layouts for
 420         * multi plane formats must be enumerated as separate
 421         * modifiers.
 422         */
 423        __u32 handles[4];
 424        __u32 pitches[4]; /* pitch for each plane */
 425        __u32 offsets[4]; /* offset of each plane */
 426        __u64 modifier[4]; /* ie, tiling, compress */
 427};
 428
 429#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
 430#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
 431#define DRM_MODE_FB_DIRTY_FLAGS         0x03
 432
 433#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
 434
 435/*
 436 * Mark a region of a framebuffer as dirty.
 437 *
 438 * Some hardware does not automatically update display contents
 439 * as a hardware or software draw to a framebuffer. This ioctl
 440 * allows userspace to tell the kernel and the hardware what
 441 * regions of the framebuffer have changed.
 442 *
 443 * The kernel or hardware is free to update more then just the
 444 * region specified by the clip rects. The kernel or hardware
 445 * may also delay and/or coalesce several calls to dirty into a
 446 * single update.
 447 *
 448 * Userspace may annotate the updates, the annotates are a
 449 * promise made by the caller that the change is either a copy
 450 * of pixels or a fill of a single color in the region specified.
 451 *
 452 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
 453 * the number of updated regions are half of num_clips given,
 454 * where the clip rects are paired in src and dst. The width and
 455 * height of each one of the pairs must match.
 456 *
 457 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
 458 * promises that the region specified of the clip rects is filled
 459 * completely with a single color as given in the color argument.
 460 */
 461
 462struct drm_mode_fb_dirty_cmd {
 463        __u32 fb_id;
 464        __u32 flags;
 465        __u32 color;
 466        __u32 num_clips;
 467        __u64 clips_ptr;
 468};
 469
 470struct drm_mode_mode_cmd {
 471        __u32 connector_id;
 472        struct drm_mode_modeinfo mode;
 473};
 474
 475#define DRM_MODE_CURSOR_BO      0x01
 476#define DRM_MODE_CURSOR_MOVE    0x02
 477#define DRM_MODE_CURSOR_FLAGS   0x03
 478
 479/*
 480 * depending on the value in flags different members are used.
 481 *
 482 * CURSOR_BO uses
 483 *    crtc_id
 484 *    width
 485 *    height
 486 *    handle - if 0 turns the cursor off
 487 *
 488 * CURSOR_MOVE uses
 489 *    crtc_id
 490 *    x
 491 *    y
 492 */
 493struct drm_mode_cursor {
 494        __u32 flags;
 495        __u32 crtc_id;
 496        __s32 x;
 497        __s32 y;
 498        __u32 width;
 499        __u32 height;
 500        /* driver specific handle */
 501        __u32 handle;
 502};
 503
 504struct drm_mode_cursor2 {
 505        __u32 flags;
 506        __u32 crtc_id;
 507        __s32 x;
 508        __s32 y;
 509        __u32 width;
 510        __u32 height;
 511        /* driver specific handle */
 512        __u32 handle;
 513        __s32 hot_x;
 514        __s32 hot_y;
 515};
 516
 517struct drm_mode_crtc_lut {
 518        __u32 crtc_id;
 519        __u32 gamma_size;
 520
 521        /* pointers to arrays */
 522        __u64 red;
 523        __u64 green;
 524        __u64 blue;
 525};
 526
 527struct drm_color_ctm {
 528        /* Conversion matrix in S31.32 format. */
 529        __s64 matrix[9];
 530};
 531
 532struct drm_color_lut {
 533        /*
 534         * Data is U0.16 fixed point format.
 535         */
 536        __u16 red;
 537        __u16 green;
 538        __u16 blue;
 539        __u16 reserved;
 540};
 541
 542#define DRM_MODE_PAGE_FLIP_EVENT 0x01
 543#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
 544#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
 545#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
 546#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
 547                                   DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
 548#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
 549                                  DRM_MODE_PAGE_FLIP_ASYNC | \
 550                                  DRM_MODE_PAGE_FLIP_TARGET)
 551
 552/*
 553 * Request a page flip on the specified crtc.
 554 *
 555 * This ioctl will ask KMS to schedule a page flip for the specified
 556 * crtc.  Once any pending rendering targeting the specified fb (as of
 557 * ioctl time) has completed, the crtc will be reprogrammed to display
 558 * that fb after the next vertical refresh.  The ioctl returns
 559 * immediately, but subsequent rendering to the current fb will block
 560 * in the execbuffer ioctl until the page flip happens.  If a page
 561 * flip is already pending as the ioctl is called, EBUSY will be
 562 * returned.
 563 *
 564 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
 565 * event (see drm.h: struct drm_event_vblank) when the page flip is
 566 * done.  The user_data field passed in with this ioctl will be
 567 * returned as the user_data field in the vblank event struct.
 568 *
 569 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
 570 * 'as soon as possible', meaning that it not delay waiting for vblank.
 571 * This may cause tearing on the screen.
 572 *
 573 * The reserved field must be zero.
 574 */
 575
 576struct drm_mode_crtc_page_flip {
 577        __u32 crtc_id;
 578        __u32 fb_id;
 579        __u32 flags;
 580        __u32 reserved;
 581        __u64 user_data;
 582};
 583
 584/*
 585 * Request a page flip on the specified crtc.
 586 *
 587 * Same as struct drm_mode_crtc_page_flip, but supports new flags and
 588 * re-purposes the reserved field:
 589 *
 590 * The sequence field must be zero unless either of the
 591 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
 592 * the ABSOLUTE flag is specified, the sequence field denotes the absolute
 593 * vblank sequence when the flip should take effect. When the RELATIVE
 594 * flag is specified, the sequence field denotes the relative (to the
 595 * current one when the ioctl is called) vblank sequence when the flip
 596 * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
 597 * make sure the vblank sequence before the target one has passed before
 598 * calling this ioctl. The purpose of the
 599 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
 600 * the target for when code dealing with a page flip runs during a
 601 * vertical blank period.
 602 */
 603
 604struct drm_mode_crtc_page_flip_target {
 605        __u32 crtc_id;
 606        __u32 fb_id;
 607        __u32 flags;
 608        __u32 sequence;
 609        __u64 user_data;
 610};
 611
 612/* create a dumb scanout buffer */
 613struct drm_mode_create_dumb {
 614        __u32 height;
 615        __u32 width;
 616        __u32 bpp;
 617        __u32 flags;
 618        /* handle, pitch, size will be returned */
 619        __u32 handle;
 620        __u32 pitch;
 621        __u64 size;
 622};
 623
 624/* set up for mmap of a dumb scanout buffer */
 625struct drm_mode_map_dumb {
 626        /** Handle for the object being mapped. */
 627        __u32 handle;
 628        __u32 pad;
 629        /**
 630         * Fake offset to use for subsequent mmap call
 631         *
 632         * This is a fixed-size type for 32/64 compatibility.
 633         */
 634        __u64 offset;
 635};
 636
 637struct drm_mode_destroy_dumb {
 638        __u32 handle;
 639};
 640
 641/* page-flip flags are valid, plus: */
 642#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
 643#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
 644#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
 645
 646#define DRM_MODE_ATOMIC_FLAGS (\
 647                DRM_MODE_PAGE_FLIP_EVENT |\
 648                DRM_MODE_PAGE_FLIP_ASYNC |\
 649                DRM_MODE_ATOMIC_TEST_ONLY |\
 650                DRM_MODE_ATOMIC_NONBLOCK |\
 651                DRM_MODE_ATOMIC_ALLOW_MODESET)
 652
 653struct drm_mode_atomic {
 654        __u32 flags;
 655        __u32 count_objs;
 656        __u64 objs_ptr;
 657        __u64 count_props_ptr;
 658        __u64 props_ptr;
 659        __u64 prop_values_ptr;
 660        __u64 reserved;
 661        __u64 user_data;
 662};
 663
 664/**
 665 * Create a new 'blob' data property, copying length bytes from data pointer,
 666 * and returning new blob ID.
 667 */
 668struct drm_mode_create_blob {
 669        /** Pointer to data to copy. */
 670        __u64 data;
 671        /** Length of data to copy. */
 672        __u32 length;
 673        /** Return: new property ID. */
 674        __u32 blob_id;
 675};
 676
 677/**
 678 * Destroy a user-created blob property.
 679 */
 680struct drm_mode_destroy_blob {
 681        __u32 blob_id;
 682};
 683
 684#if defined(__cplusplus)
 685}
 686#endif
 687
 688#endif
 689