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13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/gpio.h>
20#include <linux/syscore_ops.h>
21#include <linux/serial_core.h>
22#include <linux/serial_s3c.h>
23#include <linux/platform_device.h>
24#include <linux/i2c.h>
25
26#include <video/ili9320.h>
27
28#include <linux/spi/spi.h>
29#include <linux/spi/spi_gpio.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <asm/mach/irq.h>
34
35#include <linux/platform_data/mtd-nand-s3c2410.h>
36#include <linux/platform_data/i2c-s3c2410.h>
37
38#include <mach/regs-gpio.h>
39#include <mach/regs-lcd.h>
40#include <mach/fb.h>
41#include <mach/gpio-samsung.h>
42
43#include <asm/mach-types.h>
44
45#include <linux/mtd/mtd.h>
46#include <linux/mtd/nand.h>
47#include <linux/mtd/nand_ecc.h>
48#include <linux/mtd/partitions.h>
49
50#include <plat/gpio-cfg.h>
51#include <plat/devs.h>
52#include <plat/cpu.h>
53#include <plat/pm.h>
54#include <linux/platform_data/usb-s3c2410_udc.h>
55#include <plat/samsung-time.h>
56
57#include "common.h"
58#include "s3c2412-power.h"
59
60static struct map_desc jive_iodesc[] __initdata = {
61};
62
63#define UCON S3C2410_UCON_DEFAULT
64#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
65#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
66
67static struct s3c2410_uartcfg jive_uartcfgs[] = {
68 [0] = {
69 .hwport = 0,
70 .flags = 0,
71 .ucon = UCON,
72 .ulcon = ULCON,
73 .ufcon = UFCON,
74 },
75 [1] = {
76 .hwport = 1,
77 .flags = 0,
78 .ucon = UCON,
79 .ulcon = ULCON,
80 .ufcon = UFCON,
81 },
82 [2] = {
83 .hwport = 2,
84 .flags = 0,
85 .ucon = UCON,
86 .ulcon = ULCON,
87 .ufcon = UFCON,
88 }
89};
90
91
92
93
94
95
96
97
98
99
100
101
102static struct mtd_partition __initdata jive_imageA_nand_part[] = {
103
104#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
105
106 {
107 .name = "uboot",
108 .offset = 0,
109 .size = (160 * SZ_1K),
110 .mask_flags = MTD_WRITEABLE,
111 },
112
113
114 {
115 .name = "spare",
116 .offset = (176 * SZ_1K),
117 .size = (16 * SZ_1K),
118 },
119#endif
120
121
122 {
123 .name = "kernel (ro)",
124 .offset = (192 * SZ_1K),
125 .size = (SZ_2M) - (192 * SZ_1K),
126 .mask_flags = MTD_WRITEABLE,
127 }, {
128 .name = "root (ro)",
129 .offset = (SZ_2M),
130 .size = (20 * SZ_1M),
131 .mask_flags = MTD_WRITEABLE,
132 },
133
134
135 {
136 .name = "yaffs",
137 .offset = (44 * SZ_1M),
138 .size = (20 * SZ_1M),
139 },
140
141
142 {
143 .name = "env",
144 .offset = (160 * SZ_1K),
145 .size = (16 * SZ_1K),
146 },
147
148
149 {
150 .name = "zimage",
151 .offset = (22 * SZ_1M),
152 .size = (2 * SZ_1M) - (192 * SZ_1K),
153 }, {
154 .name = "cramfs",
155 .offset = (24 * SZ_1M) - (192*SZ_1K),
156 .size = (20 * SZ_1M),
157 },
158};
159
160static struct mtd_partition __initdata jive_imageB_nand_part[] = {
161
162#ifdef CONFIG_MACH_JIVE_SHOW_BOOTLOADER
163
164 {
165 .name = "uboot",
166 .offset = 0,
167 .size = (160 * SZ_1K),
168 .mask_flags = MTD_WRITEABLE,
169 },
170
171
172 {
173 .name = "spare",
174 .offset = (176 * SZ_1K),
175 .size = (16 * SZ_1K),
176 },
177#endif
178
179
180 {
181 .name = "kernel (ro)",
182 .offset = (22 * SZ_1M),
183 .size = (2 * SZ_1M) - (192 * SZ_1K),
184 .mask_flags = MTD_WRITEABLE,
185 },
186 {
187 .name = "root (ro)",
188 .offset = (24 * SZ_1M) - (192 * SZ_1K),
189 .size = (20 * SZ_1M),
190 .mask_flags = MTD_WRITEABLE,
191 },
192
193
194 {
195 .name = "yaffs",
196 .offset = (44 * SZ_1M),
197 .size = (20 * SZ_1M),
198 },
199
200
201 {
202 .name = "env",
203 .offset = (160 * SZ_1K),
204 .size = (16 * SZ_1K),
205 },
206
207
208 {
209 .name = "zimage",
210 .offset = (192 * SZ_1K),
211 .size = (2 * SZ_1M) - (192 * SZ_1K),
212 }, {
213 .name = "cramfs",
214 .offset = (2 * SZ_1M),
215 .size = (20 * SZ_1M),
216 },
217};
218
219static struct s3c2410_nand_set __initdata jive_nand_sets[] = {
220 [0] = {
221 .name = "flash",
222 .nr_chips = 1,
223 .nr_partitions = ARRAY_SIZE(jive_imageA_nand_part),
224 .partitions = jive_imageA_nand_part,
225 },
226};
227
228static struct s3c2410_platform_nand __initdata jive_nand_info = {
229
230 .tacls = 30,
231 .twrph0 = 55,
232 .twrph1 = 40,
233 .sets = jive_nand_sets,
234 .nr_sets = ARRAY_SIZE(jive_nand_sets),
235 .ecc_mode = NAND_ECC_SOFT,
236};
237
238static int __init jive_mtdset(char *options)
239{
240 struct s3c2410_nand_set *nand = &jive_nand_sets[0];
241 unsigned long set;
242
243 if (options == NULL || options[0] == '\0')
244 return 0;
245
246 if (kstrtoul(options, 10, &set)) {
247 printk(KERN_ERR "failed to parse mtdset=%s\n", options);
248 return 0;
249 }
250
251 switch (set) {
252 case 1:
253 nand->nr_partitions = ARRAY_SIZE(jive_imageB_nand_part);
254 nand->partitions = jive_imageB_nand_part;
255 case 0:
256
257 break;
258 default:
259 printk(KERN_ERR "Unknown mtd set %ld specified,"
260 "using default.", set);
261 }
262
263 return 0;
264}
265
266
267__setup("mtdset=", jive_mtdset);
268
269
270
271#define LCD_XRES (240)
272#define LCD_YRES (320)
273#define LCD_LEFT_MARGIN (12)
274#define LCD_RIGHT_MARGIN (12)
275#define LCD_LOWER_MARGIN (12)
276#define LCD_UPPER_MARGIN (12)
277#define LCD_VSYNC (2)
278#define LCD_HSYNC (2)
279
280#define LCD_REFRESH (60)
281
282#define LCD_HTOT (LCD_HSYNC + LCD_LEFT_MARGIN + LCD_XRES + LCD_RIGHT_MARGIN)
283#define LCD_VTOT (LCD_VSYNC + LCD_LOWER_MARGIN + LCD_YRES + LCD_UPPER_MARGIN)
284
285static struct s3c2410fb_display jive_vgg2432a4_display[] = {
286 [0] = {
287 .width = LCD_XRES,
288 .height = LCD_YRES,
289 .xres = LCD_XRES,
290 .yres = LCD_YRES,
291 .left_margin = LCD_LEFT_MARGIN,
292 .right_margin = LCD_RIGHT_MARGIN,
293 .upper_margin = LCD_UPPER_MARGIN,
294 .lower_margin = LCD_LOWER_MARGIN,
295 .hsync_len = LCD_HSYNC,
296 .vsync_len = LCD_VSYNC,
297
298 .pixclock = (1000000000000LL /
299 (LCD_REFRESH * LCD_HTOT * LCD_VTOT)),
300
301 .bpp = 16,
302 .type = (S3C2410_LCDCON1_TFT16BPP |
303 S3C2410_LCDCON1_TFT),
304
305 .lcdcon5 = (S3C2410_LCDCON5_FRM565 |
306 S3C2410_LCDCON5_INVVLINE |
307 S3C2410_LCDCON5_INVVFRAME |
308 S3C2410_LCDCON5_INVVDEN |
309 S3C2410_LCDCON5_PWREN),
310 },
311};
312
313
314
315#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
316#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
317
318static struct s3c2410fb_mach_info jive_lcd_config = {
319 .displays = jive_vgg2432a4_display,
320 .num_displays = ARRAY_SIZE(jive_vgg2432a4_display),
321 .default_display = 0,
322
323
324
325
326
327 .gpcup = (0xf << 1) | (0x3f << 10),
328
329 .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE |
330 S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
331 S3C2410_GPC10_VD2 | S3C2410_GPC11_VD3 |
332 S3C2410_GPC12_VD4 | S3C2410_GPC13_VD5 |
333 S3C2410_GPC14_VD6 | S3C2410_GPC15_VD7),
334
335 .gpccon_mask = (S3C2410_GPCCON_MASK(1) | S3C2410_GPCCON_MASK(2) |
336 S3C2410_GPCCON_MASK(3) | S3C2410_GPCCON_MASK(4) |
337 S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
338 S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
339 S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
340
341 .gpdup = (0x3f << 2) | (0x3f << 10),
342
343 .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 |
344 S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 |
345 S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 |
346 S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
347 S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
348 S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
349
350 .gpdcon_mask = (S3C2410_GPDCON_MASK(2) | S3C2410_GPDCON_MASK(3) |
351 S3C2410_GPDCON_MASK(4) | S3C2410_GPDCON_MASK(5) |
352 S3C2410_GPDCON_MASK(6) | S3C2410_GPDCON_MASK(7) |
353 S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
354 S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
355 S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
356};
357
358
359
360static void jive_lcm_reset(unsigned int set)
361{
362 printk(KERN_DEBUG "%s(%d)\n", __func__, set);
363
364 gpio_set_value(S3C2410_GPG(13), set);
365}
366
367#undef LCD_UPPER_MARGIN
368#define LCD_UPPER_MARGIN 2
369
370static struct ili9320_platdata jive_lcm_config = {
371 .hsize = LCD_XRES,
372 .vsize = LCD_YRES,
373
374 .reset = jive_lcm_reset,
375 .suspend = ILI9320_SUSPEND_DEEP,
376
377 .entry_mode = ILI9320_ENTRYMODE_ID(3) | ILI9320_ENTRYMODE_BGR,
378 .display2 = (ILI9320_DISPLAY2_FP(LCD_UPPER_MARGIN) |
379 ILI9320_DISPLAY2_BP(LCD_LOWER_MARGIN)),
380 .display3 = 0x0,
381 .display4 = 0x0,
382 .rgb_if1 = (ILI9320_RGBIF1_RIM_RGB18 |
383 ILI9320_RGBIF1_RM | ILI9320_RGBIF1_CLK_RGBIF),
384 .rgb_if2 = ILI9320_RGBIF2_DPL,
385 .interface2 = 0x0,
386 .interface3 = 0x3,
387 .interface4 = (ILI9320_INTERFACE4_RTNE(16) |
388 ILI9320_INTERFACE4_DIVE(1)),
389 .interface5 = 0x0,
390 .interface6 = 0x0,
391};
392
393
394
395static struct spi_gpio_platform_data jive_lcd_spi = {
396 .sck = S3C2410_GPG(8),
397 .mosi = S3C2410_GPB(8),
398 .miso = SPI_GPIO_NO_MISO,
399};
400
401static struct platform_device jive_device_lcdspi = {
402 .name = "spi-gpio",
403 .id = 1,
404 .dev.platform_data = &jive_lcd_spi,
405};
406
407
408
409
410static struct spi_gpio_platform_data jive_wm8750_spi = {
411 .sck = S3C2410_GPB(4),
412 .mosi = S3C2410_GPB(9),
413 .miso = SPI_GPIO_NO_MISO,
414};
415
416static struct platform_device jive_device_wm8750 = {
417 .name = "spi-gpio",
418 .id = 2,
419 .dev.platform_data = &jive_wm8750_spi,
420};
421
422
423
424static struct spi_board_info __initdata jive_spi_devs[] = {
425 [0] = {
426 .modalias = "VGG2432A4",
427 .bus_num = 1,
428 .chip_select = 0,
429 .mode = SPI_MODE_3,
430 .max_speed_hz = 100000,
431 .platform_data = &jive_lcm_config,
432 .controller_data = (void *)S3C2410_GPB(7),
433 }, {
434 .modalias = "WM8750",
435 .bus_num = 2,
436 .chip_select = 0,
437 .mode = SPI_MODE_0,
438 .max_speed_hz = 100000,
439 .controller_data = (void *)S3C2410_GPH(10),
440 },
441};
442
443
444
445static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = {
446 .frequency = 80 * 1000,
447 .flags = S3C_IICFLG_FILTER,
448 .sda_delay = 2,
449};
450
451static struct i2c_board_info jive_i2c_devs[] __initdata = {
452 [0] = {
453 I2C_BOARD_INFO("lis302dl", 0x1c),
454 .irq = IRQ_EINT14,
455 },
456};
457
458
459
460static struct platform_device *jive_devices[] __initdata = {
461 &s3c_device_ohci,
462 &s3c_device_rtc,
463 &s3c_device_wdt,
464 &s3c_device_i2c0,
465 &s3c_device_lcd,
466 &jive_device_lcdspi,
467 &jive_device_wm8750,
468 &s3c_device_nand,
469 &s3c_device_usbgadget,
470 &s3c2412_device_dma,
471};
472
473static struct s3c2410_udc_mach_info jive_udc_cfg __initdata = {
474 .vbus_pin = S3C2410_GPG(1),
475};
476
477
478
479#ifdef CONFIG_PM
480static int jive_pm_suspend(void)
481{
482
483
484
485
486 __raw_writel(0x2BED, S3C2412_INFORM0);
487 __raw_writel(__pa_symbol(s3c_cpu_resume), S3C2412_INFORM1);
488
489 return 0;
490}
491
492static void jive_pm_resume(void)
493{
494 __raw_writel(0x0, S3C2412_INFORM0);
495}
496
497#else
498#define jive_pm_suspend NULL
499#define jive_pm_resume NULL
500#endif
501
502static struct syscore_ops jive_pm_syscore_ops = {
503 .suspend = jive_pm_suspend,
504 .resume = jive_pm_resume,
505};
506
507static void __init jive_map_io(void)
508{
509 s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc));
510 s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs));
511 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
512}
513
514static void __init jive_init_time(void)
515{
516 s3c2412_init_clocks(12000000);
517 samsung_timer_init();
518}
519
520static void jive_power_off(void)
521{
522 printk(KERN_INFO "powering system down...\n");
523
524 gpio_request_one(S3C2410_GPC(5), GPIOF_OUT_INIT_HIGH, NULL);
525 gpio_free(S3C2410_GPC(5));
526}
527
528static void __init jive_machine_init(void)
529{
530
531
532 register_syscore_ops(&jive_pm_syscore_ops);
533
534
535
536
537
538
539
540 __raw_writel(S3C2412_SLPCON_IN(0) |
541 S3C2412_SLPCON_PULL(1) |
542 S3C2412_SLPCON_HIGH(2) |
543 S3C2412_SLPCON_PULL(3) |
544 S3C2412_SLPCON_PULL(4) |
545 S3C2412_SLPCON_PULL(5) |
546 S3C2412_SLPCON_PULL(6) |
547 S3C2412_SLPCON_HIGH(7) |
548 S3C2412_SLPCON_PULL(8) |
549 S3C2412_SLPCON_PULL(9) |
550 S3C2412_SLPCON_PULL(10), S3C2412_GPBSLPCON);
551
552
553
554 __raw_writel(S3C2412_SLPCON_PULL(0) |
555 S3C2412_SLPCON_PULL(1) |
556 S3C2412_SLPCON_PULL(2) |
557 S3C2412_SLPCON_PULL(3) |
558 S3C2412_SLPCON_PULL(4) |
559 S3C2412_SLPCON_PULL(5) |
560 S3C2412_SLPCON_LOW(6) |
561 S3C2412_SLPCON_PULL(6) |
562 S3C2412_SLPCON_PULL(7) |
563 S3C2412_SLPCON_PULL(8) |
564 S3C2412_SLPCON_PULL(9) |
565 S3C2412_SLPCON_PULL(10) |
566 S3C2412_SLPCON_PULL(11) |
567 S3C2412_SLPCON_PULL(12) |
568 S3C2412_SLPCON_PULL(13) |
569 S3C2412_SLPCON_PULL(14) |
570 S3C2412_SLPCON_PULL(15), S3C2412_GPCSLPCON);
571
572
573
574 __raw_writel(S3C2412_SLPCON_ALL_PULL, S3C2412_GPDSLPCON);
575
576
577
578 __raw_writel(S3C2412_SLPCON_LOW(0) |
579 S3C2412_SLPCON_LOW(1) |
580 S3C2412_SLPCON_LOW(2) |
581 S3C2412_SLPCON_EINT(3) |
582 S3C2412_SLPCON_EINT(4) |
583 S3C2412_SLPCON_EINT(5) |
584 S3C2412_SLPCON_EINT(6) |
585 S3C2412_SLPCON_EINT(7), S3C2412_GPFSLPCON);
586
587
588
589 __raw_writel(S3C2412_SLPCON_IN(0) |
590 S3C2412_SLPCON_IN(1) |
591 S3C2412_SLPCON_IN(2) |
592 S3C2412_SLPCON_IN(3) |
593 S3C2412_SLPCON_IN(4) |
594 S3C2412_SLPCON_IN(5) |
595 S3C2412_SLPCON_IN(6) |
596 S3C2412_SLPCON_IN(7) |
597 S3C2412_SLPCON_PULL(8) |
598 S3C2412_SLPCON_PULL(9) |
599 S3C2412_SLPCON_IN(10) |
600 S3C2412_SLPCON_PULL(11) |
601 S3C2412_SLPCON_PULL(12) |
602 S3C2412_SLPCON_PULL(13) |
603 S3C2412_SLPCON_IN(14) |
604 S3C2412_SLPCON_PULL(15), S3C2412_GPGSLPCON);
605
606
607
608 __raw_writel(S3C2412_SLPCON_PULL(0) |
609 S3C2412_SLPCON_PULL(1) |
610 S3C2412_SLPCON_PULL(2) |
611 S3C2412_SLPCON_PULL(3) |
612 S3C2412_SLPCON_PULL(4) |
613 S3C2412_SLPCON_PULL(5) |
614 S3C2412_SLPCON_PULL(6) |
615 S3C2412_SLPCON_IN(7) |
616 S3C2412_SLPCON_IN(8) |
617 S3C2412_SLPCON_PULL(9) |
618 S3C2412_SLPCON_IN(10), S3C2412_GPHSLPCON);
619
620
621
622 s3c_pm_init();
623
624
625 s3c_nand_set_platdata(&jive_nand_info);
626
627
628
629 gpio_request(S3C2410_GPG(13), "lcm reset");
630 gpio_direction_output(S3C2410_GPG(13), 0);
631
632 gpio_request(S3C2410_GPB(7), "jive spi");
633 gpio_direction_output(S3C2410_GPB(7), 1);
634
635 gpio_request_one(S3C2410_GPB(6), GPIOF_OUT_INIT_LOW, NULL);
636 gpio_free(S3C2410_GPB(6));
637
638 gpio_request_one(S3C2410_GPG(8), GPIOF_OUT_INIT_HIGH, NULL);
639 gpio_free(S3C2410_GPG(8));
640
641
642
643 gpio_request(S3C2410_GPH(10), "jive wm8750 spi");
644 gpio_direction_output(S3C2410_GPH(10), 1);
645
646
647
648
649 s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
650 S3C2410_MISCCR_USBSUSPND0 |
651 S3C2410_MISCCR_USBSUSPND1, 0x0);
652
653 s3c24xx_udc_set_platdata(&jive_udc_cfg);
654 s3c24xx_fb_set_platdata(&jive_lcd_config);
655
656 spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs));
657
658 s3c_i2c0_set_platdata(&jive_i2c_cfg);
659 i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs));
660
661 pm_power_off = jive_power_off;
662
663 platform_add_devices(jive_devices, ARRAY_SIZE(jive_devices));
664}
665
666MACHINE_START(JIVE, "JIVE")
667
668 .atag_offset = 0x100,
669
670 .init_irq = s3c2412_init_irq,
671 .map_io = jive_map_io,
672 .init_machine = jive_machine_init,
673 .init_time = jive_init_time,
674MACHINE_END
675
