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41
42#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
43
44#include <linux/init.h>
45#include <linux/smp.h>
46#include <linux/export.h>
47#include <linux/sched.h>
48#include <linux/sched/topology.h>
49#include <linux/sched/hotplug.h>
50#include <linux/sched/task_stack.h>
51#include <linux/percpu.h>
52#include <linux/bootmem.h>
53#include <linux/err.h>
54#include <linux/nmi.h>
55#include <linux/tboot.h>
56#include <linux/stackprotector.h>
57#include <linux/gfp.h>
58#include <linux/cpuidle.h>
59
60#include <asm/acpi.h>
61#include <asm/desc.h>
62#include <asm/nmi.h>
63#include <asm/irq.h>
64#include <asm/realmode.h>
65#include <asm/cpu.h>
66#include <asm/numa.h>
67#include <asm/pgtable.h>
68#include <asm/tlbflush.h>
69#include <asm/mtrr.h>
70#include <asm/mwait.h>
71#include <asm/apic.h>
72#include <asm/io_apic.h>
73#include <asm/fpu/internal.h>
74#include <asm/setup.h>
75#include <asm/uv/uv.h>
76#include <linux/mc146818rtc.h>
77#include <asm/i8259.h>
78#include <asm/realmode.h>
79#include <asm/misc.h>
80
81
82int smp_num_siblings = 1;
83EXPORT_SYMBOL(smp_num_siblings);
84
85
86DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID;
87
88
89DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
90EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
91
92
93DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map);
94EXPORT_PER_CPU_SYMBOL(cpu_core_map);
95
96DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map);
97
98
99DEFINE_PER_CPU_READ_MOSTLY(struct cpuinfo_x86, cpu_info);
100EXPORT_PER_CPU_SYMBOL(cpu_info);
101
102
103static int *physical_to_logical_pkg __read_mostly;
104static unsigned long *physical_package_map __read_mostly;;
105static unsigned int max_physical_pkg_id __read_mostly;
106unsigned int __max_logical_packages __read_mostly;
107EXPORT_SYMBOL(__max_logical_packages);
108static unsigned int logical_packages __read_mostly;
109
110
111int __max_smt_threads __read_mostly;
112
113
114bool x86_topology_update;
115
116int arch_update_cpu_topology(void)
117{
118 int retval = x86_topology_update;
119
120 x86_topology_update = false;
121 return retval;
122}
123
124static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip)
125{
126 unsigned long flags;
127
128 spin_lock_irqsave(&rtc_lock, flags);
129 CMOS_WRITE(0xa, 0xf);
130 spin_unlock_irqrestore(&rtc_lock, flags);
131 local_flush_tlb();
132 pr_debug("1.\n");
133 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
134 start_eip >> 4;
135 pr_debug("2.\n");
136 *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
137 start_eip & 0xf;
138 pr_debug("3.\n");
139}
140
141static inline void smpboot_restore_warm_reset_vector(void)
142{
143 unsigned long flags;
144
145
146
147
148 local_flush_tlb();
149
150
151
152
153
154 spin_lock_irqsave(&rtc_lock, flags);
155 CMOS_WRITE(0, 0xf);
156 spin_unlock_irqrestore(&rtc_lock, flags);
157
158 *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
159}
160
161
162
163
164
165static void smp_callin(void)
166{
167 int cpuid, phys_id;
168
169
170
171
172
173
174
175 cpuid = smp_processor_id();
176
177
178
179
180 phys_id = read_apic_id();
181
182
183
184
185
186
187
188 apic_ap_setup();
189
190
191
192
193
194 smp_store_cpu_info(cpuid);
195
196
197
198
199
200
201
202 calibrate_delay();
203 cpu_data(cpuid).loops_per_jiffy = loops_per_jiffy;
204 pr_debug("Stack at about %p\n", &cpuid);
205
206
207
208
209
210 set_cpu_sibling_map(raw_smp_processor_id());
211 wmb();
212
213 notify_cpu_starting(cpuid);
214
215
216
217
218 cpumask_set_cpu(cpuid, cpu_callin_mask);
219}
220
221static int cpu0_logical_apicid;
222static int enable_start_cpu0;
223
224
225
226static void notrace start_secondary(void *unused)
227{
228
229
230
231
232
233 cpu_init();
234 x86_cpuinit.early_percpu_clock_init();
235 preempt_disable();
236 smp_callin();
237
238 enable_start_cpu0 = 0;
239
240#ifdef CONFIG_X86_32
241
242 load_cr3(swapper_pg_dir);
243 __flush_tlb_all();
244#endif
245
246
247 barrier();
248
249
250
251 check_tsc_sync_target();
252
253
254
255
256
257
258
259 lock_vector_lock();
260 setup_vector_irq(smp_processor_id());
261 set_cpu_online(smp_processor_id(), true);
262 unlock_vector_lock();
263 cpu_set_state_online(smp_processor_id());
264 x86_platform.nmi_init();
265
266
267 local_irq_enable();
268
269
270 boot_init_stack_canary();
271
272 x86_cpuinit.setup_percpu_clockev();
273
274 wmb();
275 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
276}
277
278
279
280
281
282
283int topology_update_package_map(unsigned int pkg, unsigned int cpu)
284{
285 unsigned int new;
286
287
288 if (!physical_package_map)
289 return 0;
290
291 if (pkg >= max_physical_pkg_id)
292 return -EINVAL;
293
294
295 if (test_and_set_bit(pkg, physical_package_map))
296 goto found;
297
298 if (logical_packages >= __max_logical_packages) {
299 pr_warn("Package %u of CPU %u exceeds BIOS package data %u.\n",
300 logical_packages, cpu, __max_logical_packages);
301 return -ENOSPC;
302 }
303
304 new = logical_packages++;
305 if (new != pkg) {
306 pr_info("CPU %u Converting physical %u to logical package %u\n",
307 cpu, pkg, new);
308 }
309 physical_to_logical_pkg[pkg] = new;
310
311found:
312 cpu_data(cpu).logical_proc_id = physical_to_logical_pkg[pkg];
313 return 0;
314}
315
316
317
318
319
320
321int topology_phys_to_logical_pkg(unsigned int phys_pkg)
322{
323 if (phys_pkg >= max_physical_pkg_id)
324 return -1;
325 return physical_to_logical_pkg[phys_pkg];
326}
327EXPORT_SYMBOL(topology_phys_to_logical_pkg);
328
329static void __init smp_init_package_map(struct cpuinfo_x86 *c, unsigned int cpu)
330{
331 unsigned int ncpus;
332 size_t size;
333
334
335
336
337
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339
340
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343
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353
354
355
356 ncpus = boot_cpu_data.x86_max_cores;
357 if (!ncpus) {
358 pr_warn("x86_max_cores == zero !?!?");
359 ncpus = 1;
360 }
361
362 __max_logical_packages = DIV_ROUND_UP(total_cpus, ncpus);
363 logical_packages = 0;
364
365
366
367
368
369 max_physical_pkg_id = DIV_ROUND_UP(MAX_LOCAL_APIC, ncpus);
370 size = max_physical_pkg_id * sizeof(unsigned int);
371 physical_to_logical_pkg = kmalloc(size, GFP_KERNEL);
372 memset(physical_to_logical_pkg, 0xff, size);
373 size = BITS_TO_LONGS(max_physical_pkg_id) * sizeof(unsigned long);
374 physical_package_map = kzalloc(size, GFP_KERNEL);
375
376 pr_info("Max logical packages: %u\n", __max_logical_packages);
377
378 topology_update_package_map(c->phys_proc_id, cpu);
379}
380
381void __init smp_store_boot_cpu_info(void)
382{
383 int id = 0;
384 struct cpuinfo_x86 *c = &cpu_data(id);
385
386 *c = boot_cpu_data;
387 c->cpu_index = id;
388 smp_init_package_map(c, id);
389}
390
391
392
393
394
395void smp_store_cpu_info(int id)
396{
397 struct cpuinfo_x86 *c = &cpu_data(id);
398
399 *c = boot_cpu_data;
400 c->cpu_index = id;
401
402
403
404
405 identify_secondary_cpu(c);
406}
407
408static bool
409topology_same_node(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
410{
411 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
412
413 return (cpu_to_node(cpu1) == cpu_to_node(cpu2));
414}
415
416static bool
417topology_sane(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o, const char *name)
418{
419 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
420
421 return !WARN_ONCE(!topology_same_node(c, o),
422 "sched: CPU #%d's %s-sibling CPU #%d is not on the same node! "
423 "[node: %d != %d]. Ignoring dependency.\n",
424 cpu1, name, cpu2, cpu_to_node(cpu1), cpu_to_node(cpu2));
425}
426
427#define link_mask(mfunc, c1, c2) \
428do { \
429 cpumask_set_cpu((c1), mfunc(c2)); \
430 cpumask_set_cpu((c2), mfunc(c1)); \
431} while (0)
432
433static bool match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
434{
435 if (boot_cpu_has(X86_FEATURE_TOPOEXT)) {
436 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
437
438 if (c->phys_proc_id == o->phys_proc_id &&
439 per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2)) {
440 if (c->cpu_core_id == o->cpu_core_id)
441 return topology_sane(c, o, "smt");
442
443 if ((c->cu_id != 0xff) &&
444 (o->cu_id != 0xff) &&
445 (c->cu_id == o->cu_id))
446 return topology_sane(c, o, "smt");
447 }
448
449 } else if (c->phys_proc_id == o->phys_proc_id &&
450 c->cpu_core_id == o->cpu_core_id) {
451 return topology_sane(c, o, "smt");
452 }
453
454 return false;
455}
456
457static bool match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
458{
459 int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
460
461 if (per_cpu(cpu_llc_id, cpu1) != BAD_APICID &&
462 per_cpu(cpu_llc_id, cpu1) == per_cpu(cpu_llc_id, cpu2))
463 return topology_sane(c, o, "llc");
464
465 return false;
466}
467
468
469
470
471
472
473static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
474{
475 if (c->phys_proc_id == o->phys_proc_id)
476 return true;
477 return false;
478}
479
480#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC)
481static inline int x86_sched_itmt_flags(void)
482{
483 return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;
484}
485
486#ifdef CONFIG_SCHED_MC
487static int x86_core_flags(void)
488{
489 return cpu_core_flags() | x86_sched_itmt_flags();
490}
491#endif
492#ifdef CONFIG_SCHED_SMT
493static int x86_smt_flags(void)
494{
495 return cpu_smt_flags() | x86_sched_itmt_flags();
496}
497#endif
498#endif
499
500static struct sched_domain_topology_level x86_numa_in_package_topology[] = {
501#ifdef CONFIG_SCHED_SMT
502 { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
503#endif
504#ifdef CONFIG_SCHED_MC
505 { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
506#endif
507 { NULL, },
508};
509
510static struct sched_domain_topology_level x86_topology[] = {
511#ifdef CONFIG_SCHED_SMT
512 { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
513#endif
514#ifdef CONFIG_SCHED_MC
515 { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
516#endif
517 { cpu_cpu_mask, SD_INIT_NAME(DIE) },
518 { NULL, },
519};
520
521
522
523
524
525static bool x86_has_numa_in_package;
526
527void set_cpu_sibling_map(int cpu)
528{
529 bool has_smt = smp_num_siblings > 1;
530 bool has_mp = has_smt || boot_cpu_data.x86_max_cores > 1;
531 struct cpuinfo_x86 *c = &cpu_data(cpu);
532 struct cpuinfo_x86 *o;
533 int i, threads;
534
535 cpumask_set_cpu(cpu, cpu_sibling_setup_mask);
536
537 if (!has_mp) {
538 cpumask_set_cpu(cpu, topology_sibling_cpumask(cpu));
539 cpumask_set_cpu(cpu, cpu_llc_shared_mask(cpu));
540 cpumask_set_cpu(cpu, topology_core_cpumask(cpu));
541 c->booted_cores = 1;
542 return;
543 }
544
545 for_each_cpu(i, cpu_sibling_setup_mask) {
546 o = &cpu_data(i);
547
548 if ((i == cpu) || (has_smt && match_smt(c, o)))
549 link_mask(topology_sibling_cpumask, cpu, i);
550
551 if ((i == cpu) || (has_mp && match_llc(c, o)))
552 link_mask(cpu_llc_shared_mask, cpu, i);
553
554 }
555
556
557
558
559
560 for_each_cpu(i, cpu_sibling_setup_mask) {
561 o = &cpu_data(i);
562
563 if ((i == cpu) || (has_mp && match_die(c, o))) {
564 link_mask(topology_core_cpumask, cpu, i);
565
566
567
568
569 if (cpumask_weight(
570 topology_sibling_cpumask(cpu)) == 1) {
571
572
573
574
575 if (cpumask_first(
576 topology_sibling_cpumask(i)) == i)
577 c->booted_cores++;
578
579
580
581
582 if (i != cpu)
583 cpu_data(i).booted_cores++;
584 } else if (i != cpu && !c->booted_cores)
585 c->booted_cores = cpu_data(i).booted_cores;
586 }
587 if (match_die(c, o) && !topology_same_node(c, o))
588 x86_has_numa_in_package = true;
589 }
590
591 threads = cpumask_weight(topology_sibling_cpumask(cpu));
592 if (threads > __max_smt_threads)
593 __max_smt_threads = threads;
594}
595
596
597const struct cpumask *cpu_coregroup_mask(int cpu)
598{
599 return cpu_llc_shared_mask(cpu);
600}
601
602static void impress_friends(void)
603{
604 int cpu;
605 unsigned long bogosum = 0;
606
607
608
609 pr_debug("Before bogomips\n");
610 for_each_possible_cpu(cpu)
611 if (cpumask_test_cpu(cpu, cpu_callout_mask))
612 bogosum += cpu_data(cpu).loops_per_jiffy;
613 pr_info("Total of %d processors activated (%lu.%02lu BogoMIPS)\n",
614 num_online_cpus(),
615 bogosum/(500000/HZ),
616 (bogosum/(5000/HZ))%100);
617
618 pr_debug("Before bogocount - setting activated=1\n");
619}
620
621void __inquire_remote_apic(int apicid)
622{
623 unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
624 const char * const names[] = { "ID", "VERSION", "SPIV" };
625 int timeout;
626 u32 status;
627
628 pr_info("Inquiring remote APIC 0x%x...\n", apicid);
629
630 for (i = 0; i < ARRAY_SIZE(regs); i++) {
631 pr_info("... APIC 0x%x %s: ", apicid, names[i]);
632
633
634
635
636 status = safe_apic_wait_icr_idle();
637 if (status)
638 pr_cont("a previous APIC delivery may have failed\n");
639
640 apic_icr_write(APIC_DM_REMRD | regs[i], apicid);
641
642 timeout = 0;
643 do {
644 udelay(100);
645 status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
646 } while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
647
648 switch (status) {
649 case APIC_ICR_RR_VALID:
650 status = apic_read(APIC_RRR);
651 pr_cont("%08x\n", status);
652 break;
653 default:
654 pr_cont("failed\n");
655 }
656 }
657}
658
659
660
661
662
663
664
665
666
667
668
669#define UDELAY_10MS_DEFAULT 10000
670
671static unsigned int init_udelay = UINT_MAX;
672
673static int __init cpu_init_udelay(char *str)
674{
675 get_option(&str, &init_udelay);
676
677 return 0;
678}
679early_param("cpu_init_udelay", cpu_init_udelay);
680
681static void __init smp_quirk_init_udelay(void)
682{
683
684 if (init_udelay != UINT_MAX)
685 return;
686
687
688 if (((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 == 6)) ||
689 ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) && (boot_cpu_data.x86 >= 0xF))) {
690 init_udelay = 0;
691 return;
692 }
693
694 init_udelay = UDELAY_10MS_DEFAULT;
695}
696
697
698
699
700
701
702int
703wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip)
704{
705 unsigned long send_status, accept_status = 0;
706 int maxlvt;
707
708
709
710
711 apic_icr_write(APIC_DM_NMI | apic->dest_logical, apicid);
712
713 pr_debug("Waiting for send to finish...\n");
714 send_status = safe_apic_wait_icr_idle();
715
716
717
718
719 udelay(200);
720 if (APIC_INTEGRATED(boot_cpu_apic_version)) {
721 maxlvt = lapic_get_maxlvt();
722 if (maxlvt > 3)
723 apic_write(APIC_ESR, 0);
724 accept_status = (apic_read(APIC_ESR) & 0xEF);
725 }
726 pr_debug("NMI sent\n");
727
728 if (send_status)
729 pr_err("APIC never delivered???\n");
730 if (accept_status)
731 pr_err("APIC delivery error (%lx)\n", accept_status);
732
733 return (send_status | accept_status);
734}
735
736static int
737wakeup_secondary_cpu_via_init(int phys_apicid, unsigned long start_eip)
738{
739 unsigned long send_status = 0, accept_status = 0;
740 int maxlvt, num_starts, j;
741
742 maxlvt = lapic_get_maxlvt();
743
744
745
746
747 if (APIC_INTEGRATED(boot_cpu_apic_version)) {
748 if (maxlvt > 3)
749 apic_write(APIC_ESR, 0);
750 apic_read(APIC_ESR);
751 }
752
753 pr_debug("Asserting INIT\n");
754
755
756
757
758
759
760
761 apic_icr_write(APIC_INT_LEVELTRIG | APIC_INT_ASSERT | APIC_DM_INIT,
762 phys_apicid);
763
764 pr_debug("Waiting for send to finish...\n");
765 send_status = safe_apic_wait_icr_idle();
766
767 udelay(init_udelay);
768
769 pr_debug("Deasserting INIT\n");
770
771
772
773 apic_icr_write(APIC_INT_LEVELTRIG | APIC_DM_INIT, phys_apicid);
774
775 pr_debug("Waiting for send to finish...\n");
776 send_status = safe_apic_wait_icr_idle();
777
778 mb();
779
780
781
782
783
784
785
786 if (APIC_INTEGRATED(boot_cpu_apic_version))
787 num_starts = 2;
788 else
789 num_starts = 0;
790
791
792
793
794 pr_debug("#startup loops: %d\n", num_starts);
795
796 for (j = 1; j <= num_starts; j++) {
797 pr_debug("Sending STARTUP #%d\n", j);
798 if (maxlvt > 3)
799 apic_write(APIC_ESR, 0);
800 apic_read(APIC_ESR);
801 pr_debug("After apic_write\n");
802
803
804
805
806
807
808
809
810 apic_icr_write(APIC_DM_STARTUP | (start_eip >> 12),
811 phys_apicid);
812
813
814
815
816 if (init_udelay == 0)
817 udelay(10);
818 else
819 udelay(300);
820
821 pr_debug("Startup point 1\n");
822
823 pr_debug("Waiting for send to finish...\n");
824 send_status = safe_apic_wait_icr_idle();
825
826
827
828
829 if (init_udelay == 0)
830 udelay(10);
831 else
832 udelay(200);
833
834 if (maxlvt > 3)
835 apic_write(APIC_ESR, 0);
836 accept_status = (apic_read(APIC_ESR) & 0xEF);
837 if (send_status || accept_status)
838 break;
839 }
840 pr_debug("After Startup\n");
841
842 if (send_status)
843 pr_err("APIC never delivered???\n");
844 if (accept_status)
845 pr_err("APIC delivery error (%lx)\n", accept_status);
846
847 return (send_status | accept_status);
848}
849
850
851static void announce_cpu(int cpu, int apicid)
852{
853 static int current_node = -1;
854 int node = early_cpu_to_node(cpu);
855 static int width, node_width;
856
857 if (!width)
858 width = num_digits(num_possible_cpus()) + 1;
859
860 if (!node_width)
861 node_width = num_digits(num_possible_nodes()) + 1;
862
863 if (cpu == 1)
864 printk(KERN_INFO "x86: Booting SMP configuration:\n");
865
866 if (system_state == SYSTEM_BOOTING) {
867 if (node != current_node) {
868 if (current_node > (-1))
869 pr_cont("\n");
870 current_node = node;
871
872 printk(KERN_INFO ".... node %*s#%d, CPUs: ",
873 node_width - num_digits(node), " ", node);
874 }
875
876
877 if (cpu == 1)
878 pr_cont("%*s", width + 1, " ");
879
880 pr_cont("%*s#%d", width - num_digits(cpu), " ", cpu);
881
882 } else
883 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
884 node, cpu, apicid);
885}
886
887static int wakeup_cpu0_nmi(unsigned int cmd, struct pt_regs *regs)
888{
889 int cpu;
890
891 cpu = smp_processor_id();
892 if (cpu == 0 && !cpu_online(cpu) && enable_start_cpu0)
893 return NMI_HANDLED;
894
895 return NMI_DONE;
896}
897
898
899
900
901
902
903
904
905
906
907
908
909
910static int
911wakeup_cpu_via_init_nmi(int cpu, unsigned long start_ip, int apicid,
912 int *cpu0_nmi_registered)
913{
914 int id;
915 int boot_error;
916
917 preempt_disable();
918
919
920
921
922 if (cpu) {
923 boot_error = wakeup_secondary_cpu_via_init(apicid, start_ip);
924 goto out;
925 }
926
927
928
929
930
931
932 boot_error = register_nmi_handler(NMI_LOCAL,
933 wakeup_cpu0_nmi, 0, "wake_cpu0");
934
935 if (!boot_error) {
936 enable_start_cpu0 = 1;
937 *cpu0_nmi_registered = 1;
938 if (apic->dest_logical == APIC_DEST_LOGICAL)
939 id = cpu0_logical_apicid;
940 else
941 id = apicid;
942 boot_error = wakeup_secondary_cpu_via_nmi(id, start_ip);
943 }
944
945out:
946 preempt_enable();
947
948 return boot_error;
949}
950
951void common_cpu_up(unsigned int cpu, struct task_struct *idle)
952{
953
954 alternatives_enable_smp();
955
956 per_cpu(current_task, cpu) = idle;
957
958#ifdef CONFIG_X86_32
959
960 irq_ctx_init(cpu);
961 per_cpu(cpu_current_top_of_stack, cpu) =
962 (unsigned long)task_stack_page(idle) + THREAD_SIZE;
963#else
964 initial_gs = per_cpu_offset(cpu);
965#endif
966}
967
968
969
970
971
972
973
974static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle)
975{
976 volatile u32 *trampoline_status =
977 (volatile u32 *) __va(real_mode_header->trampoline_status);
978
979 unsigned long start_ip = real_mode_header->trampoline_start;
980
981 unsigned long boot_error = 0;
982 int cpu0_nmi_registered = 0;
983 unsigned long timeout;
984
985 idle->thread.sp = (unsigned long)task_pt_regs(idle);
986 early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
987 initial_code = (unsigned long)start_secondary;
988 initial_stack = idle->thread.sp;
989
990
991
992
993#ifdef CONFIG_X86_ESPFIX64
994 init_espfix_ap(cpu);
995#endif
996
997
998 announce_cpu(cpu, apicid);
999
1000
1001
1002
1003
1004
1005 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
1006
1007 pr_debug("Setting warm reset code and vector.\n");
1008
1009 smpboot_setup_warm_reset_vector(start_ip);
1010
1011
1012
1013 if (APIC_INTEGRATED(boot_cpu_apic_version)) {
1014 apic_write(APIC_ESR, 0);
1015 apic_read(APIC_ESR);
1016 }
1017 }
1018
1019
1020
1021
1022
1023
1024
1025 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1026 smp_mb();
1027
1028
1029
1030
1031
1032
1033
1034 if (apic->wakeup_secondary_cpu)
1035 boot_error = apic->wakeup_secondary_cpu(apicid, start_ip);
1036 else
1037 boot_error = wakeup_cpu_via_init_nmi(cpu, start_ip, apicid,
1038 &cpu0_nmi_registered);
1039
1040 if (!boot_error) {
1041
1042
1043
1044 boot_error = -1;
1045 timeout = jiffies + 10*HZ;
1046 while (time_before(jiffies, timeout)) {
1047 if (cpumask_test_cpu(cpu, cpu_initialized_mask)) {
1048
1049
1050
1051 cpumask_set_cpu(cpu, cpu_callout_mask);
1052 boot_error = 0;
1053 break;
1054 }
1055 schedule();
1056 }
1057 }
1058
1059 if (!boot_error) {
1060
1061
1062
1063 while (!cpumask_test_cpu(cpu, cpu_callin_mask)) {
1064
1065
1066
1067
1068
1069
1070 schedule();
1071 }
1072 }
1073
1074
1075 *trampoline_status = 0;
1076
1077 if (get_uv_system_type() != UV_NON_UNIQUE_APIC) {
1078
1079
1080
1081 smpboot_restore_warm_reset_vector();
1082 }
1083
1084
1085
1086
1087 if (cpu0_nmi_registered)
1088 unregister_nmi_handler(NMI_LOCAL, "wake_cpu0");
1089
1090 return boot_error;
1091}
1092
1093int native_cpu_up(unsigned int cpu, struct task_struct *tidle)
1094{
1095 int apicid = apic->cpu_present_to_apicid(cpu);
1096 unsigned long flags;
1097 int err;
1098
1099 WARN_ON(irqs_disabled());
1100
1101 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu);
1102
1103 if (apicid == BAD_APICID ||
1104 !physid_isset(apicid, phys_cpu_present_map) ||
1105 !apic->apic_id_valid(apicid)) {
1106 pr_err("%s: bad cpu %d\n", __func__, cpu);
1107 return -EINVAL;
1108 }
1109
1110
1111
1112
1113 if (cpumask_test_cpu(cpu, cpu_callin_mask)) {
1114 pr_debug("do_boot_cpu %d Already started\n", cpu);
1115 return -ENOSYS;
1116 }
1117
1118
1119
1120
1121
1122 mtrr_save_state();
1123
1124
1125 err = cpu_check_up_prepare(cpu);
1126 if (err && err != -EBUSY)
1127 return err;
1128
1129
1130 per_cpu(fpu_fpregs_owner_ctx, cpu) = NULL;
1131
1132 common_cpu_up(cpu, tidle);
1133
1134 err = do_boot_cpu(apicid, cpu, tidle);
1135 if (err) {
1136 pr_err("do_boot_cpu failed(%d) to wakeup CPU#%u\n", err, cpu);
1137 return -EIO;
1138 }
1139
1140
1141
1142
1143
1144 local_irq_save(flags);
1145 check_tsc_sync_source(cpu);
1146 local_irq_restore(flags);
1147
1148 while (!cpu_online(cpu)) {
1149 cpu_relax();
1150 touch_nmi_watchdog();
1151 }
1152
1153 return 0;
1154}
1155
1156
1157
1158
1159void arch_disable_smp_support(void)
1160{
1161 disable_ioapic_support();
1162}
1163
1164
1165
1166
1167
1168
1169static __init void disable_smp(void)
1170{
1171 pr_info("SMP disabled\n");
1172
1173 disable_ioapic_support();
1174
1175 init_cpu_present(cpumask_of(0));
1176 init_cpu_possible(cpumask_of(0));
1177
1178 if (smp_found_config)
1179 physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
1180 else
1181 physid_set_mask_of_physid(0, &phys_cpu_present_map);
1182 cpumask_set_cpu(0, topology_sibling_cpumask(0));
1183 cpumask_set_cpu(0, topology_core_cpumask(0));
1184}
1185
1186enum {
1187 SMP_OK,
1188 SMP_NO_CONFIG,
1189 SMP_NO_APIC,
1190 SMP_FORCE_UP,
1191};
1192
1193
1194
1195
1196static int __init smp_sanity_check(unsigned max_cpus)
1197{
1198 preempt_disable();
1199
1200#if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
1201 if (def_to_bigsmp && nr_cpu_ids > 8) {
1202 unsigned int cpu;
1203 unsigned nr;
1204
1205 pr_warn("More than 8 CPUs detected - skipping them\n"
1206 "Use CONFIG_X86_BIGSMP\n");
1207
1208 nr = 0;
1209 for_each_present_cpu(cpu) {
1210 if (nr >= 8)
1211 set_cpu_present(cpu, false);
1212 nr++;
1213 }
1214
1215 nr = 0;
1216 for_each_possible_cpu(cpu) {
1217 if (nr >= 8)
1218 set_cpu_possible(cpu, false);
1219 nr++;
1220 }
1221
1222 nr_cpu_ids = 8;
1223 }
1224#endif
1225
1226 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
1227 pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n",
1228 hard_smp_processor_id());
1229
1230 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1231 }
1232
1233
1234
1235
1236
1237 if (!smp_found_config && !acpi_lapic) {
1238 preempt_enable();
1239 pr_notice("SMP motherboard not detected\n");
1240 return SMP_NO_CONFIG;
1241 }
1242
1243
1244
1245
1246
1247 if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
1248 pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n",
1249 boot_cpu_physical_apicid);
1250 physid_set(hard_smp_processor_id(), phys_cpu_present_map);
1251 }
1252 preempt_enable();
1253
1254
1255
1256
1257 if (APIC_INTEGRATED(boot_cpu_apic_version) &&
1258 !boot_cpu_has(X86_FEATURE_APIC)) {
1259 if (!disable_apic) {
1260 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1261 boot_cpu_physical_apicid);
1262 pr_err("... forcing use of dummy APIC emulation (tell your hw vendor)\n");
1263 }
1264 return SMP_NO_APIC;
1265 }
1266
1267
1268
1269
1270 if (!max_cpus) {
1271 pr_info("SMP mode deactivated\n");
1272 return SMP_FORCE_UP;
1273 }
1274
1275 return SMP_OK;
1276}
1277
1278static void __init smp_cpu_index_default(void)
1279{
1280 int i;
1281 struct cpuinfo_x86 *c;
1282
1283 for_each_possible_cpu(i) {
1284 c = &cpu_data(i);
1285
1286 c->cpu_index = nr_cpu_ids;
1287 }
1288}
1289
1290
1291
1292
1293
1294void __init native_smp_prepare_cpus(unsigned int max_cpus)
1295{
1296 unsigned int i;
1297
1298 smp_cpu_index_default();
1299
1300
1301
1302
1303 smp_store_boot_cpu_info();
1304 cpumask_copy(cpu_callin_mask, cpumask_of(0));
1305 mb();
1306
1307 for_each_possible_cpu(i) {
1308 zalloc_cpumask_var(&per_cpu(cpu_sibling_map, i), GFP_KERNEL);
1309 zalloc_cpumask_var(&per_cpu(cpu_core_map, i), GFP_KERNEL);
1310 zalloc_cpumask_var(&per_cpu(cpu_llc_shared_map, i), GFP_KERNEL);
1311 }
1312
1313
1314
1315
1316
1317
1318
1319
1320 set_sched_topology(x86_topology);
1321
1322 set_cpu_sibling_map(0);
1323
1324 switch (smp_sanity_check(max_cpus)) {
1325 case SMP_NO_CONFIG:
1326 disable_smp();
1327 if (APIC_init_uniprocessor())
1328 pr_notice("Local APIC not detected. Using dummy APIC emulation.\n");
1329 return;
1330 case SMP_NO_APIC:
1331 disable_smp();
1332 return;
1333 case SMP_FORCE_UP:
1334 disable_smp();
1335 apic_bsp_setup(false);
1336 return;
1337 case SMP_OK:
1338 break;
1339 }
1340
1341 if (read_apic_id() != boot_cpu_physical_apicid) {
1342 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1343 read_apic_id(), boot_cpu_physical_apicid);
1344
1345 }
1346
1347 default_setup_apic_routing();
1348 cpu0_logical_apicid = apic_bsp_setup(false);
1349
1350 pr_info("CPU0: ");
1351 print_cpu_info(&cpu_data(0));
1352
1353 uv_system_init();
1354
1355 set_mtrr_aps_delayed_init();
1356
1357 smp_quirk_init_udelay();
1358}
1359
1360void arch_enable_nonboot_cpus_begin(void)
1361{
1362 set_mtrr_aps_delayed_init();
1363}
1364
1365void arch_enable_nonboot_cpus_end(void)
1366{
1367 mtrr_aps_init();
1368}
1369
1370
1371
1372
1373void __init native_smp_prepare_boot_cpu(void)
1374{
1375 int me = smp_processor_id();
1376 switch_to_new_gdt(me);
1377
1378 cpumask_set_cpu(me, cpu_callout_mask);
1379 cpu_set_state_online(me);
1380}
1381
1382void __init native_smp_cpus_done(unsigned int max_cpus)
1383{
1384 pr_debug("Boot done\n");
1385
1386 if (x86_has_numa_in_package)
1387 set_sched_topology(x86_numa_in_package_topology);
1388
1389 nmi_selftest();
1390 impress_friends();
1391 setup_ioapic_dest();
1392 mtrr_aps_init();
1393}
1394
1395static int __initdata setup_possible_cpus = -1;
1396static int __init _setup_possible_cpus(char *str)
1397{
1398 get_option(&str, &setup_possible_cpus);
1399 return 0;
1400}
1401early_param("possible_cpus", _setup_possible_cpus);
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421__init void prefill_possible_map(void)
1422{
1423 int i, possible;
1424
1425
1426 if (!num_processors) {
1427 if (boot_cpu_has(X86_FEATURE_APIC)) {
1428 int apicid = boot_cpu_physical_apicid;
1429 int cpu = hard_smp_processor_id();
1430
1431 pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
1432
1433
1434 if (apic->cpu_present_to_apicid(0) == BAD_APICID &&
1435 apic->apic_id_valid(apicid))
1436 generic_processor_info(apicid, boot_cpu_apic_version);
1437 }
1438
1439 if (!num_processors)
1440 num_processors = 1;
1441 }
1442
1443 i = setup_max_cpus ?: 1;
1444 if (setup_possible_cpus == -1) {
1445 possible = num_processors;
1446#ifdef CONFIG_HOTPLUG_CPU
1447 if (setup_max_cpus)
1448 possible += disabled_cpus;
1449#else
1450 if (possible > i)
1451 possible = i;
1452#endif
1453 } else
1454 possible = setup_possible_cpus;
1455
1456 total_cpus = max_t(int, possible, num_processors + disabled_cpus);
1457
1458
1459 if (possible > nr_cpu_ids) {
1460 pr_warn("%d Processors exceeds NR_CPUS limit of %d\n",
1461 possible, nr_cpu_ids);
1462 possible = nr_cpu_ids;
1463 }
1464
1465#ifdef CONFIG_HOTPLUG_CPU
1466 if (!setup_max_cpus)
1467#endif
1468 if (possible > i) {
1469 pr_warn("%d Processors exceeds max_cpus limit of %u\n",
1470 possible, setup_max_cpus);
1471 possible = i;
1472 }
1473
1474 nr_cpu_ids = possible;
1475
1476 pr_info("Allowing %d CPUs, %d hotplug CPUs\n",
1477 possible, max_t(int, possible - num_processors, 0));
1478
1479 reset_cpu_possible_mask();
1480
1481 for (i = 0; i < possible; i++)
1482 set_cpu_possible(i, true);
1483}
1484
1485#ifdef CONFIG_HOTPLUG_CPU
1486
1487
1488static void recompute_smt_state(void)
1489{
1490 int max_threads, cpu;
1491
1492 max_threads = 0;
1493 for_each_online_cpu (cpu) {
1494 int threads = cpumask_weight(topology_sibling_cpumask(cpu));
1495
1496 if (threads > max_threads)
1497 max_threads = threads;
1498 }
1499 __max_smt_threads = max_threads;
1500}
1501
1502static void remove_siblinginfo(int cpu)
1503{
1504 int sibling;
1505 struct cpuinfo_x86 *c = &cpu_data(cpu);
1506
1507 for_each_cpu(sibling, topology_core_cpumask(cpu)) {
1508 cpumask_clear_cpu(cpu, topology_core_cpumask(sibling));
1509
1510
1511
1512 if (cpumask_weight(topology_sibling_cpumask(cpu)) == 1)
1513 cpu_data(sibling).booted_cores--;
1514 }
1515
1516 for_each_cpu(sibling, topology_sibling_cpumask(cpu))
1517 cpumask_clear_cpu(cpu, topology_sibling_cpumask(sibling));
1518 for_each_cpu(sibling, cpu_llc_shared_mask(cpu))
1519 cpumask_clear_cpu(cpu, cpu_llc_shared_mask(sibling));
1520 cpumask_clear(cpu_llc_shared_mask(cpu));
1521 cpumask_clear(topology_sibling_cpumask(cpu));
1522 cpumask_clear(topology_core_cpumask(cpu));
1523 c->phys_proc_id = 0;
1524 c->cpu_core_id = 0;
1525 cpumask_clear_cpu(cpu, cpu_sibling_setup_mask);
1526 recompute_smt_state();
1527}
1528
1529static void remove_cpu_from_maps(int cpu)
1530{
1531 set_cpu_online(cpu, false);
1532 cpumask_clear_cpu(cpu, cpu_callout_mask);
1533 cpumask_clear_cpu(cpu, cpu_callin_mask);
1534
1535 cpumask_clear_cpu(cpu, cpu_initialized_mask);
1536 numa_remove_cpu(cpu);
1537}
1538
1539void cpu_disable_common(void)
1540{
1541 int cpu = smp_processor_id();
1542
1543 remove_siblinginfo(cpu);
1544
1545
1546 lock_vector_lock();
1547 remove_cpu_from_maps(cpu);
1548 unlock_vector_lock();
1549 fixup_irqs();
1550}
1551
1552int native_cpu_disable(void)
1553{
1554 int ret;
1555
1556 ret = check_irq_vectors_for_cpu_disable();
1557 if (ret)
1558 return ret;
1559
1560 clear_local_APIC();
1561 cpu_disable_common();
1562
1563 return 0;
1564}
1565
1566int common_cpu_die(unsigned int cpu)
1567{
1568 int ret = 0;
1569
1570
1571
1572
1573 if (cpu_wait_death(cpu, 5)) {
1574 if (system_state == SYSTEM_RUNNING)
1575 pr_info("CPU %u is now offline\n", cpu);
1576 } else {
1577 pr_err("CPU %u didn't die...\n", cpu);
1578 ret = -1;
1579 }
1580
1581 return ret;
1582}
1583
1584void native_cpu_die(unsigned int cpu)
1585{
1586 common_cpu_die(cpu);
1587}
1588
1589void play_dead_common(void)
1590{
1591 idle_task_exit();
1592 reset_lazy_tlbstate();
1593
1594
1595 (void)cpu_report_death();
1596
1597
1598
1599
1600 local_irq_disable();
1601}
1602
1603static bool wakeup_cpu0(void)
1604{
1605 if (smp_processor_id() == 0 && enable_start_cpu0)
1606 return true;
1607
1608 return false;
1609}
1610
1611
1612
1613
1614
1615static inline void mwait_play_dead(void)
1616{
1617 unsigned int eax, ebx, ecx, edx;
1618 unsigned int highest_cstate = 0;
1619 unsigned int highest_subcstate = 0;
1620 void *mwait_ptr;
1621 int i;
1622
1623 if (!this_cpu_has(X86_FEATURE_MWAIT))
1624 return;
1625 if (!this_cpu_has(X86_FEATURE_CLFLUSH))
1626 return;
1627 if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF)
1628 return;
1629
1630 eax = CPUID_MWAIT_LEAF;
1631 ecx = 0;
1632 native_cpuid(&eax, &ebx, &ecx, &edx);
1633
1634
1635
1636
1637
1638 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED)) {
1639 eax = 0;
1640 } else {
1641 edx >>= MWAIT_SUBSTATE_SIZE;
1642 for (i = 0; i < 7 && edx; i++, edx >>= MWAIT_SUBSTATE_SIZE) {
1643 if (edx & MWAIT_SUBSTATE_MASK) {
1644 highest_cstate = i;
1645 highest_subcstate = edx & MWAIT_SUBSTATE_MASK;
1646 }
1647 }
1648 eax = (highest_cstate << MWAIT_SUBSTATE_SIZE) |
1649 (highest_subcstate - 1);
1650 }
1651
1652
1653
1654
1655
1656
1657 mwait_ptr = ¤t_thread_info()->flags;
1658
1659 wbinvd();
1660
1661 while (1) {
1662
1663
1664
1665
1666
1667
1668
1669 mb();
1670 clflush(mwait_ptr);
1671 mb();
1672 __monitor(mwait_ptr, 0, 0);
1673 mb();
1674 __mwait(eax, 0);
1675
1676
1677
1678 if (wakeup_cpu0())
1679 start_cpu0();
1680 }
1681}
1682
1683void hlt_play_dead(void)
1684{
1685 if (__this_cpu_read(cpu_info.x86) >= 4)
1686 wbinvd();
1687
1688 while (1) {
1689 native_halt();
1690
1691
1692
1693 if (wakeup_cpu0())
1694 start_cpu0();
1695 }
1696}
1697
1698void native_play_dead(void)
1699{
1700 play_dead_common();
1701 tboot_shutdown(TB_SHUTDOWN_WFS);
1702
1703 mwait_play_dead();
1704 if (cpuidle_play_dead())
1705 hlt_play_dead();
1706}
1707
1708#else
1709int native_cpu_disable(void)
1710{
1711 return -ENOSYS;
1712}
1713
1714void native_cpu_die(unsigned int cpu)
1715{
1716
1717 BUG();
1718}
1719
1720void native_play_dead(void)
1721{
1722 BUG();
1723}
1724
1725#endif
1726