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24#ifndef __ATOMBIOS_CRTC_H__
25#define __ATOMBIOS_CRTC_H__
26
27void amdgpu_atombios_crtc_overscan_setup(struct drm_crtc *crtc,
28 struct drm_display_mode *mode,
29 struct drm_display_mode *adjusted_mode);
30void amdgpu_atombios_crtc_scaler_setup(struct drm_crtc *crtc);
31void amdgpu_atombios_crtc_lock(struct drm_crtc *crtc, int lock);
32void amdgpu_atombios_crtc_enable(struct drm_crtc *crtc, int state);
33void amdgpu_atombios_crtc_blank(struct drm_crtc *crtc, int state);
34void amdgpu_atombios_crtc_powergate(struct drm_crtc *crtc, int state);
35void amdgpu_atombios_crtc_powergate_init(struct amdgpu_device *adev);
36void amdgpu_atombios_crtc_set_dtd_timing(struct drm_crtc *crtc,
37 struct drm_display_mode *mode);
38void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev,
39 u32 dispclk);
40u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev,
41 u32 freq, u8 clk_type, u8 clk_src);
42void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc,
43 u32 crtc_id,
44 int pll_id,
45 u32 encoder_mode,
46 u32 encoder_id,
47 u32 clock,
48 u32 ref_div,
49 u32 fb_div,
50 u32 frac_fb_div,
51 u32 post_div,
52 int bpc,
53 bool ss_enabled,
54 struct amdgpu_atom_ss *ss);
55int amdgpu_atombios_crtc_prepare_pll(struct drm_crtc *crtc,
56 struct drm_display_mode *mode);
57void amdgpu_atombios_crtc_set_pll(struct drm_crtc *crtc,
58 struct drm_display_mode *mode);
59
60#endif
61