linux/drivers/i2c/busses/i2c-jz4780.c
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   1/*
   2 * Ingenic JZ4780 I2C bus driver
   3 *
   4 * Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc.
   5 * Copyright (C) 2015 Imagination Technologies
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License as published by
   9 * the Free Software Foundation; either version 2 of the License, or
  10 * (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 */
  17
  18#include <linux/bitops.h>
  19#include <linux/clk.h>
  20#include <linux/completion.h>
  21#include <linux/delay.h>
  22#include <linux/errno.h>
  23#include <linux/i2c.h>
  24#include <linux/init.h>
  25#include <linux/interrupt.h>
  26#include <linux/io.h>
  27#include <linux/kernel.h>
  28#include <linux/module.h>
  29#include <linux/platform_device.h>
  30#include <linux/sched.h>
  31#include <linux/slab.h>
  32#include <linux/time.h>
  33
  34#define JZ4780_I2C_CTRL         0x00
  35#define JZ4780_I2C_TAR          0x04
  36#define JZ4780_I2C_SAR          0x08
  37#define JZ4780_I2C_DC           0x10
  38#define JZ4780_I2C_SHCNT        0x14
  39#define JZ4780_I2C_SLCNT        0x18
  40#define JZ4780_I2C_FHCNT        0x1C
  41#define JZ4780_I2C_FLCNT        0x20
  42#define JZ4780_I2C_INTST        0x2C
  43#define JZ4780_I2C_INTM         0x30
  44#define JZ4780_I2C_RXTL         0x38
  45#define JZ4780_I2C_TXTL         0x3C
  46#define JZ4780_I2C_CINTR        0x40
  47#define JZ4780_I2C_CRXUF        0x44
  48#define JZ4780_I2C_CRXOF        0x48
  49#define JZ4780_I2C_CTXOF        0x4C
  50#define JZ4780_I2C_CRXREQ       0x50
  51#define JZ4780_I2C_CTXABRT      0x54
  52#define JZ4780_I2C_CRXDONE      0x58
  53#define JZ4780_I2C_CACT         0x5C
  54#define JZ4780_I2C_CSTP         0x60
  55#define JZ4780_I2C_CSTT         0x64
  56#define JZ4780_I2C_CGC          0x68
  57#define JZ4780_I2C_ENB          0x6C
  58#define JZ4780_I2C_STA          0x70
  59#define JZ4780_I2C_TXABRT       0x80
  60#define JZ4780_I2C_DMACR        0x88
  61#define JZ4780_I2C_DMATDLR      0x8C
  62#define JZ4780_I2C_DMARDLR      0x90
  63#define JZ4780_I2C_SDASU        0x94
  64#define JZ4780_I2C_ACKGC        0x98
  65#define JZ4780_I2C_ENSTA        0x9C
  66#define JZ4780_I2C_SDAHD        0xD0
  67
  68#define JZ4780_I2C_CTRL_STPHLD          BIT(7)
  69#define JZ4780_I2C_CTRL_SLVDIS          BIT(6)
  70#define JZ4780_I2C_CTRL_REST            BIT(5)
  71#define JZ4780_I2C_CTRL_MATP            BIT(4)
  72#define JZ4780_I2C_CTRL_SATP            BIT(3)
  73#define JZ4780_I2C_CTRL_SPDF            BIT(2)
  74#define JZ4780_I2C_CTRL_SPDS            BIT(1)
  75#define JZ4780_I2C_CTRL_MD              BIT(0)
  76
  77#define JZ4780_I2C_STA_SLVACT           BIT(6)
  78#define JZ4780_I2C_STA_MSTACT           BIT(5)
  79#define JZ4780_I2C_STA_RFF              BIT(4)
  80#define JZ4780_I2C_STA_RFNE             BIT(3)
  81#define JZ4780_I2C_STA_TFE              BIT(2)
  82#define JZ4780_I2C_STA_TFNF             BIT(1)
  83#define JZ4780_I2C_STA_ACT              BIT(0)
  84
  85static const char * const jz4780_i2c_abrt_src[] = {
  86        "ABRT_7B_ADDR_NOACK",
  87        "ABRT_10ADDR1_NOACK",
  88        "ABRT_10ADDR2_NOACK",
  89        "ABRT_XDATA_NOACK",
  90        "ABRT_GCALL_NOACK",
  91        "ABRT_GCALL_READ",
  92        "ABRT_HS_ACKD",
  93        "SBYTE_ACKDET",
  94        "ABRT_HS_NORSTRT",
  95        "SBYTE_NORSTRT",
  96        "ABRT_10B_RD_NORSTRT",
  97        "ABRT_MASTER_DIS",
  98        "ARB_LOST",
  99        "SLVFLUSH_TXFIFO",
 100        "SLV_ARBLOST",
 101        "SLVRD_INTX",
 102};
 103
 104#define JZ4780_I2C_INTST_IGC            BIT(11)
 105#define JZ4780_I2C_INTST_ISTT           BIT(10)
 106#define JZ4780_I2C_INTST_ISTP           BIT(9)
 107#define JZ4780_I2C_INTST_IACT           BIT(8)
 108#define JZ4780_I2C_INTST_RXDN           BIT(7)
 109#define JZ4780_I2C_INTST_TXABT          BIT(6)
 110#define JZ4780_I2C_INTST_RDREQ          BIT(5)
 111#define JZ4780_I2C_INTST_TXEMP          BIT(4)
 112#define JZ4780_I2C_INTST_TXOF           BIT(3)
 113#define JZ4780_I2C_INTST_RXFL           BIT(2)
 114#define JZ4780_I2C_INTST_RXOF           BIT(1)
 115#define JZ4780_I2C_INTST_RXUF           BIT(0)
 116
 117#define JZ4780_I2C_INTM_MIGC            BIT(11)
 118#define JZ4780_I2C_INTM_MISTT           BIT(10)
 119#define JZ4780_I2C_INTM_MISTP           BIT(9)
 120#define JZ4780_I2C_INTM_MIACT           BIT(8)
 121#define JZ4780_I2C_INTM_MRXDN           BIT(7)
 122#define JZ4780_I2C_INTM_MTXABT          BIT(6)
 123#define JZ4780_I2C_INTM_MRDREQ          BIT(5)
 124#define JZ4780_I2C_INTM_MTXEMP          BIT(4)
 125#define JZ4780_I2C_INTM_MTXOF           BIT(3)
 126#define JZ4780_I2C_INTM_MRXFL           BIT(2)
 127#define JZ4780_I2C_INTM_MRXOF           BIT(1)
 128#define JZ4780_I2C_INTM_MRXUF           BIT(0)
 129
 130#define JZ4780_I2C_DC_READ              BIT(8)
 131
 132#define JZ4780_I2C_SDAHD_HDENB          BIT(8)
 133
 134#define JZ4780_I2C_ENB_I2C              BIT(0)
 135
 136#define JZ4780_I2CSHCNT_ADJUST(n)       (((n) - 8) < 6 ? 6 : ((n) - 8))
 137#define JZ4780_I2CSLCNT_ADJUST(n)       (((n) - 1) < 8 ? 8 : ((n) - 1))
 138#define JZ4780_I2CFHCNT_ADJUST(n)       (((n) - 8) < 6 ? 6 : ((n) - 8))
 139#define JZ4780_I2CFLCNT_ADJUST(n)       (((n) - 1) < 8 ? 8 : ((n) - 1))
 140
 141#define JZ4780_I2C_FIFO_LEN     16
 142#define TX_LEVEL                3
 143#define RX_LEVEL                (JZ4780_I2C_FIFO_LEN - TX_LEVEL - 1)
 144
 145#define JZ4780_I2C_TIMEOUT      300
 146
 147#define BUFSIZE 200
 148
 149struct jz4780_i2c {
 150        void __iomem            *iomem;
 151        int                      irq;
 152        struct clk              *clk;
 153        struct i2c_adapter       adap;
 154
 155        /* lock to protect rbuf and wbuf between xfer_rd/wr and irq handler */
 156        spinlock_t              lock;
 157
 158        /* beginning of lock scope */
 159        unsigned char           *rbuf;
 160        int                     rd_total_len;
 161        int                     rd_data_xfered;
 162        int                     rd_cmd_xfered;
 163
 164        unsigned char           *wbuf;
 165        int                     wt_len;
 166
 167        int                     is_write;
 168        int                     stop_hold;
 169        int                     speed;
 170
 171        int                     data_buf[BUFSIZE];
 172        int                     cmd_buf[BUFSIZE];
 173        int                     cmd;
 174
 175        /* end of lock scope */
 176        struct completion       trans_waitq;
 177};
 178
 179static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c,
 180                                              unsigned long offset)
 181{
 182        return readw(i2c->iomem + offset);
 183}
 184
 185static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c,
 186                                     unsigned long offset, unsigned short val)
 187{
 188        writew(val, i2c->iomem + offset);
 189}
 190
 191static int jz4780_i2c_disable(struct jz4780_i2c *i2c)
 192{
 193        unsigned short regval;
 194        unsigned long loops = 5;
 195
 196        jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0);
 197
 198        do {
 199                regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
 200                if (!(regval & JZ4780_I2C_ENB_I2C))
 201                        return 0;
 202
 203                usleep_range(5000, 15000);
 204        } while (--loops);
 205
 206        dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval);
 207        return -ETIMEDOUT;
 208}
 209
 210static int jz4780_i2c_enable(struct jz4780_i2c *i2c)
 211{
 212        unsigned short regval;
 213        unsigned long loops = 5;
 214
 215        jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1);
 216
 217        do {
 218                regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA);
 219                if (regval & JZ4780_I2C_ENB_I2C)
 220                        return 0;
 221
 222                usleep_range(5000, 15000);
 223        } while (--loops);
 224
 225        dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval);
 226        return -ETIMEDOUT;
 227}
 228
 229static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address)
 230{
 231        unsigned short regval;
 232        unsigned long loops = 5;
 233
 234        do {
 235                regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 236                if ((regval & JZ4780_I2C_STA_TFE) &&
 237                    !(regval & JZ4780_I2C_STA_MSTACT))
 238                        break;
 239
 240                usleep_range(5000, 15000);
 241        } while (--loops);
 242
 243        if (loops) {
 244                jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address);
 245                return 0;
 246        }
 247
 248        dev_err(&i2c->adap.dev,
 249                "set device to address 0x%02x failed, STA=0x%04x\n",
 250                address, regval);
 251
 252        return -ENXIO;
 253}
 254
 255static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c)
 256{
 257        int dev_clk_khz = clk_get_rate(i2c->clk) / 1000;
 258        int cnt_high = 0;       /* HIGH period count of the SCL clock */
 259        int cnt_low = 0;        /* LOW period count of the SCL clock */
 260        int cnt_period = 0;     /* period count of the SCL clock */
 261        int setup_time = 0;
 262        int hold_time = 0;
 263        unsigned short tmp = 0;
 264        int i2c_clk = i2c->speed;
 265
 266        if (jz4780_i2c_disable(i2c))
 267                dev_dbg(&i2c->adap.dev, "i2c not disabled\n");
 268
 269        /*
 270         * 1 JZ4780_I2C cycle equals to cnt_period PCLK(i2c_clk)
 271         * standard mode, min LOW and HIGH period are 4700 ns and 4000 ns
 272         * fast mode, min LOW and HIGH period are 1300 ns and 600 ns
 273         */
 274        cnt_period = dev_clk_khz / i2c_clk;
 275
 276        if (i2c_clk <= 100)
 277                cnt_high = (cnt_period * 4000) / (4700 + 4000);
 278        else
 279                cnt_high = (cnt_period * 600) / (1300 + 600);
 280
 281        cnt_low = cnt_period - cnt_high;
 282
 283        /*
 284         * NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because
 285         * normal read are 2 messages, we cannot disable i2c controller
 286         * between these two messages, this means that we must always set
 287         * JZ4780_I2C_CTRL_REST when init JZ4780_I2C_CTRL
 288         *
 289         */
 290        if (i2c_clk <= 100) {
 291                tmp = JZ4780_I2C_CTRL_SPDS | JZ4780_I2C_CTRL_REST
 292                      | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
 293                jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 294
 295                jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT,
 296                                  JZ4780_I2CSHCNT_ADJUST(cnt_high));
 297                jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT,
 298                                  JZ4780_I2CSLCNT_ADJUST(cnt_low));
 299        } else {
 300                tmp = JZ4780_I2C_CTRL_SPDF | JZ4780_I2C_CTRL_REST
 301                      | JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD;
 302                jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 303
 304                jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT,
 305                                  JZ4780_I2CFHCNT_ADJUST(cnt_high));
 306                jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT,
 307                                  JZ4780_I2CFLCNT_ADJUST(cnt_low));
 308        }
 309
 310        /*
 311         * a i2c device must internally provide a hold time at least 300ns
 312         * tHD:DAT
 313         *      Standard Mode: min=300ns, max=3450ns
 314         *      Fast Mode: min=0ns, max=900ns
 315         * tSU:DAT
 316         *      Standard Mode: min=250ns, max=infinite
 317         *      Fast Mode: min=100(250ns is recommended), max=infinite
 318         *
 319         * 1i2c_clk = 10^6 / dev_clk_khz
 320         * on FPGA, dev_clk_khz = 12000, so 1i2c_clk = 1000/12 = 83ns
 321         * on Pisces(1008M), dev_clk_khz=126000, so 1i2c_clk = 1000 / 126 = 8ns
 322         *
 323         * The actual hold time is (SDAHD + 1) * (i2c_clk period).
 324         *
 325         * Length of setup time calculated using (SDASU - 1) * (ic_clk_period)
 326         *
 327         */
 328        if (i2c_clk <= 100) { /* standard mode */
 329                setup_time = 300;
 330                hold_time = 400;
 331        } else {
 332                setup_time = 450;
 333                hold_time = 450;
 334        }
 335
 336        hold_time = ((hold_time * dev_clk_khz) / 1000000) - 1;
 337        setup_time = ((setup_time * dev_clk_khz) / 1000000)  + 1;
 338
 339        if (setup_time > 255)
 340                setup_time = 255;
 341
 342        if (setup_time <= 0)
 343                setup_time = 1;
 344
 345        jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time);
 346
 347        if (hold_time > 255)
 348                hold_time = 255;
 349
 350        if (hold_time >= 0) {
 351                /*i2c hold time enable */
 352                hold_time |= JZ4780_I2C_SDAHD_HDENB;
 353                jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time);
 354        } else {
 355                /* disable hold time */
 356                jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0);
 357        }
 358
 359        return 0;
 360}
 361
 362static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c)
 363{
 364        int ret;
 365        unsigned long flags;
 366        unsigned short tmp;
 367
 368        spin_lock_irqsave(&i2c->lock, flags);
 369
 370        /* can send stop now if need */
 371        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 372        tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 373        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 374
 375        /* disable all interrupts first */
 376        jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
 377
 378        /* then clear all interrupts */
 379        jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT);
 380        jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR);
 381
 382        /* then disable the controller */
 383        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 384        tmp &= ~JZ4780_I2C_ENB_I2C;
 385        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 386        udelay(10);
 387        tmp |= JZ4780_I2C_ENB_I2C;
 388        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 389
 390        spin_unlock_irqrestore(&i2c->lock, flags);
 391
 392        ret = jz4780_i2c_disable(i2c);
 393        if (ret)
 394                dev_err(&i2c->adap.dev,
 395                        "unable to disable device during cleanup!\n");
 396
 397        if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM)
 398                     & jz4780_i2c_readw(i2c, JZ4780_I2C_INTST)))
 399                dev_err(&i2c->adap.dev,
 400                        "device has interrupts after a complete cleanup!\n");
 401
 402        return ret;
 403}
 404
 405static int jz4780_i2c_prepare(struct jz4780_i2c *i2c)
 406{
 407        jz4780_i2c_set_speed(i2c);
 408        return jz4780_i2c_enable(i2c);
 409}
 410
 411static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c, int cmd_count)
 412{
 413        int i;
 414
 415        for (i = 0; i < cmd_count; i++)
 416                jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ);
 417}
 418
 419static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c)
 420{
 421        jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0);
 422        complete(&i2c->trans_waitq);
 423}
 424
 425static irqreturn_t jz4780_i2c_irq(int irqno, void *dev_id)
 426{
 427        unsigned short tmp;
 428        unsigned short intst;
 429        unsigned short intmsk;
 430        struct jz4780_i2c *i2c = dev_id;
 431        unsigned long flags;
 432
 433        spin_lock_irqsave(&i2c->lock, flags);
 434        intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
 435        intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST);
 436
 437        intst &= intmsk;
 438
 439        if (intst & JZ4780_I2C_INTST_TXABT) {
 440                jz4780_i2c_trans_done(i2c);
 441                goto done;
 442        }
 443
 444        if (intst & JZ4780_I2C_INTST_RXOF) {
 445                dev_dbg(&i2c->adap.dev, "received fifo overflow!\n");
 446                jz4780_i2c_trans_done(i2c);
 447                goto done;
 448        }
 449
 450        /*
 451         * When reading, always drain RX FIFO before we send more Read
 452         * Commands to avoid fifo overrun
 453         */
 454        if (i2c->is_write == 0) {
 455                int rd_left;
 456
 457                while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA)
 458                                  & JZ4780_I2C_STA_RFNE)) {
 459                        *(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC)
 460                                         & 0xff;
 461                        i2c->rd_data_xfered++;
 462                        if (i2c->rd_data_xfered == i2c->rd_total_len) {
 463                                jz4780_i2c_trans_done(i2c);
 464                                goto done;
 465                        }
 466                }
 467
 468                rd_left = i2c->rd_total_len - i2c->rd_data_xfered;
 469
 470                if (rd_left <= JZ4780_I2C_FIFO_LEN)
 471                        jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1);
 472        }
 473
 474        if (intst & JZ4780_I2C_INTST_TXEMP) {
 475                if (i2c->is_write == 0) {
 476                        int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
 477                        int max_send = (JZ4780_I2C_FIFO_LEN - 1)
 478                                         - (i2c->rd_cmd_xfered
 479                                         - i2c->rd_data_xfered);
 480                        int cmd_to_send = min(cmd_left, max_send);
 481
 482                        if (i2c->rd_cmd_xfered != 0)
 483                                cmd_to_send = min(cmd_to_send,
 484                                                  JZ4780_I2C_FIFO_LEN
 485                                                  - TX_LEVEL - 1);
 486
 487                        if (cmd_to_send) {
 488                                jz4780_i2c_send_rcmd(i2c, cmd_to_send);
 489                                i2c->rd_cmd_xfered += cmd_to_send;
 490                        }
 491
 492                        cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered;
 493                        if (cmd_left == 0) {
 494                                intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM);
 495                                intmsk &= ~JZ4780_I2C_INTM_MTXEMP;
 496                                jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk);
 497
 498                                tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 499                                tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 500                                jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 501                        }
 502                } else {
 503                        unsigned short data;
 504                        unsigned short i2c_sta;
 505
 506                        i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 507
 508                        while ((i2c_sta & JZ4780_I2C_STA_TFNF) &&
 509                               (i2c->wt_len > 0)) {
 510                                i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 511                                data = *i2c->wbuf;
 512                                data &= ~JZ4780_I2C_DC_READ;
 513                                jz4780_i2c_writew(i2c, JZ4780_I2C_DC,
 514                                                  data);
 515                                i2c->wbuf++;
 516                                i2c->wt_len--;
 517                        }
 518
 519                        if (i2c->wt_len == 0) {
 520                                if (!i2c->stop_hold) {
 521                                        tmp = jz4780_i2c_readw(i2c,
 522                                                               JZ4780_I2C_CTRL);
 523                                        tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 524                                        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL,
 525                                                          tmp);
 526                                }
 527
 528                                jz4780_i2c_trans_done(i2c);
 529                                goto done;
 530                        }
 531                }
 532        }
 533
 534done:
 535        spin_unlock_irqrestore(&i2c->lock, flags);
 536        return IRQ_HANDLED;
 537}
 538
 539static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src)
 540{
 541        int i;
 542
 543        dev_err(&i2c->adap.dev, "txabrt: 0x%08x\n", src);
 544        dev_err(&i2c->adap.dev, "device addr=%x\n",
 545                jz4780_i2c_readw(i2c, JZ4780_I2C_TAR));
 546        dev_err(&i2c->adap.dev, "send cmd count:%d  %d\n",
 547                i2c->cmd, i2c->cmd_buf[i2c->cmd]);
 548        dev_err(&i2c->adap.dev, "receive data count:%d  %d\n",
 549                i2c->cmd, i2c->data_buf[i2c->cmd]);
 550
 551        for (i = 0; i < 16; i++) {
 552                if (src & BIT(i))
 553                        dev_dbg(&i2c->adap.dev, "I2C TXABRT[%d]=%s\n",
 554                                i, jz4780_i2c_abrt_src[i]);
 555        }
 556}
 557
 558static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c,
 559                                       unsigned char *buf, int len, int cnt,
 560                                       int idx)
 561{
 562        int ret = 0;
 563        long timeout;
 564        int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
 565        unsigned short tmp;
 566        unsigned long flags;
 567
 568        memset(buf, 0, len);
 569
 570        spin_lock_irqsave(&i2c->lock, flags);
 571
 572        i2c->stop_hold = 0;
 573        i2c->is_write = 0;
 574        i2c->rbuf = buf;
 575        i2c->rd_total_len = len;
 576        i2c->rd_data_xfered = 0;
 577        i2c->rd_cmd_xfered = 0;
 578
 579        if (len <= JZ4780_I2C_FIFO_LEN)
 580                jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1);
 581        else
 582                jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, RX_LEVEL);
 583
 584        jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
 585
 586        jz4780_i2c_writew(i2c, JZ4780_I2C_INTM,
 587                          JZ4780_I2C_INTM_MRXFL | JZ4780_I2C_INTM_MTXEMP
 588                          | JZ4780_I2C_INTM_MTXABT | JZ4780_I2C_INTM_MRXOF);
 589
 590        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 591        tmp |= JZ4780_I2C_CTRL_STPHLD;
 592        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 593
 594        spin_unlock_irqrestore(&i2c->lock, flags);
 595
 596        timeout = wait_for_completion_timeout(&i2c->trans_waitq,
 597                                              msecs_to_jiffies(wait_time));
 598
 599        if (!timeout) {
 600                dev_err(&i2c->adap.dev, "irq read timeout\n");
 601                dev_dbg(&i2c->adap.dev, "send cmd count:%d  %d\n",
 602                        i2c->cmd, i2c->cmd_buf[i2c->cmd]);
 603                dev_dbg(&i2c->adap.dev, "receive data count:%d  %d\n",
 604                        i2c->cmd, i2c->data_buf[i2c->cmd]);
 605                ret = -EIO;
 606        }
 607
 608        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
 609        if (tmp) {
 610                jz4780_i2c_txabrt(i2c, tmp);
 611                ret = -EIO;
 612        }
 613
 614        return ret;
 615}
 616
 617static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c,
 618                                        unsigned char *buf, int len,
 619                                        int cnt, int idx)
 620{
 621        int ret = 0;
 622        int wait_time = JZ4780_I2C_TIMEOUT * (len + 5);
 623        long timeout;
 624        unsigned short tmp;
 625        unsigned long flags;
 626
 627        spin_lock_irqsave(&i2c->lock, flags);
 628
 629        if (idx < (cnt - 1))
 630                i2c->stop_hold = 1;
 631        else
 632                i2c->stop_hold = 0;
 633
 634        i2c->is_write = 1;
 635        i2c->wbuf = buf;
 636        i2c->wt_len = len;
 637
 638        jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, TX_LEVEL);
 639
 640        jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP
 641                                        | JZ4780_I2C_INTM_MTXABT);
 642
 643        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 644        tmp |= JZ4780_I2C_CTRL_STPHLD;
 645        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 646
 647        spin_unlock_irqrestore(&i2c->lock, flags);
 648
 649        timeout = wait_for_completion_timeout(&i2c->trans_waitq,
 650                                              msecs_to_jiffies(wait_time));
 651        if (timeout && !i2c->stop_hold) {
 652                unsigned short i2c_sta;
 653                int write_in_process;
 654
 655                timeout = JZ4780_I2C_TIMEOUT * 100;
 656                for (; timeout > 0; timeout--) {
 657                        i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
 658
 659                        write_in_process = (i2c_sta & JZ4780_I2C_STA_MSTACT) ||
 660                                !(i2c_sta & JZ4780_I2C_STA_TFE);
 661                        if (!write_in_process)
 662                                break;
 663                        udelay(10);
 664                }
 665        }
 666
 667        if (!timeout) {
 668                dev_err(&i2c->adap.dev, "write wait timeout\n");
 669                ret = -EIO;
 670        }
 671
 672        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT);
 673        if (tmp) {
 674                jz4780_i2c_txabrt(i2c, tmp);
 675                ret = -EIO;
 676        }
 677
 678        return ret;
 679}
 680
 681static int jz4780_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg,
 682                           int count)
 683{
 684        int i = -EIO;
 685        int ret = 0;
 686        struct jz4780_i2c *i2c = adap->algo_data;
 687
 688        ret = jz4780_i2c_prepare(i2c);
 689        if (ret) {
 690                dev_err(&i2c->adap.dev, "I2C prepare failed\n");
 691                goto out;
 692        }
 693
 694        if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) {
 695                ret = jz4780_i2c_set_target(i2c, msg->addr);
 696                if (ret)
 697                        goto out;
 698        }
 699        for (i = 0; i < count; i++, msg++) {
 700                if (msg->flags & I2C_M_RD)
 701                        ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len,
 702                                                   count, i);
 703                else
 704                        ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len,
 705                                                    count, i);
 706
 707                if (ret)
 708                        goto out;
 709        }
 710
 711        ret = i;
 712
 713out:
 714        jz4780_i2c_cleanup(i2c);
 715        return ret;
 716}
 717
 718static u32 jz4780_i2c_functionality(struct i2c_adapter *adap)
 719{
 720        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 721}
 722
 723static const struct i2c_algorithm jz4780_i2c_algorithm = {
 724        .master_xfer    = jz4780_i2c_xfer,
 725        .functionality  = jz4780_i2c_functionality,
 726};
 727
 728static const struct of_device_id jz4780_i2c_of_matches[] = {
 729        { .compatible = "ingenic,jz4780-i2c", },
 730        { /* sentinel */ }
 731};
 732MODULE_DEVICE_TABLE(of, jz4780_i2c_of_matches);
 733
 734static int jz4780_i2c_probe(struct platform_device *pdev)
 735{
 736        int ret = 0;
 737        unsigned int clk_freq = 0;
 738        unsigned short tmp;
 739        struct resource *r;
 740        struct jz4780_i2c *i2c;
 741
 742        i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL);
 743        if (!i2c)
 744                return -ENOMEM;
 745
 746        i2c->adap.owner         = THIS_MODULE;
 747        i2c->adap.algo          = &jz4780_i2c_algorithm;
 748        i2c->adap.algo_data     = i2c;
 749        i2c->adap.retries       = 5;
 750        i2c->adap.dev.parent    = &pdev->dev;
 751        i2c->adap.dev.of_node   = pdev->dev.of_node;
 752        sprintf(i2c->adap.name, "%s", pdev->name);
 753
 754        init_completion(&i2c->trans_waitq);
 755        spin_lock_init(&i2c->lock);
 756
 757        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 758        i2c->iomem = devm_ioremap_resource(&pdev->dev, r);
 759        if (IS_ERR(i2c->iomem))
 760                return PTR_ERR(i2c->iomem);
 761
 762        platform_set_drvdata(pdev, i2c);
 763
 764        i2c->clk = devm_clk_get(&pdev->dev, NULL);
 765        if (IS_ERR(i2c->clk))
 766                return PTR_ERR(i2c->clk);
 767
 768        ret = clk_prepare_enable(i2c->clk);
 769        if (ret)
 770                return ret;
 771
 772        ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
 773                                   &clk_freq);
 774        if (ret) {
 775                dev_err(&pdev->dev, "clock-frequency not specified in DT\n");
 776                goto err;
 777        }
 778
 779        i2c->speed = clk_freq / 1000;
 780        if (i2c->speed == 0) {
 781                ret = -EINVAL;
 782                dev_err(&pdev->dev, "clock-frequency minimum is 1000\n");
 783                goto err;
 784        }
 785        jz4780_i2c_set_speed(i2c);
 786
 787        dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed);
 788
 789        tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL);
 790        tmp &= ~JZ4780_I2C_CTRL_STPHLD;
 791        jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp);
 792
 793        jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0);
 794
 795        i2c->irq = platform_get_irq(pdev, 0);
 796        ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0,
 797                               dev_name(&pdev->dev), i2c);
 798        if (ret)
 799                goto err;
 800
 801        ret = i2c_add_adapter(&i2c->adap);
 802        if (ret < 0)
 803                goto err;
 804
 805        return 0;
 806
 807err:
 808        clk_disable_unprepare(i2c->clk);
 809        return ret;
 810}
 811
 812static int jz4780_i2c_remove(struct platform_device *pdev)
 813{
 814        struct jz4780_i2c *i2c = platform_get_drvdata(pdev);
 815
 816        clk_disable_unprepare(i2c->clk);
 817        i2c_del_adapter(&i2c->adap);
 818        return 0;
 819}
 820
 821static struct platform_driver jz4780_i2c_driver = {
 822        .probe          = jz4780_i2c_probe,
 823        .remove         = jz4780_i2c_remove,
 824        .driver         = {
 825                .name   = "jz4780-i2c",
 826                .of_match_table = of_match_ptr(jz4780_i2c_of_matches),
 827        },
 828};
 829
 830module_platform_driver(jz4780_i2c_driver);
 831
 832MODULE_LICENSE("GPL");
 833MODULE_AUTHOR("ztyan<ztyan@ingenic.cn>");
 834MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");
 835