linux/drivers/media/dvb-frontends/as102_fe_types.h
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   1/*
   2 * Abilis Systems Single DVB-T Receiver
   3 * Copyright (C) 2008 Pierrick Hascoet <pierrick.hascoet@abilis.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; either version 2, or (at your option)
   8 * any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 */
  15#ifndef _AS10X_TYPES_H_
  16#define _AS10X_TYPES_H_
  17
  18/*********************************/
  19/*       MACRO DEFINITIONS       */
  20/*********************************/
  21
  22/* bandwidth constant values */
  23#define BW_5_MHZ                0x00
  24#define BW_6_MHZ                0x01
  25#define BW_7_MHZ                0x02
  26#define BW_8_MHZ                0x03
  27
  28/* hierarchy priority selection values */
  29#define HIER_NO_PRIORITY        0x00
  30#define HIER_LOW_PRIORITY       0x01
  31#define HIER_HIGH_PRIORITY      0x02
  32
  33/* constellation available values */
  34#define CONST_QPSK              0x00
  35#define CONST_QAM16             0x01
  36#define CONST_QAM64             0x02
  37#define CONST_UNKNOWN           0xFF
  38
  39/* hierarchy available values */
  40#define HIER_NONE               0x00
  41#define HIER_ALPHA_1            0x01
  42#define HIER_ALPHA_2            0x02
  43#define HIER_ALPHA_4            0x03
  44#define HIER_UNKNOWN            0xFF
  45
  46/* interleaving available values */
  47#define INTLV_NATIVE            0x00
  48#define INTLV_IN_DEPTH          0x01
  49#define INTLV_UNKNOWN           0xFF
  50
  51/* code rate available values */
  52#define CODE_RATE_1_2           0x00
  53#define CODE_RATE_2_3           0x01
  54#define CODE_RATE_3_4           0x02
  55#define CODE_RATE_5_6           0x03
  56#define CODE_RATE_7_8           0x04
  57#define CODE_RATE_UNKNOWN       0xFF
  58
  59/* guard interval available values */
  60#define GUARD_INT_1_32          0x00
  61#define GUARD_INT_1_16          0x01
  62#define GUARD_INT_1_8           0x02
  63#define GUARD_INT_1_4           0x03
  64#define GUARD_UNKNOWN           0xFF
  65
  66/* transmission mode available values */
  67#define TRANS_MODE_2K           0x00
  68#define TRANS_MODE_8K           0x01
  69#define TRANS_MODE_4K           0x02
  70#define TRANS_MODE_UNKNOWN      0xFF
  71
  72/* DVBH signalling available values */
  73#define TIMESLICING_PRESENT     0x01
  74#define MPE_FEC_PRESENT         0x02
  75
  76/* tune state available */
  77#define TUNE_STATUS_NOT_TUNED           0x00
  78#define TUNE_STATUS_IDLE                0x01
  79#define TUNE_STATUS_LOCKING             0x02
  80#define TUNE_STATUS_SIGNAL_DVB_OK       0x03
  81#define TUNE_STATUS_STREAM_DETECTED     0x04
  82#define TUNE_STATUS_STREAM_TUNED        0x05
  83#define TUNE_STATUS_ERROR               0xFF
  84
  85/* available TS FID filter types */
  86#define TS_PID_TYPE_TS          0
  87#define TS_PID_TYPE_PSI_SI      1
  88#define TS_PID_TYPE_MPE         2
  89
  90/* number of echos available */
  91#define MAX_ECHOS       15
  92
  93/* Context types */
  94#define CONTEXT_LNA                     1010
  95#define CONTEXT_ELNA_HYSTERESIS         4003
  96#define CONTEXT_ELNA_GAIN               4004
  97#define CONTEXT_MER_THRESHOLD           5005
  98#define CONTEXT_MER_OFFSET              5006
  99#define CONTEXT_IR_STATE                7000
 100#define CONTEXT_TSOUT_MSB_FIRST         7004
 101#define CONTEXT_TSOUT_FALLING_EDGE      7005
 102
 103/* Configuration modes */
 104#define CFG_MODE_ON     0
 105#define CFG_MODE_OFF    1
 106#define CFG_MODE_AUTO   2
 107
 108struct as10x_tps {
 109        uint8_t modulation;
 110        uint8_t hierarchy;
 111        uint8_t interleaving_mode;
 112        uint8_t code_rate_HP;
 113        uint8_t code_rate_LP;
 114        uint8_t guard_interval;
 115        uint8_t transmission_mode;
 116        uint8_t DVBH_mask_HP;
 117        uint8_t DVBH_mask_LP;
 118        uint16_t cell_ID;
 119} __packed;
 120
 121struct as10x_tune_args {
 122        /* frequency */
 123        uint32_t freq;
 124        /* bandwidth */
 125        uint8_t bandwidth;
 126        /* hierarchy selection */
 127        uint8_t hier_select;
 128        /* constellation */
 129        uint8_t modulation;
 130        /* hierarchy */
 131        uint8_t hierarchy;
 132        /* interleaving mode */
 133        uint8_t interleaving_mode;
 134        /* code rate */
 135        uint8_t code_rate;
 136        /* guard interval */
 137        uint8_t guard_interval;
 138        /* transmission mode */
 139        uint8_t transmission_mode;
 140} __packed;
 141
 142struct as10x_tune_status {
 143        /* tune status */
 144        uint8_t tune_state;
 145        /* signal strength */
 146        int16_t signal_strength;
 147        /* packet error rate 10^-4 */
 148        uint16_t PER;
 149        /* bit error rate 10^-4 */
 150        uint16_t BER;
 151} __packed;
 152
 153struct as10x_demod_stats {
 154        /* frame counter */
 155        uint32_t frame_count;
 156        /* Bad frame counter */
 157        uint32_t bad_frame_count;
 158        /* Number of wrong bytes fixed by Reed-Solomon */
 159        uint32_t bytes_fixed_by_rs;
 160        /* Averaged MER */
 161        uint16_t mer;
 162        /* statistics calculation state indicator (started or not) */
 163        uint8_t has_started;
 164} __packed;
 165
 166struct as10x_ts_filter {
 167        uint16_t pid;  /* valid PID value 0x00 : 0x2000 */
 168        uint8_t  type; /* Red TS_PID_TYPE_<N> values */
 169        uint8_t  idx;  /* index in filtering table */
 170} __packed;
 171
 172struct as10x_register_value {
 173        uint8_t mode;
 174        union {
 175                uint8_t  value8;   /* 8 bit value */
 176                uint16_t value16;  /* 16 bit value */
 177                uint32_t value32;  /* 32 bit value */
 178        } __packed u;
 179} __packed;
 180
 181struct as10x_register_addr {
 182        /* register addr */
 183        uint32_t addr;
 184        /* register mode access */
 185        uint8_t mode;
 186};
 187
 188#endif
 189