LXR linux/drivers/media/dvb-frontends/tda10023.c

   1/*
   2    TDA10023  - DVB-C decoder
   3    (as used in Philips CU1216-3 NIM and the Reelbox DVB-C tuner card)
   4
   5    Copyright (C) 2005 Georg Acher, BayCom GmbH (acher at baycom dot de)
   6    Copyright (c) 2006 Hartmut Birr (e9hack at gmail dot com)
   7
   8    Remotely based on tda10021.c
   9    Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
  10    Copyright (C) 2004 Markus Schulz <msc@antzsystem.de>
  11                   Support for TDA10021
  12
  13    This program is free software; you can redistribute it and/or modify
  14    it under the terms of the GNU General Public License as published by
  15    the Free Software Foundation; either version 2 of the License, or
  16    (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful,
  19    but WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21    GNU General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, write to the Free Software
  25    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26*/
  27
  28#include <linux/delay.h>
  29#include <linux/errno.h>
  30#include <linux/init.h>
  31#include <linux/kernel.h>
  32#include <linux/module.h>
  33#include <linux/string.h>
  34#include <linux/slab.h>
  35
  36#include <asm/div64.h>
  37
  38#include "dvb_frontend.h"
  39#include "tda1002x.h"
  40
  41#define REG0_INIT_VAL 0x23
  42
  43struct tda10023_state {
  44        struct i2c_adapter* i2c;
  45        /* configuration settings */
  46        const struct tda10023_config *config;
  47        struct dvb_frontend frontend;
  48
  49        u8 pwm;
  50        u8 reg0;
  51
  52        /* clock settings */
  53        u32 xtal;
  54        u8 pll_m;
  55        u8 pll_p;
  56        u8 pll_n;
  57        u32 sysclk;
  58};
  59
  60#define dprintk(x...)
  61
  62static int verbose;
  63
  64static u8 tda10023_readreg (struct tda10023_state* state, u8 reg)
  65{
  66        u8 b0 [] = { reg };
  67        u8 b1 [] = { 0 };
  68        struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
  69                                  { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
  70        int ret;
  71
  72        ret = i2c_transfer (state->i2c, msg, 2);
  73        if (ret != 2) {
  74                int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
  75                printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error (reg == 0x%02x, ret == %i)\n",
  76                        num, __func__, reg, ret);
  77        }
  78        return b1[0];
  79}
  80
  81static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data)
  82{
  83        u8 buf[] = { reg, data };
  84        struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
  85        int ret;
  86
  87        ret = i2c_transfer (state->i2c, &msg, 1);
  88        if (ret != 1) {
  89                int num = state->frontend.dvb ? state->frontend.dvb->num : -1;
  90                printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  91                        num, __func__, reg, data, ret);
  92        }
  93        return (ret != 1) ? -EREMOTEIO : 0;
  94}
  95
  96
  97static int tda10023_writebit (struct tda10023_state* state, u8 reg, u8 mask,u8 data)
  98{
  99        if (mask==0xff)
 100                return tda10023_writereg(state, reg, data);
 101        else {
 102                u8 val;
 103                val=tda10023_readreg(state,reg);
 104                val&=~mask;
 105                val|=(data&mask);
 106                return tda10023_writereg(state, reg, val);
 107        }
 108}
 109
 110static void tda10023_writetab(struct tda10023_state* state, u8* tab)
 111{
 112        u8 r,m,v;
 113        while (1) {
 114                r=*tab++;
 115                m=*tab++;
 116                v=*tab++;
 117                if (r==0xff) {
 118                        if (m==0xff)
 119                                break;
 120                        else
 121                                msleep(m);
 122                }
 123                else
 124                        tda10023_writebit(state,r,m,v);
 125        }
 126}
 127
 128//get access to tuner
 129static int lock_tuner(struct tda10023_state* state)
 130{
 131        u8 buf[2] = { 0x0f, 0xc0 };
 132        struct i2c_msg msg = {.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 133
 134        if(i2c_transfer(state->i2c, &msg, 1) != 1)
 135        {
 136                printk("tda10023: lock tuner fails\n");
 137                return -EREMOTEIO;
 138        }
 139        return 0;
 140}
 141
 142//release access from tuner
 143static int unlock_tuner(struct tda10023_state* state)
 144{
 145        u8 buf[2] = { 0x0f, 0x40 };
 146        struct i2c_msg msg_post={.addr=state->config->demod_address, .flags=0, .buf=buf, .len=2};
 147
 148        if(i2c_transfer(state->i2c, &msg_post, 1) != 1)
 149        {
 150                printk("tda10023: unlock tuner fails\n");
 151                return -EREMOTEIO;
 152        }
 153        return 0;
 154}
 155
 156static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0)
 157{
 158        reg0 |= state->reg0 & 0x63;
 159
 160        tda10023_writereg (state, 0x00, reg0 & 0xfe);
 161        tda10023_writereg (state, 0x00, reg0 | 0x01);
 162
 163        state->reg0 = reg0;
 164        return 0;
 165}
 166
 167static int tda10023_set_symbolrate (struct tda10023_state* state, u32 sr)
 168{
 169        s32 BDR;
 170        s32 BDRI;
 171        s16 SFIL=0;
 172        u16 NDEC = 0;
 173
 174        /* avoid floating point operations multiplying syscloc and divider
 175           by 10 */
 176        u32 sysclk_x_10 = state->sysclk * 10;
 177
 178        if (sr < (u32)(sysclk_x_10/984)) {
 179                NDEC=3;
 180                SFIL=1;
 181        } else if (sr < (u32)(sysclk_x_10/640)) {
 182                NDEC=3;
 183                SFIL=0;
 184        } else if (sr < (u32)(sysclk_x_10/492)) {
 185                NDEC=2;
 186                SFIL=1;
 187        } else if (sr < (u32)(sysclk_x_10/320)) {
 188                NDEC=2;
 189                SFIL=0;
 190        } else if (sr < (u32)(sysclk_x_10/246)) {
 191                NDEC=1;
 192                SFIL=1;
 193        } else if (sr < (u32)(sysclk_x_10/160)) {
 194                NDEC=1;
 195                SFIL=0;
 196        } else if (sr < (u32)(sysclk_x_10/123)) {
 197                NDEC=0;
 198                SFIL=1;
 199        }
 200
 201        BDRI = (state->sysclk)*16;
 202        BDRI>>=NDEC;
 203        BDRI +=sr/2;
 204        BDRI /=sr;
 205
 206        if (BDRI>255)
 207                BDRI=255;
 208
 209        {
 210                u64 BDRX;
 211
 212                BDRX=1<<(24+NDEC);
 213                BDRX*=sr;
 214                do_div(BDRX, state->sysclk);    /* BDRX/=SYSCLK; */
 215
 216                BDR=(s32)BDRX;
 217        }
 218        dprintk("Symbolrate %i, BDR %i BDRI %i, NDEC %i\n",
 219                sr, BDR, BDRI, NDEC);
 220        tda10023_writebit (state, 0x03, 0xc0, NDEC<<6);
 221        tda10023_writereg (state, 0x0a, BDR&255);
 222        tda10023_writereg (state, 0x0b, (BDR>>8)&255);
 223        tda10023_writereg (state, 0x0c, (BDR>>16)&31);
 224        tda10023_writereg (state, 0x0d, BDRI);
 225        tda10023_writereg (state, 0x3d, (SFIL<<7));
 226        return 0;
 227}
 228
 229static int tda10023_init (struct dvb_frontend *fe)
 230{
 231        struct tda10023_state* state = fe->demodulator_priv;
 232        u8 tda10023_inittab[] = {
 233/*        reg  mask val */
 234/* 000 */ 0x2a, 0xff, 0x02,  /* PLL3, Bypass, Power Down */
 235/* 003 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 236/* 006 */ 0x2a, 0xff, 0x03,  /* PLL3, Bypass, Power Down */
 237/* 009 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 238                           /* PLL1 */
 239/* 012 */ 0x28, 0xff, (state->pll_m-1),
 240                           /* PLL2 */
 241/* 015 */ 0x29, 0xff, ((state->pll_p-1)<<6)|(state->pll_n-1),
 242                           /* GPR FSAMPLING=1 */
 243/* 018 */ 0x00, 0xff, REG0_INIT_VAL,
 244/* 021 */ 0x2a, 0xff, 0x08,  /* PLL3 PSACLK=1 */
 245/* 024 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 246/* 027 */ 0x1f, 0xff, 0x00,  /* RESET */
 247/* 030 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 248/* 033 */ 0xe6, 0x0c, 0x04,  /* RSCFG_IND */
 249/* 036 */ 0x10, 0xc0, 0x80,  /* DECDVBCFG1 PBER=1 */
 250
 251/* 039 */ 0x0e, 0xff, 0x82,  /* GAIN1 */
 252/* 042 */ 0x03, 0x08, 0x08,  /* CLKCONF DYN=1 */
 253/* 045 */ 0x2e, 0xbf, 0x30,  /* AGCCONF2 TRIAGC=0,POSAGC=ENAGCIF=1
 254                                       PPWMTUN=0 PPWMIF=0 */
 255/* 048 */ 0x01, 0xff, 0x30,  /* AGCREF */
 256/* 051 */ 0x1e, 0x84, 0x84,  /* CONTROL SACLK_ON=1 */
 257/* 054 */ 0x1b, 0xff, 0xc8,  /* ADC TWOS=1 */
 258/* 057 */ 0x3b, 0xff, 0xff,  /* IFMAX */
 259/* 060 */ 0x3c, 0xff, 0x00,  /* IFMIN */
 260/* 063 */ 0x34, 0xff, 0x00,  /* PWMREF */
 261/* 066 */ 0x35, 0xff, 0xff,  /* TUNMAX */
 262/* 069 */ 0x36, 0xff, 0x00,  /* TUNMIN */
 263/* 072 */ 0x06, 0xff, 0x7f,  /* EQCONF1 POSI=7 ENADAPT=ENEQUAL=DFE=1 */
 264/* 075 */ 0x1c, 0x30, 0x30,  /* EQCONF2 STEPALGO=SGNALGO=1 */
 265/* 078 */ 0x37, 0xff, 0xf6,  /* DELTAF_LSB */
 266/* 081 */ 0x38, 0xff, 0xff,  /* DELTAF_MSB */
 267/* 084 */ 0x02, 0xff, 0x93,  /* AGCCONF1  IFS=1 KAGCIF=2 KAGCTUN=3 */
 268/* 087 */ 0x2d, 0xff, 0xf6,  /* SWEEP SWPOS=1 SWDYN=7 SWSTEP=1 SWLEN=2 */
 269/* 090 */ 0x04, 0x10, 0x00,  /* SWRAMP=1 */
 270/* 093 */ 0x12, 0xff, TDA10023_OUTPUT_MODE_PARALLEL_B, /*
 271                                INTP1 POCLKP=1 FEL=1 MFS=0 */
 272/* 096 */ 0x2b, 0x01, 0xa1,  /* INTS1 */
 273/* 099 */ 0x20, 0xff, 0x04,  /* INTP2 SWAPP=? MSBFIRSTP=? INTPSEL=? */
 274/* 102 */ 0x2c, 0xff, 0x0d,  /* INTP/S TRIP=0 TRIS=0 */
 275/* 105 */ 0xc4, 0xff, 0x00,
 276/* 108 */ 0xc3, 0x30, 0x00,
 277/* 111 */ 0xb5, 0xff, 0x19,  /* ERAGC_THD */
 278/* 114 */ 0x00, 0x03, 0x01,  /* GPR, CLBS soft reset */
 279/* 117 */ 0x00, 0x03, 0x03,  /* GPR, CLBS soft reset */
 280/* 120 */ 0xff, 0x64, 0x00,  /* Sleep 100ms */
 281/* 123 */ 0xff, 0xff, 0xff
 282};
 283        dprintk("DVB: TDA10023(%d): init chip\n", fe->dvb->num);
 284
 285        /* override default values if set in config */
 286        if (state->config->deltaf) {
 287                tda10023_inittab[80] = (state->config->deltaf & 0xff);
 288                tda10023_inittab[83] = (state->config->deltaf >> 8);
 289        }
 290
 291        if (state->config->output_mode)
 292                tda10023_inittab[95] = state->config->output_mode;
 293
 294        tda10023_writetab(state, tda10023_inittab);
 295
 296        return 0;
 297}
 298
 299struct qam_params {
 300        u8 qam, lockthr, mseth, aref, agcrefnyq, eragnyq_thd;
 301};
 302
 303static int tda10023_set_parameters(struct dvb_frontend *fe)
 304{
 305        struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 306        u32 delsys  = c->delivery_system;
 307        unsigned qam = c->modulation;
 308        bool is_annex_c;
 309        struct tda10023_state* state = fe->demodulator_priv;
 310        static const struct qam_params qam_params[] = {
 311                /* Modulation  QAM    LOCKTHR   MSETH   AREF AGCREFNYQ ERAGCNYQ_THD */
 312                [QPSK]    = { (5<<2),  0x78,    0x8c,   0x96,   0x78,   0x4c  },
 313                [QAM_16]  = { (0<<2),  0x87,    0xa2,   0x91,   0x8c,   0x57  },
 314                [QAM_32]  = { (1<<2),  0x64,    0x74,   0x96,   0x8c,   0x57  },
 315                [QAM_64]  = { (2<<2),  0x46,    0x43,   0x6a,   0x6a,   0x44  },
 316                [QAM_128] = { (3<<2),  0x36,    0x34,   0x7e,   0x78,   0x4c  },
 317                [QAM_256] = { (4<<2),  0x26,    0x23,   0x6c,   0x5c,   0x3c  },
 318        };
 319
 320        switch (delsys) {
 321        case SYS_DVBC_ANNEX_A:
 322                is_annex_c = false;
 323                break;
 324        case SYS_DVBC_ANNEX_C:
 325                is_annex_c = true;
 326                break;
 327        default:
 328                return -EINVAL;
 329        }
 330
 331        /*
 332         * gcc optimizes the code below the same way as it would code:
 333         *               "if (qam > 5) return -EINVAL;"
 334         * Yet, the code is clearer, as it shows what QAM standards are
 335         * supported by the driver, and avoids the usage of magic numbers on
 336         * it.
 337         */
 338        switch (qam) {
 339        case QPSK:
 340        case QAM_16:
 341        case QAM_32:
 342        case QAM_64:
 343        case QAM_128:
 344        case QAM_256:
 345                break;
 346        default:
 347                return -EINVAL;
 348        }
 349
 350        if (fe->ops.tuner_ops.set_params) {
 351                fe->ops.tuner_ops.set_params(fe);
 352                if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
 353        }
 354
 355        tda10023_set_symbolrate(state, c->symbol_rate);
 356        tda10023_writereg(state, 0x05, qam_params[qam].lockthr);
 357        tda10023_writereg(state, 0x08, qam_params[qam].mseth);
 358        tda10023_writereg(state, 0x09, qam_params[qam].aref);
 359        tda10023_writereg(state, 0xb4, qam_params[qam].agcrefnyq);
 360        tda10023_writereg(state, 0xb6, qam_params[qam].eragnyq_thd);
 361#if 0
 362        tda10023_writereg(state, 0x04, (c->inversion ? 0x12 : 0x32));
 363        tda10023_writebit(state, 0x04, 0x60, (c->inversion ? 0 : 0x20));
 364#endif
 365        tda10023_writebit(state, 0x04, 0x40, 0x40);
 366
 367        if (is_annex_c)
 368                tda10023_writebit(state, 0x3d, 0xfc, 0x03);
 369        else
 370                tda10023_writebit(state, 0x3d, 0xfc, 0x02);
 371
 372        tda10023_setup_reg0(state, qam_params[qam].qam);
 373
 374        return 0;
 375}
 376
 377static int tda10023_read_status(struct dvb_frontend *fe,
 378                                enum fe_status *status)
 379{
 380        struct tda10023_state* state = fe->demodulator_priv;
 381        int sync;
 382
 383        *status = 0;
 384
 385        //0x11[1] == CARLOCK -> Carrier locked
 386        //0x11[2] == FSYNC -> Frame synchronisation
 387        //0x11[3] == FEL -> Front End locked
 388        //0x11[6] == NODVB -> DVB Mode Information
 389        sync = tda10023_readreg (state, 0x11);
 390
 391        if (sync & 2)
 392                *status |= FE_HAS_SIGNAL|FE_HAS_CARRIER;
 393
 394        if (sync & 4)
 395                *status |= FE_HAS_SYNC|FE_HAS_VITERBI;
 396
 397        if (sync & 8)
 398                *status |= FE_HAS_LOCK;
 399
 400        return 0;
 401}
 402
 403static int tda10023_read_ber(struct dvb_frontend* fe, u32* ber)
 404{
 405        struct tda10023_state* state = fe->demodulator_priv;
 406        u8 a,b,c;
 407        a=tda10023_readreg(state, 0x14);
 408        b=tda10023_readreg(state, 0x15);
 409        c=tda10023_readreg(state, 0x16)&0xf;
 410        tda10023_writebit (state, 0x10, 0xc0, 0x00);
 411
 412        *ber = a | (b<<8)| (c<<16);
 413        return 0;
 414}
 415
 416static int tda10023_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 417{
 418        struct tda10023_state* state = fe->demodulator_priv;
 419        u8 ifgain=tda10023_readreg(state, 0x2f);
 420
 421        u16 gain = ((255-tda10023_readreg(state, 0x17))) + (255-ifgain)/16;
 422        // Max raw value is about 0xb0 -> Normalize to >0xf0 after 0x90
 423        if (gain>0x90)
 424                gain=gain+2*(gain-0x90);
 425        if (gain>255)
 426                gain=255;
 427
 428        *strength = (gain<<8)|gain;
 429        return 0;
 430}
 431
 432static int tda10023_read_snr(struct dvb_frontend* fe, u16* snr)
 433{
 434        struct tda10023_state* state = fe->demodulator_priv;
 435
 436        u8 quality = ~tda10023_readreg(state, 0x18);
 437        *snr = (quality << 8) | quality;
 438        return 0;
 439}
 440
 441static int tda10023_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 442{
 443        struct tda10023_state* state = fe->demodulator_priv;
 444        u8 a,b,c,d;
 445        a= tda10023_readreg (state, 0x74);
 446        b= tda10023_readreg (state, 0x75);
 447        c= tda10023_readreg (state, 0x76);
 448        d= tda10023_readreg (state, 0x77);
 449        *ucblocks = a | (b<<8)|(c<<16)|(d<<24);
 450
 451        tda10023_writebit (state, 0x10, 0x20,0x00);
 452        tda10023_writebit (state, 0x10, 0x20,0x20);
 453        tda10023_writebit (state, 0x13, 0x01, 0x00);
 454
 455        return 0;
 456}
 457
 458static int tda10023_get_frontend(struct dvb_frontend *fe,
 459                                 struct dtv_frontend_properties *p)
 460{
 461        struct tda10023_state* state = fe->demodulator_priv;
 462        int sync,inv;
 463        s8 afc = 0;
 464
 465        sync = tda10023_readreg(state, 0x11);
 466        afc = tda10023_readreg(state, 0x19);
 467        inv = tda10023_readreg(state, 0x04);
 468
 469        if (verbose) {
 470                /* AFC only valid when carrier has been recovered */
 471                printk(sync & 2 ? "DVB: TDA10023(%d): AFC (%d) %dHz\n" :
 472                                  "DVB: TDA10023(%d): [AFC (%d) %dHz]\n",
 473                        state->frontend.dvb->num, afc,
 474                       -((s32)p->symbol_rate * afc) >> 10);
 475        }
 476
 477        p->inversion = (inv&0x20?0:1);
 478        p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
 479
 480        p->fec_inner = FEC_NONE;
 481        p->frequency = ((p->frequency + 31250) / 62500) * 62500;
 482
 483        if (sync & 2)
 484                p->frequency -= ((s32)p->symbol_rate * afc) >> 10;
 485
 486        return 0;
 487}
 488
 489static int tda10023_sleep(struct dvb_frontend* fe)
 490{
 491        struct tda10023_state* state = fe->demodulator_priv;
 492
 493        tda10023_writereg (state, 0x1b, 0x02);  /* pdown ADC */
 494        tda10023_writereg (state, 0x00, 0x80);  /* standby */
 495
 496        return 0;
 497}
 498
 499static int tda10023_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
 500{
 501        struct tda10023_state* state = fe->demodulator_priv;
 502
 503        if (enable) {
 504                lock_tuner(state);
 505        } else {
 506                unlock_tuner(state);
 507        }
 508        return 0;
 509}
 510
 511static void tda10023_release(struct dvb_frontend* fe)
 512{
 513        struct tda10023_state* state = fe->demodulator_priv;
 514        kfree(state);
 515}
 516
 517static const struct dvb_frontend_ops tda10023_ops;
 518
 519struct dvb_frontend *tda10023_attach(const struct tda10023_config *config,
 520                                     struct i2c_adapter *i2c,
 521                                     u8 pwm)
 522{
 523        struct tda10023_state* state = NULL;
 524
 525        /* allocate memory for the internal state */
 526        state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL);
 527        if (state == NULL) goto error;
 528
 529        /* setup the state */
 530        state->config = config;
 531        state->i2c = i2c;
 532
 533        /* wakeup if in standby */
 534        tda10023_writereg (state, 0x00, 0x33);
 535        /* check if the demod is there */
 536        if ((tda10023_readreg(state, 0x1a) & 0xf0) != 0x70) goto error;
 537
 538        /* create dvb_frontend */
 539        memcpy(&state->frontend.ops, &tda10023_ops, sizeof(struct dvb_frontend_ops));
 540        state->pwm = pwm;
 541        state->reg0 = REG0_INIT_VAL;
 542        if (state->config->xtal) {
 543                state->xtal  = state->config->xtal;
 544                state->pll_m = state->config->pll_m;
 545                state->pll_p = state->config->pll_p;
 546                state->pll_n = state->config->pll_n;
 547        } else {
 548                /* set default values if not defined in config */
 549                state->xtal  = 28920000;
 550                state->pll_m = 8;
 551                state->pll_p = 4;
 552                state->pll_n = 1;
 553        }
 554
 555        /* calc sysclk */
 556        state->sysclk = (state->xtal * state->pll_m / \
 557                        (state->pll_n * state->pll_p));
 558
 559        state->frontend.ops.info.symbol_rate_min = (state->sysclk/2)/64;
 560        state->frontend.ops.info.symbol_rate_max = (state->sysclk/2)/4;
 561
 562        dprintk("DVB: TDA10023 %s: xtal:%d pll_m:%d pll_p:%d pll_n:%d\n",
 563                __func__, state->xtal, state->pll_m, state->pll_p,
 564                state->pll_n);
 565
 566        state->frontend.demodulator_priv = state;
 567        return &state->frontend;
 568
 569error:
 570        kfree(state);
 571        return NULL;
 572}
 573
 574static const struct dvb_frontend_ops tda10023_ops = {
 575        .delsys = { SYS_DVBC_ANNEX_A, SYS_DVBC_ANNEX_C },
 576        .info = {
 577                .name = "Philips TDA10023 DVB-C",
 578                .frequency_stepsize = 62500,
 579                .frequency_min =  47000000,
 580                .frequency_max = 862000000,
 581                .symbol_rate_min = 0,  /* set in tda10023_attach */
 582                .symbol_rate_max = 0,  /* set in tda10023_attach */
 583                .caps = 0x400 | //FE_CAN_QAM_4
 584                        FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
 585                        FE_CAN_QAM_128 | FE_CAN_QAM_256 |
 586                        FE_CAN_FEC_AUTO
 587        },
 588
 589        .release = tda10023_release,
 590
 591        .init = tda10023_init,
 592        .sleep = tda10023_sleep,
 593        .i2c_gate_ctrl = tda10023_i2c_gate_ctrl,
 594
 595        .set_frontend = tda10023_set_parameters,
 596        .get_frontend = tda10023_get_frontend,
 597        .read_status = tda10023_read_status,
 598        .read_ber = tda10023_read_ber,
 599        .read_signal_strength = tda10023_read_signal_strength,
 600        .read_snr = tda10023_read_snr,
 601        .read_ucblocks = tda10023_read_ucblocks,
 602};
 603
 604
 605MODULE_DESCRIPTION("Philips TDA10023 DVB-C demodulator driver");
 606MODULE_AUTHOR("Georg Acher, Hartmut Birr");
 607MODULE_LICENSE("GPL");
 608
 609EXPORT_SYMBOL(tda10023_attach);
 610