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16#include <linux/delay.h>
17#include <linux/errno.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/init.h>
21#include <linux/module.h>
22#include <linux/slab.h>
23#include <linux/types.h>
24#include <linux/videodev2.h>
25
26#include <media/i2c/adv7183.h>
27#include <media/v4l2-ctrls.h>
28#include <media/v4l2-device.h>
29
30#include "adv7183_regs.h"
31
32struct adv7183 {
33 struct v4l2_subdev sd;
34 struct v4l2_ctrl_handler hdl;
35
36 v4l2_std_id std;
37 u32 input;
38 u32 output;
39 unsigned reset_pin;
40 unsigned oe_pin;
41 struct v4l2_mbus_framefmt fmt;
42};
43
44
45
46
47
48static const unsigned char adv7183_init_regs[] = {
49 ADV7183_IN_CTRL, 0x04,
50 ADV7183_DIGI_CLAMP_CTRL_1, 0x00,
51 ADV7183_SHAP_FILT_CTRL, 0x41,
52 ADV7183_ADC_CTRL, 0x16,
53 ADV7183_CTI_DNR_CTRL_4, 0x04,
54
55 ADV7183_ADI_CTRL, 0x80,
56 ADV7183_CTI_DNR_CTRL_4, 0x20,
57 0x52, 0x18,
58 0x58, 0xED,
59 0x77, 0xC5,
60 0x7C, 0x93,
61 0x7D, 0x00,
62 0xD0, 0x48,
63 0xD5, 0xA0,
64 0xD7, 0xEA,
65 ADV7183_SD_SATURATION_CR, 0x3E,
66 ADV7183_PAL_V_END, 0x3E,
67 ADV7183_PAL_F_TOGGLE, 0x0F,
68 ADV7183_ADI_CTRL, 0x00,
69};
70
71static inline struct adv7183 *to_adv7183(struct v4l2_subdev *sd)
72{
73 return container_of(sd, struct adv7183, sd);
74}
75static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
76{
77 return &container_of(ctrl->handler, struct adv7183, hdl)->sd;
78}
79
80static inline int adv7183_read(struct v4l2_subdev *sd, unsigned char reg)
81{
82 struct i2c_client *client = v4l2_get_subdevdata(sd);
83
84 return i2c_smbus_read_byte_data(client, reg);
85}
86
87static inline int adv7183_write(struct v4l2_subdev *sd, unsigned char reg,
88 unsigned char value)
89{
90 struct i2c_client *client = v4l2_get_subdevdata(sd);
91
92 return i2c_smbus_write_byte_data(client, reg, value);
93}
94
95static int adv7183_writeregs(struct v4l2_subdev *sd,
96 const unsigned char *regs, unsigned int num)
97{
98 unsigned char reg, data;
99 unsigned int cnt = 0;
100
101 if (num & 0x1) {
102 v4l2_err(sd, "invalid regs array\n");
103 return -1;
104 }
105
106 while (cnt < num) {
107 reg = *regs++;
108 data = *regs++;
109 cnt += 2;
110
111 adv7183_write(sd, reg, data);
112 }
113 return 0;
114}
115
116static int adv7183_log_status(struct v4l2_subdev *sd)
117{
118 struct adv7183 *decoder = to_adv7183(sd);
119
120 v4l2_info(sd, "adv7183: Input control = 0x%02x\n",
121 adv7183_read(sd, ADV7183_IN_CTRL));
122 v4l2_info(sd, "adv7183: Video selection = 0x%02x\n",
123 adv7183_read(sd, ADV7183_VD_SEL));
124 v4l2_info(sd, "adv7183: Output control = 0x%02x\n",
125 adv7183_read(sd, ADV7183_OUT_CTRL));
126 v4l2_info(sd, "adv7183: Extended output control = 0x%02x\n",
127 adv7183_read(sd, ADV7183_EXT_OUT_CTRL));
128 v4l2_info(sd, "adv7183: Autodetect enable = 0x%02x\n",
129 adv7183_read(sd, ADV7183_AUTO_DET_EN));
130 v4l2_info(sd, "adv7183: Contrast = 0x%02x\n",
131 adv7183_read(sd, ADV7183_CONTRAST));
132 v4l2_info(sd, "adv7183: Brightness = 0x%02x\n",
133 adv7183_read(sd, ADV7183_BRIGHTNESS));
134 v4l2_info(sd, "adv7183: Hue = 0x%02x\n",
135 adv7183_read(sd, ADV7183_HUE));
136 v4l2_info(sd, "adv7183: Default value Y = 0x%02x\n",
137 adv7183_read(sd, ADV7183_DEF_Y));
138 v4l2_info(sd, "adv7183: Default value C = 0x%02x\n",
139 adv7183_read(sd, ADV7183_DEF_C));
140 v4l2_info(sd, "adv7183: ADI control = 0x%02x\n",
141 adv7183_read(sd, ADV7183_ADI_CTRL));
142 v4l2_info(sd, "adv7183: Power Management = 0x%02x\n",
143 adv7183_read(sd, ADV7183_POW_MANAGE));
144 v4l2_info(sd, "adv7183: Status 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
145 adv7183_read(sd, ADV7183_STATUS_1),
146 adv7183_read(sd, ADV7183_STATUS_2),
147 adv7183_read(sd, ADV7183_STATUS_3));
148 v4l2_info(sd, "adv7183: Ident = 0x%02x\n",
149 adv7183_read(sd, ADV7183_IDENT));
150 v4l2_info(sd, "adv7183: Analog clamp control = 0x%02x\n",
151 adv7183_read(sd, ADV7183_ANAL_CLAMP_CTRL));
152 v4l2_info(sd, "adv7183: Digital clamp control 1 = 0x%02x\n",
153 adv7183_read(sd, ADV7183_DIGI_CLAMP_CTRL_1));
154 v4l2_info(sd, "adv7183: Shaping filter control 1 and 2 = 0x%02x 0x%02x\n",
155 adv7183_read(sd, ADV7183_SHAP_FILT_CTRL),
156 adv7183_read(sd, ADV7183_SHAP_FILT_CTRL_2));
157 v4l2_info(sd, "adv7183: Comb filter control = 0x%02x\n",
158 adv7183_read(sd, ADV7183_COMB_FILT_CTRL));
159 v4l2_info(sd, "adv7183: ADI control 2 = 0x%02x\n",
160 adv7183_read(sd, ADV7183_ADI_CTRL_2));
161 v4l2_info(sd, "adv7183: Pixel delay control = 0x%02x\n",
162 adv7183_read(sd, ADV7183_PIX_DELAY_CTRL));
163 v4l2_info(sd, "adv7183: Misc gain control = 0x%02x\n",
164 adv7183_read(sd, ADV7183_MISC_GAIN_CTRL));
165 v4l2_info(sd, "adv7183: AGC mode control = 0x%02x\n",
166 adv7183_read(sd, ADV7183_AGC_MODE_CTRL));
167 v4l2_info(sd, "adv7183: Chroma gain control 1 and 2 = 0x%02x 0x%02x\n",
168 adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_1),
169 adv7183_read(sd, ADV7183_CHRO_GAIN_CTRL_2));
170 v4l2_info(sd, "adv7183: Luma gain control 1 and 2 = 0x%02x 0x%02x\n",
171 adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_1),
172 adv7183_read(sd, ADV7183_LUMA_GAIN_CTRL_2));
173 v4l2_info(sd, "adv7183: Vsync field control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
174 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_1),
175 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_2),
176 adv7183_read(sd, ADV7183_VS_FIELD_CTRL_3));
177 v4l2_info(sd, "adv7183: Hsync position control 1 2 and 3 = 0x%02x 0x%02x 0x%02x\n",
178 adv7183_read(sd, ADV7183_HS_POS_CTRL_1),
179 adv7183_read(sd, ADV7183_HS_POS_CTRL_2),
180 adv7183_read(sd, ADV7183_HS_POS_CTRL_3));
181 v4l2_info(sd, "adv7183: Polarity = 0x%02x\n",
182 adv7183_read(sd, ADV7183_POLARITY));
183 v4l2_info(sd, "adv7183: ADC control = 0x%02x\n",
184 adv7183_read(sd, ADV7183_ADC_CTRL));
185 v4l2_info(sd, "adv7183: SD offset Cb and Cr = 0x%02x 0x%02x\n",
186 adv7183_read(sd, ADV7183_SD_OFFSET_CB),
187 adv7183_read(sd, ADV7183_SD_OFFSET_CR));
188 v4l2_info(sd, "adv7183: SD saturation Cb and Cr = 0x%02x 0x%02x\n",
189 adv7183_read(sd, ADV7183_SD_SATURATION_CB),
190 adv7183_read(sd, ADV7183_SD_SATURATION_CR));
191 v4l2_info(sd, "adv7183: Drive strength = 0x%02x\n",
192 adv7183_read(sd, ADV7183_DRIVE_STR));
193 v4l2_ctrl_handler_log_status(&decoder->hdl, sd->name);
194 return 0;
195}
196
197static int adv7183_g_std(struct v4l2_subdev *sd, v4l2_std_id *std)
198{
199 struct adv7183 *decoder = to_adv7183(sd);
200
201 *std = decoder->std;
202 return 0;
203}
204
205static int adv7183_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
206{
207 struct adv7183 *decoder = to_adv7183(sd);
208 int reg;
209
210 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
211 if (std == V4L2_STD_PAL_60)
212 reg |= 0x60;
213 else if (std == V4L2_STD_NTSC_443)
214 reg |= 0x70;
215 else if (std == V4L2_STD_PAL_N)
216 reg |= 0x90;
217 else if (std == V4L2_STD_PAL_M)
218 reg |= 0xA0;
219 else if (std == V4L2_STD_PAL_Nc)
220 reg |= 0xC0;
221 else if (std & V4L2_STD_PAL)
222 reg |= 0x80;
223 else if (std & V4L2_STD_NTSC)
224 reg |= 0x50;
225 else if (std & V4L2_STD_SECAM)
226 reg |= 0xE0;
227 else
228 return -EINVAL;
229 adv7183_write(sd, ADV7183_IN_CTRL, reg);
230
231 decoder->std = std;
232
233 return 0;
234}
235
236static int adv7183_reset(struct v4l2_subdev *sd, u32 val)
237{
238 int reg;
239
240 reg = adv7183_read(sd, ADV7183_POW_MANAGE) | 0x80;
241 adv7183_write(sd, ADV7183_POW_MANAGE, reg);
242
243 usleep_range(5000, 10000);
244 return 0;
245}
246
247static int adv7183_s_routing(struct v4l2_subdev *sd,
248 u32 input, u32 output, u32 config)
249{
250 struct adv7183 *decoder = to_adv7183(sd);
251 int reg;
252
253 if ((input > ADV7183_COMPONENT1) || (output > ADV7183_16BIT_OUT))
254 return -EINVAL;
255
256 if (input != decoder->input) {
257 decoder->input = input;
258 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF0;
259 switch (input) {
260 case ADV7183_COMPOSITE1:
261 reg |= 0x1;
262 break;
263 case ADV7183_COMPOSITE2:
264 reg |= 0x2;
265 break;
266 case ADV7183_COMPOSITE3:
267 reg |= 0x3;
268 break;
269 case ADV7183_COMPOSITE4:
270 reg |= 0x4;
271 break;
272 case ADV7183_COMPOSITE5:
273 reg |= 0x5;
274 break;
275 case ADV7183_COMPOSITE6:
276 reg |= 0xB;
277 break;
278 case ADV7183_COMPOSITE7:
279 reg |= 0xC;
280 break;
281 case ADV7183_COMPOSITE8:
282 reg |= 0xD;
283 break;
284 case ADV7183_COMPOSITE9:
285 reg |= 0xE;
286 break;
287 case ADV7183_COMPOSITE10:
288 reg |= 0xF;
289 break;
290 case ADV7183_SVIDEO0:
291 reg |= 0x6;
292 break;
293 case ADV7183_SVIDEO1:
294 reg |= 0x7;
295 break;
296 case ADV7183_SVIDEO2:
297 reg |= 0x8;
298 break;
299 case ADV7183_COMPONENT0:
300 reg |= 0x9;
301 break;
302 case ADV7183_COMPONENT1:
303 reg |= 0xA;
304 break;
305 default:
306 break;
307 }
308 adv7183_write(sd, ADV7183_IN_CTRL, reg);
309 }
310
311 if (output != decoder->output) {
312 decoder->output = output;
313 reg = adv7183_read(sd, ADV7183_OUT_CTRL) & 0xC0;
314 switch (output) {
315 case ADV7183_16BIT_OUT:
316 reg |= 0x9;
317 break;
318 default:
319 reg |= 0xC;
320 break;
321 }
322 adv7183_write(sd, ADV7183_OUT_CTRL, reg);
323 }
324
325 return 0;
326}
327
328static int adv7183_s_ctrl(struct v4l2_ctrl *ctrl)
329{
330 struct v4l2_subdev *sd = to_sd(ctrl);
331 int val = ctrl->val;
332
333 switch (ctrl->id) {
334 case V4L2_CID_BRIGHTNESS:
335 if (val < 0)
336 val = 127 - val;
337 adv7183_write(sd, ADV7183_BRIGHTNESS, val);
338 break;
339 case V4L2_CID_CONTRAST:
340 adv7183_write(sd, ADV7183_CONTRAST, val);
341 break;
342 case V4L2_CID_SATURATION:
343 adv7183_write(sd, ADV7183_SD_SATURATION_CB, val >> 8);
344 adv7183_write(sd, ADV7183_SD_SATURATION_CR, (val & 0xFF));
345 break;
346 case V4L2_CID_HUE:
347 adv7183_write(sd, ADV7183_SD_OFFSET_CB, val >> 8);
348 adv7183_write(sd, ADV7183_SD_OFFSET_CR, (val & 0xFF));
349 break;
350 default:
351 return -EINVAL;
352 }
353
354 return 0;
355}
356
357static int adv7183_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
358{
359 struct adv7183 *decoder = to_adv7183(sd);
360 int reg;
361
362
363 reg = adv7183_read(sd, ADV7183_IN_CTRL) & 0xF;
364 adv7183_write(sd, ADV7183_IN_CTRL, reg);
365
366
367 mdelay(10);
368
369
370 reg = adv7183_read(sd, ADV7183_STATUS_1);
371 switch ((reg >> 0x4) & 0x7) {
372 case 0:
373 *std &= V4L2_STD_NTSC;
374 break;
375 case 1:
376 *std &= V4L2_STD_NTSC_443;
377 break;
378 case 2:
379 *std &= V4L2_STD_PAL_M;
380 break;
381 case 3:
382 *std &= V4L2_STD_PAL_60;
383 break;
384 case 4:
385 *std &= V4L2_STD_PAL;
386 break;
387 case 5:
388 *std &= V4L2_STD_SECAM;
389 break;
390 case 6:
391 *std &= V4L2_STD_PAL_Nc;
392 break;
393 case 7:
394 *std &= V4L2_STD_SECAM;
395 break;
396 default:
397 *std = V4L2_STD_UNKNOWN;
398 break;
399 }
400
401
402 adv7183_s_std(sd, decoder->std);
403 return 0;
404}
405
406static int adv7183_g_input_status(struct v4l2_subdev *sd, u32 *status)
407{
408 int reg;
409
410 *status = V4L2_IN_ST_NO_SIGNAL;
411 reg = adv7183_read(sd, ADV7183_STATUS_1);
412 if (reg < 0)
413 return reg;
414 if (reg & 0x1)
415 *status = 0;
416 return 0;
417}
418
419static int adv7183_enum_mbus_code(struct v4l2_subdev *sd,
420 struct v4l2_subdev_pad_config *cfg,
421 struct v4l2_subdev_mbus_code_enum *code)
422{
423 if (code->pad || code->index > 0)
424 return -EINVAL;
425
426 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
427 return 0;
428}
429
430static int adv7183_set_fmt(struct v4l2_subdev *sd,
431 struct v4l2_subdev_pad_config *cfg,
432 struct v4l2_subdev_format *format)
433{
434 struct adv7183 *decoder = to_adv7183(sd);
435 struct v4l2_mbus_framefmt *fmt = &format->format;
436
437 if (format->pad)
438 return -EINVAL;
439
440 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
441 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
442 if (decoder->std & V4L2_STD_525_60) {
443 fmt->field = V4L2_FIELD_SEQ_TB;
444 fmt->width = 720;
445 fmt->height = 480;
446 } else {
447 fmt->field = V4L2_FIELD_SEQ_BT;
448 fmt->width = 720;
449 fmt->height = 576;
450 }
451 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE)
452 decoder->fmt = *fmt;
453 else
454 cfg->try_fmt = *fmt;
455 return 0;
456}
457
458static int adv7183_get_fmt(struct v4l2_subdev *sd,
459 struct v4l2_subdev_pad_config *cfg,
460 struct v4l2_subdev_format *format)
461{
462 struct adv7183 *decoder = to_adv7183(sd);
463
464 if (format->pad)
465 return -EINVAL;
466
467 format->format = decoder->fmt;
468 return 0;
469}
470
471static int adv7183_s_stream(struct v4l2_subdev *sd, int enable)
472{
473 struct adv7183 *decoder = to_adv7183(sd);
474
475 if (enable)
476 gpio_set_value(decoder->oe_pin, 0);
477 else
478 gpio_set_value(decoder->oe_pin, 1);
479 udelay(1);
480 return 0;
481}
482
483#ifdef CONFIG_VIDEO_ADV_DEBUG
484static int adv7183_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
485{
486 reg->val = adv7183_read(sd, reg->reg & 0xff);
487 reg->size = 1;
488 return 0;
489}
490
491static int adv7183_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
492{
493 adv7183_write(sd, reg->reg & 0xff, reg->val & 0xff);
494 return 0;
495}
496#endif
497
498static const struct v4l2_ctrl_ops adv7183_ctrl_ops = {
499 .s_ctrl = adv7183_s_ctrl,
500};
501
502static const struct v4l2_subdev_core_ops adv7183_core_ops = {
503 .log_status = adv7183_log_status,
504 .reset = adv7183_reset,
505#ifdef CONFIG_VIDEO_ADV_DEBUG
506 .g_register = adv7183_g_register,
507 .s_register = adv7183_s_register,
508#endif
509};
510
511static const struct v4l2_subdev_video_ops adv7183_video_ops = {
512 .g_std = adv7183_g_std,
513 .s_std = adv7183_s_std,
514 .s_routing = adv7183_s_routing,
515 .querystd = adv7183_querystd,
516 .g_input_status = adv7183_g_input_status,
517 .s_stream = adv7183_s_stream,
518};
519
520static const struct v4l2_subdev_pad_ops adv7183_pad_ops = {
521 .enum_mbus_code = adv7183_enum_mbus_code,
522 .get_fmt = adv7183_get_fmt,
523 .set_fmt = adv7183_set_fmt,
524};
525
526static const struct v4l2_subdev_ops adv7183_ops = {
527 .core = &adv7183_core_ops,
528 .video = &adv7183_video_ops,
529 .pad = &adv7183_pad_ops,
530};
531
532static int adv7183_probe(struct i2c_client *client,
533 const struct i2c_device_id *id)
534{
535 struct adv7183 *decoder;
536 struct v4l2_subdev *sd;
537 struct v4l2_ctrl_handler *hdl;
538 int ret;
539 struct v4l2_subdev_format fmt = {
540 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
541 };
542 const unsigned *pin_array;
543
544
545 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
546 return -EIO;
547
548 v4l_info(client, "chip found @ 0x%02x (%s)\n",
549 client->addr << 1, client->adapter->name);
550
551 pin_array = client->dev.platform_data;
552 if (pin_array == NULL)
553 return -EINVAL;
554
555 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
556 if (decoder == NULL)
557 return -ENOMEM;
558
559 decoder->reset_pin = pin_array[0];
560 decoder->oe_pin = pin_array[1];
561
562 if (devm_gpio_request_one(&client->dev, decoder->reset_pin,
563 GPIOF_OUT_INIT_LOW, "ADV7183 Reset")) {
564 v4l_err(client, "failed to request GPIO %d\n", decoder->reset_pin);
565 return -EBUSY;
566 }
567
568 if (devm_gpio_request_one(&client->dev, decoder->oe_pin,
569 GPIOF_OUT_INIT_HIGH,
570 "ADV7183 Output Enable")) {
571 v4l_err(client, "failed to request GPIO %d\n", decoder->oe_pin);
572 return -EBUSY;
573 }
574
575 sd = &decoder->sd;
576 v4l2_i2c_subdev_init(sd, client, &adv7183_ops);
577
578 hdl = &decoder->hdl;
579 v4l2_ctrl_handler_init(hdl, 4);
580 v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops,
581 V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
582 v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops,
583 V4L2_CID_CONTRAST, 0, 0xFF, 1, 0x80);
584 v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops,
585 V4L2_CID_SATURATION, 0, 0xFFFF, 1, 0x8080);
586 v4l2_ctrl_new_std(hdl, &adv7183_ctrl_ops,
587 V4L2_CID_HUE, 0, 0xFFFF, 1, 0x8080);
588
589 sd->ctrl_handler = hdl;
590 if (hdl->error) {
591 ret = hdl->error;
592
593 v4l2_ctrl_handler_free(hdl);
594 return ret;
595 }
596
597
598 decoder->std = V4L2_STD_PAL;
599 decoder->input = ADV7183_COMPOSITE4;
600 decoder->output = ADV7183_8BIT_OUT;
601
602
603
604 mdelay(10);
605 gpio_set_value(decoder->reset_pin, 1);
606
607 mdelay(5);
608
609 adv7183_writeregs(sd, adv7183_init_regs, ARRAY_SIZE(adv7183_init_regs));
610 adv7183_s_std(sd, decoder->std);
611 fmt.format.width = 720;
612 fmt.format.height = 576;
613 adv7183_set_fmt(sd, NULL, &fmt);
614
615
616 ret = v4l2_ctrl_handler_setup(hdl);
617 if (ret) {
618 v4l2_ctrl_handler_free(hdl);
619 return ret;
620 }
621
622 return 0;
623}
624
625static int adv7183_remove(struct i2c_client *client)
626{
627 struct v4l2_subdev *sd = i2c_get_clientdata(client);
628
629 v4l2_device_unregister_subdev(sd);
630 v4l2_ctrl_handler_free(sd->ctrl_handler);
631 return 0;
632}
633
634static const struct i2c_device_id adv7183_id[] = {
635 {"adv7183", 0},
636 {},
637};
638
639MODULE_DEVICE_TABLE(i2c, adv7183_id);
640
641static struct i2c_driver adv7183_driver = {
642 .driver = {
643 .name = "adv7183",
644 },
645 .probe = adv7183_probe,
646 .remove = adv7183_remove,
647 .id_table = adv7183_id,
648};
649
650module_i2c_driver(adv7183_driver);
651
652MODULE_DESCRIPTION("Analog Devices ADV7183 video decoder driver");
653MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
654MODULE_LICENSE("GPL v2");
655
