linux/drivers/mtd/onenand/samsung.h
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   1/*
   2 *  Copyright (C) 2008-2010 Samsung Electronics
   3 *  Kyungmin Park <kyungmin.park@samsung.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundation.
   8 */
   9#ifndef __SAMSUNG_ONENAND_H__
  10#define __SAMSUNG_ONENAND_H__
  11
  12/*
  13 * OneNAND Controller
  14 */
  15#define MEM_CFG_OFFSET          0x0000
  16#define BURST_LEN_OFFSET        0x0010
  17#define MEM_RESET_OFFSET        0x0020
  18#define INT_ERR_STAT_OFFSET     0x0030
  19#define INT_ERR_MASK_OFFSET     0x0040
  20#define INT_ERR_ACK_OFFSET      0x0050
  21#define ECC_ERR_STAT_OFFSET     0x0060
  22#define MANUFACT_ID_OFFSET      0x0070
  23#define DEVICE_ID_OFFSET        0x0080
  24#define DATA_BUF_SIZE_OFFSET    0x0090
  25#define BOOT_BUF_SIZE_OFFSET    0x00A0
  26#define BUF_AMOUNT_OFFSET       0x00B0
  27#define TECH_OFFSET             0x00C0
  28#define FBA_WIDTH_OFFSET        0x00D0
  29#define FPA_WIDTH_OFFSET        0x00E0
  30#define FSA_WIDTH_OFFSET        0x00F0
  31#define TRANS_SPARE_OFFSET      0x0140
  32#define DBS_DFS_WIDTH_OFFSET    0x0160
  33#define INT_PIN_ENABLE_OFFSET   0x01A0
  34#define ACC_CLOCK_OFFSET        0x01C0
  35#define FLASH_VER_ID_OFFSET     0x01F0
  36#define FLASH_AUX_CNTRL_OFFSET  0x0300          /* s3c64xx only */
  37
  38#define ONENAND_MEM_RESET_HOT   0x3
  39#define ONENAND_MEM_RESET_COLD  0x2
  40#define ONENAND_MEM_RESET_WARM  0x1
  41
  42#define CACHE_OP_ERR            (1 << 13)
  43#define RST_CMP                 (1 << 12)
  44#define RDY_ACT                 (1 << 11)
  45#define INT_ACT                 (1 << 10)
  46#define UNSUP_CMD               (1 << 9)
  47#define LOCKED_BLK              (1 << 8)
  48#define BLK_RW_CMP              (1 << 7)
  49#define ERS_CMP                 (1 << 6)
  50#define PGM_CMP                 (1 << 5)
  51#define LOAD_CMP                (1 << 4)
  52#define ERS_FAIL                (1 << 3)
  53#define PGM_FAIL                (1 << 2)
  54#define INT_TO                  (1 << 1)
  55#define LD_FAIL_ECC_ERR         (1 << 0)
  56
  57#define TSRF                    (1 << 0)
  58
  59#endif
  60