linux/drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c
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   1/*
   2 * Copyright (c) 2014-2015 Hisilicon Limited.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 */
   9
  10#include <linux/delay.h>
  11#include <linux/of_mdio.h>
  12#include "hns_dsaf_main.h"
  13#include "hns_dsaf_mac.h"
  14#include "hns_dsaf_gmac.h"
  15
  16static const struct mac_stats_string g_gmac_stats_string[] = {
  17        {"gmac_rx_octets_total_ok", MAC_STATS_FIELD_OFF(rx_good_bytes)},
  18        {"gmac_rx_octets_bad", MAC_STATS_FIELD_OFF(rx_bad_bytes)},
  19        {"gmac_rx_uc_pkts", MAC_STATS_FIELD_OFF(rx_uc_pkts)},
  20        {"gmac_rx_mc_pkts", MAC_STATS_FIELD_OFF(rx_mc_pkts)},
  21        {"gmac_rx_bc_pkts", MAC_STATS_FIELD_OFF(rx_bc_pkts)},
  22        {"gmac_rx_pkts_64octets", MAC_STATS_FIELD_OFF(rx_64bytes)},
  23        {"gmac_rx_pkts_65to127", MAC_STATS_FIELD_OFF(rx_65to127)},
  24        {"gmac_rx_pkts_128to255", MAC_STATS_FIELD_OFF(rx_128to255)},
  25        {"gmac_rx_pkts_256to511", MAC_STATS_FIELD_OFF(rx_256to511)},
  26        {"gmac_rx_pkts_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023)},
  27        {"gmac_rx_pkts_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518)},
  28        {"gmac_rx_pkts_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax)},
  29        {"gmac_rx_fcs_errors", MAC_STATS_FIELD_OFF(rx_fcs_err)},
  30        {"gmac_rx_tagged", MAC_STATS_FIELD_OFF(rx_vlan_pkts)},
  31        {"gmac_rx_data_err", MAC_STATS_FIELD_OFF(rx_data_err)},
  32        {"gmac_rx_align_errors", MAC_STATS_FIELD_OFF(rx_align_err)},
  33        {"gmac_rx_long_errors", MAC_STATS_FIELD_OFF(rx_oversize)},
  34        {"gmac_rx_jabber_errors", MAC_STATS_FIELD_OFF(rx_jabber_err)},
  35        {"gmac_rx_pause_maccontrol", MAC_STATS_FIELD_OFF(rx_pfc_tc0)},
  36        {"gmac_rx_unknown_maccontrol", MAC_STATS_FIELD_OFF(rx_unknown_ctrl)},
  37        {"gmac_rx_very_long_err", MAC_STATS_FIELD_OFF(rx_long_err)},
  38        {"gmac_rx_runt_err", MAC_STATS_FIELD_OFF(rx_minto64)},
  39        {"gmac_rx_short_err", MAC_STATS_FIELD_OFF(rx_under_min)},
  40        {"gmac_rx_filt_pkt", MAC_STATS_FIELD_OFF(rx_filter_pkts)},
  41        {"gmac_rx_octets_total_filt", MAC_STATS_FIELD_OFF(rx_filter_bytes)},
  42        {"gmac_rx_overrun_cnt", MAC_STATS_FIELD_OFF(rx_fifo_overrun_err)},
  43        {"gmac_rx_length_err", MAC_STATS_FIELD_OFF(rx_len_err)},
  44        {"gmac_rx_fail_comma", MAC_STATS_FIELD_OFF(rx_comma_err)},
  45
  46        {"gmac_tx_octets_ok", MAC_STATS_FIELD_OFF(tx_good_bytes)},
  47        {"gmac_tx_octets_bad", MAC_STATS_FIELD_OFF(tx_bad_bytes)},
  48        {"gmac_tx_uc_pkts", MAC_STATS_FIELD_OFF(tx_uc_pkts)},
  49        {"gmac_tx_mc_pkts", MAC_STATS_FIELD_OFF(tx_mc_pkts)},
  50        {"gmac_tx_bc_pkts", MAC_STATS_FIELD_OFF(tx_bc_pkts)},
  51        {"gmac_tx_pkts_64octets", MAC_STATS_FIELD_OFF(tx_64bytes)},
  52        {"gmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127)},
  53        {"gmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255)},
  54        {"gmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511)},
  55        {"gmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023)},
  56        {"gmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518)},
  57        {"gmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax)},
  58        {"gmac_tx_excessive_length_drop", MAC_STATS_FIELD_OFF(tx_jabber_err)},
  59        {"gmac_tx_underrun", MAC_STATS_FIELD_OFF(tx_underrun_err)},
  60        {"gmac_tx_tagged", MAC_STATS_FIELD_OFF(tx_vlan)},
  61        {"gmac_tx_crc_error", MAC_STATS_FIELD_OFF(tx_crc_err)},
  62        {"gmac_tx_pause_frames", MAC_STATS_FIELD_OFF(tx_pfc_tc0)}
  63};
  64
  65static void hns_gmac_enable(void *mac_drv, enum mac_commom_mode mode)
  66{
  67        struct mac_driver *drv = (struct mac_driver *)mac_drv;
  68
  69        /*enable GE rX/tX */
  70        if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  71                dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1);
  72
  73        if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  74                dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1);
  75}
  76
  77static void hns_gmac_disable(void *mac_drv, enum mac_commom_mode mode)
  78{
  79        struct mac_driver *drv = (struct mac_driver *)mac_drv;
  80
  81        /*disable GE rX/tX */
  82        if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  83                dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0);
  84
  85        if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))
  86                dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0);
  87}
  88
  89/**
  90*hns_gmac_get_en - get port enable
  91*@mac_drv:mac device
  92*@rx:rx enable
  93*@tx:tx enable
  94*/
  95static void hns_gmac_get_en(void *mac_drv, u32 *rx, u32 *tx)
  96{
  97        struct mac_driver *drv = (struct mac_driver *)mac_drv;
  98        u32 porten;
  99
 100        porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 101        *tx = dsaf_get_bit(porten, GMAC_PORT_TX_EN_B);
 102        *rx = dsaf_get_bit(porten, GMAC_PORT_RX_EN_B);
 103}
 104
 105static void hns_gmac_free(void *mac_drv)
 106{
 107        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 108        struct dsaf_device *dsaf_dev
 109                = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 110
 111        u32 mac_id = drv->mac_id;
 112
 113        dsaf_dev->misc_op->ge_srst(dsaf_dev, mac_id, 0);
 114}
 115
 116static void hns_gmac_set_tx_auto_pause_frames(void *mac_drv, u16 newval)
 117{
 118        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 119
 120        dsaf_set_dev_field(drv, GMAC_FC_TX_TIMER_REG, GMAC_FC_TX_TIMER_M,
 121                           GMAC_FC_TX_TIMER_S, newval);
 122}
 123
 124static void hns_gmac_get_tx_auto_pause_frames(void *mac_drv, u16 *newval)
 125{
 126        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 127
 128        *newval = dsaf_get_dev_field(drv, GMAC_FC_TX_TIMER_REG,
 129                                     GMAC_FC_TX_TIMER_M, GMAC_FC_TX_TIMER_S);
 130}
 131
 132static void hns_gmac_set_rx_auto_pause_frames(void *mac_drv, u32 newval)
 133{
 134        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 135
 136        dsaf_set_dev_bit(drv, GMAC_PAUSE_EN_REG,
 137                         GMAC_PAUSE_EN_RX_FDFC_B, !!newval);
 138}
 139
 140static void hns_gmac_config_max_frame_length(void *mac_drv, u16 newval)
 141{
 142        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 143
 144        dsaf_set_dev_field(drv, GMAC_MAX_FRM_SIZE_REG, GMAC_MAX_FRM_SIZE_M,
 145                           GMAC_MAX_FRM_SIZE_S, newval);
 146
 147        dsaf_set_dev_field(drv, GAMC_RX_MAX_FRAME, GMAC_MAX_FRM_SIZE_M,
 148                           GMAC_MAX_FRM_SIZE_S, newval);
 149}
 150
 151static void hns_gmac_config_an_mode(void *mac_drv, u8 newval)
 152{
 153        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 154
 155        dsaf_set_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 156                         GMAC_TX_AN_EN_B, !!newval);
 157}
 158
 159static void hns_gmac_tx_loop_pkt_dis(void *mac_drv)
 160{
 161        u32 tx_loop_pkt_pri;
 162        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 163
 164        tx_loop_pkt_pri = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 165        dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_EN_B, 1);
 166        dsaf_set_bit(tx_loop_pkt_pri, GMAC_TX_LOOP_PKT_HIG_PRI_B, 0);
 167        dsaf_write_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG, tx_loop_pkt_pri);
 168}
 169
 170static void hns_gmac_set_duplex_type(void *mac_drv, u8 newval)
 171{
 172        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 173
 174        dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 175                         GMAC_DUPLEX_TYPE_B, !!newval);
 176}
 177
 178static void hns_gmac_get_duplex_type(void *mac_drv,
 179                                     enum hns_gmac_duplex_mdoe *duplex_mode)
 180{
 181        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 182
 183        *duplex_mode = (enum hns_gmac_duplex_mdoe)dsaf_get_dev_bit(
 184                drv, GMAC_DUPLEX_TYPE_REG, GMAC_DUPLEX_TYPE_B);
 185}
 186
 187static void hns_gmac_get_port_mode(void *mac_drv, enum hns_port_mode *port_mode)
 188{
 189        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 190
 191        *port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 192                drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 193}
 194
 195static void hns_gmac_port_mode_get(void *mac_drv,
 196                                   struct hns_gmac_port_mode_cfg *port_mode)
 197{
 198        u32 tx_ctrl;
 199        u32 recv_ctrl;
 200        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 201
 202        port_mode->port_mode = (enum hns_port_mode)dsaf_get_dev_field(
 203                drv, GMAC_PORT_MODE_REG, GMAC_PORT_MODE_M, GMAC_PORT_MODE_S);
 204
 205        tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 206        recv_ctrl = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 207
 208        port_mode->max_frm_size =
 209                dsaf_get_dev_field(drv, GMAC_MAX_FRM_SIZE_REG,
 210                                   GMAC_MAX_FRM_SIZE_M, GMAC_MAX_FRM_SIZE_S);
 211        port_mode->short_runts_thr =
 212                dsaf_get_dev_field(drv, GMAC_SHORT_RUNTS_THR_REG,
 213                                   GMAC_SHORT_RUNTS_THR_M,
 214                                   GMAC_SHORT_RUNTS_THR_S);
 215
 216        port_mode->pad_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_PAD_EN_B);
 217        port_mode->crc_add = dsaf_get_bit(tx_ctrl, GMAC_TX_CRC_ADD_B);
 218        port_mode->an_enable = dsaf_get_bit(tx_ctrl, GMAC_TX_AN_EN_B);
 219
 220        port_mode->runt_pkt_en =
 221                dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_RUNT_PKT_EN_B);
 222        port_mode->strip_pad_en =
 223                dsaf_get_bit(recv_ctrl, GMAC_RECV_CTRL_STRIP_PAD_EN_B);
 224}
 225
 226static void hns_gmac_pause_frm_cfg(void *mac_drv, u32 rx_pause_en,
 227                                   u32 tx_pause_en)
 228{
 229        u32 pause_en;
 230        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 231
 232        pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 233        dsaf_set_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B, !!rx_pause_en);
 234        dsaf_set_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B, !!tx_pause_en);
 235        dsaf_write_dev(drv, GMAC_PAUSE_EN_REG, pause_en);
 236}
 237
 238static void hns_gmac_get_pausefrm_cfg(void *mac_drv, u32 *rx_pause_en,
 239                                      u32 *tx_pause_en)
 240{
 241        u32 pause_en;
 242        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 243
 244        pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 245
 246        *rx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_RX_FDFC_B);
 247        *tx_pause_en = dsaf_get_bit(pause_en, GMAC_PAUSE_EN_TX_FDFC_B);
 248}
 249
 250static int hns_gmac_adjust_link(void *mac_drv, enum mac_speed speed,
 251                                u32 full_duplex)
 252{
 253        u32 tx_ctrl;
 254        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 255
 256        dsaf_set_dev_bit(drv, GMAC_DUPLEX_TYPE_REG,
 257                         GMAC_DUPLEX_TYPE_B, !!full_duplex);
 258
 259        switch (speed) {
 260        case MAC_SPEED_10:
 261                dsaf_set_dev_field(
 262                        drv, GMAC_PORT_MODE_REG,
 263                        GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x6);
 264                break;
 265        case MAC_SPEED_100:
 266                dsaf_set_dev_field(
 267                        drv, GMAC_PORT_MODE_REG,
 268                        GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x7);
 269                break;
 270        case MAC_SPEED_1000:
 271                dsaf_set_dev_field(
 272                        drv, GMAC_PORT_MODE_REG,
 273                        GMAC_PORT_MODE_M, GMAC_PORT_MODE_S, 0x8);
 274                break;
 275        default:
 276                dev_err(drv->dev,
 277                        "hns_gmac_adjust_link fail, speed%d mac%d\n",
 278                        speed, drv->mac_id);
 279                return -EINVAL;
 280        }
 281
 282        tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 283        dsaf_set_bit(tx_ctrl, GMAC_TX_PAD_EN_B, 1);
 284        dsaf_set_bit(tx_ctrl, GMAC_TX_CRC_ADD_B, 1);
 285        dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl);
 286
 287        dsaf_set_dev_bit(drv, GMAC_MODE_CHANGE_EN_REG,
 288                         GMAC_MODE_CHANGE_EB_B, 1);
 289
 290        return 0;
 291}
 292
 293static void hns_gmac_set_uc_match(void *mac_drv, u16 en)
 294{
 295        struct mac_driver *drv = mac_drv;
 296
 297        dsaf_set_dev_bit(drv, GMAC_REC_FILT_CONTROL_REG,
 298                         GMAC_UC_MATCH_EN_B, !en);
 299        dsaf_set_dev_bit(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 300                         GMAC_ADDR_EN_B, !en);
 301}
 302
 303static void hns_gmac_set_promisc(void *mac_drv, u8 en)
 304{
 305        struct mac_driver *drv = mac_drv;
 306
 307        if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 308                hns_gmac_set_uc_match(mac_drv, en);
 309}
 310
 311static void hns_gmac_init(void *mac_drv)
 312{
 313        u32 port;
 314        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 315        struct dsaf_device *dsaf_dev
 316                = (struct dsaf_device *)dev_get_drvdata(drv->dev);
 317
 318        port = drv->mac_id;
 319
 320        dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 0);
 321        mdelay(10);
 322        dsaf_dev->misc_op->ge_srst(dsaf_dev, port, 1);
 323        mdelay(10);
 324        hns_gmac_disable(mac_drv, MAC_COMM_MODE_RX_AND_TX);
 325        hns_gmac_tx_loop_pkt_dis(mac_drv);
 326        if (drv->mac_cb->mac_type == HNAE_PORT_DEBUG)
 327                hns_gmac_set_uc_match(mac_drv, 0);
 328}
 329
 330void hns_gmac_update_stats(void *mac_drv)
 331{
 332        struct mac_hw_stats *hw_stats = NULL;
 333        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 334
 335        hw_stats = &drv->mac_cb->hw_stats;
 336
 337        /* RX */
 338        hw_stats->rx_good_bytes
 339                += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 340        hw_stats->rx_bad_bytes
 341                += dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 342        hw_stats->rx_uc_pkts += dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 343        hw_stats->rx_mc_pkts += dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 344        hw_stats->rx_bc_pkts += dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 345        hw_stats->rx_64bytes
 346                += dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 347        hw_stats->rx_65to127
 348                += dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 349        hw_stats->rx_128to255
 350                += dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 351        hw_stats->rx_256to511
 352                += dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 353        hw_stats->rx_512to1023
 354                += dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 355        hw_stats->rx_1024to1518
 356                += dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 357        hw_stats->rx_1519tomax
 358                += dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 359        hw_stats->rx_fcs_err += dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 360        hw_stats->rx_vlan_pkts += dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 361        hw_stats->rx_data_err += dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 362        hw_stats->rx_align_err
 363                += dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 364        hw_stats->rx_oversize
 365                += dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 366        hw_stats->rx_jabber_err
 367                += dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 368        hw_stats->rx_pfc_tc0
 369                += dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 370        hw_stats->rx_unknown_ctrl
 371                += dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 372        hw_stats->rx_long_err
 373                += dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 374        hw_stats->rx_minto64
 375                += dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 376        hw_stats->rx_under_min
 377                += dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 378        hw_stats->rx_filter_pkts
 379                += dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 380        hw_stats->rx_filter_bytes
 381                += dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 382        hw_stats->rx_fifo_overrun_err
 383                += dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 384        hw_stats->rx_len_err
 385                += dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 386        hw_stats->rx_comma_err
 387                += dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 388
 389        /* TX */
 390        hw_stats->tx_good_bytes
 391                += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 392        hw_stats->tx_bad_bytes
 393                += dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 394        hw_stats->tx_uc_pkts += dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 395        hw_stats->tx_mc_pkts += dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 396        hw_stats->tx_bc_pkts += dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 397        hw_stats->tx_64bytes
 398                += dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 399        hw_stats->tx_65to127
 400                += dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 401        hw_stats->tx_128to255
 402                += dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 403        hw_stats->tx_256to511
 404                += dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 405        hw_stats->tx_512to1023
 406                += dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 407        hw_stats->tx_1024to1518
 408                += dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 409        hw_stats->tx_1519tomax
 410                += dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 411        hw_stats->tx_jabber_err
 412                += dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 413        hw_stats->tx_underrun_err
 414                += dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 415        hw_stats->tx_vlan += dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 416        hw_stats->tx_crc_err += dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 417        hw_stats->tx_pfc_tc0
 418                += dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 419}
 420
 421static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
 422{
 423        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 424
 425        u32 high_val = mac_addr[1] | (mac_addr[0] << 8);
 426
 427        u32 low_val = mac_addr[5] | (mac_addr[4] << 8)
 428                | (mac_addr[3] << 16) | (mac_addr[2] << 24);
 429
 430        u32 val = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 431        u32 sta_addr_en = dsaf_get_bit(val, GMAC_ADDR_EN_B);
 432
 433        dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val);
 434        dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG,
 435                       high_val | (sta_addr_en << GMAC_ADDR_EN_B));
 436}
 437
 438static int hns_gmac_config_loopback(void *mac_drv, enum hnae_loop loop_mode,
 439                                    u8 enable)
 440{
 441        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 442
 443        switch (loop_mode) {
 444        case MAC_INTERNALLOOP_MAC:
 445                dsaf_set_dev_bit(drv, GMAC_LOOP_REG, GMAC_LP_REG_CF2MI_LP_EN_B,
 446                                 !!enable);
 447                break;
 448        default:
 449                dev_err(drv->dev, "loop_mode error\n");
 450                return -EINVAL;
 451        }
 452
 453        return 0;
 454}
 455
 456static void hns_gmac_config_pad_and_crc(void *mac_drv, u8 newval)
 457{
 458        u32 tx_ctrl;
 459        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 460
 461        tx_ctrl = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 462        dsaf_set_bit(tx_ctrl, GMAC_TX_PAD_EN_B, !!newval);
 463        dsaf_set_bit(tx_ctrl, GMAC_TX_CRC_ADD_B, !!newval);
 464        dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl);
 465}
 466
 467static void hns_gmac_get_id(void *mac_drv, u8 *mac_id)
 468{
 469        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 470
 471        *mac_id = drv->mac_id;
 472}
 473
 474static void hns_gmac_get_info(void *mac_drv, struct mac_info *mac_info)
 475{
 476        enum hns_gmac_duplex_mdoe duplex;
 477        enum hns_port_mode speed;
 478        u32 rx_pause;
 479        u32 tx_pause;
 480        u32 rx;
 481        u32 tx;
 482        u16 fc_tx_timer;
 483        struct hns_gmac_port_mode_cfg port_mode = { GMAC_10M_MII, 0 };
 484
 485        hns_gmac_port_mode_get(mac_drv, &port_mode);
 486        mac_info->pad_and_crc_en = port_mode.crc_add && port_mode.pad_enable;
 487        mac_info->auto_neg = port_mode.an_enable;
 488
 489        hns_gmac_get_tx_auto_pause_frames(mac_drv, &fc_tx_timer);
 490        mac_info->tx_pause_time = fc_tx_timer;
 491
 492        hns_gmac_get_en(mac_drv, &rx, &tx);
 493        mac_info->port_en = rx && tx;
 494
 495        hns_gmac_get_duplex_type(mac_drv, &duplex);
 496        mac_info->duplex = duplex;
 497
 498        hns_gmac_get_port_mode(mac_drv, &speed);
 499        switch (speed) {
 500        case GMAC_10M_SGMII:
 501                mac_info->speed = MAC_SPEED_10;
 502                break;
 503        case GMAC_100M_SGMII:
 504                mac_info->speed = MAC_SPEED_100;
 505                break;
 506        case GMAC_1000M_SGMII:
 507                mac_info->speed = MAC_SPEED_1000;
 508                break;
 509        default:
 510                mac_info->speed = 0;
 511                break;
 512        }
 513
 514        hns_gmac_get_pausefrm_cfg(mac_drv, &rx_pause, &tx_pause);
 515        mac_info->rx_pause_en = rx_pause;
 516        mac_info->tx_pause_en = tx_pause;
 517}
 518
 519static void hns_gmac_autoneg_stat(void *mac_drv, u32 *enable)
 520{
 521        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 522
 523        *enable = dsaf_get_dev_bit(drv, GMAC_TRANSMIT_CONTROL_REG,
 524                                   GMAC_TX_AN_EN_B);
 525}
 526
 527static void hns_gmac_get_link_status(void *mac_drv, u32 *link_stat)
 528{
 529        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 530
 531        *link_stat = dsaf_get_dev_bit(drv, GMAC_AN_NEG_STATE_REG,
 532                                      GMAC_AN_NEG_STAT_RX_SYNC_OK_B);
 533}
 534
 535static void hns_gmac_get_regs(void *mac_drv, void *data)
 536{
 537        u32 *regs = data;
 538        int i;
 539        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 540
 541        /* base config registers */
 542        regs[0] = dsaf_read_dev(drv, GMAC_DUPLEX_TYPE_REG);
 543        regs[1] = dsaf_read_dev(drv, GMAC_FD_FC_TYPE_REG);
 544        regs[2] = dsaf_read_dev(drv, GMAC_FC_TX_TIMER_REG);
 545        regs[3] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_LOW_REG);
 546        regs[4] = dsaf_read_dev(drv, GMAC_FD_FC_ADDR_HIGH_REG);
 547        regs[5] = dsaf_read_dev(drv, GMAC_IPG_TX_TIMER_REG);
 548        regs[6] = dsaf_read_dev(drv, GMAC_PAUSE_THR_REG);
 549        regs[7] = dsaf_read_dev(drv, GMAC_MAX_FRM_SIZE_REG);
 550        regs[8] = dsaf_read_dev(drv, GMAC_PORT_MODE_REG);
 551        regs[9] = dsaf_read_dev(drv, GMAC_PORT_EN_REG);
 552        regs[10] = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG);
 553        regs[11] = dsaf_read_dev(drv, GMAC_SHORT_RUNTS_THR_REG);
 554        regs[12] = dsaf_read_dev(drv, GMAC_AN_NEG_STATE_REG);
 555        regs[13] = dsaf_read_dev(drv, GMAC_TX_LOCAL_PAGE_REG);
 556        regs[14] = dsaf_read_dev(drv, GMAC_TRANSMIT_CONTROL_REG);
 557        regs[15] = dsaf_read_dev(drv, GMAC_REC_FILT_CONTROL_REG);
 558        regs[16] = dsaf_read_dev(drv, GMAC_PTP_CONFIG_REG);
 559
 560        /* rx static registers */
 561        regs[17] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_OK_REG);
 562        regs[18] = dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG);
 563        regs[19] = dsaf_read_dev(drv, GMAC_RX_UC_PKTS_REG);
 564        regs[20] = dsaf_read_dev(drv, GMAC_RX_MC_PKTS_REG);
 565        regs[21] = dsaf_read_dev(drv, GMAC_RX_BC_PKTS_REG);
 566        regs[22] = dsaf_read_dev(drv, GMAC_RX_PKTS_64OCTETS_REG);
 567        regs[23] = dsaf_read_dev(drv, GMAC_RX_PKTS_65TO127OCTETS_REG);
 568        regs[24] = dsaf_read_dev(drv, GMAC_RX_PKTS_128TO255OCTETS_REG);
 569        regs[25] = dsaf_read_dev(drv, GMAC_RX_PKTS_255TO511OCTETS_REG);
 570        regs[26] = dsaf_read_dev(drv, GMAC_RX_PKTS_512TO1023OCTETS_REG);
 571        regs[27] = dsaf_read_dev(drv, GMAC_RX_PKTS_1024TO1518OCTETS_REG);
 572        regs[28] = dsaf_read_dev(drv, GMAC_RX_PKTS_1519TOMAXOCTETS_REG);
 573        regs[29] = dsaf_read_dev(drv, GMAC_RX_FCS_ERRORS_REG);
 574        regs[30] = dsaf_read_dev(drv, GMAC_RX_TAGGED_REG);
 575        regs[31] = dsaf_read_dev(drv, GMAC_RX_DATA_ERR_REG);
 576        regs[32] = dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG);
 577        regs[33] = dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG);
 578        regs[34] = dsaf_read_dev(drv, GMAC_RX_JABBER_ERRORS_REG);
 579        regs[35] = dsaf_read_dev(drv, GMAC_RX_PAUSE_MACCTRL_FRAM_REG);
 580        regs[36] = dsaf_read_dev(drv, GMAC_RX_UNKNOWN_MACCTRL_FRAM_REG);
 581        regs[37] = dsaf_read_dev(drv, GMAC_RX_VERY_LONG_ERR_CNT_REG);
 582        regs[38] = dsaf_read_dev(drv, GMAC_RX_RUNT_ERR_CNT_REG);
 583        regs[39] = dsaf_read_dev(drv, GMAC_RX_SHORT_ERR_CNT_REG);
 584        regs[40] = dsaf_read_dev(drv, GMAC_RX_FILT_PKT_CNT_REG);
 585        regs[41] = dsaf_read_dev(drv, GMAC_RX_OCTETS_TOTAL_FILT_REG);
 586
 587        /* tx static registers */
 588        regs[42] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_OK_REG);
 589        regs[43] = dsaf_read_dev(drv, GMAC_OCTETS_TRANSMITTED_BAD_REG);
 590        regs[44] = dsaf_read_dev(drv, GMAC_TX_UC_PKTS_REG);
 591        regs[45] = dsaf_read_dev(drv, GMAC_TX_MC_PKTS_REG);
 592        regs[46] = dsaf_read_dev(drv, GMAC_TX_BC_PKTS_REG);
 593        regs[47] = dsaf_read_dev(drv, GMAC_TX_PKTS_64OCTETS_REG);
 594        regs[48] = dsaf_read_dev(drv, GMAC_TX_PKTS_65TO127OCTETS_REG);
 595        regs[49] = dsaf_read_dev(drv, GMAC_TX_PKTS_128TO255OCTETS_REG);
 596        regs[50] = dsaf_read_dev(drv, GMAC_TX_PKTS_255TO511OCTETS_REG);
 597        regs[51] = dsaf_read_dev(drv, GMAC_TX_PKTS_512TO1023OCTETS_REG);
 598        regs[52] = dsaf_read_dev(drv, GMAC_TX_PKTS_1024TO1518OCTETS_REG);
 599        regs[53] = dsaf_read_dev(drv, GMAC_TX_PKTS_1519TOMAXOCTETS_REG);
 600        regs[54] = dsaf_read_dev(drv, GMAC_TX_EXCESSIVE_LENGTH_DROP_REG);
 601        regs[55] = dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG);
 602        regs[56] = dsaf_read_dev(drv, GMAC_TX_TAGGED_REG);
 603        regs[57] = dsaf_read_dev(drv, GMAC_TX_CRC_ERROR_REG);
 604        regs[58] = dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
 605
 606        regs[59] = dsaf_read_dev(drv, GAMC_RX_MAX_FRAME);
 607        regs[60] = dsaf_read_dev(drv, GMAC_LINE_LOOP_BACK_REG);
 608        regs[61] = dsaf_read_dev(drv, GMAC_CF_CRC_STRIP_REG);
 609        regs[62] = dsaf_read_dev(drv, GMAC_MODE_CHANGE_EN_REG);
 610        regs[63] = dsaf_read_dev(drv, GMAC_SIXTEEN_BIT_CNTR_REG);
 611        regs[64] = dsaf_read_dev(drv, GMAC_LD_LINK_COUNTER_REG);
 612        regs[65] = dsaf_read_dev(drv, GMAC_LOOP_REG);
 613        regs[66] = dsaf_read_dev(drv, GMAC_RECV_CONTROL_REG);
 614        regs[67] = dsaf_read_dev(drv, GMAC_VLAN_CODE_REG);
 615        regs[68] = dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG);
 616        regs[69] = dsaf_read_dev(drv, GMAC_RX_LENGTHFIELD_ERR_CNT_REG);
 617        regs[70] = dsaf_read_dev(drv, GMAC_RX_FAIL_COMMA_CNT_REG);
 618
 619        regs[71] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_0_REG);
 620        regs[72] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_0_REG);
 621        regs[73] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_1_REG);
 622        regs[74] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_1_REG);
 623        regs[75] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_2_REG);
 624        regs[76] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG);
 625        regs[77] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_3_REG);
 626        regs[78] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_3_REG);
 627        regs[79] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_4_REG);
 628        regs[80] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_4_REG);
 629        regs[81] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_5_REG);
 630        regs[82] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_5_REG);
 631        regs[83] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_0_REG);
 632        regs[84] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_0_REG);
 633        regs[85] = dsaf_read_dev(drv, GMAC_STATION_ADDR_LOW_MSK_1_REG);
 634        regs[86] = dsaf_read_dev(drv, GMAC_STATION_ADDR_HIGH_MSK_1_REG);
 635        regs[87] = dsaf_read_dev(drv, GMAC_MAC_SKIP_LEN_REG);
 636        regs[88] = dsaf_read_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG);
 637
 638        /* mark end of mac regs */
 639        for (i = 89; i < 96; i++)
 640                regs[i] = 0xaaaaaaaa;
 641}
 642
 643static void hns_gmac_get_stats(void *mac_drv, u64 *data)
 644{
 645        u32 i;
 646        u64 *buf = data;
 647        struct mac_driver *drv = (struct mac_driver *)mac_drv;
 648        struct mac_hw_stats *hw_stats = NULL;
 649
 650        hw_stats = &drv->mac_cb->hw_stats;
 651
 652        for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 653                buf[i] = DSAF_STATS_READ(hw_stats,
 654                        g_gmac_stats_string[i].offset);
 655        }
 656}
 657
 658static void hns_gmac_get_strings(u32 stringset, u8 *data)
 659{
 660        char *buff = (char *)data;
 661        u32 i;
 662
 663        if (stringset != ETH_SS_STATS)
 664                return;
 665
 666        for (i = 0; i < ARRAY_SIZE(g_gmac_stats_string); i++) {
 667                snprintf(buff, ETH_GSTRING_LEN, "%s",
 668                         g_gmac_stats_string[i].desc);
 669                buff = buff + ETH_GSTRING_LEN;
 670        }
 671}
 672
 673static int hns_gmac_get_sset_count(int stringset)
 674{
 675        if (stringset == ETH_SS_STATS)
 676                return ARRAY_SIZE(g_gmac_stats_string);
 677
 678        return 0;
 679}
 680
 681static int hns_gmac_get_regs_count(void)
 682{
 683        return ETH_GMAC_DUMP_NUM;
 684}
 685
 686void *hns_gmac_config(struct hns_mac_cb *mac_cb, struct mac_params *mac_param)
 687{
 688        struct mac_driver *mac_drv;
 689
 690        mac_drv = devm_kzalloc(mac_cb->dev, sizeof(*mac_drv), GFP_KERNEL);
 691        if (!mac_drv)
 692                return NULL;
 693
 694        mac_drv->mac_init = hns_gmac_init;
 695        mac_drv->mac_enable = hns_gmac_enable;
 696        mac_drv->mac_disable = hns_gmac_disable;
 697        mac_drv->mac_free = hns_gmac_free;
 698        mac_drv->adjust_link = hns_gmac_adjust_link;
 699        mac_drv->set_tx_auto_pause_frames = hns_gmac_set_tx_auto_pause_frames;
 700        mac_drv->config_max_frame_length = hns_gmac_config_max_frame_length;
 701        mac_drv->mac_pausefrm_cfg = hns_gmac_pause_frm_cfg;
 702
 703        mac_drv->mac_id = mac_param->mac_id;
 704        mac_drv->mac_mode = mac_param->mac_mode;
 705        mac_drv->io_base = mac_param->vaddr;
 706        mac_drv->dev = mac_param->dev;
 707        mac_drv->mac_cb = mac_cb;
 708
 709        mac_drv->set_mac_addr = hns_gmac_set_mac_addr;
 710        mac_drv->set_an_mode = hns_gmac_config_an_mode;
 711        mac_drv->config_loopback = hns_gmac_config_loopback;
 712        mac_drv->config_pad_and_crc = hns_gmac_config_pad_and_crc;
 713        mac_drv->config_half_duplex = hns_gmac_set_duplex_type;
 714        mac_drv->set_rx_ignore_pause_frames = hns_gmac_set_rx_auto_pause_frames;
 715        mac_drv->mac_get_id = hns_gmac_get_id;
 716        mac_drv->get_info = hns_gmac_get_info;
 717        mac_drv->autoneg_stat = hns_gmac_autoneg_stat;
 718        mac_drv->get_pause_enable = hns_gmac_get_pausefrm_cfg;
 719        mac_drv->get_link_status = hns_gmac_get_link_status;
 720        mac_drv->get_regs = hns_gmac_get_regs;
 721        mac_drv->get_regs_count = hns_gmac_get_regs_count;
 722        mac_drv->get_ethtool_stats = hns_gmac_get_stats;
 723        mac_drv->get_sset_count = hns_gmac_get_sset_count;
 724        mac_drv->get_strings = hns_gmac_get_strings;
 725        mac_drv->update_stats = hns_gmac_update_stats;
 726        mac_drv->set_promiscuous = hns_gmac_set_promisc;
 727
 728        return (void *)mac_drv;
 729}
 730