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43
44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
46#include <linux/bitops.h>
47#include <linux/if_vlan.h>
48#include <linux/interrupt.h>
49#include <linux/pci.h>
50#include <linux/slab.h>
51#include <linux/tcp.h>
52#include <net/ip.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/firmware.h>
56#include <linux/net_tstamp.h>
57#include <linux/prefetch.h>
58#include <linux/module.h>
59#include "vxge-main.h"
60#include "vxge-reg.h"
61
62MODULE_LICENSE("Dual BSD/GPL");
63MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
64 "Virtualized Server Adapter");
65
66static const struct pci_device_id vxge_id_table[] = {
67 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
68 PCI_ANY_ID},
69 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
70 PCI_ANY_ID},
71 {0}
72};
73
74MODULE_DEVICE_TABLE(pci, vxge_id_table);
75
76VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
77VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
78VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
79VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
80VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
81VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
82
83static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
84 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
85static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
86 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
87module_param_array(bw_percentage, uint, NULL, 0);
88
89static struct vxge_drv_config *driver_config;
90static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
91
92static inline int is_vxge_card_up(struct vxgedev *vdev)
93{
94 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
95}
96
97static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
98{
99 struct sk_buff **skb_ptr = NULL;
100 struct sk_buff **temp;
101#define NR_SKB_COMPLETED 128
102 struct sk_buff *completed[NR_SKB_COMPLETED];
103 int more;
104
105 do {
106 more = 0;
107 skb_ptr = completed;
108
109 if (__netif_tx_trylock(fifo->txq)) {
110 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
111 NR_SKB_COMPLETED, &more);
112 __netif_tx_unlock(fifo->txq);
113 }
114
115
116 for (temp = completed; temp != skb_ptr; temp++)
117 dev_kfree_skb_irq(*temp);
118 } while (more);
119}
120
121static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
122{
123 int i;
124
125
126 for (i = 0; i < vdev->no_of_vpath; i++)
127 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
128}
129
130static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
131{
132 int i;
133 struct vxge_ring *ring;
134
135
136 for (i = 0; i < vdev->no_of_vpath; i++) {
137 ring = &vdev->vpaths[i].ring;
138 vxge_hw_vpath_poll_rx(ring->handle);
139 }
140}
141
142
143
144
145
146
147
148static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
149{
150 struct net_device *dev = hldev->ndev;
151 struct vxgedev *vdev = netdev_priv(dev);
152
153 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
154 vdev->ndev->name, __func__, __LINE__);
155 netdev_notice(vdev->ndev, "Link Up\n");
156 vdev->stats.link_up++;
157
158 netif_carrier_on(vdev->ndev);
159 netif_tx_wake_all_queues(vdev->ndev);
160
161 vxge_debug_entryexit(VXGE_TRACE,
162 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
163}
164
165
166
167
168
169
170
171static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
172{
173 struct net_device *dev = hldev->ndev;
174 struct vxgedev *vdev = netdev_priv(dev);
175
176 vxge_debug_entryexit(VXGE_TRACE,
177 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
178 netdev_notice(vdev->ndev, "Link Down\n");
179
180 vdev->stats.link_down++;
181 netif_carrier_off(vdev->ndev);
182 netif_tx_stop_all_queues(vdev->ndev);
183
184 vxge_debug_entryexit(VXGE_TRACE,
185 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
186}
187
188
189
190
191
192
193static struct sk_buff *
194vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
195{
196 struct net_device *dev;
197 struct sk_buff *skb;
198 struct vxge_rx_priv *rx_priv;
199
200 dev = ring->ndev;
201 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
202 ring->ndev->name, __func__, __LINE__);
203
204 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
205
206
207 skb = netdev_alloc_skb(dev, skb_size +
208 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
209 if (skb == NULL) {
210 vxge_debug_mem(VXGE_ERR,
211 "%s: out of memory to allocate SKB", dev->name);
212 ring->stats.skb_alloc_fail++;
213 return NULL;
214 }
215
216 vxge_debug_mem(VXGE_TRACE,
217 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
218 __func__, __LINE__, skb);
219
220 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
221
222 rx_priv->skb = skb;
223 rx_priv->skb_data = NULL;
224 rx_priv->data_size = skb_size;
225 vxge_debug_entryexit(VXGE_TRACE,
226 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
227
228 return skb;
229}
230
231
232
233
234static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
235{
236 struct vxge_rx_priv *rx_priv;
237 dma_addr_t dma_addr;
238
239 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
240 ring->ndev->name, __func__, __LINE__);
241 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
242
243 rx_priv->skb_data = rx_priv->skb->data;
244 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
245 rx_priv->data_size, PCI_DMA_FROMDEVICE);
246
247 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
248 ring->stats.pci_map_fail++;
249 return -EIO;
250 }
251 vxge_debug_mem(VXGE_TRACE,
252 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
253 ring->ndev->name, __func__, __LINE__,
254 (unsigned long long)dma_addr);
255 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
256
257 rx_priv->data_dma = dma_addr;
258 vxge_debug_entryexit(VXGE_TRACE,
259 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
260
261 return 0;
262}
263
264
265
266
267
268static enum vxge_hw_status
269vxge_rx_initial_replenish(void *dtrh, void *userdata)
270{
271 struct vxge_ring *ring = (struct vxge_ring *)userdata;
272 struct vxge_rx_priv *rx_priv;
273
274 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
275 ring->ndev->name, __func__, __LINE__);
276 if (vxge_rx_alloc(dtrh, ring,
277 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
278 return VXGE_HW_FAIL;
279
280 if (vxge_rx_map(dtrh, ring)) {
281 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
282 dev_kfree_skb(rx_priv->skb);
283
284 return VXGE_HW_FAIL;
285 }
286 vxge_debug_entryexit(VXGE_TRACE,
287 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
288
289 return VXGE_HW_OK;
290}
291
292static inline void
293vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
294 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
295{
296
297 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
298 ring->ndev->name, __func__, __LINE__);
299 skb_record_rx_queue(skb, ring->driver_id);
300 skb->protocol = eth_type_trans(skb, ring->ndev);
301
302 u64_stats_update_begin(&ring->stats.syncp);
303 ring->stats.rx_frms++;
304 ring->stats.rx_bytes += pkt_length;
305
306 if (skb->pkt_type == PACKET_MULTICAST)
307 ring->stats.rx_mcast++;
308 u64_stats_update_end(&ring->stats.syncp);
309
310 vxge_debug_rx(VXGE_TRACE,
311 "%s: %s:%d skb protocol = %d",
312 ring->ndev->name, __func__, __LINE__, skb->protocol);
313
314 if (ext_info->vlan &&
315 ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
316 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
317 napi_gro_receive(ring->napi_p, skb);
318
319 vxge_debug_entryexit(VXGE_TRACE,
320 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
321}
322
323static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
324 struct vxge_rx_priv *rx_priv)
325{
326 pci_dma_sync_single_for_device(ring->pdev,
327 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
328
329 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
330 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
331}
332
333static inline void vxge_post(int *dtr_cnt, void **first_dtr,
334 void *post_dtr, struct __vxge_hw_ring *ringh)
335{
336 int dtr_count = *dtr_cnt;
337 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
338 if (*first_dtr)
339 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
340 *first_dtr = post_dtr;
341 } else
342 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
343 dtr_count++;
344 *dtr_cnt = dtr_count;
345}
346
347
348
349
350
351
352
353static enum vxge_hw_status
354vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
355 u8 t_code, void *userdata)
356{
357 struct vxge_ring *ring = (struct vxge_ring *)userdata;
358 struct net_device *dev = ring->ndev;
359 unsigned int dma_sizes;
360 void *first_dtr = NULL;
361 int dtr_cnt = 0;
362 int data_size;
363 dma_addr_t data_dma;
364 int pkt_length;
365 struct sk_buff *skb;
366 struct vxge_rx_priv *rx_priv;
367 struct vxge_hw_ring_rxd_info ext_info;
368 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
369 ring->ndev->name, __func__, __LINE__);
370
371 if (ring->budget <= 0)
372 goto out;
373
374 do {
375 prefetch((char *)dtr + L1_CACHE_BYTES);
376 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
377 skb = rx_priv->skb;
378 data_size = rx_priv->data_size;
379 data_dma = rx_priv->data_dma;
380 prefetch(rx_priv->skb_data);
381
382 vxge_debug_rx(VXGE_TRACE,
383 "%s: %s:%d skb = 0x%p",
384 ring->ndev->name, __func__, __LINE__, skb);
385
386 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
387 pkt_length = dma_sizes;
388
389 pkt_length -= ETH_FCS_LEN;
390
391 vxge_debug_rx(VXGE_TRACE,
392 "%s: %s:%d Packet Length = %d",
393 ring->ndev->name, __func__, __LINE__, pkt_length);
394
395 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
396
397
398 vxge_assert(skb);
399
400 prefetch((char *)skb + L1_CACHE_BYTES);
401 if (unlikely(t_code)) {
402 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
403 VXGE_HW_OK) {
404
405 ring->stats.rx_errors++;
406 vxge_debug_rx(VXGE_TRACE,
407 "%s: %s :%d Rx T_code is %d",
408 ring->ndev->name, __func__,
409 __LINE__, t_code);
410
411
412
413
414
415 vxge_re_pre_post(dtr, ring, rx_priv);
416
417 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
418 ring->stats.rx_dropped++;
419 continue;
420 }
421 }
422
423 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
424 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
425 if (!vxge_rx_map(dtr, ring)) {
426 skb_put(skb, pkt_length);
427
428 pci_unmap_single(ring->pdev, data_dma,
429 data_size, PCI_DMA_FROMDEVICE);
430
431 vxge_hw_ring_rxd_pre_post(ringh, dtr);
432 vxge_post(&dtr_cnt, &first_dtr, dtr,
433 ringh);
434 } else {
435 dev_kfree_skb(rx_priv->skb);
436 rx_priv->skb = skb;
437 rx_priv->data_size = data_size;
438 vxge_re_pre_post(dtr, ring, rx_priv);
439
440 vxge_post(&dtr_cnt, &first_dtr, dtr,
441 ringh);
442 ring->stats.rx_dropped++;
443 break;
444 }
445 } else {
446 vxge_re_pre_post(dtr, ring, rx_priv);
447
448 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
449 ring->stats.rx_dropped++;
450 break;
451 }
452 } else {
453 struct sk_buff *skb_up;
454
455 skb_up = netdev_alloc_skb(dev, pkt_length +
456 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
457 if (skb_up != NULL) {
458 skb_reserve(skb_up,
459 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
460
461 pci_dma_sync_single_for_cpu(ring->pdev,
462 data_dma, data_size,
463 PCI_DMA_FROMDEVICE);
464
465 vxge_debug_mem(VXGE_TRACE,
466 "%s: %s:%d skb_up = %p",
467 ring->ndev->name, __func__,
468 __LINE__, skb);
469 memcpy(skb_up->data, skb->data, pkt_length);
470
471 vxge_re_pre_post(dtr, ring, rx_priv);
472
473 vxge_post(&dtr_cnt, &first_dtr, dtr,
474 ringh);
475
476 skb = skb_up;
477 skb_put(skb, pkt_length);
478 } else {
479 vxge_re_pre_post(dtr, ring, rx_priv);
480
481 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
482 vxge_debug_rx(VXGE_ERR,
483 "%s: vxge_rx_1b_compl: out of "
484 "memory", dev->name);
485 ring->stats.skb_alloc_fail++;
486 break;
487 }
488 }
489
490 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
491 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
492 (dev->features & NETIF_F_RXCSUM) &&
493 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
494 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
495 skb->ip_summed = CHECKSUM_UNNECESSARY;
496 else
497 skb_checksum_none_assert(skb);
498
499
500 if (ring->rx_hwts) {
501 struct skb_shared_hwtstamps *skb_hwts;
502 u32 ns = *(u32 *)(skb->head + pkt_length);
503
504 skb_hwts = skb_hwtstamps(skb);
505 skb_hwts->hwtstamp = ns_to_ktime(ns);
506 }
507
508
509
510
511
512 if (ext_info.rth_value)
513 skb_set_hash(skb, ext_info.rth_value,
514 PKT_HASH_TYPE_L3);
515
516 vxge_rx_complete(ring, skb, ext_info.vlan,
517 pkt_length, &ext_info);
518
519 ring->budget--;
520 ring->pkts_processed++;
521 if (!ring->budget)
522 break;
523
524 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
525 &t_code) == VXGE_HW_OK);
526
527 if (first_dtr)
528 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
529
530out:
531 vxge_debug_entryexit(VXGE_TRACE,
532 "%s:%d Exiting...",
533 __func__, __LINE__);
534 return VXGE_HW_OK;
535}
536
537
538
539
540
541
542
543
544
545static enum vxge_hw_status
546vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
547 enum vxge_hw_fifo_tcode t_code, void *userdata,
548 struct sk_buff ***skb_ptr, int nr_skb, int *more)
549{
550 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
551 struct sk_buff *skb, **done_skb = *skb_ptr;
552 int pkt_cnt = 0;
553
554 vxge_debug_entryexit(VXGE_TRACE,
555 "%s:%d Entered....", __func__, __LINE__);
556
557 do {
558 int frg_cnt;
559 skb_frag_t *frag;
560 int i = 0, j;
561 struct vxge_tx_priv *txd_priv =
562 vxge_hw_fifo_txdl_private_get(dtr);
563
564 skb = txd_priv->skb;
565 frg_cnt = skb_shinfo(skb)->nr_frags;
566 frag = &skb_shinfo(skb)->frags[0];
567
568 vxge_debug_tx(VXGE_TRACE,
569 "%s: %s:%d fifo_hw = %p dtr = %p "
570 "tcode = 0x%x", fifo->ndev->name, __func__,
571 __LINE__, fifo_hw, dtr, t_code);
572
573 vxge_assert(skb);
574 vxge_debug_tx(VXGE_TRACE,
575 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
576 fifo->ndev->name, __func__, __LINE__,
577 skb, txd_priv, frg_cnt);
578 if (unlikely(t_code)) {
579 fifo->stats.tx_errors++;
580 vxge_debug_tx(VXGE_ERR,
581 "%s: tx: dtr %p completed due to "
582 "error t_code %01x", fifo->ndev->name,
583 dtr, t_code);
584 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
585 }
586
587
588 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
589 skb_headlen(skb), PCI_DMA_TODEVICE);
590
591 for (j = 0; j < frg_cnt; j++) {
592 pci_unmap_page(fifo->pdev,
593 txd_priv->dma_buffers[i++],
594 skb_frag_size(frag), PCI_DMA_TODEVICE);
595 frag += 1;
596 }
597
598 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
599
600
601 u64_stats_update_begin(&fifo->stats.syncp);
602 fifo->stats.tx_frms++;
603 fifo->stats.tx_bytes += skb->len;
604 u64_stats_update_end(&fifo->stats.syncp);
605
606 *done_skb++ = skb;
607
608 if (--nr_skb <= 0) {
609 *more = 1;
610 break;
611 }
612
613 pkt_cnt++;
614 if (pkt_cnt > fifo->indicate_max_pkts)
615 break;
616
617 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
618 &dtr, &t_code) == VXGE_HW_OK);
619
620 *skb_ptr = done_skb;
621 if (netif_tx_queue_stopped(fifo->txq))
622 netif_tx_wake_queue(fifo->txq);
623
624 vxge_debug_entryexit(VXGE_TRACE,
625 "%s: %s:%d Exiting...",
626 fifo->ndev->name, __func__, __LINE__);
627 return VXGE_HW_OK;
628}
629
630
631static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
632{
633 u16 queue_len, counter = 0;
634 if (skb->protocol == htons(ETH_P_IP)) {
635 struct iphdr *ip;
636 struct tcphdr *th;
637
638 ip = ip_hdr(skb);
639
640 if (!ip_is_fragment(ip)) {
641 th = (struct tcphdr *)(((unsigned char *)ip) +
642 ip->ihl*4);
643
644 queue_len = vdev->no_of_vpath;
645 counter = (ntohs(th->source) +
646 ntohs(th->dest)) &
647 vdev->vpath_selector[queue_len - 1];
648 if (counter >= queue_len)
649 counter = queue_len - 1;
650 }
651 }
652 return counter;
653}
654
655static enum vxge_hw_status vxge_search_mac_addr_in_list(
656 struct vxge_vpath *vpath, u64 del_mac)
657{
658 struct list_head *entry, *next;
659 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
660 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
661 return TRUE;
662 }
663 return FALSE;
664}
665
666static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
667{
668 struct vxge_mac_addrs *new_mac_entry;
669 u8 *mac_address = NULL;
670
671 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
672 return TRUE;
673
674 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
675 if (!new_mac_entry) {
676 vxge_debug_mem(VXGE_ERR,
677 "%s: memory allocation failed",
678 VXGE_DRIVER_NAME);
679 return FALSE;
680 }
681
682 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
683
684
685 mac_address = (u8 *)&new_mac_entry->macaddr;
686 memcpy(mac_address, mac->macaddr, ETH_ALEN);
687
688 new_mac_entry->state = mac->state;
689 vpath->mac_addr_cnt++;
690
691 if (is_multicast_ether_addr(mac->macaddr))
692 vpath->mcast_addr_cnt++;
693
694 return TRUE;
695}
696
697
698static enum vxge_hw_status
699vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
700{
701 enum vxge_hw_status status = VXGE_HW_OK;
702 struct vxge_vpath *vpath;
703 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
704
705 if (is_multicast_ether_addr(mac->macaddr))
706 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
707 else
708 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
709
710 vpath = &vdev->vpaths[mac->vpath_no];
711 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
712 mac->macmask, duplicate_mode);
713 if (status != VXGE_HW_OK) {
714 vxge_debug_init(VXGE_ERR,
715 "DA config add entry failed for vpath:%d",
716 vpath->device_id);
717 } else
718 if (FALSE == vxge_mac_list_add(vpath, mac))
719 status = -EPERM;
720
721 return status;
722}
723
724static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
725{
726 struct macInfo mac_info;
727 u8 *mac_address = NULL;
728 u64 mac_addr = 0, vpath_vector = 0;
729 int vpath_idx = 0;
730 enum vxge_hw_status status = VXGE_HW_OK;
731 struct vxge_vpath *vpath = NULL;
732
733 mac_address = (u8 *)&mac_addr;
734 memcpy(mac_address, mac_header, ETH_ALEN);
735
736
737 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
738 vpath = &vdev->vpaths[vpath_idx];
739 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
740 return vpath_idx;
741 }
742
743 memset(&mac_info, 0, sizeof(struct macInfo));
744 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
745
746
747 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
748 vpath = &vdev->vpaths[vpath_idx];
749 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
750
751 mac_info.vpath_no = vpath_idx;
752 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
753 status = vxge_add_mac_addr(vdev, &mac_info);
754 if (status != VXGE_HW_OK)
755 return -EPERM;
756 return vpath_idx;
757 }
758 }
759
760 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
761 vpath_idx = 0;
762 mac_info.vpath_no = vpath_idx;
763
764 vpath = &vdev->vpaths[vpath_idx];
765 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
766
767 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
768 return -EPERM;
769 return vpath_idx;
770 }
771
772
773 vpath_vector = vxge_mBIT(vpath->device_id);
774 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
775 vxge_hw_mgmt_reg_type_mrpcim,
776 0,
777 (ulong)offsetof(
778 struct vxge_hw_mrpcim_reg,
779 rts_mgr_cbasin_cfg),
780 vpath_vector);
781 if (status != VXGE_HW_OK) {
782 vxge_debug_tx(VXGE_ERR,
783 "%s: Unable to set the vpath-%d in catch-basin mode",
784 VXGE_DRIVER_NAME, vpath->device_id);
785 return -EPERM;
786 }
787
788 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
789 return -EPERM;
790
791 return vpath_idx;
792}
793
794
795
796
797
798
799
800
801
802static netdev_tx_t
803vxge_xmit(struct sk_buff *skb, struct net_device *dev)
804{
805 struct vxge_fifo *fifo = NULL;
806 void *dtr_priv;
807 void *dtr = NULL;
808 struct vxgedev *vdev = NULL;
809 enum vxge_hw_status status;
810 int frg_cnt, first_frg_len;
811 skb_frag_t *frag;
812 int i = 0, j = 0, avail;
813 u64 dma_pointer;
814 struct vxge_tx_priv *txdl_priv = NULL;
815 struct __vxge_hw_fifo *fifo_hw;
816 int offload_type;
817 int vpath_no = 0;
818
819 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
820 dev->name, __func__, __LINE__);
821
822
823 if (unlikely(skb->len <= 0)) {
824 vxge_debug_tx(VXGE_ERR,
825 "%s: Buffer has no data..", dev->name);
826 dev_kfree_skb_any(skb);
827 return NETDEV_TX_OK;
828 }
829
830 vdev = netdev_priv(dev);
831
832 if (unlikely(!is_vxge_card_up(vdev))) {
833 vxge_debug_tx(VXGE_ERR,
834 "%s: vdev not initialized", dev->name);
835 dev_kfree_skb_any(skb);
836 return NETDEV_TX_OK;
837 }
838
839 if (vdev->config.addr_learn_en) {
840 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
841 if (vpath_no == -EPERM) {
842 vxge_debug_tx(VXGE_ERR,
843 "%s: Failed to store the mac address",
844 dev->name);
845 dev_kfree_skb_any(skb);
846 return NETDEV_TX_OK;
847 }
848 }
849
850 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
851 vpath_no = skb_get_queue_mapping(skb);
852 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
853 vpath_no = vxge_get_vpath_no(vdev, skb);
854
855 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
856
857 if (vpath_no >= vdev->no_of_vpath)
858 vpath_no = 0;
859
860 fifo = &vdev->vpaths[vpath_no].fifo;
861 fifo_hw = fifo->handle;
862
863 if (netif_tx_queue_stopped(fifo->txq))
864 return NETDEV_TX_BUSY;
865
866 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
867 if (avail == 0) {
868 vxge_debug_tx(VXGE_ERR,
869 "%s: No free TXDs available", dev->name);
870 fifo->stats.txd_not_free++;
871 goto _exit0;
872 }
873
874
875
876
877 if (avail == 1)
878 netif_tx_stop_queue(fifo->txq);
879
880 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
881 if (unlikely(status != VXGE_HW_OK)) {
882 vxge_debug_tx(VXGE_ERR,
883 "%s: Out of descriptors .", dev->name);
884 fifo->stats.txd_out_of_desc++;
885 goto _exit0;
886 }
887
888 vxge_debug_tx(VXGE_TRACE,
889 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
890 dev->name, __func__, __LINE__,
891 fifo_hw, dtr, dtr_priv);
892
893 if (skb_vlan_tag_present(skb)) {
894 u16 vlan_tag = skb_vlan_tag_get(skb);
895 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
896 }
897
898 first_frg_len = skb_headlen(skb);
899
900 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
901 PCI_DMA_TODEVICE);
902
903 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
904 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
905 fifo->stats.pci_map_fail++;
906 goto _exit0;
907 }
908
909 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
910 txdl_priv->skb = skb;
911 txdl_priv->dma_buffers[j] = dma_pointer;
912
913 frg_cnt = skb_shinfo(skb)->nr_frags;
914 vxge_debug_tx(VXGE_TRACE,
915 "%s: %s:%d skb = %p txdl_priv = %p "
916 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
917 __func__, __LINE__, skb, txdl_priv,
918 frg_cnt, (unsigned long long)dma_pointer);
919
920 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
921 first_frg_len);
922
923 frag = &skb_shinfo(skb)->frags[0];
924 for (i = 0; i < frg_cnt; i++) {
925
926 if (!skb_frag_size(frag))
927 continue;
928
929 dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
930 0, skb_frag_size(frag),
931 DMA_TO_DEVICE);
932
933 if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
934 goto _exit2;
935 vxge_debug_tx(VXGE_TRACE,
936 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
937 dev->name, __func__, __LINE__, i,
938 (unsigned long long)dma_pointer);
939
940 txdl_priv->dma_buffers[j] = dma_pointer;
941 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
942 skb_frag_size(frag));
943 frag += 1;
944 }
945
946 offload_type = vxge_offload_type(skb);
947
948 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
949 int mss = vxge_tcp_mss(skb);
950 if (mss) {
951 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
952 dev->name, __func__, __LINE__, mss);
953 vxge_hw_fifo_txdl_mss_set(dtr, mss);
954 } else {
955 vxge_assert(skb->len <=
956 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
957 vxge_assert(0);
958 goto _exit1;
959 }
960 }
961
962 if (skb->ip_summed == CHECKSUM_PARTIAL)
963 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
964 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
965 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
966 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
967
968 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
969
970 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
971 dev->name, __func__, __LINE__);
972 return NETDEV_TX_OK;
973
974_exit2:
975 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
976_exit1:
977 j = 0;
978 frag = &skb_shinfo(skb)->frags[0];
979
980 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
981 skb_headlen(skb), PCI_DMA_TODEVICE);
982
983 for (; j < i; j++) {
984 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
985 skb_frag_size(frag), PCI_DMA_TODEVICE);
986 frag += 1;
987 }
988
989 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
990_exit0:
991 netif_tx_stop_queue(fifo->txq);
992 dev_kfree_skb_any(skb);
993
994 return NETDEV_TX_OK;
995}
996
997
998
999
1000
1001
1002
1003static void
1004vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1005{
1006 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1007 struct vxge_rx_priv *rx_priv =
1008 vxge_hw_ring_rxd_private_get(dtrh);
1009
1010 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1011 ring->ndev->name, __func__, __LINE__);
1012 if (state != VXGE_HW_RXD_STATE_POSTED)
1013 return;
1014
1015 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1016 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1017
1018 dev_kfree_skb(rx_priv->skb);
1019 rx_priv->skb_data = NULL;
1020
1021 vxge_debug_entryexit(VXGE_TRACE,
1022 "%s: %s:%d Exiting...",
1023 ring->ndev->name, __func__, __LINE__);
1024}
1025
1026
1027
1028
1029
1030
1031static void
1032vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1033{
1034 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1035 skb_frag_t *frag;
1036 int i = 0, j, frg_cnt;
1037 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1038 struct sk_buff *skb = txd_priv->skb;
1039
1040 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1041
1042 if (state != VXGE_HW_TXDL_STATE_POSTED)
1043 return;
1044
1045
1046 vxge_assert(skb);
1047 frg_cnt = skb_shinfo(skb)->nr_frags;
1048 frag = &skb_shinfo(skb)->frags[0];
1049
1050
1051 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1052 skb_headlen(skb), PCI_DMA_TODEVICE);
1053
1054 for (j = 0; j < frg_cnt; j++) {
1055 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
1056 skb_frag_size(frag), PCI_DMA_TODEVICE);
1057 frag += 1;
1058 }
1059
1060 dev_kfree_skb(skb);
1061
1062 vxge_debug_entryexit(VXGE_TRACE,
1063 "%s:%d Exiting...", __func__, __LINE__);
1064}
1065
1066static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1067{
1068 struct list_head *entry, *next;
1069 u64 del_mac = 0;
1070 u8 *mac_address = (u8 *) (&del_mac);
1071
1072
1073 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1074
1075 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1076 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1077 list_del(entry);
1078 kfree((struct vxge_mac_addrs *)entry);
1079 vpath->mac_addr_cnt--;
1080
1081 if (is_multicast_ether_addr(mac->macaddr))
1082 vpath->mcast_addr_cnt--;
1083 return TRUE;
1084 }
1085 }
1086
1087 return FALSE;
1088}
1089
1090
1091static enum vxge_hw_status
1092vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1093{
1094 enum vxge_hw_status status = VXGE_HW_OK;
1095 struct vxge_vpath *vpath;
1096
1097 vpath = &vdev->vpaths[mac->vpath_no];
1098 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1099 mac->macmask);
1100 if (status != VXGE_HW_OK) {
1101 vxge_debug_init(VXGE_ERR,
1102 "DA config delete entry failed for vpath:%d",
1103 vpath->device_id);
1104 } else
1105 vxge_mac_list_del(vpath, mac);
1106 return status;
1107}
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120static void vxge_set_multicast(struct net_device *dev)
1121{
1122 struct netdev_hw_addr *ha;
1123 struct vxgedev *vdev;
1124 int i, mcast_cnt = 0;
1125 struct __vxge_hw_device *hldev;
1126 struct vxge_vpath *vpath;
1127 enum vxge_hw_status status = VXGE_HW_OK;
1128 struct macInfo mac_info;
1129 int vpath_idx = 0;
1130 struct vxge_mac_addrs *mac_entry;
1131 struct list_head *list_head;
1132 struct list_head *entry, *next;
1133 u8 *mac_address = NULL;
1134
1135 vxge_debug_entryexit(VXGE_TRACE,
1136 "%s:%d", __func__, __LINE__);
1137
1138 vdev = netdev_priv(dev);
1139 hldev = vdev->devh;
1140
1141 if (unlikely(!is_vxge_card_up(vdev)))
1142 return;
1143
1144 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1145 for (i = 0; i < vdev->no_of_vpath; i++) {
1146 vpath = &vdev->vpaths[i];
1147 vxge_assert(vpath->is_open);
1148 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1149 if (status != VXGE_HW_OK)
1150 vxge_debug_init(VXGE_ERR, "failed to enable "
1151 "multicast, status %d", status);
1152 vdev->all_multi_flg = 1;
1153 }
1154 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
1155 for (i = 0; i < vdev->no_of_vpath; i++) {
1156 vpath = &vdev->vpaths[i];
1157 vxge_assert(vpath->is_open);
1158 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1159 if (status != VXGE_HW_OK)
1160 vxge_debug_init(VXGE_ERR, "failed to disable "
1161 "multicast, status %d", status);
1162 vdev->all_multi_flg = 0;
1163 }
1164 }
1165
1166
1167 if (!vdev->config.addr_learn_en) {
1168 for (i = 0; i < vdev->no_of_vpath; i++) {
1169 vpath = &vdev->vpaths[i];
1170 vxge_assert(vpath->is_open);
1171
1172 if (dev->flags & IFF_PROMISC)
1173 status = vxge_hw_vpath_promisc_enable(
1174 vpath->handle);
1175 else
1176 status = vxge_hw_vpath_promisc_disable(
1177 vpath->handle);
1178 if (status != VXGE_HW_OK)
1179 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1180 ", status %d", dev->flags&IFF_PROMISC ?
1181 "enable" : "disable", status);
1182 }
1183 }
1184
1185 memset(&mac_info, 0, sizeof(struct macInfo));
1186
1187 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
1188 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1189 list_head = &vdev->vpaths[0].mac_addr_list;
1190 if ((netdev_mc_count(dev) +
1191 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1192 vdev->vpaths[0].max_mac_addr_cnt)
1193 goto _set_all_mcast;
1194
1195
1196 for (i = 0; i < mcast_cnt; i++) {
1197 list_for_each_safe(entry, next, list_head) {
1198 mac_entry = (struct vxge_mac_addrs *)entry;
1199
1200 mac_address = (u8 *)&mac_entry->macaddr;
1201 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1202
1203 if (is_multicast_ether_addr(mac_info.macaddr)) {
1204 for (vpath_idx = 0; vpath_idx <
1205 vdev->no_of_vpath;
1206 vpath_idx++) {
1207 mac_info.vpath_no = vpath_idx;
1208 status = vxge_del_mac_addr(
1209 vdev,
1210 &mac_info);
1211 }
1212 }
1213 }
1214 }
1215
1216
1217 netdev_for_each_mc_addr(ha, dev) {
1218 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
1219 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1220 vpath_idx++) {
1221 mac_info.vpath_no = vpath_idx;
1222 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1223 status = vxge_add_mac_addr(vdev, &mac_info);
1224 if (status != VXGE_HW_OK) {
1225 vxge_debug_init(VXGE_ERR,
1226 "%s:%d Setting individual"
1227 "multicast address failed",
1228 __func__, __LINE__);
1229 goto _set_all_mcast;
1230 }
1231 }
1232 }
1233
1234 return;
1235_set_all_mcast:
1236 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1237
1238 for (i = 0; i < mcast_cnt; i++) {
1239 list_for_each_safe(entry, next, list_head) {
1240 mac_entry = (struct vxge_mac_addrs *)entry;
1241
1242 mac_address = (u8 *)&mac_entry->macaddr;
1243 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1244
1245 if (is_multicast_ether_addr(mac_info.macaddr))
1246 break;
1247 }
1248
1249 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1250 vpath_idx++) {
1251 mac_info.vpath_no = vpath_idx;
1252 status = vxge_del_mac_addr(vdev, &mac_info);
1253 }
1254 }
1255
1256
1257 for (i = 0; i < vdev->no_of_vpath; i++) {
1258 vpath = &vdev->vpaths[i];
1259 vxge_assert(vpath->is_open);
1260
1261 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1262 if (status != VXGE_HW_OK) {
1263 vxge_debug_init(VXGE_ERR,
1264 "%s:%d Enabling all multicasts failed",
1265 __func__, __LINE__);
1266 }
1267 vdev->all_multi_flg = 1;
1268 }
1269 dev->flags |= IFF_ALLMULTI;
1270 }
1271
1272 vxge_debug_entryexit(VXGE_TRACE,
1273 "%s:%d Exiting...", __func__, __LINE__);
1274}
1275
1276
1277
1278
1279
1280
1281
1282static int vxge_set_mac_addr(struct net_device *dev, void *p)
1283{
1284 struct sockaddr *addr = p;
1285 struct vxgedev *vdev;
1286 struct __vxge_hw_device *hldev;
1287 enum vxge_hw_status status = VXGE_HW_OK;
1288 struct macInfo mac_info_new, mac_info_old;
1289 int vpath_idx = 0;
1290
1291 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1292
1293 vdev = netdev_priv(dev);
1294 hldev = vdev->devh;
1295
1296 if (!is_valid_ether_addr(addr->sa_data))
1297 return -EINVAL;
1298
1299 memset(&mac_info_new, 0, sizeof(struct macInfo));
1300 memset(&mac_info_old, 0, sizeof(struct macInfo));
1301
1302 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1303 __func__, __LINE__);
1304
1305
1306 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1307
1308
1309 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1310
1311
1312
1313 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1314 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1315 if (!vpath->is_open) {
1316
1317
1318
1319 vxge_mac_list_del(vpath, &mac_info_old);
1320
1321
1322
1323 vxge_mac_list_add(vpath, &mac_info_new);
1324
1325 continue;
1326 }
1327
1328 mac_info_old.vpath_no = vpath_idx;
1329 status = vxge_del_mac_addr(vdev, &mac_info_old);
1330 }
1331
1332 if (unlikely(!is_vxge_card_up(vdev))) {
1333 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1334 return VXGE_HW_OK;
1335 }
1336
1337
1338 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1339 mac_info_new.vpath_no = vpath_idx;
1340 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1341 status = vxge_add_mac_addr(vdev, &mac_info_new);
1342 if (status != VXGE_HW_OK)
1343 return -EINVAL;
1344 }
1345
1346 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1347
1348 return status;
1349}
1350
1351
1352
1353
1354
1355
1356
1357
1358static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
1359{
1360 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1361 int msix_id = 0;
1362 int tim_msix_id[4] = {0, 1, 0, 0};
1363 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
1364
1365 vxge_hw_vpath_intr_enable(vpath->handle);
1366
1367 if (vdev->config.intr_type == INTA)
1368 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1369 else {
1370 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1371 alarm_msix_id);
1372
1373 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1374 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1375 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1376
1377
1378 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1379 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1380 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1381 }
1382}
1383
1384
1385
1386
1387
1388
1389
1390
1391static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
1392{
1393 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1394 struct __vxge_hw_device *hldev;
1395 int msix_id;
1396
1397 hldev = pci_get_drvdata(vdev->pdev);
1398
1399 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1400
1401 vxge_hw_vpath_intr_disable(vpath->handle);
1402
1403 if (vdev->config.intr_type == INTA)
1404 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1405 else {
1406 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
1407 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1408 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1409
1410
1411 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1412 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
1413 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1414 }
1415}
1416
1417
1418static enum vxge_hw_status
1419vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1420{
1421 enum vxge_hw_status status = VXGE_HW_OK;
1422 unsigned char macmask[ETH_ALEN];
1423 unsigned char macaddr[ETH_ALEN];
1424
1425 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1426 macaddr, macmask);
1427 if (status != VXGE_HW_OK) {
1428 vxge_debug_init(VXGE_ERR,
1429 "DA config list entry failed for vpath:%d",
1430 vpath->device_id);
1431 return status;
1432 }
1433
1434 while (!ether_addr_equal(mac->macaddr, macaddr)) {
1435 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1436 macaddr, macmask);
1437 if (status != VXGE_HW_OK)
1438 break;
1439 }
1440
1441 return status;
1442}
1443
1444
1445static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1446{
1447 enum vxge_hw_status status = VXGE_HW_OK;
1448 struct macInfo mac_info;
1449 u8 *mac_address = NULL;
1450 struct list_head *entry, *next;
1451
1452 memset(&mac_info, 0, sizeof(struct macInfo));
1453
1454 if (vpath->is_open) {
1455 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1456 mac_address =
1457 (u8 *)&
1458 ((struct vxge_mac_addrs *)entry)->macaddr;
1459 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1460 ((struct vxge_mac_addrs *)entry)->state =
1461 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1462
1463 status = vxge_search_mac_addr_in_da_table(vpath,
1464 &mac_info);
1465 if (status != VXGE_HW_OK) {
1466
1467 status = vxge_hw_vpath_mac_addr_add(
1468 vpath->handle, mac_info.macaddr,
1469 mac_info.macmask,
1470 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1471 if (status != VXGE_HW_OK) {
1472 vxge_debug_init(VXGE_ERR,
1473 "DA add entry failed for vpath:%d",
1474 vpath->device_id);
1475 ((struct vxge_mac_addrs *)entry)->state
1476 = VXGE_LL_MAC_ADDR_IN_LIST;
1477 }
1478 }
1479 }
1480 }
1481
1482 return status;
1483}
1484
1485
1486static enum vxge_hw_status
1487vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1488{
1489 enum vxge_hw_status status = VXGE_HW_OK;
1490 struct vxgedev *vdev = vpath->vdev;
1491 u16 vid;
1492
1493 if (!vpath->is_open)
1494 return status;
1495
1496 for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1497 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
1498
1499 return status;
1500}
1501
1502
1503
1504
1505
1506
1507
1508
1509static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1510{
1511 enum vxge_hw_status status = VXGE_HW_OK;
1512 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
1513 int ret = 0;
1514
1515
1516 if (unlikely(!is_vxge_card_up(vdev)))
1517 return 0;
1518
1519
1520 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1521 return 0;
1522
1523 if (vpath->handle) {
1524 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1525 if (is_vxge_card_up(vdev) &&
1526 vxge_hw_vpath_recover_from_reset(vpath->handle)
1527 != VXGE_HW_OK) {
1528 vxge_debug_init(VXGE_ERR,
1529 "vxge_hw_vpath_recover_from_reset"
1530 "failed for vpath:%d", vp_id);
1531 return status;
1532 }
1533 } else {
1534 vxge_debug_init(VXGE_ERR,
1535 "vxge_hw_vpath_reset failed for"
1536 "vpath:%d", vp_id);
1537 return status;
1538 }
1539 } else
1540 return VXGE_HW_FAIL;
1541
1542 vxge_restore_vpath_mac_addr(vpath);
1543 vxge_restore_vpath_vid_table(vpath);
1544
1545
1546 vxge_hw_vpath_bcast_enable(vpath->handle);
1547
1548
1549 if (vdev->all_multi_flg) {
1550 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1551 if (status != VXGE_HW_OK)
1552 vxge_debug_init(VXGE_ERR,
1553 "%s:%d Enabling multicast failed",
1554 __func__, __LINE__);
1555 }
1556
1557
1558 vxge_vpath_intr_enable(vdev, vp_id);
1559
1560 smp_wmb();
1561
1562
1563 vxge_hw_vpath_enable(vpath->handle);
1564
1565 smp_wmb();
1566 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1567 vpath->ring.last_status = VXGE_HW_OK;
1568
1569
1570 clear_bit(vp_id, &vdev->vp_reset);
1571
1572
1573 if (netif_tx_queue_stopped(vpath->fifo.txq))
1574 netif_tx_wake_queue(vpath->fifo.txq);
1575
1576 return ret;
1577}
1578
1579
1580static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1581{
1582 int i = 0;
1583
1584
1585 if (vdev->config.intr_type == MSI_X) {
1586 for (i = 0; i < vdev->no_of_vpath; i++) {
1587 struct __vxge_hw_ring *hw_ring;
1588
1589 hw_ring = vdev->vpaths[i].ring.handle;
1590 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1591 }
1592 }
1593
1594
1595 for (i = 0; i < vdev->no_of_vpath; i++) {
1596 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1597 vxge_hw_vpath_tti_ci_set(hw_fifo);
1598
1599
1600
1601
1602 if ((vdev->config.intr_type == INTA) && (i == 0))
1603 break;
1604 }
1605
1606 return;
1607}
1608
1609static int do_vxge_reset(struct vxgedev *vdev, int event)
1610{
1611 enum vxge_hw_status status;
1612 int ret = 0, vp_id, i;
1613
1614 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1615
1616 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1617
1618 if (unlikely(!is_vxge_card_up(vdev)))
1619 return 0;
1620
1621
1622 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1623 return 0;
1624 }
1625
1626 if (event == VXGE_LL_FULL_RESET) {
1627 netif_carrier_off(vdev->ndev);
1628
1629
1630 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1631 while (test_bit(vp_id, &vdev->vp_reset))
1632 msleep(50);
1633 }
1634
1635 netif_carrier_on(vdev->ndev);
1636
1637
1638 if (unlikely(vdev->exec_mode)) {
1639 vxge_debug_init(VXGE_ERR,
1640 "%s: execution mode is debug, returning..",
1641 vdev->ndev->name);
1642 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1643 netif_tx_stop_all_queues(vdev->ndev);
1644 return 0;
1645 }
1646 }
1647
1648 if (event == VXGE_LL_FULL_RESET) {
1649 vxge_hw_device_wait_receive_idle(vdev->devh);
1650 vxge_hw_device_intr_disable(vdev->devh);
1651
1652 switch (vdev->cric_err_event) {
1653 case VXGE_HW_EVENT_UNKNOWN:
1654 netif_tx_stop_all_queues(vdev->ndev);
1655 vxge_debug_init(VXGE_ERR,
1656 "fatal: %s: Disabling device due to"
1657 "unknown error",
1658 vdev->ndev->name);
1659 ret = -EPERM;
1660 goto out;
1661 case VXGE_HW_EVENT_RESET_START:
1662 break;
1663 case VXGE_HW_EVENT_RESET_COMPLETE:
1664 case VXGE_HW_EVENT_LINK_DOWN:
1665 case VXGE_HW_EVENT_LINK_UP:
1666 case VXGE_HW_EVENT_ALARM_CLEARED:
1667 case VXGE_HW_EVENT_ECCERR:
1668 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1669 ret = -EPERM;
1670 goto out;
1671 case VXGE_HW_EVENT_FIFO_ERR:
1672 case VXGE_HW_EVENT_VPATH_ERR:
1673 break;
1674 case VXGE_HW_EVENT_CRITICAL_ERR:
1675 netif_tx_stop_all_queues(vdev->ndev);
1676 vxge_debug_init(VXGE_ERR,
1677 "fatal: %s: Disabling device due to"
1678 "serious error",
1679 vdev->ndev->name);
1680
1681
1682 ret = -EPERM;
1683 goto out;
1684 case VXGE_HW_EVENT_SERR:
1685 netif_tx_stop_all_queues(vdev->ndev);
1686 vxge_debug_init(VXGE_ERR,
1687 "fatal: %s: Disabling device due to"
1688 "serious error",
1689 vdev->ndev->name);
1690 ret = -EPERM;
1691 goto out;
1692 case VXGE_HW_EVENT_SRPCIM_SERR:
1693 case VXGE_HW_EVENT_MRPCIM_SERR:
1694 ret = -EPERM;
1695 goto out;
1696 case VXGE_HW_EVENT_SLOT_FREEZE:
1697 netif_tx_stop_all_queues(vdev->ndev);
1698 vxge_debug_init(VXGE_ERR,
1699 "fatal: %s: Disabling device due to"
1700 "slot freeze",
1701 vdev->ndev->name);
1702 ret = -EPERM;
1703 goto out;
1704 default:
1705 break;
1706
1707 }
1708 }
1709
1710 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
1711 netif_tx_stop_all_queues(vdev->ndev);
1712
1713 if (event == VXGE_LL_FULL_RESET) {
1714 status = vxge_reset_all_vpaths(vdev);
1715 if (status != VXGE_HW_OK) {
1716 vxge_debug_init(VXGE_ERR,
1717 "fatal: %s: can not reset vpaths",
1718 vdev->ndev->name);
1719 ret = -EPERM;
1720 goto out;
1721 }
1722 }
1723
1724 if (event == VXGE_LL_COMPL_RESET) {
1725 for (i = 0; i < vdev->no_of_vpath; i++)
1726 if (vdev->vpaths[i].handle) {
1727 if (vxge_hw_vpath_recover_from_reset(
1728 vdev->vpaths[i].handle)
1729 != VXGE_HW_OK) {
1730 vxge_debug_init(VXGE_ERR,
1731 "vxge_hw_vpath_recover_"
1732 "from_reset failed for vpath: "
1733 "%d", i);
1734 ret = -EPERM;
1735 goto out;
1736 }
1737 } else {
1738 vxge_debug_init(VXGE_ERR,
1739 "vxge_hw_vpath_reset failed for "
1740 "vpath:%d", i);
1741 ret = -EPERM;
1742 goto out;
1743 }
1744 }
1745
1746 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1747
1748 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1749 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1750 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1751 }
1752
1753
1754 for (i = 0; i < vdev->no_of_vpath; i++)
1755 vxge_vpath_intr_enable(vdev, i);
1756
1757 vxge_hw_device_intr_enable(vdev->devh);
1758
1759 smp_wmb();
1760
1761
1762 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1763
1764
1765 for (i = 0; i < vdev->no_of_vpath; i++) {
1766 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1767 smp_wmb();
1768 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1769 }
1770
1771 netif_tx_wake_all_queues(vdev->ndev);
1772 }
1773
1774
1775 vxge_config_ci_for_tti_rti(vdev);
1776
1777out:
1778 vxge_debug_entryexit(VXGE_TRACE,
1779 "%s:%d Exiting...", __func__, __LINE__);
1780
1781
1782 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1783 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1784 return ret;
1785}
1786
1787
1788
1789
1790
1791
1792
1793static void vxge_reset(struct work_struct *work)
1794{
1795 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1796
1797 if (!netif_running(vdev->ndev))
1798 return;
1799
1800 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
1801}
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815static int vxge_poll_msix(struct napi_struct *napi, int budget)
1816{
1817 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1818 int pkts_processed;
1819 int budget_org = budget;
1820
1821 ring->budget = budget;
1822 ring->pkts_processed = 0;
1823 vxge_hw_vpath_poll_rx(ring->handle);
1824 pkts_processed = ring->pkts_processed;
1825
1826 if (pkts_processed < budget_org) {
1827 napi_complete_done(napi, pkts_processed);
1828
1829
1830 vxge_hw_channel_msix_unmask(
1831 (struct __vxge_hw_channel *)ring->handle,
1832 ring->rx_vector_no);
1833 mmiowb();
1834 }
1835
1836
1837
1838
1839 return pkts_processed;
1840}
1841
1842static int vxge_poll_inta(struct napi_struct *napi, int budget)
1843{
1844 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1845 int pkts_processed = 0;
1846 int i;
1847 int budget_org = budget;
1848 struct vxge_ring *ring;
1849
1850 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
1851
1852 for (i = 0; i < vdev->no_of_vpath; i++) {
1853 ring = &vdev->vpaths[i].ring;
1854 ring->budget = budget;
1855 ring->pkts_processed = 0;
1856 vxge_hw_vpath_poll_rx(ring->handle);
1857 pkts_processed += ring->pkts_processed;
1858 budget -= ring->pkts_processed;
1859 if (budget <= 0)
1860 break;
1861 }
1862
1863 VXGE_COMPLETE_ALL_TX(vdev);
1864
1865 if (pkts_processed < budget_org) {
1866 napi_complete_done(napi, pkts_processed);
1867
1868 vxge_hw_device_unmask_all(hldev);
1869 vxge_hw_device_flush_io(hldev);
1870 }
1871
1872 return pkts_processed;
1873}
1874
1875#ifdef CONFIG_NET_POLL_CONTROLLER
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885static void vxge_netpoll(struct net_device *dev)
1886{
1887 struct vxgedev *vdev = netdev_priv(dev);
1888 struct pci_dev *pdev = vdev->pdev;
1889 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1890 const int irq = pdev->irq;
1891
1892 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1893
1894 if (pci_channel_offline(pdev))
1895 return;
1896
1897 disable_irq(irq);
1898 vxge_hw_device_clear_tx_rx(hldev);
1899
1900 vxge_hw_device_clear_tx_rx(hldev);
1901 VXGE_COMPLETE_ALL_RX(vdev);
1902 VXGE_COMPLETE_ALL_TX(vdev);
1903
1904 enable_irq(irq);
1905
1906 vxge_debug_entryexit(VXGE_TRACE,
1907 "%s:%d Exiting...", __func__, __LINE__);
1908}
1909#endif
1910
1911
1912static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1913{
1914 enum vxge_hw_status status = VXGE_HW_OK;
1915 struct vxge_hw_rth_hash_types hash_types;
1916 u8 itable[256] = {0};
1917 u8 mtable[256] = {0};
1918 int index;
1919
1920
1921
1922
1923
1924
1925 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1926 itable[index] = index;
1927 mtable[index] = index % vdev->no_of_vpath;
1928 }
1929
1930
1931 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1932 vdev->no_of_vpath,
1933 mtable, itable,
1934 vdev->config.rth_bkt_sz);
1935 if (status != VXGE_HW_OK) {
1936 vxge_debug_init(VXGE_ERR,
1937 "RTH indirection table configuration failed "
1938 "for vpath:%d", vdev->vpaths[0].device_id);
1939 return status;
1940 }
1941
1942
1943 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1944 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1945 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1946 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1947 hash_types.hash_type_tcpipv6ex_en =
1948 vdev->config.rth_hash_type_tcpipv6ex;
1949 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1950
1951
1952
1953
1954
1955
1956
1957 for (index = 0; index < vdev->no_of_vpath; index++) {
1958 status = vxge_hw_vpath_rts_rth_set(
1959 vdev->vpaths[index].handle,
1960 vdev->config.rth_algorithm,
1961 &hash_types,
1962 vdev->config.rth_bkt_sz);
1963 if (status != VXGE_HW_OK) {
1964 vxge_debug_init(VXGE_ERR,
1965 "RTH configuration failed for vpath:%d",
1966 vdev->vpaths[index].device_id);
1967 return status;
1968 }
1969 }
1970
1971 return status;
1972}
1973
1974
1975static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
1976{
1977 enum vxge_hw_status status = VXGE_HW_OK;
1978 struct vxge_vpath *vpath;
1979 int i;
1980
1981 for (i = 0; i < vdev->no_of_vpath; i++) {
1982 vpath = &vdev->vpaths[i];
1983 if (vpath->handle) {
1984 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
1985 if (is_vxge_card_up(vdev) &&
1986 vxge_hw_vpath_recover_from_reset(
1987 vpath->handle) != VXGE_HW_OK) {
1988 vxge_debug_init(VXGE_ERR,
1989 "vxge_hw_vpath_recover_"
1990 "from_reset failed for vpath: "
1991 "%d", i);
1992 return status;
1993 }
1994 } else {
1995 vxge_debug_init(VXGE_ERR,
1996 "vxge_hw_vpath_reset failed for "
1997 "vpath:%d", i);
1998 return status;
1999 }
2000 }
2001 }
2002
2003 return status;
2004}
2005
2006
2007static void vxge_close_vpaths(struct vxgedev *vdev, int index)
2008{
2009 struct vxge_vpath *vpath;
2010 int i;
2011
2012 for (i = index; i < vdev->no_of_vpath; i++) {
2013 vpath = &vdev->vpaths[i];
2014
2015 if (vpath->handle && vpath->is_open) {
2016 vxge_hw_vpath_close(vpath->handle);
2017 vdev->stats.vpaths_open--;
2018 }
2019 vpath->is_open = 0;
2020 vpath->handle = NULL;
2021 }
2022}
2023
2024
2025static int vxge_open_vpaths(struct vxgedev *vdev)
2026{
2027 struct vxge_hw_vpath_attr attr;
2028 enum vxge_hw_status status;
2029 struct vxge_vpath *vpath;
2030 u32 vp_id = 0;
2031 int i;
2032
2033 for (i = 0; i < vdev->no_of_vpath; i++) {
2034 vpath = &vdev->vpaths[i];
2035 vxge_assert(vpath->is_configured);
2036
2037 if (!vdev->titan1) {
2038 struct vxge_hw_vp_config *vcfg;
2039 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2040
2041 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2042 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2043 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2044 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2045 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2046 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2047 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2048 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2049 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2050 }
2051
2052 attr.vp_id = vpath->device_id;
2053 attr.fifo_attr.callback = vxge_xmit_compl;
2054 attr.fifo_attr.txdl_term = vxge_tx_term;
2055 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
2056 attr.fifo_attr.userdata = &vpath->fifo;
2057
2058 attr.ring_attr.callback = vxge_rx_1b_compl;
2059 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2060 attr.ring_attr.rxd_term = vxge_rx_term;
2061 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
2062 attr.ring_attr.userdata = &vpath->ring;
2063
2064 vpath->ring.ndev = vdev->ndev;
2065 vpath->ring.pdev = vdev->pdev;
2066
2067 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
2068 if (status == VXGE_HW_OK) {
2069 vpath->fifo.handle =
2070 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
2071 vpath->ring.handle =
2072 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
2073 vpath->fifo.tx_steering_type =
2074 vdev->config.tx_steering_type;
2075 vpath->fifo.ndev = vdev->ndev;
2076 vpath->fifo.pdev = vdev->pdev;
2077
2078 u64_stats_init(&vpath->fifo.stats.syncp);
2079 u64_stats_init(&vpath->ring.stats.syncp);
2080
2081 if (vdev->config.tx_steering_type)
2082 vpath->fifo.txq =
2083 netdev_get_tx_queue(vdev->ndev, i);
2084 else
2085 vpath->fifo.txq =
2086 netdev_get_tx_queue(vdev->ndev, 0);
2087 vpath->fifo.indicate_max_pkts =
2088 vdev->config.fifo_indicate_max_pkts;
2089 vpath->fifo.tx_vector_no = 0;
2090 vpath->ring.rx_vector_no = 0;
2091 vpath->ring.rx_hwts = vdev->rx_hwts;
2092 vpath->is_open = 1;
2093 vdev->vp_handles[i] = vpath->handle;
2094 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
2095 vdev->stats.vpaths_open++;
2096 } else {
2097 vdev->stats.vpath_open_fail++;
2098 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2099 "open with status: %d",
2100 vdev->ndev->name, vpath->device_id,
2101 status);
2102 vxge_close_vpaths(vdev, 0);
2103 return -EPERM;
2104 }
2105
2106 vp_id = vpath->handle->vpath->vp_id;
2107 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2108 }
2109
2110 return VXGE_HW_OK;
2111}
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2122{
2123 fifo->interrupt_count++;
2124 if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
2125 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2126
2127 fifo->jiffies = jiffies;
2128 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2129 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2130 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2131 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2132 } else if (hw_fifo->rtimer != 0) {
2133 hw_fifo->rtimer = 0;
2134 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2135 }
2136 fifo->interrupt_count = 0;
2137 }
2138}
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2150{
2151 ring->interrupt_count++;
2152 if (time_before(ring->jiffies + HZ / 100, jiffies)) {
2153 struct __vxge_hw_ring *hw_ring = ring->handle;
2154
2155 ring->jiffies = jiffies;
2156 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2157 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2158 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2159 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2160 } else if (hw_ring->rtimer != 0) {
2161 hw_ring->rtimer = 0;
2162 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2163 }
2164 ring->interrupt_count = 0;
2165 }
2166}
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2179{
2180 struct net_device *dev;
2181 struct __vxge_hw_device *hldev;
2182 u64 reason;
2183 enum vxge_hw_status status;
2184 struct vxgedev *vdev = (struct vxgedev *)dev_id;
2185
2186 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2187
2188 dev = vdev->ndev;
2189 hldev = pci_get_drvdata(vdev->pdev);
2190
2191 if (pci_channel_offline(vdev->pdev))
2192 return IRQ_NONE;
2193
2194 if (unlikely(!is_vxge_card_up(vdev)))
2195 return IRQ_HANDLED;
2196
2197 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
2198 if (status == VXGE_HW_OK) {
2199 vxge_hw_device_mask_all(hldev);
2200
2201 if (reason &
2202 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2203 vdev->vpaths_deployed >>
2204 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2205
2206 vxge_hw_device_clear_tx_rx(hldev);
2207 napi_schedule(&vdev->napi);
2208 vxge_debug_intr(VXGE_TRACE,
2209 "%s:%d Exiting...", __func__, __LINE__);
2210 return IRQ_HANDLED;
2211 } else
2212 vxge_hw_device_unmask_all(hldev);
2213 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2214 (status == VXGE_HW_ERR_CRITICAL) ||
2215 (status == VXGE_HW_ERR_FIFO))) {
2216 vxge_hw_device_mask_all(hldev);
2217 vxge_hw_device_flush_io(hldev);
2218 return IRQ_HANDLED;
2219 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2220 return IRQ_HANDLED;
2221
2222 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2223 return IRQ_NONE;
2224}
2225
2226static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
2227{
2228 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2229
2230 adaptive_coalesce_tx_interrupts(fifo);
2231
2232 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2233 fifo->tx_vector_no);
2234
2235 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2236 fifo->tx_vector_no);
2237
2238 VXGE_COMPLETE_VPATH_TX(fifo);
2239
2240 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2241 fifo->tx_vector_no);
2242
2243 mmiowb();
2244
2245 return IRQ_HANDLED;
2246}
2247
2248static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
2249{
2250 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2251
2252 adaptive_coalesce_rx_interrupts(ring);
2253
2254 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2255 ring->rx_vector_no);
2256
2257 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2258 ring->rx_vector_no);
2259
2260 napi_schedule(&ring->napi);
2261 return IRQ_HANDLED;
2262}
2263
2264static irqreturn_t
2265vxge_alarm_msix_handle(int irq, void *dev_id)
2266{
2267 int i;
2268 enum vxge_hw_status status;
2269 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2270 struct vxgedev *vdev = vpath->vdev;
2271 int msix_id = (vpath->handle->vpath->vp_id *
2272 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2273
2274 for (i = 0; i < vdev->no_of_vpath; i++) {
2275
2276
2277
2278
2279 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
2280 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2281 mmiowb();
2282
2283 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2284 vdev->exec_mode);
2285 if (status == VXGE_HW_OK) {
2286 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
2287 msix_id);
2288 mmiowb();
2289 continue;
2290 }
2291 vxge_debug_intr(VXGE_ERR,
2292 "%s: vxge_hw_vpath_alarm_process failed %x ",
2293 VXGE_DRIVER_NAME, status);
2294 }
2295 return IRQ_HANDLED;
2296}
2297
2298static int vxge_alloc_msix(struct vxgedev *vdev)
2299{
2300 int j, i, ret = 0;
2301 int msix_intr_vect = 0, temp;
2302 vdev->intr_cnt = 0;
2303
2304start:
2305
2306 vdev->intr_cnt = vdev->no_of_vpath * 2;
2307
2308
2309 vdev->intr_cnt++;
2310
2311 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2312 GFP_KERNEL);
2313 if (!vdev->entries) {
2314 vxge_debug_init(VXGE_ERR,
2315 "%s: memory allocation failed",
2316 VXGE_DRIVER_NAME);
2317 ret = -ENOMEM;
2318 goto alloc_entries_failed;
2319 }
2320
2321 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2322 sizeof(struct vxge_msix_entry),
2323 GFP_KERNEL);
2324 if (!vdev->vxge_entries) {
2325 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2326 VXGE_DRIVER_NAME);
2327 ret = -ENOMEM;
2328 goto alloc_vxge_entries_failed;
2329 }
2330
2331 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
2332
2333 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2334
2335
2336 vdev->entries[j].entry = msix_intr_vect;
2337 vdev->vxge_entries[j].entry = msix_intr_vect;
2338 vdev->vxge_entries[j].in_use = 0;
2339 j++;
2340
2341
2342 vdev->entries[j].entry = msix_intr_vect + 1;
2343 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2344 vdev->vxge_entries[j].in_use = 0;
2345 j++;
2346 }
2347
2348
2349 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2350 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
2351 vdev->vxge_entries[j].in_use = 0;
2352
2353 ret = pci_enable_msix_range(vdev->pdev,
2354 vdev->entries, 3, vdev->intr_cnt);
2355 if (ret < 0) {
2356 ret = -ENODEV;
2357 goto enable_msix_failed;
2358 } else if (ret < vdev->intr_cnt) {
2359 pci_disable_msix(vdev->pdev);
2360
2361 vxge_debug_init(VXGE_ERR,
2362 "%s: MSI-X enable failed for %d vectors, ret: %d",
2363 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
2364 if (max_config_vpath != VXGE_USE_DEFAULT) {
2365 ret = -ENODEV;
2366 goto enable_msix_failed;
2367 }
2368
2369 kfree(vdev->entries);
2370 kfree(vdev->vxge_entries);
2371 vdev->entries = NULL;
2372 vdev->vxge_entries = NULL;
2373
2374 temp = (ret - 1)/2;
2375 vxge_close_vpaths(vdev, temp);
2376 vdev->no_of_vpath = temp;
2377 goto start;
2378 }
2379 return 0;
2380
2381enable_msix_failed:
2382 kfree(vdev->vxge_entries);
2383alloc_vxge_entries_failed:
2384 kfree(vdev->entries);
2385alloc_entries_failed:
2386 return ret;
2387}
2388
2389static int vxge_enable_msix(struct vxgedev *vdev)
2390{
2391
2392 int i, ret = 0;
2393
2394 int tim_msix_id[4] = {0, 1, 0, 0};
2395
2396 vdev->intr_cnt = 0;
2397
2398
2399 ret = vxge_alloc_msix(vdev);
2400 if (!ret) {
2401 for (i = 0; i < vdev->no_of_vpath; i++) {
2402 struct vxge_vpath *vpath = &vdev->vpaths[i];
2403
2404
2405
2406
2407 vpath->ring.rx_vector_no = (vpath->device_id *
2408 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
2409
2410 vpath->fifo.tx_vector_no = (vpath->device_id *
2411 VXGE_HW_VPATH_MSIX_ACTIVE);
2412
2413 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2414 VXGE_ALARM_MSIX_ID);
2415 }
2416 }
2417
2418 return ret;
2419}
2420
2421static void vxge_rem_msix_isr(struct vxgedev *vdev)
2422{
2423 int intr_cnt;
2424
2425 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
2426 intr_cnt++) {
2427 if (vdev->vxge_entries[intr_cnt].in_use) {
2428 synchronize_irq(vdev->entries[intr_cnt].vector);
2429 free_irq(vdev->entries[intr_cnt].vector,
2430 vdev->vxge_entries[intr_cnt].arg);
2431 vdev->vxge_entries[intr_cnt].in_use = 0;
2432 }
2433 }
2434
2435 kfree(vdev->entries);
2436 kfree(vdev->vxge_entries);
2437 vdev->entries = NULL;
2438 vdev->vxge_entries = NULL;
2439
2440 if (vdev->config.intr_type == MSI_X)
2441 pci_disable_msix(vdev->pdev);
2442}
2443
2444static void vxge_rem_isr(struct vxgedev *vdev)
2445{
2446 if (IS_ENABLED(CONFIG_PCI_MSI) &&
2447 vdev->config.intr_type == MSI_X) {
2448 vxge_rem_msix_isr(vdev);
2449 } else if (vdev->config.intr_type == INTA) {
2450 synchronize_irq(vdev->pdev->irq);
2451 free_irq(vdev->pdev->irq, vdev);
2452 }
2453}
2454
2455static int vxge_add_isr(struct vxgedev *vdev)
2456{
2457 int ret = 0;
2458 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
2459 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2460
2461 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
2462 ret = vxge_enable_msix(vdev);
2463
2464 if (ret) {
2465 vxge_debug_init(VXGE_ERR,
2466 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
2467 vxge_debug_init(VXGE_ERR,
2468 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2469 vdev->config.intr_type = INTA;
2470 }
2471
2472 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
2473 for (intr_idx = 0;
2474 intr_idx < (vdev->no_of_vpath *
2475 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2476
2477 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2478 irq_req = 0;
2479
2480 switch (msix_idx) {
2481 case 0:
2482 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2483 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2484 vdev->ndev->name,
2485 vdev->entries[intr_cnt].entry,
2486 pci_fun, vp_idx);
2487 ret = request_irq(
2488 vdev->entries[intr_cnt].vector,
2489 vxge_tx_msix_handle, 0,
2490 vdev->desc[intr_cnt],
2491 &vdev->vpaths[vp_idx].fifo);
2492 vdev->vxge_entries[intr_cnt].arg =
2493 &vdev->vpaths[vp_idx].fifo;
2494 irq_req = 1;
2495 break;
2496 case 1:
2497 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2498 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2499 vdev->ndev->name,
2500 vdev->entries[intr_cnt].entry,
2501 pci_fun, vp_idx);
2502 ret = request_irq(
2503 vdev->entries[intr_cnt].vector,
2504 vxge_rx_msix_napi_handle,
2505 0,
2506 vdev->desc[intr_cnt],
2507 &vdev->vpaths[vp_idx].ring);
2508 vdev->vxge_entries[intr_cnt].arg =
2509 &vdev->vpaths[vp_idx].ring;
2510 irq_req = 1;
2511 break;
2512 }
2513
2514 if (ret) {
2515 vxge_debug_init(VXGE_ERR,
2516 "%s: MSIX - %d Registration failed",
2517 vdev->ndev->name, intr_cnt);
2518 vxge_rem_msix_isr(vdev);
2519 vdev->config.intr_type = INTA;
2520 vxge_debug_init(VXGE_ERR,
2521 "%s: Defaulting to INTA"
2522 , vdev->ndev->name);
2523 goto INTA_MODE;
2524 }
2525
2526 if (irq_req) {
2527
2528 vdev->vxge_entries[intr_cnt].in_use = 1;
2529 msix_idx += vdev->vpaths[vp_idx].device_id *
2530 VXGE_HW_VPATH_MSIX_ACTIVE;
2531 vxge_hw_vpath_msix_unmask(
2532 vdev->vpaths[vp_idx].handle,
2533 msix_idx);
2534 intr_cnt++;
2535 }
2536
2537
2538 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2539 (vp_idx < (vdev->no_of_vpath - 1)))
2540 vp_idx++;
2541 }
2542
2543 intr_cnt = vdev->no_of_vpath * 2;
2544 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
2545 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2546 vdev->ndev->name,
2547 vdev->entries[intr_cnt].entry,
2548 pci_fun);
2549
2550 ret = request_irq(vdev->entries[intr_cnt].vector,
2551 vxge_alarm_msix_handle, 0,
2552 vdev->desc[intr_cnt],
2553 &vdev->vpaths[0]);
2554 if (ret) {
2555 vxge_debug_init(VXGE_ERR,
2556 "%s: MSIX - %d Registration failed",
2557 vdev->ndev->name, intr_cnt);
2558 vxge_rem_msix_isr(vdev);
2559 vdev->config.intr_type = INTA;
2560 vxge_debug_init(VXGE_ERR,
2561 "%s: Defaulting to INTA",
2562 vdev->ndev->name);
2563 goto INTA_MODE;
2564 }
2565
2566 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2567 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2568 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
2569 msix_idx);
2570 vdev->vxge_entries[intr_cnt].in_use = 1;
2571 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
2572 }
2573
2574INTA_MODE:
2575 if (vdev->config.intr_type == INTA) {
2576 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2577 "%s:vxge:INTA", vdev->ndev->name);
2578 vxge_hw_device_set_intr_type(vdev->devh,
2579 VXGE_HW_INTR_MODE_IRQLINE);
2580
2581 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2582
2583 ret = request_irq((int) vdev->pdev->irq,
2584 vxge_isr_napi,
2585 IRQF_SHARED, vdev->desc[0], vdev);
2586 if (ret) {
2587 vxge_debug_init(VXGE_ERR,
2588 "%s %s-%d: ISR registration failed",
2589 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2590 return -ENODEV;
2591 }
2592 vxge_debug_init(VXGE_TRACE,
2593 "new %s-%d line allocated",
2594 "IRQ", vdev->pdev->irq);
2595 }
2596
2597 return VXGE_HW_OK;
2598}
2599
2600static void vxge_poll_vp_reset(unsigned long data)
2601{
2602 struct vxgedev *vdev = (struct vxgedev *)data;
2603 int i, j = 0;
2604
2605 for (i = 0; i < vdev->no_of_vpath; i++) {
2606 if (test_bit(i, &vdev->vp_reset)) {
2607 vxge_reset_vpath(vdev, i);
2608 j++;
2609 }
2610 }
2611 if (j && (vdev->config.intr_type != MSI_X)) {
2612 vxge_hw_device_unmask_all(vdev->devh);
2613 vxge_hw_device_flush_io(vdev->devh);
2614 }
2615
2616 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2617}
2618
2619static void vxge_poll_vp_lockup(unsigned long data)
2620{
2621 struct vxgedev *vdev = (struct vxgedev *)data;
2622 enum vxge_hw_status status = VXGE_HW_OK;
2623 struct vxge_vpath *vpath;
2624 struct vxge_ring *ring;
2625 int i;
2626 unsigned long rx_frms;
2627
2628 for (i = 0; i < vdev->no_of_vpath; i++) {
2629 ring = &vdev->vpaths[i].ring;
2630
2631
2632 rx_frms = ACCESS_ONCE(ring->stats.rx_frms);
2633
2634
2635 if (ring->stats.prev_rx_frms == rx_frms) {
2636 status = vxge_hw_vpath_check_leak(ring->handle);
2637
2638
2639 if ((VXGE_HW_FAIL == status) &&
2640 (VXGE_HW_FAIL == ring->last_status)) {
2641
2642
2643 if (!test_and_set_bit(i, &vdev->vp_reset)) {
2644 vpath = &vdev->vpaths[i];
2645
2646
2647 vxge_vpath_intr_disable(vdev, i);
2648
2649
2650 netif_tx_stop_queue(vpath->fifo.txq);
2651 continue;
2652 }
2653 }
2654 }
2655 ring->stats.prev_rx_frms = rx_frms;
2656 ring->last_status = status;
2657 }
2658
2659
2660 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2661}
2662
2663static netdev_features_t vxge_fix_features(struct net_device *dev,
2664 netdev_features_t features)
2665{
2666 netdev_features_t changed = dev->features ^ features;
2667
2668
2669
2670
2671
2672 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2673 features ^= NETIF_F_RXHASH;
2674
2675 return features;
2676}
2677
2678static int vxge_set_features(struct net_device *dev, netdev_features_t features)
2679{
2680 struct vxgedev *vdev = netdev_priv(dev);
2681 netdev_features_t changed = dev->features ^ features;
2682
2683 if (!(changed & NETIF_F_RXHASH))
2684 return 0;
2685
2686
2687
2688 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2689 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2690 dev->features = features ^ NETIF_F_RXHASH;
2691 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2692 return -EIO;
2693 }
2694
2695 return 0;
2696}
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708static int vxge_open(struct net_device *dev)
2709{
2710 enum vxge_hw_status status;
2711 struct vxgedev *vdev;
2712 struct __vxge_hw_device *hldev;
2713 struct vxge_vpath *vpath;
2714 int ret = 0;
2715 int i;
2716 u64 val64, function_mode;
2717
2718 vxge_debug_entryexit(VXGE_TRACE,
2719 "%s: %s:%d", dev->name, __func__, __LINE__);
2720
2721 vdev = netdev_priv(dev);
2722 hldev = pci_get_drvdata(vdev->pdev);
2723 function_mode = vdev->config.device_hw_info.function_mode;
2724
2725
2726
2727 netif_carrier_off(dev);
2728
2729
2730 status = vxge_open_vpaths(vdev);
2731 if (status != VXGE_HW_OK) {
2732 vxge_debug_init(VXGE_ERR,
2733 "%s: fatal: Vpath open failed", vdev->ndev->name);
2734 ret = -EPERM;
2735 goto out0;
2736 }
2737
2738 vdev->mtu = dev->mtu;
2739
2740 status = vxge_add_isr(vdev);
2741 if (status != VXGE_HW_OK) {
2742 vxge_debug_init(VXGE_ERR,
2743 "%s: fatal: ISR add failed", dev->name);
2744 ret = -EPERM;
2745 goto out1;
2746 }
2747
2748 if (vdev->config.intr_type != MSI_X) {
2749 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2750 vdev->config.napi_weight);
2751 napi_enable(&vdev->napi);
2752 for (i = 0; i < vdev->no_of_vpath; i++) {
2753 vpath = &vdev->vpaths[i];
2754 vpath->ring.napi_p = &vdev->napi;
2755 }
2756 } else {
2757 for (i = 0; i < vdev->no_of_vpath; i++) {
2758 vpath = &vdev->vpaths[i];
2759 netif_napi_add(dev, &vpath->ring.napi,
2760 vxge_poll_msix, vdev->config.napi_weight);
2761 napi_enable(&vpath->ring.napi);
2762 vpath->ring.napi_p = &vpath->ring.napi;
2763 }
2764 }
2765
2766
2767 if (vdev->config.rth_steering) {
2768 status = vxge_rth_configure(vdev);
2769 if (status != VXGE_HW_OK) {
2770 vxge_debug_init(VXGE_ERR,
2771 "%s: fatal: RTH configuration failed",
2772 dev->name);
2773 ret = -EPERM;
2774 goto out2;
2775 }
2776 }
2777 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2778 hldev->config.rth_en ? "enabled" : "disabled");
2779
2780 for (i = 0; i < vdev->no_of_vpath; i++) {
2781 vpath = &vdev->vpaths[i];
2782
2783
2784 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
2785 if (status != VXGE_HW_OK) {
2786 vxge_debug_init(VXGE_ERR,
2787 "%s: fatal: can not set new MTU", dev->name);
2788 ret = -EPERM;
2789 goto out2;
2790 }
2791 }
2792
2793 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2794 vxge_debug_init(vdev->level_trace,
2795 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2796 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2797
2798
2799
2800
2801 if (vdev->all_multi_flg) {
2802 for (i = 0; i < vdev->no_of_vpath; i++) {
2803 vpath = &vdev->vpaths[i];
2804 vxge_restore_vpath_mac_addr(vpath);
2805 vxge_restore_vpath_vid_table(vpath);
2806
2807 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2808 if (status != VXGE_HW_OK)
2809 vxge_debug_init(VXGE_ERR,
2810 "%s:%d Enabling multicast failed",
2811 __func__, __LINE__);
2812 }
2813 }
2814
2815
2816
2817
2818
2819 val64 = 0;
2820 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2821 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2822
2823 vxge_hw_mgmt_reg_write(vdev->devh,
2824 vxge_hw_mgmt_reg_type_mrpcim,
2825 0,
2826 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2827 rxmac_authorize_all_addr),
2828 val64);
2829
2830 vxge_hw_mgmt_reg_write(vdev->devh,
2831 vxge_hw_mgmt_reg_type_mrpcim,
2832 0,
2833 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2834 rxmac_authorize_all_vid),
2835 val64);
2836
2837 vxge_set_multicast(dev);
2838
2839
2840 for (i = 0; i < vdev->no_of_vpath; i++) {
2841 vpath = &vdev->vpaths[i];
2842 status = vxge_hw_vpath_bcast_enable(vpath->handle);
2843 if (status != VXGE_HW_OK)
2844 vxge_debug_init(VXGE_ERR,
2845 "%s : Can not enable bcast for vpath "
2846 "id %d", dev->name, i);
2847 if (vdev->config.addr_learn_en) {
2848 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2849 if (status != VXGE_HW_OK)
2850 vxge_debug_init(VXGE_ERR,
2851 "%s : Can not enable mcast for vpath "
2852 "id %d", dev->name, i);
2853 }
2854 }
2855
2856 vxge_hw_device_setpause_data(vdev->devh, 0,
2857 vdev->config.tx_pause_enable,
2858 vdev->config.rx_pause_enable);
2859
2860 if (vdev->vp_reset_timer.function == NULL)
2861 vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset, vdev,
2862 HZ / 2);
2863
2864
2865 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2866 vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2867 HZ / 2);
2868
2869 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2870
2871 smp_wmb();
2872
2873 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2874 netif_carrier_on(vdev->ndev);
2875 netdev_notice(vdev->ndev, "Link Up\n");
2876 vdev->stats.link_up++;
2877 }
2878
2879 vxge_hw_device_intr_enable(vdev->devh);
2880
2881 smp_wmb();
2882
2883 for (i = 0; i < vdev->no_of_vpath; i++) {
2884 vpath = &vdev->vpaths[i];
2885
2886 vxge_hw_vpath_enable(vpath->handle);
2887 smp_wmb();
2888 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
2889 }
2890
2891 netif_tx_start_all_queues(vdev->ndev);
2892
2893
2894 vxge_config_ci_for_tti_rti(vdev);
2895
2896 goto out0;
2897
2898out2:
2899 vxge_rem_isr(vdev);
2900
2901
2902 if (vdev->config.intr_type != MSI_X)
2903 napi_disable(&vdev->napi);
2904 else {
2905 for (i = 0; i < vdev->no_of_vpath; i++)
2906 napi_disable(&vdev->vpaths[i].ring.napi);
2907 }
2908
2909out1:
2910 vxge_close_vpaths(vdev, 0);
2911out0:
2912 vxge_debug_entryexit(VXGE_TRACE,
2913 "%s: %s:%d Exiting...",
2914 dev->name, __func__, __LINE__);
2915 return ret;
2916}
2917
2918
2919static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
2920{
2921
2922 struct list_head *entry, *next;
2923 if (list_empty(&vpath->mac_addr_list))
2924 return;
2925
2926 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2927 list_del(entry);
2928 kfree((struct vxge_mac_addrs *)entry);
2929 }
2930}
2931
2932static void vxge_napi_del_all(struct vxgedev *vdev)
2933{
2934 int i;
2935 if (vdev->config.intr_type != MSI_X)
2936 netif_napi_del(&vdev->napi);
2937 else {
2938 for (i = 0; i < vdev->no_of_vpath; i++)
2939 netif_napi_del(&vdev->vpaths[i].ring.napi);
2940 }
2941}
2942
2943static int do_vxge_close(struct net_device *dev, int do_io)
2944{
2945 enum vxge_hw_status status;
2946 struct vxgedev *vdev;
2947 struct __vxge_hw_device *hldev;
2948 int i;
2949 u64 val64, vpath_vector;
2950 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2951 dev->name, __func__, __LINE__);
2952
2953 vdev = netdev_priv(dev);
2954 hldev = pci_get_drvdata(vdev->pdev);
2955
2956 if (unlikely(!is_vxge_card_up(vdev)))
2957 return 0;
2958
2959
2960
2961 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2962 msleep(50);
2963
2964 if (do_io) {
2965
2966 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2967 status = vxge_hw_mgmt_reg_read(vdev->devh,
2968 vxge_hw_mgmt_reg_type_mrpcim,
2969 0,
2970 (ulong)offsetof(
2971 struct vxge_hw_mrpcim_reg,
2972 rts_mgr_cbasin_cfg),
2973 &val64);
2974 if (status == VXGE_HW_OK) {
2975 val64 &= ~vpath_vector;
2976 status = vxge_hw_mgmt_reg_write(vdev->devh,
2977 vxge_hw_mgmt_reg_type_mrpcim,
2978 0,
2979 (ulong)offsetof(
2980 struct vxge_hw_mrpcim_reg,
2981 rts_mgr_cbasin_cfg),
2982 val64);
2983 }
2984
2985
2986 vxge_hw_mgmt_reg_write(vdev->devh,
2987 vxge_hw_mgmt_reg_type_mrpcim,
2988 0,
2989 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2990 rxmac_authorize_all_addr),
2991 0);
2992
2993 vxge_hw_mgmt_reg_write(vdev->devh,
2994 vxge_hw_mgmt_reg_type_mrpcim,
2995 0,
2996 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2997 rxmac_authorize_all_vid),
2998 0);
2999
3000 smp_wmb();
3001 }
3002
3003 if (vdev->titan1)
3004 del_timer_sync(&vdev->vp_lockup_timer);
3005
3006 del_timer_sync(&vdev->vp_reset_timer);
3007
3008 if (do_io)
3009 vxge_hw_device_wait_receive_idle(hldev);
3010
3011 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3012
3013
3014 if (vdev->config.intr_type != MSI_X)
3015 napi_disable(&vdev->napi);
3016 else {
3017 for (i = 0; i < vdev->no_of_vpath; i++)
3018 napi_disable(&vdev->vpaths[i].ring.napi);
3019 }
3020
3021 netif_carrier_off(vdev->ndev);
3022 netdev_notice(vdev->ndev, "Link Down\n");
3023 netif_tx_stop_all_queues(vdev->ndev);
3024
3025
3026 if (do_io)
3027 vxge_hw_device_intr_disable(vdev->devh);
3028
3029 vxge_rem_isr(vdev);
3030
3031 vxge_napi_del_all(vdev);
3032
3033 if (do_io)
3034 vxge_reset_all_vpaths(vdev);
3035
3036 vxge_close_vpaths(vdev, 0);
3037
3038 vxge_debug_entryexit(VXGE_TRACE,
3039 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3040
3041 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3042
3043 return 0;
3044}
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057static int vxge_close(struct net_device *dev)
3058{
3059 do_vxge_close(dev, 1);
3060 return 0;
3061}
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3072{
3073 struct vxgedev *vdev = netdev_priv(dev);
3074
3075 vxge_debug_entryexit(vdev->level_trace,
3076 "%s:%d", __func__, __LINE__);
3077
3078
3079 if (unlikely(!is_vxge_card_up(vdev))) {
3080
3081 dev->mtu = new_mtu;
3082 vxge_debug_init(vdev->level_err,
3083 "%s", "device is down on MTU change");
3084 return 0;
3085 }
3086
3087 vxge_debug_init(vdev->level_trace,
3088 "trying to apply new MTU %d", new_mtu);
3089
3090 if (vxge_close(dev))
3091 return -EIO;
3092
3093 dev->mtu = new_mtu;
3094 vdev->mtu = new_mtu;
3095
3096 if (vxge_open(dev))
3097 return -EIO;
3098
3099 vxge_debug_init(vdev->level_trace,
3100 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3101
3102 vxge_debug_entryexit(vdev->level_trace,
3103 "%s:%d Exiting...", __func__, __LINE__);
3104
3105 return 0;
3106}
3107
3108
3109
3110
3111
3112
3113
3114static void
3115vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
3116{
3117 struct vxgedev *vdev = netdev_priv(dev);
3118 int k;
3119
3120
3121 for (k = 0; k < vdev->no_of_vpath; k++) {
3122 struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3123 struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3124 unsigned int start;
3125 u64 packets, bytes, multicast;
3126
3127 do {
3128 start = u64_stats_fetch_begin_irq(&rxstats->syncp);
3129
3130 packets = rxstats->rx_frms;
3131 multicast = rxstats->rx_mcast;
3132 bytes = rxstats->rx_bytes;
3133 } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
3134
3135 net_stats->rx_packets += packets;
3136 net_stats->rx_bytes += bytes;
3137 net_stats->multicast += multicast;
3138
3139 net_stats->rx_errors += rxstats->rx_errors;
3140 net_stats->rx_dropped += rxstats->rx_dropped;
3141
3142 do {
3143 start = u64_stats_fetch_begin_irq(&txstats->syncp);
3144
3145 packets = txstats->tx_frms;
3146 bytes = txstats->tx_bytes;
3147 } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
3148
3149 net_stats->tx_packets += packets;
3150 net_stats->tx_bytes += bytes;
3151 net_stats->tx_errors += txstats->tx_errors;
3152 }
3153}
3154
3155static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
3156{
3157 enum vxge_hw_status status;
3158 u64 val64;
3159
3160
3161
3162
3163
3164
3165 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3166 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3167 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
3168
3169 status = vxge_hw_mgmt_reg_write(devh,
3170 vxge_hw_mgmt_reg_type_mrpcim,
3171 0,
3172 offsetof(struct vxge_hw_mrpcim_reg,
3173 xmac_timestamp),
3174 val64);
3175 vxge_hw_device_flush_io(devh);
3176 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
3177 return status;
3178}
3179
3180static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
3181{
3182 struct hwtstamp_config config;
3183 int i;
3184
3185 if (copy_from_user(&config, data, sizeof(config)))
3186 return -EFAULT;
3187
3188
3189 if (config.flags)
3190 return -EINVAL;
3191
3192
3193 switch (config.tx_type) {
3194 case HWTSTAMP_TX_OFF:
3195 break;
3196 case HWTSTAMP_TX_ON:
3197 default:
3198 return -ERANGE;
3199 }
3200
3201 switch (config.rx_filter) {
3202 case HWTSTAMP_FILTER_NONE:
3203 vdev->rx_hwts = 0;
3204 config.rx_filter = HWTSTAMP_FILTER_NONE;
3205 break;
3206
3207 case HWTSTAMP_FILTER_ALL:
3208 case HWTSTAMP_FILTER_SOME:
3209 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3210 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3211 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3212 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3213 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3214 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3215 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3216 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3217 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3218 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3219 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3220 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3221 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
3222 return -EFAULT;
3223
3224 vdev->rx_hwts = 1;
3225 config.rx_filter = HWTSTAMP_FILTER_ALL;
3226 break;
3227
3228 default:
3229 return -ERANGE;
3230 }
3231
3232 for (i = 0; i < vdev->no_of_vpath; i++)
3233 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3234
3235 if (copy_to_user(data, &config, sizeof(config)))
3236 return -EFAULT;
3237
3238 return 0;
3239}
3240
3241static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
3242{
3243 struct hwtstamp_config config;
3244
3245 config.flags = 0;
3246 config.tx_type = HWTSTAMP_TX_OFF;
3247 config.rx_filter = (vdev->rx_hwts ?
3248 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
3249
3250 if (copy_to_user(data, &config, sizeof(config)))
3251 return -EFAULT;
3252
3253 return 0;
3254}
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3267{
3268 struct vxgedev *vdev = netdev_priv(dev);
3269
3270 switch (cmd) {
3271 case SIOCSHWTSTAMP:
3272 return vxge_hwtstamp_set(vdev, rq->ifr_data);
3273 case SIOCGHWTSTAMP:
3274 return vxge_hwtstamp_get(vdev, rq->ifr_data);
3275 default:
3276 return -EOPNOTSUPP;
3277 }
3278}
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288static void vxge_tx_watchdog(struct net_device *dev)
3289{
3290 struct vxgedev *vdev;
3291
3292 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3293
3294 vdev = netdev_priv(dev);
3295
3296 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3297
3298 schedule_work(&vdev->reset_task);
3299 vxge_debug_entryexit(VXGE_TRACE,
3300 "%s:%d Exiting...", __func__, __LINE__);
3301}
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311static int
3312vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
3313{
3314 struct vxgedev *vdev = netdev_priv(dev);
3315 struct vxge_vpath *vpath;
3316 int vp_id;
3317
3318
3319 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3320 vpath = &vdev->vpaths[vp_id];
3321 if (!vpath->is_open)
3322 continue;
3323 vxge_hw_vpath_vid_add(vpath->handle, vid);
3324 }
3325 set_bit(vid, vdev->active_vlans);
3326 return 0;
3327}
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337static int
3338vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
3339{
3340 struct vxgedev *vdev = netdev_priv(dev);
3341 struct vxge_vpath *vpath;
3342 int vp_id;
3343
3344 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3345
3346
3347 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3348 vpath = &vdev->vpaths[vp_id];
3349 if (!vpath->is_open)
3350 continue;
3351 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3352 }
3353 vxge_debug_entryexit(VXGE_TRACE,
3354 "%s:%d Exiting...", __func__, __LINE__);
3355 clear_bit(vid, vdev->active_vlans);
3356 return 0;
3357}
3358
3359static const struct net_device_ops vxge_netdev_ops = {
3360 .ndo_open = vxge_open,
3361 .ndo_stop = vxge_close,
3362 .ndo_get_stats64 = vxge_get_stats64,
3363 .ndo_start_xmit = vxge_xmit,
3364 .ndo_validate_addr = eth_validate_addr,
3365 .ndo_set_rx_mode = vxge_set_multicast,
3366 .ndo_do_ioctl = vxge_ioctl,
3367 .ndo_set_mac_address = vxge_set_mac_addr,
3368 .ndo_change_mtu = vxge_change_mtu,
3369 .ndo_fix_features = vxge_fix_features,
3370 .ndo_set_features = vxge_set_features,
3371 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3372 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
3373 .ndo_tx_timeout = vxge_tx_watchdog,
3374#ifdef CONFIG_NET_POLL_CONTROLLER
3375 .ndo_poll_controller = vxge_netpoll,
3376#endif
3377};
3378
3379static int vxge_device_register(struct __vxge_hw_device *hldev,
3380 struct vxge_config *config, int high_dma,
3381 int no_of_vpath, struct vxgedev **vdev_out)
3382{
3383 struct net_device *ndev;
3384 enum vxge_hw_status status = VXGE_HW_OK;
3385 struct vxgedev *vdev;
3386 int ret = 0, no_of_queue = 1;
3387 u64 stat;
3388
3389 *vdev_out = NULL;
3390 if (config->tx_steering_type)
3391 no_of_queue = no_of_vpath;
3392
3393 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3394 no_of_queue);
3395 if (ndev == NULL) {
3396 vxge_debug_init(
3397 vxge_hw_device_trace_level_get(hldev),
3398 "%s : device allocation failed", __func__);
3399 ret = -ENODEV;
3400 goto _out0;
3401 }
3402
3403 vxge_debug_entryexit(
3404 vxge_hw_device_trace_level_get(hldev),
3405 "%s: %s:%d Entering...",
3406 ndev->name, __func__, __LINE__);
3407
3408 vdev = netdev_priv(ndev);
3409 memset(vdev, 0, sizeof(struct vxgedev));
3410
3411 vdev->ndev = ndev;
3412 vdev->devh = hldev;
3413 vdev->pdev = hldev->pdev;
3414 memcpy(&vdev->config, config, sizeof(struct vxge_config));
3415 vdev->rx_hwts = 0;
3416 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
3417
3418 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3419
3420 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3421 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3422 NETIF_F_TSO | NETIF_F_TSO6 |
3423 NETIF_F_HW_VLAN_CTAG_TX;
3424 if (vdev->config.rth_steering != NO_STEERING)
3425 ndev->hw_features |= NETIF_F_RXHASH;
3426
3427 ndev->features |= ndev->hw_features |
3428 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
3429
3430
3431 ndev->netdev_ops = &vxge_netdev_ops;
3432
3433 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
3434 INIT_WORK(&vdev->reset_task, vxge_reset);
3435
3436 vxge_initialize_ethtool_ops(ndev);
3437
3438
3439 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3440 no_of_vpath, GFP_KERNEL);
3441 if (!vdev->vpaths) {
3442 vxge_debug_init(VXGE_ERR,
3443 "%s: vpath memory allocation failed",
3444 vdev->ndev->name);
3445 ret = -ENOMEM;
3446 goto _out1;
3447 }
3448
3449 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3450 "%s : checksumming enabled", __func__);
3451
3452 if (high_dma) {
3453 ndev->features |= NETIF_F_HIGHDMA;
3454 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3455 "%s : using High DMA", __func__);
3456 }
3457
3458
3459 ndev->min_mtu = VXGE_HW_MIN_MTU;
3460 ndev->max_mtu = VXGE_HW_MAX_MTU;
3461
3462 ret = register_netdev(ndev);
3463 if (ret) {
3464 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3465 "%s: %s : device registration failed!",
3466 ndev->name, __func__);
3467 goto _out2;
3468 }
3469
3470
3471 ndev->addr_len = ETH_ALEN;
3472
3473
3474
3475
3476
3477 netif_carrier_off(ndev);
3478
3479 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3480 "%s: Ethernet device registered",
3481 ndev->name);
3482
3483 hldev->ndev = ndev;
3484 *vdev_out = vdev;
3485
3486
3487 status = vxge_hw_mrpcim_stats_access(
3488 hldev,
3489 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3490 0,
3491 0,
3492 &stat);
3493
3494 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3495 vxge_debug_init(
3496 vxge_hw_device_trace_level_get(hldev),
3497 "%s: device stats clear returns"
3498 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3499
3500 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3501 "%s: %s:%d Exiting...",
3502 ndev->name, __func__, __LINE__);
3503
3504 return ret;
3505_out2:
3506 kfree(vdev->vpaths);
3507_out1:
3508 free_netdev(ndev);
3509_out0:
3510 return ret;
3511}
3512
3513
3514
3515
3516
3517
3518static void vxge_device_unregister(struct __vxge_hw_device *hldev)
3519{
3520 struct vxgedev *vdev;
3521 struct net_device *dev;
3522 char buf[IFNAMSIZ];
3523
3524 dev = hldev->ndev;
3525 vdev = netdev_priv(dev);
3526
3527 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3528 __func__, __LINE__);
3529
3530 strlcpy(buf, dev->name, IFNAMSIZ);
3531
3532 flush_work(&vdev->reset_task);
3533
3534
3535 unregister_netdev(dev);
3536
3537 kfree(vdev->vpaths);
3538
3539
3540 free_netdev(dev);
3541
3542 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3543 buf);
3544 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3545 __func__, __LINE__);
3546}
3547
3548
3549
3550
3551
3552
3553
3554static void
3555vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3556 enum vxge_hw_event type, u64 vp_id)
3557{
3558 struct net_device *dev = hldev->ndev;
3559 struct vxgedev *vdev = netdev_priv(dev);
3560 struct vxge_vpath *vpath = NULL;
3561 int vpath_idx;
3562
3563 vxge_debug_entryexit(vdev->level_trace,
3564 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3565
3566
3567
3568
3569 vdev->cric_err_event = type;
3570
3571 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3572 vpath = &vdev->vpaths[vpath_idx];
3573 if (vpath->device_id == vp_id)
3574 break;
3575 }
3576
3577 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3578 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3579 vxge_debug_init(VXGE_ERR,
3580 "%s: Slot is frozen", vdev->ndev->name);
3581 } else if (type == VXGE_HW_EVENT_SERR) {
3582 vxge_debug_init(VXGE_ERR,
3583 "%s: Encountered Serious Error",
3584 vdev->ndev->name);
3585 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3586 vxge_debug_init(VXGE_ERR,
3587 "%s: Encountered Critical Error",
3588 vdev->ndev->name);
3589 }
3590
3591 if ((type == VXGE_HW_EVENT_SERR) ||
3592 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3593 if (unlikely(vdev->exec_mode))
3594 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3595 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3596 vxge_hw_device_mask_all(hldev);
3597 if (unlikely(vdev->exec_mode))
3598 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3599 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3600 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3601
3602 if (unlikely(vdev->exec_mode))
3603 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3604 else {
3605
3606 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3607
3608
3609 vxge_vpath_intr_disable(vdev, vpath_idx);
3610
3611
3612 netif_tx_stop_queue(vpath->fifo.txq);
3613 }
3614 }
3615 }
3616
3617 vxge_debug_entryexit(vdev->level_trace,
3618 "%s: %s:%d Exiting...",
3619 vdev->ndev->name, __func__, __LINE__);
3620}
3621
3622static void verify_bandwidth(void)
3623{
3624 int i, band_width, total = 0, equal_priority = 0;
3625
3626
3627 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3628 if (bw_percentage[i] == 0) {
3629 equal_priority = 1;
3630 break;
3631 }
3632 }
3633
3634 if (!equal_priority) {
3635
3636 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3637 if (bw_percentage[i] == 0xFF)
3638 break;
3639
3640 total += bw_percentage[i];
3641 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3642 equal_priority = 1;
3643 break;
3644 }
3645 }
3646 }
3647
3648 if (!equal_priority) {
3649
3650 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3651 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3652
3653 band_width =
3654 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3655 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3656 if (band_width < 2)
3657 equal_priority = 1;
3658 else {
3659 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3660 i++)
3661 bw_percentage[i] =
3662 band_width;
3663 }
3664 }
3665 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3666 equal_priority = 1;
3667 }
3668
3669 if (equal_priority) {
3670 vxge_debug_init(VXGE_ERR,
3671 "%s: Assigning equal bandwidth to all the vpaths",
3672 VXGE_DRIVER_NAME);
3673 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3674 VXGE_HW_MAX_VIRTUAL_PATHS;
3675 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3676 bw_percentage[i] = bw_percentage[0];
3677 }
3678}
3679
3680
3681
3682
3683static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
3684 u64 vpath_mask, struct vxge_config *config_param)
3685{
3686 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3687 u32 txdl_size, txdl_per_memblock;
3688
3689 temp = driver_config->vpath_per_dev;
3690 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3691 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3692
3693 if (driver_config->g_no_cpus == -1)
3694 return 0;
3695
3696 if (!driver_config->g_no_cpus)
3697 driver_config->g_no_cpus =
3698 netif_get_num_default_rss_queues();
3699
3700 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3701 if (!driver_config->vpath_per_dev)
3702 driver_config->vpath_per_dev = 1;
3703
3704 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3705 if (!vxge_bVALn(vpath_mask, i, 1))
3706 continue;
3707 else
3708 default_no_vpath++;
3709 if (default_no_vpath < driver_config->vpath_per_dev)
3710 driver_config->vpath_per_dev = default_no_vpath;
3711
3712 driver_config->g_no_cpus = driver_config->g_no_cpus -
3713 (driver_config->vpath_per_dev * 2);
3714 if (driver_config->g_no_cpus <= 0)
3715 driver_config->g_no_cpus = -1;
3716 }
3717
3718 if (driver_config->vpath_per_dev == 1) {
3719 vxge_debug_ll_config(VXGE_TRACE,
3720 "%s: Disable tx and rx steering, "
3721 "as single vpath is configured", VXGE_DRIVER_NAME);
3722 config_param->rth_steering = NO_STEERING;
3723 config_param->tx_steering_type = NO_STEERING;
3724 device_config->rth_en = 0;
3725 }
3726
3727
3728 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3729 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3730
3731 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3732 device_config->vp_config[i].vp_id = i;
3733 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3734 if (no_of_vpaths < driver_config->vpath_per_dev) {
3735 if (!vxge_bVALn(vpath_mask, i, 1)) {
3736 vxge_debug_ll_config(VXGE_TRACE,
3737 "%s: vpath: %d is not available",
3738 VXGE_DRIVER_NAME, i);
3739 continue;
3740 } else {
3741 vxge_debug_ll_config(VXGE_TRACE,
3742 "%s: vpath: %d available",
3743 VXGE_DRIVER_NAME, i);
3744 no_of_vpaths++;
3745 }
3746 } else {
3747 vxge_debug_ll_config(VXGE_TRACE,
3748 "%s: vpath: %d is not configured, "
3749 "max_config_vpath exceeded",
3750 VXGE_DRIVER_NAME, i);
3751 break;
3752 }
3753
3754
3755 device_config->vp_config[i].fifo.enable =
3756 VXGE_HW_FIFO_ENABLE;
3757 device_config->vp_config[i].fifo.max_frags =
3758 MAX_SKB_FRAGS + 1;
3759 device_config->vp_config[i].fifo.memblock_size =
3760 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3761
3762 txdl_size = device_config->vp_config[i].fifo.max_frags *
3763 sizeof(struct vxge_hw_fifo_txd);
3764 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3765
3766 device_config->vp_config[i].fifo.fifo_blocks =
3767 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3768
3769 device_config->vp_config[i].fifo.intr =
3770 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3771
3772
3773 device_config->vp_config[i].tti.intr_enable =
3774 VXGE_HW_TIM_INTR_ENABLE;
3775
3776 device_config->vp_config[i].tti.btimer_val =
3777 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3778
3779 device_config->vp_config[i].tti.timer_ac_en =
3780 VXGE_HW_TIM_TIMER_AC_ENABLE;
3781
3782
3783
3784
3785 device_config->vp_config[i].tti.timer_ci_en =
3786 VXGE_HW_TIM_TIMER_CI_DISABLE;
3787
3788 device_config->vp_config[i].tti.timer_ri_en =
3789 VXGE_HW_TIM_TIMER_RI_DISABLE;
3790
3791 device_config->vp_config[i].tti.util_sel =
3792 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3793
3794 device_config->vp_config[i].tti.ltimer_val =
3795 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3796
3797 device_config->vp_config[i].tti.rtimer_val =
3798 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3799
3800 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3801 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3802 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3803 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3804 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3805 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3806 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3807
3808
3809 device_config->vp_config[i].ring.enable =
3810 VXGE_HW_RING_ENABLE;
3811
3812 device_config->vp_config[i].ring.ring_blocks =
3813 VXGE_HW_DEF_RING_BLOCKS;
3814
3815 device_config->vp_config[i].ring.buffer_mode =
3816 VXGE_HW_RING_RXD_BUFFER_MODE_1;
3817
3818 device_config->vp_config[i].ring.rxds_limit =
3819 VXGE_HW_DEF_RING_RXDS_LIMIT;
3820
3821 device_config->vp_config[i].ring.scatter_mode =
3822 VXGE_HW_RING_SCATTER_MODE_A;
3823
3824
3825 device_config->vp_config[i].rti.intr_enable =
3826 VXGE_HW_TIM_INTR_ENABLE;
3827
3828 device_config->vp_config[i].rti.btimer_val =
3829 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3830
3831 device_config->vp_config[i].rti.timer_ac_en =
3832 VXGE_HW_TIM_TIMER_AC_ENABLE;
3833
3834 device_config->vp_config[i].rti.timer_ci_en =
3835 VXGE_HW_TIM_TIMER_CI_DISABLE;
3836
3837 device_config->vp_config[i].rti.timer_ri_en =
3838 VXGE_HW_TIM_TIMER_RI_DISABLE;
3839
3840 device_config->vp_config[i].rti.util_sel =
3841 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3842
3843 device_config->vp_config[i].rti.urange_a =
3844 RTI_RX_URANGE_A;
3845 device_config->vp_config[i].rti.urange_b =
3846 RTI_RX_URANGE_B;
3847 device_config->vp_config[i].rti.urange_c =
3848 RTI_RX_URANGE_C;
3849 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3850 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3851 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3852 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3853
3854 device_config->vp_config[i].rti.rtimer_val =
3855 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3856
3857 device_config->vp_config[i].rti.ltimer_val =
3858 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3859
3860 device_config->vp_config[i].rpa_strip_vlan_tag =
3861 vlan_tag_strip;
3862 }
3863
3864 driver_config->vpath_per_dev = temp;
3865 return no_of_vpaths;
3866}
3867
3868
3869static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
3870 int *intr_type)
3871{
3872
3873 device_config->dma_blockpool_initial =
3874 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3875
3876 device_config->dma_blockpool_max =
3877 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3878
3879 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3880 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3881
3882 if (!IS_ENABLED(CONFIG_PCI_MSI)) {
3883 vxge_debug_init(VXGE_ERR,
3884 "%s: This Kernel does not support "
3885 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3886 *intr_type = INTA;
3887 }
3888
3889
3890 switch (*intr_type) {
3891 case INTA:
3892 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3893 break;
3894
3895 case MSI_X:
3896 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
3897 break;
3898 }
3899
3900
3901 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3902
3903
3904 device_config->rts_mac_en = addr_learn_en;
3905
3906
3907 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3908
3909 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3910 __func__);
3911 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3912 device_config->intr_mode);
3913 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3914 device_config->device_poll_millis);
3915 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3916 device_config->rth_en);
3917 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3918 device_config->rth_it_type);
3919}
3920
3921static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3922{
3923 int i;
3924
3925 vxge_debug_init(VXGE_TRACE,
3926 "%s: %d Vpath(s) opened",
3927 vdev->ndev->name, vdev->no_of_vpath);
3928
3929 switch (vdev->config.intr_type) {
3930 case INTA:
3931 vxge_debug_init(VXGE_TRACE,
3932 "%s: Interrupt type INTA", vdev->ndev->name);
3933 break;
3934
3935 case MSI_X:
3936 vxge_debug_init(VXGE_TRACE,
3937 "%s: Interrupt type MSI-X", vdev->ndev->name);
3938 break;
3939 }
3940
3941 if (vdev->config.rth_steering) {
3942 vxge_debug_init(VXGE_TRACE,
3943 "%s: RTH steering enabled for TCP_IPV4",
3944 vdev->ndev->name);
3945 } else {
3946 vxge_debug_init(VXGE_TRACE,
3947 "%s: RTH steering disabled", vdev->ndev->name);
3948 }
3949
3950 switch (vdev->config.tx_steering_type) {
3951 case NO_STEERING:
3952 vxge_debug_init(VXGE_TRACE,
3953 "%s: Tx steering disabled", vdev->ndev->name);
3954 break;
3955 case TX_PRIORITY_STEERING:
3956 vxge_debug_init(VXGE_TRACE,
3957 "%s: Unsupported tx steering option",
3958 vdev->ndev->name);
3959 vxge_debug_init(VXGE_TRACE,
3960 "%s: Tx steering disabled", vdev->ndev->name);
3961 vdev->config.tx_steering_type = 0;
3962 break;
3963 case TX_VLAN_STEERING:
3964 vxge_debug_init(VXGE_TRACE,
3965 "%s: Unsupported tx steering option",
3966 vdev->ndev->name);
3967 vxge_debug_init(VXGE_TRACE,
3968 "%s: Tx steering disabled", vdev->ndev->name);
3969 vdev->config.tx_steering_type = 0;
3970 break;
3971 case TX_MULTIQ_STEERING:
3972 vxge_debug_init(VXGE_TRACE,
3973 "%s: Tx multiqueue steering enabled",
3974 vdev->ndev->name);
3975 break;
3976 case TX_PORT_STEERING:
3977 vxge_debug_init(VXGE_TRACE,
3978 "%s: Tx port steering enabled",
3979 vdev->ndev->name);
3980 break;
3981 default:
3982 vxge_debug_init(VXGE_ERR,
3983 "%s: Unsupported tx steering type",
3984 vdev->ndev->name);
3985 vxge_debug_init(VXGE_TRACE,
3986 "%s: Tx steering disabled", vdev->ndev->name);
3987 vdev->config.tx_steering_type = 0;
3988 }
3989
3990 if (vdev->config.addr_learn_en)
3991 vxge_debug_init(VXGE_TRACE,
3992 "%s: MAC Address learning enabled", vdev->ndev->name);
3993
3994 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3995 if (!vxge_bVALn(vpath_mask, i, 1))
3996 continue;
3997 vxge_debug_ll_config(VXGE_TRACE,
3998 "%s: MTU size - %d", vdev->ndev->name,
3999 ((vdev->devh))->
4000 config.vp_config[i].mtu);
4001 vxge_debug_init(VXGE_TRACE,
4002 "%s: VLAN tag stripping %s", vdev->ndev->name,
4003 ((vdev->devh))->
4004 config.vp_config[i].rpa_strip_vlan_tag
4005 ? "Enabled" : "Disabled");
4006 vxge_debug_ll_config(VXGE_TRACE,
4007 "%s: Max frags : %d", vdev->ndev->name,
4008 ((vdev->devh))->
4009 config.vp_config[i].fifo.max_frags);
4010 break;
4011 }
4012}
4013
4014#ifdef CONFIG_PM
4015
4016
4017
4018
4019static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4020{
4021 return -ENOSYS;
4022}
4023
4024
4025
4026
4027static int vxge_pm_resume(struct pci_dev *pdev)
4028{
4029 return -ENOSYS;
4030}
4031
4032#endif
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4043 pci_channel_state_t state)
4044{
4045 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4046 struct net_device *netdev = hldev->ndev;
4047
4048 netif_device_detach(netdev);
4049
4050 if (state == pci_channel_io_perm_failure)
4051 return PCI_ERS_RESULT_DISCONNECT;
4052
4053 if (netif_running(netdev)) {
4054
4055 do_vxge_close(netdev, 0);
4056 }
4057
4058 pci_disable_device(pdev);
4059
4060 return PCI_ERS_RESULT_NEED_RESET;
4061}
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4073{
4074 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4075 struct net_device *netdev = hldev->ndev;
4076
4077 struct vxgedev *vdev = netdev_priv(netdev);
4078
4079 if (pci_enable_device(pdev)) {
4080 netdev_err(netdev, "Cannot re-enable device after reset\n");
4081 return PCI_ERS_RESULT_DISCONNECT;
4082 }
4083
4084 pci_set_master(pdev);
4085 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
4086
4087 return PCI_ERS_RESULT_RECOVERED;
4088}
4089
4090
4091
4092
4093
4094
4095
4096
4097static void vxge_io_resume(struct pci_dev *pdev)
4098{
4099 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
4100 struct net_device *netdev = hldev->ndev;
4101
4102 if (netif_running(netdev)) {
4103 if (vxge_open(netdev)) {
4104 netdev_err(netdev,
4105 "Can't bring device back up after reset\n");
4106 return;
4107 }
4108 }
4109
4110 netif_device_attach(netdev);
4111}
4112
4113static inline u32 vxge_get_num_vfs(u64 function_mode)
4114{
4115 u32 num_functions = 0;
4116
4117 switch (function_mode) {
4118 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4119 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4120 num_functions = 8;
4121 break;
4122 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4123 num_functions = 1;
4124 break;
4125 case VXGE_HW_FUNCTION_MODE_SRIOV:
4126 case VXGE_HW_FUNCTION_MODE_MRIOV:
4127 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4128 num_functions = 17;
4129 break;
4130 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4131 num_functions = 4;
4132 break;
4133 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4134 num_functions = 2;
4135 break;
4136 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4137 num_functions = 8;
4138 break;
4139 }
4140 return num_functions;
4141}
4142
4143int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4144{
4145 struct __vxge_hw_device *hldev = vdev->devh;
4146 u32 maj, min, bld, cmaj, cmin, cbld;
4147 enum vxge_hw_status status;
4148 const struct firmware *fw;
4149 int ret;
4150
4151 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4152 if (ret) {
4153 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4154 VXGE_DRIVER_NAME, fw_name);
4155 goto out;
4156 }
4157
4158
4159 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4160 if (status != VXGE_HW_OK) {
4161 vxge_debug_init(VXGE_ERR,
4162 "%s: FW image download to adapter failed '%s'.",
4163 VXGE_DRIVER_NAME, fw_name);
4164 ret = -EIO;
4165 goto out;
4166 }
4167
4168
4169 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4170 if (status != VXGE_HW_OK) {
4171 vxge_debug_init(VXGE_ERR,
4172 "%s: Upgrade read version failed '%s'.",
4173 VXGE_DRIVER_NAME, fw_name);
4174 ret = -EIO;
4175 goto out;
4176 }
4177
4178 cmaj = vdev->config.device_hw_info.fw_version.major;
4179 cmin = vdev->config.device_hw_info.fw_version.minor;
4180 cbld = vdev->config.device_hw_info.fw_version.build;
4181
4182
4183
4184
4185 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4186 !override) {
4187 ret = -EINVAL;
4188 goto out;
4189 }
4190
4191 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4192 maj, min, bld);
4193
4194
4195 status = vxge_hw_flash_fw(hldev);
4196 if (status != VXGE_HW_OK) {
4197 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4198 VXGE_DRIVER_NAME, fw_name);
4199 ret = -EIO;
4200 goto out;
4201 }
4202
4203 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4204 "hard reset before using, thus requiring a system reboot or a "
4205 "hotplug event.\n");
4206
4207out:
4208 release_firmware(fw);
4209 return ret;
4210}
4211
4212static int vxge_probe_fw_update(struct vxgedev *vdev)
4213{
4214 u32 maj, min, bld;
4215 int ret, gpxe = 0;
4216 char *fw_name;
4217
4218 maj = vdev->config.device_hw_info.fw_version.major;
4219 min = vdev->config.device_hw_info.fw_version.minor;
4220 bld = vdev->config.device_hw_info.fw_version.build;
4221
4222 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4223 return 0;
4224
4225
4226
4227
4228 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4229 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4230 "version, unable to load driver\n",
4231 VXGE_DRIVER_NAME);
4232 return -EINVAL;
4233 }
4234
4235
4236
4237
4238 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4239 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4240 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4241 return -EINVAL;
4242 }
4243
4244
4245 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4246 int i;
4247 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4248 if (vdev->devh->eprom_versions[i]) {
4249 gpxe = 1;
4250 break;
4251 }
4252 }
4253 if (gpxe)
4254 fw_name = "vxge/X3fw-pxe.ncf";
4255 else
4256 fw_name = "vxge/X3fw.ncf";
4257
4258 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4259
4260
4261
4262 if (ret != -EINVAL && ret != -ENOENT)
4263 return -EIO;
4264 else
4265 ret = 0;
4266
4267 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4268 VXGE_FW_VER(maj, min, 0)) {
4269 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4270 " be used with this driver.",
4271 VXGE_DRIVER_NAME, maj, min, bld);
4272 return -EINVAL;
4273 }
4274
4275 return ret;
4276}
4277
4278static int is_sriov_initialized(struct pci_dev *pdev)
4279{
4280 int pos;
4281 u16 ctrl;
4282
4283 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4284 if (pos) {
4285 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4286 if (ctrl & PCI_SRIOV_CTRL_VFE)
4287 return 1;
4288 }
4289 return 0;
4290}
4291
4292static const struct vxge_hw_uld_cbs vxge_callbacks = {
4293 .link_up = vxge_callback_link_up,
4294 .link_down = vxge_callback_link_down,
4295 .crit_err = vxge_callback_crit_err,
4296};
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309static int
4310vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4311{
4312 struct __vxge_hw_device *hldev;
4313 enum vxge_hw_status status;
4314 int ret;
4315 int high_dma = 0;
4316 u64 vpath_mask = 0;
4317 struct vxgedev *vdev;
4318 struct vxge_config *ll_config = NULL;
4319 struct vxge_hw_device_config *device_config = NULL;
4320 struct vxge_hw_device_attr attr;
4321 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4322 u8 *macaddr;
4323 struct vxge_mac_addrs *entry;
4324 static int bus = -1, device = -1;
4325 u32 host_type;
4326 u8 new_device = 0;
4327 enum vxge_hw_status is_privileged;
4328 u32 function_mode;
4329 u32 num_vfs = 0;
4330
4331 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4332 attr.pdev = pdev;
4333
4334
4335
4336
4337 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4338 !pdev->is_virtfn)
4339 new_device = 1;
4340
4341 bus = pdev->bus->number;
4342 device = PCI_SLOT(pdev->devfn);
4343
4344 if (new_device) {
4345 if (driver_config->config_dev_cnt &&
4346 (driver_config->config_dev_cnt !=
4347 driver_config->total_dev_cnt))
4348 vxge_debug_init(VXGE_ERR,
4349 "%s: Configured %d of %d devices",
4350 VXGE_DRIVER_NAME,
4351 driver_config->config_dev_cnt,
4352 driver_config->total_dev_cnt);
4353 driver_config->config_dev_cnt = 0;
4354 driver_config->total_dev_cnt = 0;
4355 }
4356
4357
4358
4359
4360 driver_config->g_no_cpus = 0;
4361 driver_config->vpath_per_dev = max_config_vpath;
4362
4363 driver_config->total_dev_cnt++;
4364 if (++driver_config->config_dev_cnt > max_config_dev) {
4365 ret = 0;
4366 goto _exit0;
4367 }
4368
4369 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4370 GFP_KERNEL);
4371 if (!device_config) {
4372 ret = -ENOMEM;
4373 vxge_debug_init(VXGE_ERR,
4374 "device_config : malloc failed %s %d",
4375 __FILE__, __LINE__);
4376 goto _exit0;
4377 }
4378
4379 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
4380 if (!ll_config) {
4381 ret = -ENOMEM;
4382 vxge_debug_init(VXGE_ERR,
4383 "device_config : malloc failed %s %d",
4384 __FILE__, __LINE__);
4385 goto _exit0;
4386 }
4387 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4388 ll_config->intr_type = MSI_X;
4389 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4390 ll_config->rth_steering = RTH_STEERING;
4391
4392
4393 vxge_hw_device_config_default_get(device_config);
4394
4395
4396 vxge_device_config_init(device_config, &ll_config->intr_type);
4397
4398 ret = pci_enable_device(pdev);
4399 if (ret) {
4400 vxge_debug_init(VXGE_ERR,
4401 "%s : can not enable PCI device", __func__);
4402 goto _exit0;
4403 }
4404
4405 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4406 vxge_debug_ll_config(VXGE_TRACE,
4407 "%s : using 64bit DMA", __func__);
4408
4409 high_dma = 1;
4410
4411 if (pci_set_consistent_dma_mask(pdev,
4412 DMA_BIT_MASK(64))) {
4413 vxge_debug_init(VXGE_ERR,
4414 "%s : unable to obtain 64bit DMA for "
4415 "consistent allocations", __func__);
4416 ret = -ENOMEM;
4417 goto _exit1;
4418 }
4419 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
4420 vxge_debug_ll_config(VXGE_TRACE,
4421 "%s : using 32bit DMA", __func__);
4422 } else {
4423 ret = -ENOMEM;
4424 goto _exit1;
4425 }
4426
4427 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4428 if (ret) {
4429 vxge_debug_init(VXGE_ERR,
4430 "%s : request regions failed", __func__);
4431 goto _exit1;
4432 }
4433
4434 pci_set_master(pdev);
4435
4436 attr.bar0 = pci_ioremap_bar(pdev, 0);
4437 if (!attr.bar0) {
4438 vxge_debug_init(VXGE_ERR,
4439 "%s : cannot remap io memory bar0", __func__);
4440 ret = -ENODEV;
4441 goto _exit2;
4442 }
4443 vxge_debug_ll_config(VXGE_TRACE,
4444 "pci ioremap bar0: %p:0x%llx",
4445 attr.bar0,
4446 (unsigned long long)pci_resource_start(pdev, 0));
4447
4448 status = vxge_hw_device_hw_info_get(attr.bar0,
4449 &ll_config->device_hw_info);
4450 if (status != VXGE_HW_OK) {
4451 vxge_debug_init(VXGE_ERR,
4452 "%s: Reading of hardware info failed."
4453 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4454 ret = -EINVAL;
4455 goto _exit3;
4456 }
4457
4458 vpath_mask = ll_config->device_hw_info.vpath_mask;
4459 if (vpath_mask == 0) {
4460 vxge_debug_ll_config(VXGE_TRACE,
4461 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4462 ret = -EINVAL;
4463 goto _exit3;
4464 }
4465
4466 vxge_debug_ll_config(VXGE_TRACE,
4467 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4468 (unsigned long long)vpath_mask);
4469
4470 function_mode = ll_config->device_hw_info.function_mode;
4471 host_type = ll_config->device_hw_info.host_type;
4472 is_privileged = __vxge_hw_device_is_privilaged(host_type,
4473 ll_config->device_hw_info.func_id);
4474
4475
4476 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4477 if (!((vpath_mask) & vxge_mBIT(i)))
4478 continue;
4479 max_vpath_supported++;
4480 }
4481
4482 if (new_device)
4483 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4484
4485
4486 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4487 (ll_config->intr_type != INTA)) {
4488 ret = pci_enable_sriov(pdev, num_vfs);
4489 if (ret)
4490 vxge_debug_ll_config(VXGE_ERR,
4491 "Failed in enabling SRIOV mode: %d\n", ret);
4492
4493 }
4494
4495
4496
4497
4498
4499 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
4500 if (!no_of_vpath) {
4501 vxge_debug_ll_config(VXGE_ERR,
4502 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4503 ret = 0;
4504 goto _exit3;
4505 }
4506
4507
4508 attr.uld_callbacks = &vxge_callbacks;
4509
4510 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4511 if (status != VXGE_HW_OK) {
4512 vxge_debug_init(VXGE_ERR,
4513 "Failed to initialize device (%d)", status);
4514 ret = -EINVAL;
4515 goto _exit3;
4516 }
4517
4518 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4519 ll_config->device_hw_info.fw_version.minor,
4520 ll_config->device_hw_info.fw_version.build) >=
4521 VXGE_EPROM_FW_VER) {
4522 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4523
4524 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4525 if (status != VXGE_HW_OK) {
4526 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4527 VXGE_DRIVER_NAME);
4528
4529 }
4530
4531 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4532 hldev->eprom_versions[i] = img[i].version;
4533 if (!img[i].is_valid)
4534 break;
4535 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4536 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
4537 VXGE_EPROM_IMG_MAJOR(img[i].version),
4538 VXGE_EPROM_IMG_MINOR(img[i].version),
4539 VXGE_EPROM_IMG_FIX(img[i].version),
4540 VXGE_EPROM_IMG_BUILD(img[i].version));
4541 }
4542 }
4543
4544
4545 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4546 if (status != VXGE_HW_OK) {
4547 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4548 " failing driver load", VXGE_DRIVER_NAME);
4549 ret = -EINVAL;
4550 goto _exit4;
4551 }
4552
4553
4554
4555
4556
4557
4558
4559
4560
4561 if (is_privileged == VXGE_HW_OK) {
4562 status = vxge_timestamp_config(hldev);
4563 if (status != VXGE_HW_OK) {
4564 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4565 VXGE_DRIVER_NAME);
4566 ret = -EFAULT;
4567 goto _exit4;
4568 }
4569 }
4570
4571 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4572
4573
4574 pci_set_drvdata(pdev, hldev);
4575
4576 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4577 ll_config->addr_learn_en = addr_learn_en;
4578 ll_config->rth_algorithm = RTH_ALG_JENKINS;
4579 ll_config->rth_hash_type_tcpipv4 = 1;
4580 ll_config->rth_hash_type_ipv4 = 0;
4581 ll_config->rth_hash_type_tcpipv6 = 0;
4582 ll_config->rth_hash_type_ipv6 = 0;
4583 ll_config->rth_hash_type_tcpipv6ex = 0;
4584 ll_config->rth_hash_type_ipv6ex = 0;
4585 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4586 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4587 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4588
4589 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4590 &vdev);
4591 if (ret) {
4592 ret = -EINVAL;
4593 goto _exit4;
4594 }
4595
4596 ret = vxge_probe_fw_update(vdev);
4597 if (ret)
4598 goto _exit5;
4599
4600 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4601 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4602 vxge_hw_device_trace_level_get(hldev));
4603
4604
4605 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4606 vdev->bar0 = attr.bar0;
4607 vdev->max_vpath_supported = max_vpath_supported;
4608 vdev->no_of_vpath = no_of_vpath;
4609
4610
4611 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4612 if (!vxge_bVALn(vpath_mask, i, 1))
4613 continue;
4614 if (j >= vdev->no_of_vpath)
4615 break;
4616
4617 vdev->vpaths[j].is_configured = 1;
4618 vdev->vpaths[j].device_id = i;
4619 vdev->vpaths[j].ring.driver_id = j;
4620 vdev->vpaths[j].vdev = vdev;
4621 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4622 memcpy((u8 *)vdev->vpaths[j].macaddr,
4623 ll_config->device_hw_info.mac_addrs[i],
4624 ETH_ALEN);
4625
4626
4627 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4628
4629 vdev->vpaths[j].mac_addr_cnt = 0;
4630 vdev->vpaths[j].mcast_addr_cnt = 0;
4631 j++;
4632 }
4633 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4634 vdev->max_config_port = max_config_port;
4635
4636 vdev->vlan_tag_strip = vlan_tag_strip;
4637
4638
4639 for (i = 0; i < vdev->no_of_vpath; i++)
4640 vdev->vpath_selector[i] = vpath_selector[i];
4641
4642 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4643
4644 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4645 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4646 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
4647
4648 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
4649 vdev->ndev->name, ll_config->device_hw_info.serial_number);
4650
4651 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
4652 vdev->ndev->name, ll_config->device_hw_info.part_number);
4653
4654 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
4655 vdev->ndev->name, ll_config->device_hw_info.product_desc);
4656
4657 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4658 vdev->ndev->name, macaddr);
4659
4660 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4661 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4662
4663 vxge_debug_init(VXGE_TRACE,
4664 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
4665 ll_config->device_hw_info.fw_version.version,
4666 ll_config->device_hw_info.fw_date.date);
4667
4668 if (new_device) {
4669 switch (ll_config->device_hw_info.function_mode) {
4670 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4671 vxge_debug_init(VXGE_TRACE,
4672 "%s: Single Function Mode Enabled", vdev->ndev->name);
4673 break;
4674 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4675 vxge_debug_init(VXGE_TRACE,
4676 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4677 break;
4678 case VXGE_HW_FUNCTION_MODE_SRIOV:
4679 vxge_debug_init(VXGE_TRACE,
4680 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4681 break;
4682 case VXGE_HW_FUNCTION_MODE_MRIOV:
4683 vxge_debug_init(VXGE_TRACE,
4684 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4685 break;
4686 }
4687 }
4688
4689 vxge_print_parm(vdev, vpath_mask);
4690
4691
4692 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
4693 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4694
4695
4696 for (i = 0; i < vdev->no_of_vpath; i++) {
4697 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
4698 if (NULL == entry) {
4699 vxge_debug_init(VXGE_ERR,
4700 "%s: mac_addr_list : memory allocation failed",
4701 vdev->ndev->name);
4702 ret = -EPERM;
4703 goto _exit6;
4704 }
4705 macaddr = (u8 *)&entry->macaddr;
4706 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4707 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4708 vdev->vpaths[i].mac_addr_cnt = 1;
4709 }
4710
4711 kfree(device_config);
4712
4713
4714
4715
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727
4728 if (ll_config->device_hw_info.function_mode ==
4729 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4730 if (vdev->config.intr_type == INTA)
4731 vxge_hw_device_unmask_all(hldev);
4732
4733 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4734 vdev->ndev->name, __func__, __LINE__);
4735
4736 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4737 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4738 vxge_hw_device_trace_level_get(hldev));
4739
4740 kfree(ll_config);
4741 return 0;
4742
4743_exit6:
4744 for (i = 0; i < vdev->no_of_vpath; i++)
4745 vxge_free_mac_add_list(&vdev->vpaths[i]);
4746_exit5:
4747 vxge_device_unregister(hldev);
4748_exit4:
4749 vxge_hw_device_terminate(hldev);
4750 pci_disable_sriov(pdev);
4751_exit3:
4752 iounmap(attr.bar0);
4753_exit2:
4754 pci_release_region(pdev, 0);
4755_exit1:
4756 pci_disable_device(pdev);
4757_exit0:
4758 kfree(ll_config);
4759 kfree(device_config);
4760 driver_config->config_dev_cnt--;
4761 driver_config->total_dev_cnt--;
4762 return ret;
4763}
4764
4765
4766
4767
4768
4769
4770
4771static void vxge_remove(struct pci_dev *pdev)
4772{
4773 struct __vxge_hw_device *hldev;
4774 struct vxgedev *vdev;
4775 int i;
4776
4777 hldev = pci_get_drvdata(pdev);
4778 if (hldev == NULL)
4779 return;
4780
4781 vdev = netdev_priv(hldev->ndev);
4782
4783 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
4784 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4785 __func__);
4786
4787 for (i = 0; i < vdev->no_of_vpath; i++)
4788 vxge_free_mac_add_list(&vdev->vpaths[i]);
4789
4790 vxge_device_unregister(hldev);
4791
4792 vxge_hw_device_terminate(hldev);
4793 iounmap(vdev->bar0);
4794 pci_release_region(pdev, 0);
4795 pci_disable_device(pdev);
4796 driver_config->config_dev_cnt--;
4797 driver_config->total_dev_cnt--;
4798
4799 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4800 __func__, __LINE__);
4801 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4802 __LINE__);
4803}
4804
4805static const struct pci_error_handlers vxge_err_handler = {
4806 .error_detected = vxge_io_error_detected,
4807 .slot_reset = vxge_io_slot_reset,
4808 .resume = vxge_io_resume,
4809};
4810
4811static struct pci_driver vxge_driver = {
4812 .name = VXGE_DRIVER_NAME,
4813 .id_table = vxge_id_table,
4814 .probe = vxge_probe,
4815 .remove = vxge_remove,
4816#ifdef CONFIG_PM
4817 .suspend = vxge_pm_suspend,
4818 .resume = vxge_pm_resume,
4819#endif
4820 .err_handler = &vxge_err_handler,
4821};
4822
4823static int __init
4824vxge_starter(void)
4825{
4826 int ret = 0;
4827
4828 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4829 pr_info("Driver version: %s\n", DRV_VERSION);
4830
4831 verify_bandwidth();
4832
4833 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4834 if (!driver_config)
4835 return -ENOMEM;
4836
4837 ret = pci_register_driver(&vxge_driver);
4838 if (ret) {
4839 kfree(driver_config);
4840 goto err;
4841 }
4842
4843 if (driver_config->config_dev_cnt &&
4844 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4845 vxge_debug_init(VXGE_ERR,
4846 "%s: Configured %d of %d devices",
4847 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4848 driver_config->total_dev_cnt);
4849err:
4850 return ret;
4851}
4852
4853static void __exit
4854vxge_closer(void)
4855{
4856 pci_unregister_driver(&vxge_driver);
4857 kfree(driver_config);
4858}
4859module_init(vxge_starter);
4860module_exit(vxge_closer);
4861