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18#include <linux/module.h>
19#include <linux/firmware.h>
20#include <linux/of.h>
21#include <linux/dmi.h>
22#include <linux/ctype.h>
23#include <asm/byteorder.h>
24
25#include "core.h"
26#include "mac.h"
27#include "htc.h"
28#include "hif.h"
29#include "wmi.h"
30#include "bmi.h"
31#include "debug.h"
32#include "htt.h"
33#include "testmode.h"
34#include "wmi-ops.h"
35
36unsigned int ath10k_debug_mask;
37static unsigned int ath10k_cryptmode_param;
38static bool uart_print;
39static bool skip_otp;
40static bool rawmode;
41
42module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
43module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
44module_param(uart_print, bool, 0644);
45module_param(skip_otp, bool, 0644);
46module_param(rawmode, bool, 0644);
47
48MODULE_PARM_DESC(debug_mask, "Debugging mask");
49MODULE_PARM_DESC(uart_print, "Uart target debugging");
50MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
51MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
52MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
53
54static const struct ath10k_hw_params ath10k_hw_params_list[] = {
55 {
56 .id = QCA988X_HW_2_0_VERSION,
57 .dev_id = QCA988X_2_0_DEVICE_ID,
58 .name = "qca988x hw2.0",
59 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
60 .uart_pin = 7,
61 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
62 .otp_exe_param = 0,
63 .channel_counters_freq_hz = 88000,
64 .max_probe_resp_desc_thres = 0,
65 .cal_data_len = 2116,
66 .fw = {
67 .dir = QCA988X_HW_2_0_FW_DIR,
68 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
69 .board_size = QCA988X_BOARD_DATA_SZ,
70 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
71 },
72 .hw_ops = &qca988x_ops,
73 .decap_align_bytes = 4,
74 },
75 {
76 .id = QCA9887_HW_1_0_VERSION,
77 .dev_id = QCA9887_1_0_DEVICE_ID,
78 .name = "qca9887 hw1.0",
79 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
80 .uart_pin = 7,
81 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
82 .otp_exe_param = 0,
83 .channel_counters_freq_hz = 88000,
84 .max_probe_resp_desc_thres = 0,
85 .cal_data_len = 2116,
86 .fw = {
87 .dir = QCA9887_HW_1_0_FW_DIR,
88 .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
89 .board_size = QCA9887_BOARD_DATA_SZ,
90 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
91 },
92 .hw_ops = &qca988x_ops,
93 .decap_align_bytes = 4,
94 },
95 {
96 .id = QCA6174_HW_2_1_VERSION,
97 .dev_id = QCA6164_2_1_DEVICE_ID,
98 .name = "qca6164 hw2.1",
99 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
100 .uart_pin = 6,
101 .otp_exe_param = 0,
102 .channel_counters_freq_hz = 88000,
103 .max_probe_resp_desc_thres = 0,
104 .cal_data_len = 8124,
105 .fw = {
106 .dir = QCA6174_HW_2_1_FW_DIR,
107 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
108 .board_size = QCA6174_BOARD_DATA_SZ,
109 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
110 },
111 .hw_ops = &qca988x_ops,
112 .decap_align_bytes = 4,
113 },
114 {
115 .id = QCA6174_HW_2_1_VERSION,
116 .dev_id = QCA6174_2_1_DEVICE_ID,
117 .name = "qca6174 hw2.1",
118 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
119 .uart_pin = 6,
120 .otp_exe_param = 0,
121 .channel_counters_freq_hz = 88000,
122 .max_probe_resp_desc_thres = 0,
123 .cal_data_len = 8124,
124 .fw = {
125 .dir = QCA6174_HW_2_1_FW_DIR,
126 .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
127 .board_size = QCA6174_BOARD_DATA_SZ,
128 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
129 },
130 .hw_ops = &qca988x_ops,
131 .decap_align_bytes = 4,
132 },
133 {
134 .id = QCA6174_HW_3_0_VERSION,
135 .dev_id = QCA6174_2_1_DEVICE_ID,
136 .name = "qca6174 hw3.0",
137 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
138 .uart_pin = 6,
139 .otp_exe_param = 0,
140 .channel_counters_freq_hz = 88000,
141 .max_probe_resp_desc_thres = 0,
142 .cal_data_len = 8124,
143 .fw = {
144 .dir = QCA6174_HW_3_0_FW_DIR,
145 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
146 .board_size = QCA6174_BOARD_DATA_SZ,
147 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
148 },
149 .hw_ops = &qca988x_ops,
150 .decap_align_bytes = 4,
151 },
152 {
153 .id = QCA6174_HW_3_2_VERSION,
154 .dev_id = QCA6174_2_1_DEVICE_ID,
155 .name = "qca6174 hw3.2",
156 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
157 .uart_pin = 6,
158 .otp_exe_param = 0,
159 .channel_counters_freq_hz = 88000,
160 .max_probe_resp_desc_thres = 0,
161 .cal_data_len = 8124,
162 .fw = {
163
164 .dir = QCA6174_HW_3_0_FW_DIR,
165 .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
166 .board_size = QCA6174_BOARD_DATA_SZ,
167 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
168 },
169 .hw_ops = &qca988x_ops,
170 .decap_align_bytes = 4,
171 },
172 {
173 .id = QCA99X0_HW_2_0_DEV_VERSION,
174 .dev_id = QCA99X0_2_0_DEVICE_ID,
175 .name = "qca99x0 hw2.0",
176 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
177 .uart_pin = 7,
178 .otp_exe_param = 0x00000700,
179 .continuous_frag_desc = true,
180 .cck_rate_map_rev2 = true,
181 .channel_counters_freq_hz = 150000,
182 .max_probe_resp_desc_thres = 24,
183 .tx_chain_mask = 0xf,
184 .rx_chain_mask = 0xf,
185 .max_spatial_stream = 4,
186 .cal_data_len = 12064,
187 .fw = {
188 .dir = QCA99X0_HW_2_0_FW_DIR,
189 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
190 .board_size = QCA99X0_BOARD_DATA_SZ,
191 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
192 },
193 .sw_decrypt_mcast_mgmt = true,
194 .hw_ops = &qca99x0_ops,
195 .decap_align_bytes = 1,
196 },
197 {
198 .id = QCA9984_HW_1_0_DEV_VERSION,
199 .dev_id = QCA9984_1_0_DEVICE_ID,
200 .name = "qca9984/qca9994 hw1.0",
201 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
202 .uart_pin = 7,
203 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
204 .otp_exe_param = 0x00000700,
205 .continuous_frag_desc = true,
206 .cck_rate_map_rev2 = true,
207 .channel_counters_freq_hz = 150000,
208 .max_probe_resp_desc_thres = 24,
209 .tx_chain_mask = 0xf,
210 .rx_chain_mask = 0xf,
211 .max_spatial_stream = 4,
212 .cal_data_len = 12064,
213 .fw = {
214 .dir = QCA9984_HW_1_0_FW_DIR,
215 .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
216 .board_size = QCA99X0_BOARD_DATA_SZ,
217 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
218 },
219 .sw_decrypt_mcast_mgmt = true,
220 .hw_ops = &qca99x0_ops,
221 .decap_align_bytes = 1,
222 },
223 {
224 .id = QCA9888_HW_2_0_DEV_VERSION,
225 .dev_id = QCA9888_2_0_DEVICE_ID,
226 .name = "qca9888 hw2.0",
227 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
228 .uart_pin = 7,
229 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
230 .otp_exe_param = 0x00000700,
231 .continuous_frag_desc = true,
232 .channel_counters_freq_hz = 150000,
233 .max_probe_resp_desc_thres = 24,
234 .tx_chain_mask = 3,
235 .rx_chain_mask = 3,
236 .max_spatial_stream = 2,
237 .cal_data_len = 12064,
238 .fw = {
239 .dir = QCA9888_HW_2_0_FW_DIR,
240 .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
241 .board_size = QCA99X0_BOARD_DATA_SZ,
242 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
243 },
244 .sw_decrypt_mcast_mgmt = true,
245 .hw_ops = &qca99x0_ops,
246 .decap_align_bytes = 1,
247 },
248 {
249 .id = QCA9377_HW_1_0_DEV_VERSION,
250 .dev_id = QCA9377_1_0_DEVICE_ID,
251 .name = "qca9377 hw1.0",
252 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
253 .uart_pin = 6,
254 .otp_exe_param = 0,
255 .channel_counters_freq_hz = 88000,
256 .max_probe_resp_desc_thres = 0,
257 .cal_data_len = 8124,
258 .fw = {
259 .dir = QCA9377_HW_1_0_FW_DIR,
260 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
261 .board_size = QCA9377_BOARD_DATA_SZ,
262 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
263 },
264 .hw_ops = &qca988x_ops,
265 .decap_align_bytes = 4,
266 },
267 {
268 .id = QCA9377_HW_1_1_DEV_VERSION,
269 .dev_id = QCA9377_1_0_DEVICE_ID,
270 .name = "qca9377 hw1.1",
271 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
272 .uart_pin = 6,
273 .otp_exe_param = 0,
274 .channel_counters_freq_hz = 88000,
275 .max_probe_resp_desc_thres = 0,
276 .cal_data_len = 8124,
277 .fw = {
278 .dir = QCA9377_HW_1_0_FW_DIR,
279 .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
280 .board_size = QCA9377_BOARD_DATA_SZ,
281 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
282 },
283 .hw_ops = &qca988x_ops,
284 .decap_align_bytes = 4,
285 },
286 {
287 .id = QCA4019_HW_1_0_DEV_VERSION,
288 .dev_id = 0,
289 .name = "qca4019 hw1.0",
290 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
291 .uart_pin = 7,
292 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
293 .otp_exe_param = 0x0010000,
294 .continuous_frag_desc = true,
295 .cck_rate_map_rev2 = true,
296 .channel_counters_freq_hz = 125000,
297 .max_probe_resp_desc_thres = 24,
298 .tx_chain_mask = 0x3,
299 .rx_chain_mask = 0x3,
300 .max_spatial_stream = 2,
301 .cal_data_len = 12064,
302 .fw = {
303 .dir = QCA4019_HW_1_0_FW_DIR,
304 .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
305 .board_size = QCA4019_BOARD_DATA_SZ,
306 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
307 },
308 .sw_decrypt_mcast_mgmt = true,
309 .hw_ops = &qca99x0_ops,
310 .decap_align_bytes = 1,
311 },
312};
313
314static const char *const ath10k_core_fw_feature_str[] = {
315 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
316 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
317 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
318 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
319 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
320 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
321 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
322 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
323 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
324 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
325 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
326 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
327 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
328 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
329 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
330 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
331 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
332};
333
334static unsigned int ath10k_core_get_fw_feature_str(char *buf,
335 size_t buf_len,
336 enum ath10k_fw_features feat)
337{
338
339 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
340 ATH10K_FW_FEATURE_COUNT);
341
342 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
343 WARN_ON(!ath10k_core_fw_feature_str[feat])) {
344 return scnprintf(buf, buf_len, "bit%d", feat);
345 }
346
347 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
348}
349
350void ath10k_core_get_fw_features_str(struct ath10k *ar,
351 char *buf,
352 size_t buf_len)
353{
354 size_t len = 0;
355 int i;
356
357 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
358 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
359 if (len > 0)
360 len += scnprintf(buf + len, buf_len - len, ",");
361
362 len += ath10k_core_get_fw_feature_str(buf + len,
363 buf_len - len,
364 i);
365 }
366 }
367}
368
369static void ath10k_send_suspend_complete(struct ath10k *ar)
370{
371 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
372
373 complete(&ar->target_suspend);
374}
375
376static int ath10k_init_configure_target(struct ath10k *ar)
377{
378 u32 param_host;
379 int ret;
380
381
382 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
383 HTC_PROTOCOL_VERSION);
384 if (ret) {
385 ath10k_err(ar, "settings HTC version failed\n");
386 return ret;
387 }
388
389
390 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
391 if (ret) {
392 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
393 return ret;
394 }
395
396
397
398 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
399
400
401 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
402
403 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
404
405 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
406
407 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
408
409 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
410 if (ret) {
411 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
412 return ret;
413 }
414
415
416 ret = ath10k_bmi_write32(ar, hi_be, 0);
417 if (ret) {
418 ath10k_err(ar, "setting host CPU BE mode failed\n");
419 return ret;
420 }
421
422
423 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
424
425 if (ret) {
426 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
427 return ret;
428 }
429
430
431
432
433
434 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
435 ar->dev_id);
436 if (ret) {
437 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
438 return ret;
439 }
440
441 return 0;
442}
443
444static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
445 const char *dir,
446 const char *file)
447{
448 char filename[100];
449 const struct firmware *fw;
450 int ret;
451
452 if (file == NULL)
453 return ERR_PTR(-ENOENT);
454
455 if (dir == NULL)
456 dir = ".";
457
458 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
459 ret = request_firmware_direct(&fw, filename, ar->dev);
460 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n",
461 filename, ret);
462
463 if (ret)
464 return ERR_PTR(ret);
465
466 return fw;
467}
468
469static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
470 size_t data_len)
471{
472 u32 board_data_size = ar->hw_params.fw.board_size;
473 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
474 u32 board_ext_data_addr;
475 int ret;
476
477 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
478 if (ret) {
479 ath10k_err(ar, "could not read board ext data addr (%d)\n",
480 ret);
481 return ret;
482 }
483
484 ath10k_dbg(ar, ATH10K_DBG_BOOT,
485 "boot push board extended data addr 0x%x\n",
486 board_ext_data_addr);
487
488 if (board_ext_data_addr == 0)
489 return 0;
490
491 if (data_len != (board_data_size + board_ext_data_size)) {
492 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
493 data_len, board_data_size, board_ext_data_size);
494 return -EINVAL;
495 }
496
497 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
498 data + board_data_size,
499 board_ext_data_size);
500 if (ret) {
501 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
502 return ret;
503 }
504
505 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
506 (board_ext_data_size << 16) | 1);
507 if (ret) {
508 ath10k_err(ar, "could not write board ext data bit (%d)\n",
509 ret);
510 return ret;
511 }
512
513 return 0;
514}
515
516static int ath10k_download_board_data(struct ath10k *ar, const void *data,
517 size_t data_len)
518{
519 u32 board_data_size = ar->hw_params.fw.board_size;
520 u32 address;
521 int ret;
522
523 ret = ath10k_push_board_ext_data(ar, data, data_len);
524 if (ret) {
525 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
526 goto exit;
527 }
528
529 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
530 if (ret) {
531 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
532 goto exit;
533 }
534
535 ret = ath10k_bmi_write_memory(ar, address, data,
536 min_t(u32, board_data_size,
537 data_len));
538 if (ret) {
539 ath10k_err(ar, "could not write board data (%d)\n", ret);
540 goto exit;
541 }
542
543 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
544 if (ret) {
545 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
546 goto exit;
547 }
548
549exit:
550 return ret;
551}
552
553static int ath10k_download_cal_file(struct ath10k *ar,
554 const struct firmware *file)
555{
556 int ret;
557
558 if (!file)
559 return -ENOENT;
560
561 if (IS_ERR(file))
562 return PTR_ERR(file);
563
564 ret = ath10k_download_board_data(ar, file->data, file->size);
565 if (ret) {
566 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
567 return ret;
568 }
569
570 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
571
572 return 0;
573}
574
575static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
576{
577 struct device_node *node;
578 int data_len;
579 void *data;
580 int ret;
581
582 node = ar->dev->of_node;
583 if (!node)
584
585
586
587 return -ENOENT;
588
589 if (!of_get_property(node, dt_name, &data_len)) {
590
591 return -ENOENT;
592 }
593
594 if (data_len != ar->hw_params.cal_data_len) {
595 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
596 data_len);
597 ret = -EMSGSIZE;
598 goto out;
599 }
600
601 data = kmalloc(data_len, GFP_KERNEL);
602 if (!data) {
603 ret = -ENOMEM;
604 goto out;
605 }
606
607 ret = of_property_read_u8_array(node, dt_name, data, data_len);
608 if (ret) {
609 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
610 ret);
611 goto out_free;
612 }
613
614 ret = ath10k_download_board_data(ar, data, data_len);
615 if (ret) {
616 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
617 ret);
618 goto out_free;
619 }
620
621 ret = 0;
622
623out_free:
624 kfree(data);
625
626out:
627 return ret;
628}
629
630static int ath10k_download_cal_eeprom(struct ath10k *ar)
631{
632 size_t data_len;
633 void *data = NULL;
634 int ret;
635
636 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
637 if (ret) {
638 if (ret != -EOPNOTSUPP)
639 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
640 ret);
641 goto out_free;
642 }
643
644 ret = ath10k_download_board_data(ar, data, data_len);
645 if (ret) {
646 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
647 ret);
648 goto out_free;
649 }
650
651 ret = 0;
652
653out_free:
654 kfree(data);
655
656 return ret;
657}
658
659static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
660{
661 u32 result, address;
662 u8 board_id, chip_id;
663 int ret;
664
665 address = ar->hw_params.patch_load_addr;
666
667 if (!ar->normal_mode_fw.fw_file.otp_data ||
668 !ar->normal_mode_fw.fw_file.otp_len) {
669 ath10k_warn(ar,
670 "failed to retrieve board id because of invalid otp\n");
671 return -ENODATA;
672 }
673
674 ath10k_dbg(ar, ATH10K_DBG_BOOT,
675 "boot upload otp to 0x%x len %zd for board id\n",
676 address, ar->normal_mode_fw.fw_file.otp_len);
677
678 ret = ath10k_bmi_fast_download(ar, address,
679 ar->normal_mode_fw.fw_file.otp_data,
680 ar->normal_mode_fw.fw_file.otp_len);
681 if (ret) {
682 ath10k_err(ar, "could not write otp for board id check: %d\n",
683 ret);
684 return ret;
685 }
686
687 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
688 &result);
689 if (ret) {
690 ath10k_err(ar, "could not execute otp for board id check: %d\n",
691 ret);
692 return ret;
693 }
694
695 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
696 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
697
698 ath10k_dbg(ar, ATH10K_DBG_BOOT,
699 "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
700 result, board_id, chip_id);
701
702 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 ||
703 (board_id == 0)) {
704 ath10k_dbg(ar, ATH10K_DBG_BOOT,
705 "board id does not exist in otp, ignore it\n");
706 return -EOPNOTSUPP;
707 }
708
709 ar->id.bmi_ids_valid = true;
710 ar->id.bmi_board_id = board_id;
711 ar->id.bmi_chip_id = chip_id;
712
713 return 0;
714}
715
716static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data)
717{
718 struct ath10k *ar = data;
719 const char *bdf_ext;
720 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC;
721 u8 bdf_enabled;
722 int i;
723
724 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE)
725 return;
726
727 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) {
728 ath10k_dbg(ar, ATH10K_DBG_BOOT,
729 "wrong smbios bdf ext type length (%d).\n",
730 hdr->length);
731 return;
732 }
733
734 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET);
735 if (!bdf_enabled) {
736 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n");
737 return;
738 }
739
740
741 bdf_ext = (char *)hdr + hdr->length;
742
743 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) {
744 ath10k_dbg(ar, ATH10K_DBG_BOOT,
745 "bdf variant magic does not match.\n");
746 return;
747 }
748
749 for (i = 0; i < strlen(bdf_ext); i++) {
750 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) {
751 ath10k_dbg(ar, ATH10K_DBG_BOOT,
752 "bdf variant name contains non ascii chars.\n");
753 return;
754 }
755 }
756
757
758 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic),
759 sizeof(ar->id.bdf_ext)) < 0) {
760 ath10k_dbg(ar, ATH10K_DBG_BOOT,
761 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n",
762 bdf_ext);
763 return;
764 }
765
766 ath10k_dbg(ar, ATH10K_DBG_BOOT,
767 "found and validated bdf variant smbios_type 0x%x bdf %s\n",
768 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext);
769}
770
771static int ath10k_core_check_smbios(struct ath10k *ar)
772{
773 ar->id.bdf_ext[0] = '\0';
774 dmi_walk(ath10k_core_check_bdfext, ar);
775
776 if (ar->id.bdf_ext[0] == '\0')
777 return -ENODATA;
778
779 return 0;
780}
781
782static int ath10k_download_and_run_otp(struct ath10k *ar)
783{
784 u32 result, address = ar->hw_params.patch_load_addr;
785 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
786 int ret;
787
788 ret = ath10k_download_board_data(ar,
789 ar->running_fw->board_data,
790 ar->running_fw->board_len);
791 if (ret) {
792 ath10k_err(ar, "failed to download board data: %d\n", ret);
793 return ret;
794 }
795
796
797
798 if (!ar->running_fw->fw_file.otp_data ||
799 !ar->running_fw->fw_file.otp_len) {
800 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
801 ar->running_fw->fw_file.otp_data,
802 ar->running_fw->fw_file.otp_len);
803 return 0;
804 }
805
806 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
807 address, ar->running_fw->fw_file.otp_len);
808
809 ret = ath10k_bmi_fast_download(ar, address,
810 ar->running_fw->fw_file.otp_data,
811 ar->running_fw->fw_file.otp_len);
812 if (ret) {
813 ath10k_err(ar, "could not write otp (%d)\n", ret);
814 return ret;
815 }
816
817 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
818 if (ret) {
819 ath10k_err(ar, "could not execute otp (%d)\n", ret);
820 return ret;
821 }
822
823 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
824
825 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
826 ar->running_fw->fw_file.fw_features)) &&
827 result != 0) {
828 ath10k_err(ar, "otp calibration failed: %d", result);
829 return -EINVAL;
830 }
831
832 return 0;
833}
834
835static int ath10k_download_fw(struct ath10k *ar)
836{
837 u32 address, data_len;
838 const void *data;
839 int ret;
840
841 address = ar->hw_params.patch_load_addr;
842
843 data = ar->running_fw->fw_file.firmware_data;
844 data_len = ar->running_fw->fw_file.firmware_len;
845
846 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
847 if (ret) {
848 ath10k_err(ar, "failed to configure fw code swap: %d\n",
849 ret);
850 return ret;
851 }
852
853 ath10k_dbg(ar, ATH10K_DBG_BOOT,
854 "boot uploading firmware image %pK len %d\n",
855 data, data_len);
856
857 ret = ath10k_bmi_fast_download(ar, address, data, data_len);
858 if (ret) {
859 ath10k_err(ar, "failed to download firmware: %d\n",
860 ret);
861 return ret;
862 }
863
864 return ret;
865}
866
867static void ath10k_core_free_board_files(struct ath10k *ar)
868{
869 if (!IS_ERR(ar->normal_mode_fw.board))
870 release_firmware(ar->normal_mode_fw.board);
871
872 ar->normal_mode_fw.board = NULL;
873 ar->normal_mode_fw.board_data = NULL;
874 ar->normal_mode_fw.board_len = 0;
875}
876
877static void ath10k_core_free_firmware_files(struct ath10k *ar)
878{
879 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
880 release_firmware(ar->normal_mode_fw.fw_file.firmware);
881
882 if (!IS_ERR(ar->cal_file))
883 release_firmware(ar->cal_file);
884
885 if (!IS_ERR(ar->pre_cal_file))
886 release_firmware(ar->pre_cal_file);
887
888 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
889
890 ar->normal_mode_fw.fw_file.otp_data = NULL;
891 ar->normal_mode_fw.fw_file.otp_len = 0;
892
893 ar->normal_mode_fw.fw_file.firmware = NULL;
894 ar->normal_mode_fw.fw_file.firmware_data = NULL;
895 ar->normal_mode_fw.fw_file.firmware_len = 0;
896
897 ar->cal_file = NULL;
898 ar->pre_cal_file = NULL;
899}
900
901static int ath10k_fetch_cal_file(struct ath10k *ar)
902{
903 char filename[100];
904
905
906 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin",
907 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
908
909 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
910 if (!IS_ERR(ar->pre_cal_file))
911 goto success;
912
913
914 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
915 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
916
917 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
918 if (IS_ERR(ar->cal_file))
919
920 return PTR_ERR(ar->cal_file);
921success:
922 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
923 ATH10K_FW_DIR, filename);
924
925 return 0;
926}
927
928static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
929{
930 if (!ar->hw_params.fw.board) {
931 ath10k_err(ar, "failed to find board file fw entry\n");
932 return -EINVAL;
933 }
934
935 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
936 ar->hw_params.fw.dir,
937 ar->hw_params.fw.board);
938 if (IS_ERR(ar->normal_mode_fw.board))
939 return PTR_ERR(ar->normal_mode_fw.board);
940
941 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
942 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
943
944 return 0;
945}
946
947static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
948 const void *buf, size_t buf_len,
949 const char *boardname)
950{
951 const struct ath10k_fw_ie *hdr;
952 bool name_match_found;
953 int ret, board_ie_id;
954 size_t board_ie_len;
955 const void *board_ie_data;
956
957 name_match_found = false;
958
959
960 while (buf_len > sizeof(struct ath10k_fw_ie)) {
961 hdr = buf;
962 board_ie_id = le32_to_cpu(hdr->id);
963 board_ie_len = le32_to_cpu(hdr->len);
964 board_ie_data = hdr->data;
965
966 buf_len -= sizeof(*hdr);
967 buf += sizeof(*hdr);
968
969 if (buf_len < ALIGN(board_ie_len, 4)) {
970 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
971 buf_len, ALIGN(board_ie_len, 4));
972 ret = -EINVAL;
973 goto out;
974 }
975
976 switch (board_ie_id) {
977 case ATH10K_BD_IE_BOARD_NAME:
978 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
979 board_ie_data, board_ie_len);
980
981 if (board_ie_len != strlen(boardname))
982 break;
983
984 ret = memcmp(board_ie_data, boardname, strlen(boardname));
985 if (ret)
986 break;
987
988 name_match_found = true;
989 ath10k_dbg(ar, ATH10K_DBG_BOOT,
990 "boot found match for name '%s'",
991 boardname);
992 break;
993 case ATH10K_BD_IE_BOARD_DATA:
994 if (!name_match_found)
995
996 break;
997
998 ath10k_dbg(ar, ATH10K_DBG_BOOT,
999 "boot found board data for '%s'",
1000 boardname);
1001
1002 ar->normal_mode_fw.board_data = board_ie_data;
1003 ar->normal_mode_fw.board_len = board_ie_len;
1004
1005 ret = 0;
1006 goto out;
1007 default:
1008 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
1009 board_ie_id);
1010 break;
1011 }
1012
1013
1014 board_ie_len = ALIGN(board_ie_len, 4);
1015
1016 buf_len -= board_ie_len;
1017 buf += board_ie_len;
1018 }
1019
1020
1021 ret = -ENOENT;
1022
1023out:
1024 return ret;
1025}
1026
1027static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
1028 const char *boardname,
1029 const char *filename)
1030{
1031 size_t len, magic_len, ie_len;
1032 struct ath10k_fw_ie *hdr;
1033 const u8 *data;
1034 int ret, ie_id;
1035
1036 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
1037 ar->hw_params.fw.dir,
1038 filename);
1039 if (IS_ERR(ar->normal_mode_fw.board))
1040 return PTR_ERR(ar->normal_mode_fw.board);
1041
1042 data = ar->normal_mode_fw.board->data;
1043 len = ar->normal_mode_fw.board->size;
1044
1045
1046 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
1047 if (len < magic_len) {
1048 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
1049 ar->hw_params.fw.dir, filename, len);
1050 ret = -EINVAL;
1051 goto err;
1052 }
1053
1054 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
1055 ath10k_err(ar, "found invalid board magic\n");
1056 ret = -EINVAL;
1057 goto err;
1058 }
1059
1060
1061 magic_len = ALIGN(magic_len, 4);
1062 if (len < magic_len) {
1063 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
1064 ar->hw_params.fw.dir, filename, len);
1065 ret = -EINVAL;
1066 goto err;
1067 }
1068
1069 data += magic_len;
1070 len -= magic_len;
1071
1072 while (len > sizeof(struct ath10k_fw_ie)) {
1073 hdr = (struct ath10k_fw_ie *)data;
1074 ie_id = le32_to_cpu(hdr->id);
1075 ie_len = le32_to_cpu(hdr->len);
1076
1077 len -= sizeof(*hdr);
1078 data = hdr->data;
1079
1080 if (len < ALIGN(ie_len, 4)) {
1081 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1082 ie_id, ie_len, len);
1083 ret = -EINVAL;
1084 goto err;
1085 }
1086
1087 switch (ie_id) {
1088 case ATH10K_BD_IE_BOARD:
1089 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1090 boardname);
1091 if (ret == -ENOENT && ar->id.bdf_ext[0] != '\0') {
1092
1093 char *s, *v = ",variant=";
1094 char boardname2[100];
1095
1096 strlcpy(boardname2, boardname,
1097 sizeof(boardname2));
1098
1099 s = strstr(boardname2, v);
1100 if (s)
1101 *s = '\0';
1102
1103 ret = ath10k_core_parse_bd_ie_board(ar, data,
1104 ie_len,
1105 boardname2);
1106 }
1107
1108 if (ret == -ENOENT)
1109
1110 break;
1111 else if (ret)
1112
1113 goto err;
1114
1115
1116 goto out;
1117 }
1118
1119
1120 ie_len = ALIGN(ie_len, 4);
1121
1122 len -= ie_len;
1123 data += ie_len;
1124 }
1125
1126out:
1127 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1128 ath10k_err(ar,
1129 "failed to fetch board data for %s from %s/%s\n",
1130 boardname, ar->hw_params.fw.dir, filename);
1131 ret = -ENODATA;
1132 goto err;
1133 }
1134
1135 return 0;
1136
1137err:
1138 ath10k_core_free_board_files(ar);
1139 return ret;
1140}
1141
1142static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1143 size_t name_len)
1144{
1145
1146 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
1147
1148 if (ar->id.bmi_ids_valid) {
1149 scnprintf(name, name_len,
1150 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1151 ath10k_bus_str(ar->hif.bus),
1152 ar->id.bmi_chip_id,
1153 ar->id.bmi_board_id);
1154 goto out;
1155 }
1156
1157 if (ar->id.bdf_ext[0] != '\0')
1158 scnprintf(variant, sizeof(variant), ",variant=%s",
1159 ar->id.bdf_ext);
1160
1161 scnprintf(name, name_len,
1162 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s",
1163 ath10k_bus_str(ar->hif.bus),
1164 ar->id.vendor, ar->id.device,
1165 ar->id.subsystem_vendor, ar->id.subsystem_device, variant);
1166out:
1167 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1168
1169 return 0;
1170}
1171
1172static int ath10k_core_fetch_board_file(struct ath10k *ar)
1173{
1174 char boardname[100];
1175 int ret;
1176
1177 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1178 if (ret) {
1179 ath10k_err(ar, "failed to create board name: %d", ret);
1180 return ret;
1181 }
1182
1183 ar->bd_api = 2;
1184 ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1185 ATH10K_BOARD_API2_FILE);
1186 if (!ret)
1187 goto success;
1188
1189 ar->bd_api = 1;
1190 ret = ath10k_core_fetch_board_data_api_1(ar);
1191 if (ret) {
1192 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n",
1193 ar->hw_params.fw.dir);
1194 return ret;
1195 }
1196
1197success:
1198 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1199 return 0;
1200}
1201
1202int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1203 struct ath10k_fw_file *fw_file)
1204{
1205 size_t magic_len, len, ie_len;
1206 int ie_id, i, index, bit, ret;
1207 struct ath10k_fw_ie *hdr;
1208 const u8 *data;
1209 __le32 *timestamp, *version;
1210
1211
1212 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1213 name);
1214 if (IS_ERR(fw_file->firmware))
1215 return PTR_ERR(fw_file->firmware);
1216
1217 data = fw_file->firmware->data;
1218 len = fw_file->firmware->size;
1219
1220
1221 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1222
1223 if (len < magic_len) {
1224 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1225 ar->hw_params.fw.dir, name, len);
1226 ret = -EINVAL;
1227 goto err;
1228 }
1229
1230 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1231 ath10k_err(ar, "invalid firmware magic\n");
1232 ret = -EINVAL;
1233 goto err;
1234 }
1235
1236
1237 magic_len = ALIGN(magic_len, 4);
1238
1239 len -= magic_len;
1240 data += magic_len;
1241
1242
1243 while (len > sizeof(struct ath10k_fw_ie)) {
1244 hdr = (struct ath10k_fw_ie *)data;
1245
1246 ie_id = le32_to_cpu(hdr->id);
1247 ie_len = le32_to_cpu(hdr->len);
1248
1249 len -= sizeof(*hdr);
1250 data += sizeof(*hdr);
1251
1252 if (len < ie_len) {
1253 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1254 ie_id, len, ie_len);
1255 ret = -EINVAL;
1256 goto err;
1257 }
1258
1259 switch (ie_id) {
1260 case ATH10K_FW_IE_FW_VERSION:
1261 if (ie_len > sizeof(fw_file->fw_version) - 1)
1262 break;
1263
1264 memcpy(fw_file->fw_version, data, ie_len);
1265 fw_file->fw_version[ie_len] = '\0';
1266
1267 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1268 "found fw version %s\n",
1269 fw_file->fw_version);
1270 break;
1271 case ATH10K_FW_IE_TIMESTAMP:
1272 if (ie_len != sizeof(u32))
1273 break;
1274
1275 timestamp = (__le32 *)data;
1276
1277 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1278 le32_to_cpup(timestamp));
1279 break;
1280 case ATH10K_FW_IE_FEATURES:
1281 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1282 "found firmware features ie (%zd B)\n",
1283 ie_len);
1284
1285 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1286 index = i / 8;
1287 bit = i % 8;
1288
1289 if (index == ie_len)
1290 break;
1291
1292 if (data[index] & (1 << bit)) {
1293 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1294 "Enabling feature bit: %i\n",
1295 i);
1296 __set_bit(i, fw_file->fw_features);
1297 }
1298 }
1299
1300 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1301 fw_file->fw_features,
1302 sizeof(fw_file->fw_features));
1303 break;
1304 case ATH10K_FW_IE_FW_IMAGE:
1305 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1306 "found fw image ie (%zd B)\n",
1307 ie_len);
1308
1309 fw_file->firmware_data = data;
1310 fw_file->firmware_len = ie_len;
1311
1312 break;
1313 case ATH10K_FW_IE_OTP_IMAGE:
1314 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1315 "found otp image ie (%zd B)\n",
1316 ie_len);
1317
1318 fw_file->otp_data = data;
1319 fw_file->otp_len = ie_len;
1320
1321 break;
1322 case ATH10K_FW_IE_WMI_OP_VERSION:
1323 if (ie_len != sizeof(u32))
1324 break;
1325
1326 version = (__le32 *)data;
1327
1328 fw_file->wmi_op_version = le32_to_cpup(version);
1329
1330 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1331 fw_file->wmi_op_version);
1332 break;
1333 case ATH10K_FW_IE_HTT_OP_VERSION:
1334 if (ie_len != sizeof(u32))
1335 break;
1336
1337 version = (__le32 *)data;
1338
1339 fw_file->htt_op_version = le32_to_cpup(version);
1340
1341 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1342 fw_file->htt_op_version);
1343 break;
1344 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1345 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1346 "found fw code swap image ie (%zd B)\n",
1347 ie_len);
1348 fw_file->codeswap_data = data;
1349 fw_file->codeswap_len = ie_len;
1350 break;
1351 default:
1352 ath10k_warn(ar, "Unknown FW IE: %u\n",
1353 le32_to_cpu(hdr->id));
1354 break;
1355 }
1356
1357
1358 ie_len = ALIGN(ie_len, 4);
1359
1360 len -= ie_len;
1361 data += ie_len;
1362 }
1363
1364 if (!fw_file->firmware_data ||
1365 !fw_file->firmware_len) {
1366 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1367 ar->hw_params.fw.dir, name);
1368 ret = -ENOMEDIUM;
1369 goto err;
1370 }
1371
1372 return 0;
1373
1374err:
1375 ath10k_core_free_firmware_files(ar);
1376 return ret;
1377}
1378
1379static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name,
1380 size_t fw_name_len, int fw_api)
1381{
1382 scnprintf(fw_name, fw_name_len, "%s-%d.bin", ATH10K_FW_FILE_BASE, fw_api);
1383}
1384
1385static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1386{
1387 int ret, i;
1388 char fw_name[100];
1389
1390
1391 ath10k_fetch_cal_file(ar);
1392
1393 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) {
1394 ar->fw_api = i;
1395 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n",
1396 ar->fw_api);
1397
1398 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api);
1399 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name,
1400 &ar->normal_mode_fw.fw_file);
1401 if (!ret)
1402 goto success;
1403 }
1404
1405
1406
1407 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d",
1408 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir,
1409 ret);
1410
1411 return ret;
1412
1413success:
1414 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1415
1416 return 0;
1417}
1418
1419static int ath10k_core_pre_cal_download(struct ath10k *ar)
1420{
1421 int ret;
1422
1423 ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1424 if (ret == 0) {
1425 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1426 goto success;
1427 }
1428
1429 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1430 "boot did not find a pre calibration file, try DT next: %d\n",
1431 ret);
1432
1433 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1434 if (ret) {
1435 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1436 "unable to load pre cal data from DT: %d\n", ret);
1437 return ret;
1438 }
1439 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1440
1441success:
1442 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1443 ath10k_cal_mode_str(ar->cal_mode));
1444
1445 return 0;
1446}
1447
1448static int ath10k_core_pre_cal_config(struct ath10k *ar)
1449{
1450 int ret;
1451
1452 ret = ath10k_core_pre_cal_download(ar);
1453 if (ret) {
1454 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1455 "failed to load pre cal data: %d\n", ret);
1456 return ret;
1457 }
1458
1459 ret = ath10k_core_get_board_id_from_otp(ar);
1460 if (ret) {
1461 ath10k_err(ar, "failed to get board id: %d\n", ret);
1462 return ret;
1463 }
1464
1465 ret = ath10k_download_and_run_otp(ar);
1466 if (ret) {
1467 ath10k_err(ar, "failed to run otp: %d\n", ret);
1468 return ret;
1469 }
1470
1471 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1472 "pre cal configuration done successfully\n");
1473
1474 return 0;
1475}
1476
1477static int ath10k_download_cal_data(struct ath10k *ar)
1478{
1479 int ret;
1480
1481 ret = ath10k_core_pre_cal_config(ar);
1482 if (ret == 0)
1483 return 0;
1484
1485 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1486 "pre cal download procedure failed, try cal file: %d\n",
1487 ret);
1488
1489 ret = ath10k_download_cal_file(ar, ar->cal_file);
1490 if (ret == 0) {
1491 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1492 goto done;
1493 }
1494
1495 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1496 "boot did not find a calibration file, try DT next: %d\n",
1497 ret);
1498
1499 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1500 if (ret == 0) {
1501 ar->cal_mode = ATH10K_CAL_MODE_DT;
1502 goto done;
1503 }
1504
1505 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1506 "boot did not find DT entry, try target EEPROM next: %d\n",
1507 ret);
1508
1509 ret = ath10k_download_cal_eeprom(ar);
1510 if (ret == 0) {
1511 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1512 goto done;
1513 }
1514
1515 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1516 "boot did not find target EEPROM entry, try OTP next: %d\n",
1517 ret);
1518
1519 ret = ath10k_download_and_run_otp(ar);
1520 if (ret) {
1521 ath10k_err(ar, "failed to run otp: %d\n", ret);
1522 return ret;
1523 }
1524
1525 ar->cal_mode = ATH10K_CAL_MODE_OTP;
1526
1527done:
1528 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1529 ath10k_cal_mode_str(ar->cal_mode));
1530 return 0;
1531}
1532
1533static int ath10k_init_uart(struct ath10k *ar)
1534{
1535 int ret;
1536
1537
1538
1539
1540
1541 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1542 if (ret) {
1543 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1544 return ret;
1545 }
1546
1547 if (!uart_print)
1548 return 0;
1549
1550 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1551 if (ret) {
1552 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1553 return ret;
1554 }
1555
1556 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1557 if (ret) {
1558 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1559 return ret;
1560 }
1561
1562
1563 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1564 if (ret) {
1565 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1566 return ret;
1567 }
1568
1569 ath10k_info(ar, "UART prints enabled\n");
1570 return 0;
1571}
1572
1573static int ath10k_init_hw_params(struct ath10k *ar)
1574{
1575 const struct ath10k_hw_params *uninitialized_var(hw_params);
1576 int i;
1577
1578 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1579 hw_params = &ath10k_hw_params_list[i];
1580
1581 if (hw_params->id == ar->target_version &&
1582 hw_params->dev_id == ar->dev_id)
1583 break;
1584 }
1585
1586 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1587 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1588 ar->target_version);
1589 return -EINVAL;
1590 }
1591
1592 ar->hw_params = *hw_params;
1593
1594 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1595 ar->hw_params.name, ar->target_version);
1596
1597 return 0;
1598}
1599
1600static void ath10k_core_restart(struct work_struct *work)
1601{
1602 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1603 int ret;
1604
1605 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1606
1607
1608
1609
1610 barrier();
1611
1612 ieee80211_stop_queues(ar->hw);
1613 ath10k_drain_tx(ar);
1614 complete(&ar->scan.started);
1615 complete(&ar->scan.completed);
1616 complete(&ar->scan.on_channel);
1617 complete(&ar->offchan_tx_completed);
1618 complete(&ar->install_key_done);
1619 complete(&ar->vdev_setup_done);
1620 complete(&ar->thermal.wmi_sync);
1621 complete(&ar->bss_survey_done);
1622 wake_up(&ar->htt.empty_tx_wq);
1623 wake_up(&ar->wmi.tx_credits_wq);
1624 wake_up(&ar->peer_mapping_wq);
1625
1626 mutex_lock(&ar->conf_mutex);
1627
1628 switch (ar->state) {
1629 case ATH10K_STATE_ON:
1630 ar->state = ATH10K_STATE_RESTARTING;
1631 ath10k_halt(ar);
1632 ath10k_scan_finish(ar);
1633 ieee80211_restart_hw(ar->hw);
1634 break;
1635 case ATH10K_STATE_OFF:
1636
1637
1638 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1639 break;
1640 case ATH10K_STATE_RESTARTING:
1641
1642 break;
1643 case ATH10K_STATE_RESTARTED:
1644 ar->state = ATH10K_STATE_WEDGED;
1645
1646 case ATH10K_STATE_WEDGED:
1647 ath10k_warn(ar, "device is wedged, will not restart\n");
1648 break;
1649 case ATH10K_STATE_UTF:
1650 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1651 break;
1652 }
1653
1654 mutex_unlock(&ar->conf_mutex);
1655
1656 ret = ath10k_debug_fw_devcoredump(ar);
1657 if (ret)
1658 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
1659 ret);
1660}
1661
1662static void ath10k_core_set_coverage_class_work(struct work_struct *work)
1663{
1664 struct ath10k *ar = container_of(work, struct ath10k,
1665 set_coverage_class_work);
1666
1667 if (ar->hw_params.hw_ops->set_coverage_class)
1668 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
1669}
1670
1671static int ath10k_core_init_firmware_features(struct ath10k *ar)
1672{
1673 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1674
1675 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1676 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1677 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1678 return -EINVAL;
1679 }
1680
1681 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1682 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1683 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1684 return -EINVAL;
1685 }
1686
1687 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1688 switch (ath10k_cryptmode_param) {
1689 case ATH10K_CRYPT_MODE_HW:
1690 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1691 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1692 break;
1693 case ATH10K_CRYPT_MODE_SW:
1694 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1695 fw_file->fw_features)) {
1696 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1697 return -EINVAL;
1698 }
1699
1700 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1701 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1702 break;
1703 default:
1704 ath10k_info(ar, "invalid cryptmode: %d\n",
1705 ath10k_cryptmode_param);
1706 return -EINVAL;
1707 }
1708
1709 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1710 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1711
1712 if (rawmode) {
1713 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1714 fw_file->fw_features)) {
1715 ath10k_err(ar, "rawmode = 1 requires support from firmware");
1716 return -EINVAL;
1717 }
1718 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1719 }
1720
1721 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1722 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733 ar->htt.max_num_amsdu = 1;
1734 }
1735
1736
1737
1738
1739 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1740 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1741 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1742 fw_file->fw_features))
1743 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1744 else
1745 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1746 } else {
1747 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1748 }
1749 }
1750
1751 switch (fw_file->wmi_op_version) {
1752 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1753 ar->max_num_peers = TARGET_NUM_PEERS;
1754 ar->max_num_stations = TARGET_NUM_STATIONS;
1755 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1756 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1757 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1758 WMI_STAT_PEER;
1759 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1760 break;
1761 case ATH10K_FW_WMI_OP_VERSION_10_1:
1762 case ATH10K_FW_WMI_OP_VERSION_10_2:
1763 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1764 if (ath10k_peer_stats_enabled(ar)) {
1765 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1766 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1767 } else {
1768 ar->max_num_peers = TARGET_10X_NUM_PEERS;
1769 ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1770 }
1771 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1772 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1773 ar->fw_stats_req_mask = WMI_STAT_PEER;
1774 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1775 break;
1776 case ATH10K_FW_WMI_OP_VERSION_TLV:
1777 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1778 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1779 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1780 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1781 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1782 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1783 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1784 WMI_STAT_PEER;
1785 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1786 break;
1787 case ATH10K_FW_WMI_OP_VERSION_10_4:
1788 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1789 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1790 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1791 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1792 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1793 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1794 WMI_10_4_STAT_PEER_EXTD;
1795 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1796
1797 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1798 fw_file->fw_features))
1799 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1800 else
1801 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1802 break;
1803 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1804 case ATH10K_FW_WMI_OP_VERSION_MAX:
1805 WARN_ON(1);
1806 return -EINVAL;
1807 }
1808
1809
1810
1811
1812 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1813 switch (fw_file->wmi_op_version) {
1814 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1815 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1816 break;
1817 case ATH10K_FW_WMI_OP_VERSION_10_1:
1818 case ATH10K_FW_WMI_OP_VERSION_10_2:
1819 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1820 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1821 break;
1822 case ATH10K_FW_WMI_OP_VERSION_TLV:
1823 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1824 break;
1825 case ATH10K_FW_WMI_OP_VERSION_10_4:
1826 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1827 case ATH10K_FW_WMI_OP_VERSION_MAX:
1828 ath10k_err(ar, "htt op version not found from fw meta data");
1829 return -EINVAL;
1830 }
1831 }
1832
1833 return 0;
1834}
1835
1836static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1837{
1838 int ret;
1839 int vdev_id;
1840 int vdev_type;
1841 int vdev_subtype;
1842 const u8 *vdev_addr;
1843
1844 vdev_id = 0;
1845 vdev_type = WMI_VDEV_TYPE_STA;
1846 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1847 vdev_addr = ar->mac_addr;
1848
1849 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1850 vdev_addr);
1851 if (ret) {
1852 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1853 return ret;
1854 }
1855
1856 ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1857 if (ret) {
1858 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1859 return ret;
1860 }
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876 ret = ath10k_wmi_barrier(ar);
1877 if (ret) {
1878 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1879 return ret;
1880 }
1881
1882 return 0;
1883}
1884
1885int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1886 const struct ath10k_fw_components *fw)
1887{
1888 int status;
1889 u32 val;
1890
1891 lockdep_assert_held(&ar->conf_mutex);
1892
1893 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1894
1895 ar->running_fw = fw;
1896
1897 ath10k_bmi_start(ar);
1898
1899 if (ath10k_init_configure_target(ar)) {
1900 status = -EINVAL;
1901 goto err;
1902 }
1903
1904 status = ath10k_download_cal_data(ar);
1905 if (status)
1906 goto err;
1907
1908
1909
1910
1911
1912
1913
1914 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1915 ar->running_fw->fw_file.fw_features)) {
1916 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1917 if (status) {
1918 ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1919 status);
1920 goto err;
1921 }
1922 }
1923
1924 status = ath10k_download_fw(ar);
1925 if (status)
1926 goto err;
1927
1928 status = ath10k_init_uart(ar);
1929 if (status)
1930 goto err;
1931
1932 ar->htc.htc_ops.target_send_suspend_complete =
1933 ath10k_send_suspend_complete;
1934
1935 status = ath10k_htc_init(ar);
1936 if (status) {
1937 ath10k_err(ar, "could not init HTC (%d)\n", status);
1938 goto err;
1939 }
1940
1941 status = ath10k_bmi_done(ar);
1942 if (status)
1943 goto err;
1944
1945 status = ath10k_wmi_attach(ar);
1946 if (status) {
1947 ath10k_err(ar, "WMI attach failed: %d\n", status);
1948 goto err;
1949 }
1950
1951 status = ath10k_htt_init(ar);
1952 if (status) {
1953 ath10k_err(ar, "failed to init htt: %d\n", status);
1954 goto err_wmi_detach;
1955 }
1956
1957 status = ath10k_htt_tx_start(&ar->htt);
1958 if (status) {
1959 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1960 goto err_wmi_detach;
1961 }
1962
1963 status = ath10k_htt_rx_alloc(&ar->htt);
1964 if (status) {
1965 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1966 goto err_htt_tx_detach;
1967 }
1968
1969 status = ath10k_hif_start(ar);
1970 if (status) {
1971 ath10k_err(ar, "could not start HIF: %d\n", status);
1972 goto err_htt_rx_detach;
1973 }
1974
1975 status = ath10k_htc_wait_target(&ar->htc);
1976 if (status) {
1977 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1978 goto err_hif_stop;
1979 }
1980
1981 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1982 status = ath10k_htt_connect(&ar->htt);
1983 if (status) {
1984 ath10k_err(ar, "failed to connect htt (%d)\n", status);
1985 goto err_hif_stop;
1986 }
1987 }
1988
1989 status = ath10k_wmi_connect(ar);
1990 if (status) {
1991 ath10k_err(ar, "could not connect wmi: %d\n", status);
1992 goto err_hif_stop;
1993 }
1994
1995 status = ath10k_htc_start(&ar->htc);
1996 if (status) {
1997 ath10k_err(ar, "failed to start htc: %d\n", status);
1998 goto err_hif_stop;
1999 }
2000
2001 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2002 status = ath10k_wmi_wait_for_service_ready(ar);
2003 if (status) {
2004 ath10k_warn(ar, "wmi service ready event not received");
2005 goto err_hif_stop;
2006 }
2007 }
2008
2009 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
2010 ar->hw->wiphy->fw_version);
2011
2012 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
2013 mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2014 val = 0;
2015 if (ath10k_peer_stats_enabled(ar))
2016 val = WMI_10_4_PEER_STATS;
2017
2018 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
2019 val |= WMI_10_4_BSS_CHANNEL_INFO_64;
2020
2021
2022
2023
2024
2025
2026 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
2027 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
2028 ar->running_fw->fw_file.fw_features))
2029 val |= WMI_10_4_COEX_GPIO_SUPPORT;
2030
2031 status = ath10k_mac_ext_resource_config(ar, val);
2032 if (status) {
2033 ath10k_err(ar,
2034 "failed to send ext resource cfg command : %d\n",
2035 status);
2036 goto err_hif_stop;
2037 }
2038 }
2039
2040 status = ath10k_wmi_cmd_init(ar);
2041 if (status) {
2042 ath10k_err(ar, "could not send WMI init command (%d)\n",
2043 status);
2044 goto err_hif_stop;
2045 }
2046
2047 status = ath10k_wmi_wait_for_unified_ready(ar);
2048 if (status) {
2049 ath10k_err(ar, "wmi unified ready event not received\n");
2050 goto err_hif_stop;
2051 }
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2067 status = ath10k_core_reset_rx_filter(ar);
2068 if (status) {
2069 ath10k_err(ar,
2070 "failed to reset rx filter: %d\n", status);
2071 goto err_hif_stop;
2072 }
2073 }
2074
2075
2076
2077
2078 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
2079 ar->wmi.svc_map));
2080
2081 status = ath10k_htt_rx_ring_refill(ar);
2082 if (status) {
2083 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
2084 goto err_hif_stop;
2085 }
2086
2087 if (ar->max_num_vdevs >= 64)
2088 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
2089 else
2090 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
2091
2092 INIT_LIST_HEAD(&ar->arvifs);
2093
2094
2095 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2096 status = ath10k_htt_setup(&ar->htt);
2097 if (status) {
2098 ath10k_err(ar, "failed to setup htt: %d\n", status);
2099 goto err_hif_stop;
2100 }
2101 }
2102
2103 status = ath10k_debug_start(ar);
2104 if (status)
2105 goto err_hif_stop;
2106
2107 return 0;
2108
2109err_hif_stop:
2110 ath10k_hif_stop(ar);
2111err_htt_rx_detach:
2112 ath10k_htt_rx_free(&ar->htt);
2113err_htt_tx_detach:
2114 ath10k_htt_tx_free(&ar->htt);
2115err_wmi_detach:
2116 ath10k_wmi_detach(ar);
2117err:
2118 return status;
2119}
2120EXPORT_SYMBOL(ath10k_core_start);
2121
2122int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2123{
2124 int ret;
2125 unsigned long time_left;
2126
2127 reinit_completion(&ar->target_suspend);
2128
2129 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2130 if (ret) {
2131 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2132 return ret;
2133 }
2134
2135 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2136
2137 if (!time_left) {
2138 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2139 return -ETIMEDOUT;
2140 }
2141
2142 return 0;
2143}
2144
2145void ath10k_core_stop(struct ath10k *ar)
2146{
2147 lockdep_assert_held(&ar->conf_mutex);
2148 ath10k_debug_stop(ar);
2149
2150
2151 if (ar->state != ATH10K_STATE_RESTARTING &&
2152 ar->state != ATH10K_STATE_UTF)
2153 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2154
2155 ath10k_hif_stop(ar);
2156 ath10k_htt_tx_stop(&ar->htt);
2157 ath10k_htt_rx_free(&ar->htt);
2158 ath10k_wmi_detach(ar);
2159}
2160EXPORT_SYMBOL(ath10k_core_stop);
2161
2162
2163
2164
2165
2166static int ath10k_core_probe_fw(struct ath10k *ar)
2167{
2168 struct bmi_target_info target_info;
2169 int ret = 0;
2170
2171 ret = ath10k_hif_power_up(ar);
2172 if (ret) {
2173 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2174 return ret;
2175 }
2176
2177 memset(&target_info, 0, sizeof(target_info));
2178 ret = ath10k_bmi_get_target_info(ar, &target_info);
2179 if (ret) {
2180 ath10k_err(ar, "could not get target info (%d)\n", ret);
2181 goto err_power_down;
2182 }
2183
2184 ar->target_version = target_info.version;
2185 ar->hw->wiphy->hw_version = target_info.version;
2186
2187 ret = ath10k_init_hw_params(ar);
2188 if (ret) {
2189 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2190 goto err_power_down;
2191 }
2192
2193 ret = ath10k_core_fetch_firmware_files(ar);
2194 if (ret) {
2195 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2196 goto err_power_down;
2197 }
2198
2199 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2200 sizeof(ar->normal_mode_fw.fw_file.fw_version));
2201 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2202 sizeof(ar->hw->wiphy->fw_version));
2203
2204 ath10k_debug_print_hwfw_info(ar);
2205
2206 ret = ath10k_core_pre_cal_download(ar);
2207 if (ret) {
2208
2209
2210
2211 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2212 "could not load pre cal data: %d\n", ret);
2213 }
2214
2215 ret = ath10k_core_get_board_id_from_otp(ar);
2216 if (ret && ret != -EOPNOTSUPP) {
2217 ath10k_err(ar, "failed to get board id from otp: %d\n",
2218 ret);
2219 goto err_free_firmware_files;
2220 }
2221
2222 ret = ath10k_core_check_smbios(ar);
2223 if (ret)
2224 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not set.\n");
2225
2226 ret = ath10k_core_fetch_board_file(ar);
2227 if (ret) {
2228 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2229 goto err_free_firmware_files;
2230 }
2231
2232 ath10k_debug_print_board_info(ar);
2233
2234 ret = ath10k_core_init_firmware_features(ar);
2235 if (ret) {
2236 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2237 ret);
2238 goto err_free_firmware_files;
2239 }
2240
2241 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
2242 if (ret) {
2243 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2244 ret);
2245 goto err_free_firmware_files;
2246 }
2247
2248 mutex_lock(&ar->conf_mutex);
2249
2250 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2251 &ar->normal_mode_fw);
2252 if (ret) {
2253 ath10k_err(ar, "could not init core (%d)\n", ret);
2254 goto err_unlock;
2255 }
2256
2257 ath10k_debug_print_boot_info(ar);
2258 ath10k_core_stop(ar);
2259
2260 mutex_unlock(&ar->conf_mutex);
2261
2262 ath10k_hif_power_down(ar);
2263 return 0;
2264
2265err_unlock:
2266 mutex_unlock(&ar->conf_mutex);
2267
2268err_free_firmware_files:
2269 ath10k_core_free_firmware_files(ar);
2270
2271err_power_down:
2272 ath10k_hif_power_down(ar);
2273
2274 return ret;
2275}
2276
2277static void ath10k_core_register_work(struct work_struct *work)
2278{
2279 struct ath10k *ar = container_of(work, struct ath10k, register_work);
2280 int status;
2281
2282
2283 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2284
2285 status = ath10k_core_probe_fw(ar);
2286 if (status) {
2287 ath10k_err(ar, "could not probe fw (%d)\n", status);
2288 goto err;
2289 }
2290
2291 status = ath10k_mac_register(ar);
2292 if (status) {
2293 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2294 goto err_release_fw;
2295 }
2296
2297 status = ath10k_debug_register(ar);
2298 if (status) {
2299 ath10k_err(ar, "unable to initialize debugfs\n");
2300 goto err_unregister_mac;
2301 }
2302
2303 status = ath10k_spectral_create(ar);
2304 if (status) {
2305 ath10k_err(ar, "failed to initialize spectral\n");
2306 goto err_debug_destroy;
2307 }
2308
2309 status = ath10k_thermal_register(ar);
2310 if (status) {
2311 ath10k_err(ar, "could not register thermal device: %d\n",
2312 status);
2313 goto err_spectral_destroy;
2314 }
2315
2316 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2317 return;
2318
2319err_spectral_destroy:
2320 ath10k_spectral_destroy(ar);
2321err_debug_destroy:
2322 ath10k_debug_destroy(ar);
2323err_unregister_mac:
2324 ath10k_mac_unregister(ar);
2325err_release_fw:
2326 ath10k_core_free_firmware_files(ar);
2327err:
2328
2329
2330
2331 return;
2332}
2333
2334int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2335{
2336 ar->chip_id = chip_id;
2337 queue_work(ar->workqueue, &ar->register_work);
2338
2339 return 0;
2340}
2341EXPORT_SYMBOL(ath10k_core_register);
2342
2343void ath10k_core_unregister(struct ath10k *ar)
2344{
2345 cancel_work_sync(&ar->register_work);
2346
2347 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2348 return;
2349
2350 ath10k_thermal_unregister(ar);
2351
2352
2353
2354
2355 ath10k_spectral_destroy(ar);
2356
2357
2358
2359
2360 ath10k_mac_unregister(ar);
2361
2362 ath10k_testmode_destroy(ar);
2363
2364 ath10k_core_free_firmware_files(ar);
2365 ath10k_core_free_board_files(ar);
2366
2367 ath10k_debug_unregister(ar);
2368}
2369EXPORT_SYMBOL(ath10k_core_unregister);
2370
2371struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2372 enum ath10k_bus bus,
2373 enum ath10k_hw_rev hw_rev,
2374 const struct ath10k_hif_ops *hif_ops)
2375{
2376 struct ath10k *ar;
2377 int ret;
2378
2379 ar = ath10k_mac_create(priv_size);
2380 if (!ar)
2381 return NULL;
2382
2383 ar->ath_common.priv = ar;
2384 ar->ath_common.hw = ar->hw;
2385 ar->dev = dev;
2386 ar->hw_rev = hw_rev;
2387 ar->hif.ops = hif_ops;
2388 ar->hif.bus = bus;
2389
2390 switch (hw_rev) {
2391 case ATH10K_HW_QCA988X:
2392 case ATH10K_HW_QCA9887:
2393 ar->regs = &qca988x_regs;
2394 ar->hw_values = &qca988x_values;
2395 break;
2396 case ATH10K_HW_QCA6174:
2397 case ATH10K_HW_QCA9377:
2398 ar->regs = &qca6174_regs;
2399 ar->hw_values = &qca6174_values;
2400 break;
2401 case ATH10K_HW_QCA99X0:
2402 case ATH10K_HW_QCA9984:
2403 ar->regs = &qca99x0_regs;
2404 ar->hw_values = &qca99x0_values;
2405 break;
2406 case ATH10K_HW_QCA9888:
2407 ar->regs = &qca99x0_regs;
2408 ar->hw_values = &qca9888_values;
2409 break;
2410 case ATH10K_HW_QCA4019:
2411 ar->regs = &qca4019_regs;
2412 ar->hw_values = &qca4019_values;
2413 break;
2414 default:
2415 ath10k_err(ar, "unsupported core hardware revision %d\n",
2416 hw_rev);
2417 ret = -ENOTSUPP;
2418 goto err_free_mac;
2419 }
2420
2421 init_completion(&ar->scan.started);
2422 init_completion(&ar->scan.completed);
2423 init_completion(&ar->scan.on_channel);
2424 init_completion(&ar->target_suspend);
2425 init_completion(&ar->wow.wakeup_completed);
2426
2427 init_completion(&ar->install_key_done);
2428 init_completion(&ar->vdev_setup_done);
2429 init_completion(&ar->thermal.wmi_sync);
2430 init_completion(&ar->bss_survey_done);
2431
2432 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2433
2434 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2435 if (!ar->workqueue)
2436 goto err_free_mac;
2437
2438 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2439 if (!ar->workqueue_aux)
2440 goto err_free_wq;
2441
2442 mutex_init(&ar->conf_mutex);
2443 spin_lock_init(&ar->data_lock);
2444 spin_lock_init(&ar->txqs_lock);
2445
2446 INIT_LIST_HEAD(&ar->txqs);
2447 INIT_LIST_HEAD(&ar->peers);
2448 init_waitqueue_head(&ar->peer_mapping_wq);
2449 init_waitqueue_head(&ar->htt.empty_tx_wq);
2450 init_waitqueue_head(&ar->wmi.tx_credits_wq);
2451
2452 init_completion(&ar->offchan_tx_completed);
2453 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2454 skb_queue_head_init(&ar->offchan_tx_queue);
2455
2456 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2457 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2458
2459 INIT_WORK(&ar->register_work, ath10k_core_register_work);
2460 INIT_WORK(&ar->restart_work, ath10k_core_restart);
2461 INIT_WORK(&ar->set_coverage_class_work,
2462 ath10k_core_set_coverage_class_work);
2463
2464 init_dummy_netdev(&ar->napi_dev);
2465
2466 ret = ath10k_debug_create(ar);
2467 if (ret)
2468 goto err_free_aux_wq;
2469
2470 return ar;
2471
2472err_free_aux_wq:
2473 destroy_workqueue(ar->workqueue_aux);
2474err_free_wq:
2475 destroy_workqueue(ar->workqueue);
2476
2477err_free_mac:
2478 ath10k_mac_destroy(ar);
2479
2480 return NULL;
2481}
2482EXPORT_SYMBOL(ath10k_core_create);
2483
2484void ath10k_core_destroy(struct ath10k *ar)
2485{
2486 flush_workqueue(ar->workqueue);
2487 destroy_workqueue(ar->workqueue);
2488
2489 flush_workqueue(ar->workqueue_aux);
2490 destroy_workqueue(ar->workqueue_aux);
2491
2492 ath10k_debug_destroy(ar);
2493 ath10k_htt_tx_destroy(&ar->htt);
2494 ath10k_wmi_free_host_mem(ar);
2495 ath10k_mac_destroy(ar);
2496}
2497EXPORT_SYMBOL(ath10k_core_destroy);
2498
2499MODULE_AUTHOR("Qualcomm Atheros");
2500MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2501MODULE_LICENSE("Dual BSD/GPL");
2502