linux/drivers/net/wireless/ralink/rt2x00/rt2x00queue.h
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   1/*
   2        Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
   3        <http://rt2x00.serialmonkey.com>
   4
   5        This program is free software; you can redistribute it and/or modify
   6        it under the terms of the GNU General Public License as published by
   7        the Free Software Foundation; either version 2 of the License, or
   8        (at your option) any later version.
   9
  10        This program is distributed in the hope that it will be useful,
  11        but WITHOUT ANY WARRANTY; without even the implied warranty of
  12        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13        GNU General Public License for more details.
  14
  15        You should have received a copy of the GNU General Public License
  16        along with this program; if not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19/*
  20        Module: rt2x00
  21        Abstract: rt2x00 queue datastructures and routines
  22 */
  23
  24#ifndef RT2X00QUEUE_H
  25#define RT2X00QUEUE_H
  26
  27#include <linux/prefetch.h>
  28
  29/**
  30 * DOC: Entry frame size
  31 *
  32 * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  33 * for USB devices this restriction does not apply, but the value of
  34 * 2432 makes sense since it is big enough to contain the maximum fragment
  35 * size according to the ieee802.11 specs.
  36 * The aggregation size depends on support from the driver, but should
  37 * be something around 3840 bytes.
  38 */
  39#define DATA_FRAME_SIZE         2432
  40#define MGMT_FRAME_SIZE         256
  41#define AGGREGATION_SIZE        3840
  42
  43/**
  44 * enum data_queue_qid: Queue identification
  45 *
  46 * @QID_AC_VO: AC VO queue
  47 * @QID_AC_VI: AC VI queue
  48 * @QID_AC_BE: AC BE queue
  49 * @QID_AC_BK: AC BK queue
  50 * @QID_HCCA: HCCA queue
  51 * @QID_MGMT: MGMT queue (prio queue)
  52 * @QID_RX: RX queue
  53 * @QID_OTHER: None of the above (don't use, only present for completeness)
  54 * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  55 * @QID_ATIM: Atim queue (value unspecified, don't send it to device)
  56 */
  57enum data_queue_qid {
  58        QID_AC_VO = 0,
  59        QID_AC_VI = 1,
  60        QID_AC_BE = 2,
  61        QID_AC_BK = 3,
  62        QID_HCCA = 4,
  63        QID_MGMT = 13,
  64        QID_RX = 14,
  65        QID_OTHER = 15,
  66        QID_BEACON,
  67        QID_ATIM,
  68};
  69
  70/**
  71 * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  72 *
  73 * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  74 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  75 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  76 *      mac80211 but was stripped for processing by the driver.
  77 * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211,
  78 *      don't try to pass it back.
  79 * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the
  80 *      skb, instead of in the desc field.
  81 */
  82enum skb_frame_desc_flags {
  83        SKBDESC_DMA_MAPPED_RX = 1 << 0,
  84        SKBDESC_DMA_MAPPED_TX = 1 << 1,
  85        SKBDESC_IV_STRIPPED = 1 << 2,
  86        SKBDESC_NOT_MAC80211 = 1 << 3,
  87        SKBDESC_DESC_IN_SKB = 1 << 4,
  88};
  89
  90/**
  91 * struct skb_frame_desc: Descriptor information for the skb buffer
  92 *
  93 * This structure is placed over the driver_data array, this means that
  94 * this structure should not exceed the size of that array (40 bytes).
  95 *
  96 * @flags: Frame flags, see &enum skb_frame_desc_flags.
  97 * @desc_len: Length of the frame descriptor.
  98 * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  99 * @tx_rate_flags: the TX rate flags, used for TX status reporting
 100 * @desc: Pointer to descriptor part of the frame.
 101 *      Note that this pointer could point to something outside
 102 *      of the scope of the skb->data pointer.
 103 * @iv: IV/EIV data used during encryption/decryption.
 104 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
 105 * @entry: The entry to which this sk buffer belongs.
 106 */
 107struct skb_frame_desc {
 108        u8 flags;
 109
 110        u8 desc_len;
 111        u8 tx_rate_idx;
 112        u8 tx_rate_flags;
 113
 114        void *desc;
 115
 116        __le32 iv[2];
 117
 118        dma_addr_t skb_dma;
 119};
 120
 121/**
 122 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
 123 * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
 124 */
 125static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
 126{
 127        BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
 128                     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
 129        return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
 130}
 131
 132/**
 133 * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
 134 *
 135 * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
 136 * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
 137 * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value.
 138 * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
 139 * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
 140 * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
 141 * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary.
 142 */
 143enum rxdone_entry_desc_flags {
 144        RXDONE_SIGNAL_PLCP = BIT(0),
 145        RXDONE_SIGNAL_BITRATE = BIT(1),
 146        RXDONE_SIGNAL_MCS = BIT(2),
 147        RXDONE_MY_BSS = BIT(3),
 148        RXDONE_CRYPTO_IV = BIT(4),
 149        RXDONE_CRYPTO_ICV = BIT(5),
 150        RXDONE_L2PAD = BIT(6),
 151};
 152
 153/**
 154 * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags
 155 * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags
 156 * from &rxdone_entry_desc to a signal value type.
 157 */
 158#define RXDONE_SIGNAL_MASK \
 159        ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS )
 160
 161/**
 162 * struct rxdone_entry_desc: RX Entry descriptor
 163 *
 164 * Summary of information that has been read from the RX frame descriptor.
 165 *
 166 * @timestamp: RX Timestamp
 167 * @signal: Signal of the received frame.
 168 * @rssi: RSSI of the received frame.
 169 * @size: Data size of the received frame.
 170 * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
 171 * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
 172 * @rate_mode: Rate mode (See @enum rate_modulation).
 173 * @cipher: Cipher type used during decryption.
 174 * @cipher_status: Decryption status.
 175 * @iv: IV/EIV data used during decryption.
 176 * @icv: ICV data used during decryption.
 177 */
 178struct rxdone_entry_desc {
 179        u64 timestamp;
 180        int signal;
 181        int rssi;
 182        int size;
 183        int flags;
 184        int dev_flags;
 185        u16 rate_mode;
 186        u8 cipher;
 187        u8 cipher_status;
 188
 189        __le32 iv[2];
 190        __le32 icv;
 191};
 192
 193/**
 194 * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
 195 *
 196 * Every txdone report has to contain the basic result of the
 197 * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or
 198 * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in
 199 * conjunction with all of these flags but should only be set
 200 * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used
 201 * in conjunction with &TXDONE_FAILURE.
 202 *
 203 * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
 204 * @TXDONE_SUCCESS: Frame was successfully send
 205 * @TXDONE_FALLBACK: Hardware used fallback rates for retries
 206 * @TXDONE_FAILURE: Frame was not successfully send
 207 * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
 208 *      frame transmission failed due to excessive retries.
 209 */
 210enum txdone_entry_desc_flags {
 211        TXDONE_UNKNOWN,
 212        TXDONE_SUCCESS,
 213        TXDONE_FALLBACK,
 214        TXDONE_FAILURE,
 215        TXDONE_EXCESSIVE_RETRY,
 216        TXDONE_AMPDU,
 217};
 218
 219/**
 220 * struct txdone_entry_desc: TX done entry descriptor
 221 *
 222 * Summary of information that has been read from the TX frame descriptor
 223 * after the device is done with transmission.
 224 *
 225 * @flags: TX done flags (See &enum txdone_entry_desc_flags).
 226 * @retry: Retry count.
 227 */
 228struct txdone_entry_desc {
 229        unsigned long flags;
 230        int retry;
 231};
 232
 233/**
 234 * enum txentry_desc_flags: Status flags for TX entry descriptor
 235 *
 236 * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
 237 * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
 238 * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
 239 * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
 240 * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
 241 * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
 242 * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
 243 * @ENTRY_TXD_ACK: An ACK is required for this frame.
 244 * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
 245 * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
 246 * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
 247 * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
 248 * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
 249 * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU.
 250 * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth.
 251 * @ENTRY_TXD_HT_SHORT_GI: Use short GI.
 252 * @ENTRY_TXD_HT_MIMO_PS: The receiving STA is in dynamic SM PS mode.
 253 */
 254enum txentry_desc_flags {
 255        ENTRY_TXD_RTS_FRAME,
 256        ENTRY_TXD_CTS_FRAME,
 257        ENTRY_TXD_GENERATE_SEQ,
 258        ENTRY_TXD_FIRST_FRAGMENT,
 259        ENTRY_TXD_MORE_FRAG,
 260        ENTRY_TXD_REQ_TIMESTAMP,
 261        ENTRY_TXD_BURST,
 262        ENTRY_TXD_ACK,
 263        ENTRY_TXD_RETRY_MODE,
 264        ENTRY_TXD_ENCRYPT,
 265        ENTRY_TXD_ENCRYPT_PAIRWISE,
 266        ENTRY_TXD_ENCRYPT_IV,
 267        ENTRY_TXD_ENCRYPT_MMIC,
 268        ENTRY_TXD_HT_AMPDU,
 269        ENTRY_TXD_HT_BW_40,
 270        ENTRY_TXD_HT_SHORT_GI,
 271        ENTRY_TXD_HT_MIMO_PS,
 272};
 273
 274/**
 275 * struct txentry_desc: TX Entry descriptor
 276 *
 277 * Summary of information for the frame descriptor before sending a TX frame.
 278 *
 279 * @flags: Descriptor flags (See &enum queue_entry_flags).
 280 * @length: Length of the entire frame.
 281 * @header_length: Length of 802.11 header.
 282 * @length_high: PLCP length high word.
 283 * @length_low: PLCP length low word.
 284 * @signal: PLCP signal.
 285 * @service: PLCP service.
 286 * @msc: MCS.
 287 * @stbc: Use Space Time Block Coding (only available for MCS rates < 8).
 288 * @ba_size: Size of the recepients RX reorder buffer - 1.
 289 * @rate_mode: Rate mode (See @enum rate_modulation).
 290 * @mpdu_density: MDPU density.
 291 * @retry_limit: Max number of retries.
 292 * @ifs: IFS value.
 293 * @txop: IFS value for 11n capable chips.
 294 * @cipher: Cipher type used for encryption.
 295 * @key_idx: Key index used for encryption.
 296 * @iv_offset: Position where IV should be inserted by hardware.
 297 * @iv_len: Length of IV data.
 298 */
 299struct txentry_desc {
 300        unsigned long flags;
 301
 302        u16 length;
 303        u16 header_length;
 304
 305        union {
 306                struct {
 307                        u16 length_high;
 308                        u16 length_low;
 309                        u16 signal;
 310                        u16 service;
 311                        enum ifs ifs;
 312                } plcp;
 313
 314                struct {
 315                        u16 mcs;
 316                        u8 stbc;
 317                        u8 ba_size;
 318                        u8 mpdu_density;
 319                        enum txop txop;
 320                        int wcid;
 321                } ht;
 322        } u;
 323
 324        enum rate_modulation rate_mode;
 325
 326        short retry_limit;
 327
 328        enum cipher cipher;
 329        u16 key_idx;
 330        u16 iv_offset;
 331        u16 iv_len;
 332};
 333
 334/**
 335 * enum queue_entry_flags: Status flags for queue entry
 336 *
 337 * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
 338 *      As long as this bit is set, this entry may only be touched
 339 *      through the interface structure.
 340 * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
 341 *      transfer (either TX or RX depending on the queue). The entry should
 342 *      only be touched after the device has signaled it is done with it.
 343 * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
 344 *      for the signal to start sending.
 345 * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occurred
 346 *      while transferring the data to the hardware. No TX status report will
 347 *      be expected from the hardware.
 348 * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and
 349 *      returned. It is now waiting for the status reporting before the
 350 *      entry can be reused again.
 351 */
 352enum queue_entry_flags {
 353        ENTRY_BCN_ASSIGNED,
 354        ENTRY_BCN_ENABLED,
 355        ENTRY_OWNER_DEVICE_DATA,
 356        ENTRY_DATA_PENDING,
 357        ENTRY_DATA_IO_FAILED,
 358        ENTRY_DATA_STATUS_PENDING,
 359        ENTRY_DATA_STATUS_SET,
 360};
 361
 362/**
 363 * struct queue_entry: Entry inside the &struct data_queue
 364 *
 365 * @flags: Entry flags, see &enum queue_entry_flags.
 366 * @last_action: Timestamp of last change.
 367 * @queue: The data queue (&struct data_queue) to which this entry belongs.
 368 * @skb: The buffer which is currently being transmitted (for TX queue),
 369 *      or used to directly receive data in (for RX queue).
 370 * @entry_idx: The entry index number.
 371 * @priv_data: Private data belonging to this queue entry. The pointer
 372 *      points to data specific to a particular driver and queue type.
 373 * @status: Device specific status
 374 */
 375struct queue_entry {
 376        unsigned long flags;
 377        unsigned long last_action;
 378
 379        struct data_queue *queue;
 380
 381        struct sk_buff *skb;
 382
 383        unsigned int entry_idx;
 384
 385        u32 status;
 386
 387        void *priv_data;
 388};
 389
 390/**
 391 * enum queue_index: Queue index type
 392 *
 393 * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
 394 *      owned by the hardware then the queue is considered to be full.
 395 * @Q_INDEX_DMA_DONE: Index pointer for the next entry which will have been
 396 *      transferred to the hardware.
 397 * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
 398 *      the hardware and for which we need to run the txdone handler. If this
 399 *      entry is not owned by the hardware the queue is considered to be empty.
 400 * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
 401 *      of the index array.
 402 */
 403enum queue_index {
 404        Q_INDEX,
 405        Q_INDEX_DMA_DONE,
 406        Q_INDEX_DONE,
 407        Q_INDEX_MAX,
 408};
 409
 410/**
 411 * enum data_queue_flags: Status flags for data queues
 412 *
 413 * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the
 414 *      device might be DMA'ing skbuffers. TX queues will accept skbuffers to
 415 *      be transmitted and beacon queues will start beaconing the configured
 416 *      beacons.
 417 * @QUEUE_PAUSED: The queue has been started but is currently paused.
 418 *      When this bit is set, the queue has been stopped in mac80211,
 419 *      preventing new frames to be enqueued. However, a few frames
 420 *      might still appear shortly after the pausing...
 421 */
 422enum data_queue_flags {
 423        QUEUE_STARTED,
 424        QUEUE_PAUSED,
 425};
 426
 427/**
 428 * struct data_queue: Data queue
 429 *
 430 * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
 431 * @entries: Base address of the &struct queue_entry which are
 432 *      part of this queue.
 433 * @qid: The queue identification, see &enum data_queue_qid.
 434 * @flags: Entry flags, see &enum queue_entry_flags.
 435 * @status_lock: The mutex for protecting the start/stop/flush
 436 *      handling on this queue.
 437 * @tx_lock: Spinlock to serialize tx operations on this queue.
 438 * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or
 439 *      @index_crypt needs to be changed this lock should be grabbed to prevent
 440 *      index corruption due to concurrency.
 441 * @count: Number of frames handled in the queue.
 442 * @limit: Maximum number of entries in the queue.
 443 * @threshold: Minimum number of free entries before queue is kicked by force.
 444 * @length: Number of frames in queue.
 445 * @index: Index pointers to entry positions in the queue,
 446 *      use &enum queue_index to get a specific index field.
 447 * @txop: maximum burst time.
 448 * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
 449 * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
 450 * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
 451 * @data_size: Maximum data size for the frames in this queue.
 452 * @desc_size: Hardware descriptor size for the data in this queue.
 453 * @priv_size: Size of per-queue_entry private data.
 454 * @usb_endpoint: Device endpoint used for communication (USB only)
 455 * @usb_maxpacket: Max packet size for given endpoint (USB only)
 456 */
 457struct data_queue {
 458        struct rt2x00_dev *rt2x00dev;
 459        struct queue_entry *entries;
 460
 461        enum data_queue_qid qid;
 462        unsigned long flags;
 463
 464        struct mutex status_lock;
 465        spinlock_t tx_lock;
 466        spinlock_t index_lock;
 467
 468        unsigned int count;
 469        unsigned short limit;
 470        unsigned short threshold;
 471        unsigned short length;
 472        unsigned short index[Q_INDEX_MAX];
 473
 474        unsigned short txop;
 475        unsigned short aifs;
 476        unsigned short cw_min;
 477        unsigned short cw_max;
 478
 479        unsigned short data_size;
 480        unsigned char  desc_size;
 481        unsigned char  winfo_size;
 482        unsigned short priv_size;
 483
 484        unsigned short usb_endpoint;
 485        unsigned short usb_maxpacket;
 486};
 487
 488/**
 489 * queue_end - Return pointer to the last queue (HELPER MACRO).
 490 * @__dev: Pointer to &struct rt2x00_dev
 491 *
 492 * Using the base rx pointer and the maximum number of available queues,
 493 * this macro will return the address of 1 position beyond  the end of the
 494 * queues array.
 495 */
 496#define queue_end(__dev) \
 497        &(__dev)->rx[(__dev)->data_queues]
 498
 499/**
 500 * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
 501 * @__dev: Pointer to &struct rt2x00_dev
 502 *
 503 * Using the base tx pointer and the maximum number of available TX
 504 * queues, this macro will return the address of 1 position beyond
 505 * the end of the TX queue array.
 506 */
 507#define tx_queue_end(__dev) \
 508        &(__dev)->tx[(__dev)->ops->tx_queues]
 509
 510/**
 511 * queue_next - Return pointer to next queue in list (HELPER MACRO).
 512 * @__queue: Current queue for which we need the next queue
 513 *
 514 * Using the current queue address we take the address directly
 515 * after the queue to take the next queue. Note that this macro
 516 * should be used carefully since it does not protect against
 517 * moving past the end of the list. (See macros &queue_end and
 518 * &tx_queue_end for determining the end of the queue).
 519 */
 520#define queue_next(__queue) \
 521        &(__queue)[1]
 522
 523/**
 524 * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
 525 * @__entry: Pointer where the current queue entry will be stored in.
 526 * @__start: Start queue pointer.
 527 * @__end: End queue pointer.
 528 *
 529 * This macro will loop through all queues between &__start and &__end.
 530 */
 531#define queue_loop(__entry, __start, __end)                     \
 532        for ((__entry) = (__start);                             \
 533             prefetch(queue_next(__entry)), (__entry) != (__end);\
 534             (__entry) = queue_next(__entry))
 535
 536/**
 537 * queue_for_each - Loop through all queues
 538 * @__dev: Pointer to &struct rt2x00_dev
 539 * @__entry: Pointer where the current queue entry will be stored in.
 540 *
 541 * This macro will loop through all available queues.
 542 */
 543#define queue_for_each(__dev, __entry) \
 544        queue_loop(__entry, (__dev)->rx, queue_end(__dev))
 545
 546/**
 547 * tx_queue_for_each - Loop through the TX queues
 548 * @__dev: Pointer to &struct rt2x00_dev
 549 * @__entry: Pointer where the current queue entry will be stored in.
 550 *
 551 * This macro will loop through all TX related queues excluding
 552 * the Beacon and Atim queues.
 553 */
 554#define tx_queue_for_each(__dev, __entry) \
 555        queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
 556
 557/**
 558 * txall_queue_for_each - Loop through all TX related queues
 559 * @__dev: Pointer to &struct rt2x00_dev
 560 * @__entry: Pointer where the current queue entry will be stored in.
 561 *
 562 * This macro will loop through all TX related queues including
 563 * the Beacon and Atim queues.
 564 */
 565#define txall_queue_for_each(__dev, __entry) \
 566        queue_loop(__entry, (__dev)->tx, queue_end(__dev))
 567
 568/**
 569 * rt2x00queue_for_each_entry - Loop through all entries in the queue
 570 * @queue: Pointer to @data_queue
 571 * @start: &enum queue_index Pointer to start index
 572 * @end: &enum queue_index Pointer to end index
 573 * @data: Data to pass to the callback function
 574 * @fn: The function to call for each &struct queue_entry
 575 *
 576 * This will walk through all entries in the queue, in chronological
 577 * order. This means it will start at the current @start pointer
 578 * and will walk through the queue until it reaches the @end pointer.
 579 *
 580 * If fn returns true for an entry rt2x00queue_for_each_entry will stop
 581 * processing and return true as well.
 582 */
 583bool rt2x00queue_for_each_entry(struct data_queue *queue,
 584                                enum queue_index start,
 585                                enum queue_index end,
 586                                void *data,
 587                                bool (*fn)(struct queue_entry *entry,
 588                                           void *data));
 589
 590/**
 591 * rt2x00queue_empty - Check if the queue is empty.
 592 * @queue: Queue to check if empty.
 593 */
 594static inline int rt2x00queue_empty(struct data_queue *queue)
 595{
 596        return queue->length == 0;
 597}
 598
 599/**
 600 * rt2x00queue_full - Check if the queue is full.
 601 * @queue: Queue to check if full.
 602 */
 603static inline int rt2x00queue_full(struct data_queue *queue)
 604{
 605        return queue->length == queue->limit;
 606}
 607
 608/**
 609 * rt2x00queue_free - Check the number of available entries in queue.
 610 * @queue: Queue to check.
 611 */
 612static inline int rt2x00queue_available(struct data_queue *queue)
 613{
 614        return queue->limit - queue->length;
 615}
 616
 617/**
 618 * rt2x00queue_threshold - Check if the queue is below threshold
 619 * @queue: Queue to check.
 620 */
 621static inline int rt2x00queue_threshold(struct data_queue *queue)
 622{
 623        return rt2x00queue_available(queue) < queue->threshold;
 624}
 625/**
 626 * rt2x00queue_dma_timeout - Check if a timeout occurred for DMA transfers
 627 * @entry: Queue entry to check.
 628 */
 629static inline int rt2x00queue_dma_timeout(struct queue_entry *entry)
 630{
 631        if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
 632                return false;
 633        return time_after(jiffies, entry->last_action + msecs_to_jiffies(100));
 634}
 635
 636/**
 637 * _rt2x00_desc_read - Read a word from the hardware descriptor.
 638 * @desc: Base descriptor address
 639 * @word: Word index from where the descriptor should be read.
 640 * @value: Address where the descriptor value should be written into.
 641 */
 642static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
 643{
 644        *value = desc[word];
 645}
 646
 647/**
 648 * rt2x00_desc_read - Read a word from the hardware descriptor, this
 649 * function will take care of the byte ordering.
 650 * @desc: Base descriptor address
 651 * @word: Word index from where the descriptor should be read.
 652 * @value: Address where the descriptor value should be written into.
 653 */
 654static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
 655{
 656        __le32 tmp;
 657        _rt2x00_desc_read(desc, word, &tmp);
 658        *value = le32_to_cpu(tmp);
 659}
 660
 661/**
 662 * rt2x00_desc_write - write a word to the hardware descriptor, this
 663 * function will take care of the byte ordering.
 664 * @desc: Base descriptor address
 665 * @word: Word index from where the descriptor should be written.
 666 * @value: Value that should be written into the descriptor.
 667 */
 668static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
 669{
 670        desc[word] = value;
 671}
 672
 673/**
 674 * rt2x00_desc_write - write a word to the hardware descriptor.
 675 * @desc: Base descriptor address
 676 * @word: Word index from where the descriptor should be written.
 677 * @value: Value that should be written into the descriptor.
 678 */
 679static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
 680{
 681        _rt2x00_desc_write(desc, word, cpu_to_le32(value));
 682}
 683
 684#endif /* RT2X00QUEUE_H */
 685