1
2
3
4
5
6
7
8
9
10
11
12
13
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
26#include <uapi/scsi/cxlflash_ioctl.h>
27
28#include "main.h"
29#include "sislite.h"
30#include "common.h"
31
32MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35MODULE_LICENSE("GPL");
36
37
38
39
40
41
42
43
44static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45{
46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
51 u32 resid;
52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
69 scp->result = (DID_ERROR << 16);
70 }
71
72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
76
77 if (ioasa->rc.scsi_rc) {
78
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87
88
89
90
91 if (ioasa->rc.fc_rc) {
92
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100
101
102
103
104
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
127 scp->result = (DID_NO_CONNECT << 16);
128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148}
149
150
151
152
153
154
155
156
157
158static void cmd_complete(struct afu_cmd *cmd)
159{
160 struct scsi_cmnd *scp;
161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
164 struct device *dev = &cfg->dev->dev;
165 bool cmd_is_tmf;
166
167 if (cmd->scp) {
168 scp = cmd->scp;
169 if (unlikely(cmd->sa.ioasc))
170 process_cmd_err(cmd, scp);
171 else
172 scp->result = (DID_OK << 16);
173
174 cmd_is_tmf = cmd->cmd_tmf;
175
176 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
177 __func__, scp, scp->result, cmd->sa.ioasc);
178
179 scsi_dma_unmap(scp);
180 scp->scsi_done(scp);
181
182 if (cmd_is_tmf) {
183 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
184 cfg->tmf_active = false;
185 wake_up_all_locked(&cfg->tmf_waitq);
186 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
187 }
188 } else
189 complete(&cmd->cevent);
190}
191
192
193
194
195
196
197static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg)
198{
199 int nretry = 0;
200 u64 rrin = 0x1;
201 struct afu *afu = cmd->parent;
202 struct cxlflash_cfg *cfg = afu->parent;
203 struct device *dev = &cfg->dev->dev;
204
205 dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd);
206
207 writeq_be(rrin, reset_reg);
208 do {
209 rrin = readq_be(reset_reg);
210 if (rrin != 0x1)
211 break;
212
213 udelay(1 << nretry);
214 } while (nretry++ < MC_ROOM_RETRY_CNT);
215
216 dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n",
217 __func__, rrin, nretry);
218}
219
220
221
222
223
224static void context_reset_ioarrin(struct afu_cmd *cmd)
225{
226 struct afu *afu = cmd->parent;
227
228 context_reset(cmd, &afu->host_map->ioarrin);
229}
230
231
232
233
234
235static void context_reset_sq(struct afu_cmd *cmd)
236{
237 struct afu *afu = cmd->parent;
238
239 context_reset(cmd, &afu->host_map->sq_ctx_reset);
240}
241
242
243
244
245
246
247
248
249
250static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
251{
252 struct cxlflash_cfg *cfg = afu->parent;
253 struct device *dev = &cfg->dev->dev;
254 int rc = 0;
255 s64 room;
256 ulong lock_flags;
257
258
259
260
261
262 spin_lock_irqsave(&afu->rrin_slock, lock_flags);
263 if (--afu->room < 0) {
264 room = readq_be(&afu->host_map->cmd_room);
265 if (room <= 0) {
266 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
267 "0x%02X, room=0x%016llX\n",
268 __func__, cmd->rcb.cdb[0], room);
269 afu->room = 0;
270 rc = SCSI_MLQUEUE_HOST_BUSY;
271 goto out;
272 }
273 afu->room = room - 1;
274 }
275
276 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
277out:
278 spin_unlock_irqrestore(&afu->rrin_slock, lock_flags);
279 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
280 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
281 return rc;
282}
283
284
285
286
287
288
289
290
291
292static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
293{
294 struct cxlflash_cfg *cfg = afu->parent;
295 struct device *dev = &cfg->dev->dev;
296 int rc = 0;
297 int newval;
298 ulong lock_flags;
299
300 newval = atomic_dec_if_positive(&afu->hsq_credits);
301 if (newval <= 0) {
302 rc = SCSI_MLQUEUE_HOST_BUSY;
303 goto out;
304 }
305
306 cmd->rcb.ioasa = &cmd->sa;
307
308 spin_lock_irqsave(&afu->hsq_slock, lock_flags);
309
310 *afu->hsq_curr = cmd->rcb;
311 if (afu->hsq_curr < afu->hsq_end)
312 afu->hsq_curr++;
313 else
314 afu->hsq_curr = afu->hsq_start;
315 writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail);
316
317 spin_unlock_irqrestore(&afu->hsq_slock, lock_flags);
318out:
319 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
320 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
321 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr,
322 readq_be(&afu->host_map->sq_head),
323 readq_be(&afu->host_map->sq_tail));
324 return rc;
325}
326
327
328
329
330
331
332
333
334
335static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
336{
337 struct cxlflash_cfg *cfg = afu->parent;
338 struct device *dev = &cfg->dev->dev;
339 int rc = 0;
340 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
341
342 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
343 if (!timeout) {
344 afu->context_reset(cmd);
345 rc = -1;
346 }
347
348 if (unlikely(cmd->sa.ioasc != 0)) {
349 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
350 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
351 rc = -1;
352 }
353
354 return rc;
355}
356
357
358
359
360
361
362
363
364
365
366static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
367{
368 u32 port_sel = scp->device->channel + 1;
369 struct cxlflash_cfg *cfg = shost_priv(scp->device->host);
370 struct afu_cmd *cmd = sc_to_afucz(scp);
371 struct device *dev = &cfg->dev->dev;
372 ulong lock_flags;
373 int rc = 0;
374 ulong to;
375
376
377 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
378 if (cfg->tmf_active)
379 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
380 !cfg->tmf_active,
381 cfg->tmf_slock);
382 cfg->tmf_active = true;
383 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
384
385 cmd->scp = scp;
386 cmd->parent = afu;
387 cmd->cmd_tmf = true;
388
389 cmd->rcb.ctx_id = afu->ctx_hndl;
390 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
391 cmd->rcb.port_sel = port_sel;
392 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
393 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
394 SISL_REQ_FLAGS_SUP_UNDERRUN |
395 SISL_REQ_FLAGS_TMF_CMD);
396 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
397
398 rc = afu->send_cmd(afu, cmd);
399 if (unlikely(rc)) {
400 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
401 cfg->tmf_active = false;
402 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
403 goto out;
404 }
405
406 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
407 to = msecs_to_jiffies(5000);
408 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
409 !cfg->tmf_active,
410 cfg->tmf_slock,
411 to);
412 if (!to) {
413 cfg->tmf_active = false;
414 dev_err(dev, "%s: TMF timed out\n", __func__);
415 rc = -1;
416 }
417 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
418out:
419 return rc;
420}
421
422
423
424
425
426
427
428static const char *cxlflash_driver_info(struct Scsi_Host *host)
429{
430 return CXLFLASH_ADAPTER_NAME;
431}
432
433
434
435
436
437
438
439
440static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
441{
442 struct cxlflash_cfg *cfg = shost_priv(host);
443 struct afu *afu = cfg->afu;
444 struct device *dev = &cfg->dev->dev;
445 struct afu_cmd *cmd = sc_to_afucz(scp);
446 struct scatterlist *sg = scsi_sglist(scp);
447 u32 port_sel = scp->device->channel + 1;
448 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
449 ulong lock_flags;
450 int nseg = 0;
451 int rc = 0;
452
453 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
454 "cdb=(%08x-%08x-%08x-%08x)\n",
455 __func__, scp, host->host_no, scp->device->channel,
456 scp->device->id, scp->device->lun,
457 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
458 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
459 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
460 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
461
462
463
464
465
466 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
467 if (cfg->tmf_active) {
468 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
469 rc = SCSI_MLQUEUE_HOST_BUSY;
470 goto out;
471 }
472 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
473
474 switch (cfg->state) {
475 case STATE_RESET:
476 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
477 rc = SCSI_MLQUEUE_HOST_BUSY;
478 goto out;
479 case STATE_FAILTERM:
480 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
481 scp->result = (DID_NO_CONNECT << 16);
482 scp->scsi_done(scp);
483 rc = 0;
484 goto out;
485 default:
486 break;
487 }
488
489 if (likely(sg)) {
490 nseg = scsi_dma_map(scp);
491 if (unlikely(nseg < 0)) {
492 dev_err(dev, "%s: Fail DMA map\n", __func__);
493 rc = SCSI_MLQUEUE_HOST_BUSY;
494 goto out;
495 }
496
497 cmd->rcb.data_len = sg_dma_len(sg);
498 cmd->rcb.data_ea = sg_dma_address(sg);
499 }
500
501 cmd->scp = scp;
502 cmd->parent = afu;
503
504 cmd->rcb.ctx_id = afu->ctx_hndl;
505 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
506 cmd->rcb.port_sel = port_sel;
507 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
508
509 if (scp->sc_data_direction == DMA_TO_DEVICE)
510 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
511
512 cmd->rcb.req_flags = req_flags;
513 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
514
515 rc = afu->send_cmd(afu, cmd);
516 if (unlikely(rc))
517 scsi_dma_unmap(scp);
518out:
519 return rc;
520}
521
522
523
524
525
526static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
527{
528 struct pci_dev *pdev = cfg->dev;
529
530 if (pci_channel_offline(pdev))
531 wait_event_timeout(cfg->reset_waitq,
532 !pci_channel_offline(pdev),
533 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
534}
535
536
537
538
539
540static void free_mem(struct cxlflash_cfg *cfg)
541{
542 struct afu *afu = cfg->afu;
543
544 if (cfg->afu) {
545 free_pages((ulong)afu, get_order(sizeof(struct afu)));
546 cfg->afu = NULL;
547 }
548}
549
550
551
552
553
554
555
556
557
558
559static void stop_afu(struct cxlflash_cfg *cfg)
560{
561 struct afu *afu = cfg->afu;
562
563 cancel_work_sync(&cfg->work_q);
564
565 if (likely(afu)) {
566 while (atomic_read(&afu->cmds_active))
567 ssleep(1);
568 if (likely(afu->afu_map)) {
569 cxl_psa_unmap((void __iomem *)afu->afu_map);
570 afu->afu_map = NULL;
571 }
572 }
573}
574
575
576
577
578
579
580
581
582static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level)
583{
584 struct afu *afu = cfg->afu;
585 struct device *dev = &cfg->dev->dev;
586
587 if (!afu || !cfg->mcctx) {
588 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
589 return;
590 }
591
592 switch (level) {
593 case UNMAP_THREE:
594 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
595 case UNMAP_TWO:
596 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
597 case UNMAP_ONE:
598 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
599 case FREE_IRQ:
600 cxl_free_afu_irqs(cfg->mcctx);
601
602 case UNDO_NOOP:
603
604 break;
605 }
606}
607
608
609
610
611
612
613
614
615static void term_mc(struct cxlflash_cfg *cfg)
616{
617 int rc = 0;
618 struct afu *afu = cfg->afu;
619 struct device *dev = &cfg->dev->dev;
620
621 if (!afu || !cfg->mcctx) {
622 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
623 return;
624 }
625
626 rc = cxl_stop_context(cfg->mcctx);
627 WARN_ON(rc);
628 cfg->mcctx = NULL;
629}
630
631
632
633
634
635
636
637static void term_afu(struct cxlflash_cfg *cfg)
638{
639 struct device *dev = &cfg->dev->dev;
640
641
642
643
644
645
646
647
648
649
650 term_intr(cfg, UNMAP_THREE);
651 if (cfg->afu)
652 stop_afu(cfg);
653
654 term_mc(cfg);
655
656 dev_dbg(dev, "%s: returning\n", __func__);
657}
658
659
660
661
662
663
664
665
666
667
668
669static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
670{
671 struct afu *afu = cfg->afu;
672 struct device *dev = &cfg->dev->dev;
673 struct sisl_global_map __iomem *global;
674 struct dev_dependent_vals *ddv;
675 u64 reg, status;
676 int i, retry_cnt = 0;
677
678 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
679 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
680 return;
681
682 if (!afu || !afu->afu_map) {
683 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
684 return;
685 }
686
687 global = &afu->afu_map->global;
688
689
690 for (i = 0; i < NUM_FC_PORTS; i++) {
691 reg = readq_be(&global->fc_regs[i][FC_CONFIG2 / 8]);
692 reg |= SISL_FC_SHUTDOWN_NORMAL;
693 writeq_be(reg, &global->fc_regs[i][FC_CONFIG2 / 8]);
694 }
695
696 if (!wait)
697 return;
698
699
700 for (i = 0; i < NUM_FC_PORTS; i++) {
701 retry_cnt = 0;
702 while (true) {
703 status = readq_be(&global->fc_regs[i][FC_STATUS / 8]);
704 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
705 break;
706 if (++retry_cnt >= MC_RETRY_CNT) {
707 dev_dbg(dev, "%s: port %d shutdown processing "
708 "not yet completed\n", __func__, i);
709 break;
710 }
711 msleep(100 * retry_cnt);
712 }
713 }
714}
715
716
717
718
719
720
721
722static void cxlflash_remove(struct pci_dev *pdev)
723{
724 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
725 struct device *dev = &pdev->dev;
726 ulong lock_flags;
727
728 if (!pci_is_enabled(pdev)) {
729 dev_dbg(dev, "%s: Device is disabled\n", __func__);
730 return;
731 }
732
733
734
735
736 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
737 if (cfg->tmf_active)
738 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
739 !cfg->tmf_active,
740 cfg->tmf_slock);
741 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
742
743
744 notify_shutdown(cfg, true);
745
746 cfg->state = STATE_FAILTERM;
747 cxlflash_stop_term_user_contexts(cfg);
748
749 switch (cfg->init_state) {
750 case INIT_STATE_SCSI:
751 cxlflash_term_local_luns(cfg);
752 scsi_remove_host(cfg->host);
753
754 case INIT_STATE_AFU:
755 term_afu(cfg);
756 case INIT_STATE_PCI:
757 pci_disable_device(pdev);
758 case INIT_STATE_NONE:
759 free_mem(cfg);
760 scsi_host_put(cfg->host);
761 break;
762 }
763
764 dev_dbg(dev, "%s: returning\n", __func__);
765}
766
767
768
769
770
771
772
773
774
775
776
777static int alloc_mem(struct cxlflash_cfg *cfg)
778{
779 int rc = 0;
780 struct device *dev = &cfg->dev->dev;
781
782
783 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
784 get_order(sizeof(struct afu)));
785 if (unlikely(!cfg->afu)) {
786 dev_err(dev, "%s: cannot get %d free pages\n",
787 __func__, get_order(sizeof(struct afu)));
788 rc = -ENOMEM;
789 goto out;
790 }
791 cfg->afu->parent = cfg;
792 cfg->afu->afu_map = NULL;
793out:
794 return rc;
795}
796
797
798
799
800
801
802
803static int init_pci(struct cxlflash_cfg *cfg)
804{
805 struct pci_dev *pdev = cfg->dev;
806 struct device *dev = &cfg->dev->dev;
807 int rc = 0;
808
809 rc = pci_enable_device(pdev);
810 if (rc || pci_channel_offline(pdev)) {
811 if (pci_channel_offline(pdev)) {
812 cxlflash_wait_for_pci_err_recovery(cfg);
813 rc = pci_enable_device(pdev);
814 }
815
816 if (rc) {
817 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
818 cxlflash_wait_for_pci_err_recovery(cfg);
819 goto out;
820 }
821 }
822
823out:
824 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
825 return rc;
826}
827
828
829
830
831
832
833
834static int init_scsi(struct cxlflash_cfg *cfg)
835{
836 struct pci_dev *pdev = cfg->dev;
837 struct device *dev = &cfg->dev->dev;
838 int rc = 0;
839
840 rc = scsi_add_host(cfg->host, &pdev->dev);
841 if (rc) {
842 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
843 goto out;
844 }
845
846 scsi_scan_host(cfg->host);
847
848out:
849 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
850 return rc;
851}
852
853
854
855
856
857
858
859
860
861static void set_port_online(__be64 __iomem *fc_regs)
862{
863 u64 cmdcfg;
864
865 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
866 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE);
867 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE);
868 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
869}
870
871
872
873
874
875
876
877static void set_port_offline(__be64 __iomem *fc_regs)
878{
879 u64 cmdcfg;
880
881 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
882 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE);
883 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE);
884 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
885}
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
901{
902 u64 status;
903
904 WARN_ON(delay_us < 1000);
905
906 do {
907 msleep(delay_us / 1000);
908 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
909 if (status == U64_MAX)
910 nretry /= 2;
911 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
912 nretry--);
913
914 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
915}
916
917
918
919
920
921
922
923
924
925
926
927
928
929static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
930{
931 u64 status;
932
933 WARN_ON(delay_us < 1000);
934
935 do {
936 msleep(delay_us / 1000);
937 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
938 if (status == U64_MAX)
939 nretry /= 2;
940 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
941 nretry--);
942
943 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
944}
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
960 u64 wwpn)
961{
962 struct cxlflash_cfg *cfg = afu->parent;
963 struct device *dev = &cfg->dev->dev;
964
965 set_port_offline(fc_regs);
966 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
967 FC_PORT_STATUS_RETRY_CNT)) {
968 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
969 __func__, port);
970 }
971
972 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
973
974 set_port_online(fc_regs);
975 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
976 FC_PORT_STATUS_RETRY_CNT)) {
977 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
978 __func__, port);
979 }
980}
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
996{
997 struct cxlflash_cfg *cfg = afu->parent;
998 struct device *dev = &cfg->dev->dev;
999 u64 port_sel;
1000
1001
1002 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1003 port_sel &= ~(1ULL << port);
1004 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1005 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1006
1007 set_port_offline(fc_regs);
1008 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1009 FC_PORT_STATUS_RETRY_CNT))
1010 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1011 __func__, port);
1012
1013 set_port_online(fc_regs);
1014 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1015 FC_PORT_STATUS_RETRY_CNT))
1016 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1017 __func__, port);
1018
1019
1020 port_sel |= (1ULL << port);
1021 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1022 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1023
1024 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
1025}
1026
1027
1028
1029
1030static const struct asyc_intr_info ainfo[] = {
1031 {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
1032 {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
1033 {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
1034 {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET},
1035 {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
1036 {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST},
1037 {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
1038 {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
1039 {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
1040 {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
1041 {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
1042 {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET},
1043 {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
1044 {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST},
1045 {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
1046 {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
1047 {0x0, "", 0, 0}
1048};
1049
1050
1051
1052
1053
1054
1055
1056static const struct asyc_intr_info *find_ainfo(u64 status)
1057{
1058 const struct asyc_intr_info *info;
1059
1060 for (info = &ainfo[0]; info->status; info++)
1061 if (info->status == status)
1062 return info;
1063
1064 return NULL;
1065}
1066
1067
1068
1069
1070
1071static void afu_err_intr_init(struct afu *afu)
1072{
1073 int i;
1074 u64 reg;
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1085
1086 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1087
1088 if (afu->internal_lun)
1089 reg |= 1;
1090 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1091
1092 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1093
1094
1095 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1096
1097
1098 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1099
1100
1101 reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1102 reg &= SISL_FC_INTERNAL_MASK;
1103 if (afu->internal_lun)
1104 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1105 writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1106
1107
1108 for (i = 0; i < NUM_FC_PORTS; i++) {
1109 writeq_be(0xFFFFFFFFU,
1110 &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]);
1111 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]);
1112 }
1113
1114
1115
1116
1117
1118
1119
1120 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1121 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1122}
1123
1124
1125
1126
1127
1128
1129
1130
1131static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1132{
1133 struct afu *afu = (struct afu *)data;
1134 struct cxlflash_cfg *cfg = afu->parent;
1135 struct device *dev = &cfg->dev->dev;
1136 u64 reg;
1137 u64 reg_unmasked;
1138
1139 reg = readq_be(&afu->host_map->intr_status);
1140 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1141
1142 if (reg_unmasked == 0UL) {
1143 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1144 __func__, reg);
1145 goto cxlflash_sync_err_irq_exit;
1146 }
1147
1148 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1149 __func__, reg);
1150
1151 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1152
1153cxlflash_sync_err_irq_exit:
1154 return IRQ_HANDLED;
1155}
1156
1157
1158
1159
1160
1161
1162
1163
1164static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1165{
1166 struct afu *afu = (struct afu *)data;
1167 struct afu_cmd *cmd;
1168 struct sisl_ioasa *ioasa;
1169 struct sisl_ioarcb *ioarcb;
1170 bool toggle = afu->toggle;
1171 u64 entry,
1172 *hrrq_start = afu->hrrq_start,
1173 *hrrq_end = afu->hrrq_end,
1174 *hrrq_curr = afu->hrrq_curr;
1175
1176
1177 while (true) {
1178 entry = *hrrq_curr;
1179
1180 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1181 break;
1182
1183 entry &= ~SISL_RESP_HANDLE_T_BIT;
1184
1185 if (afu_is_sq_cmd_mode(afu)) {
1186 ioasa = (struct sisl_ioasa *)entry;
1187 cmd = container_of(ioasa, struct afu_cmd, sa);
1188 } else {
1189 ioarcb = (struct sisl_ioarcb *)entry;
1190 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1191 }
1192
1193 cmd_complete(cmd);
1194
1195
1196 if (hrrq_curr < hrrq_end)
1197 hrrq_curr++;
1198 else {
1199 hrrq_curr = hrrq_start;
1200 toggle ^= SISL_RESP_HANDLE_T_BIT;
1201 }
1202
1203 atomic_inc(&afu->hsq_credits);
1204 }
1205
1206 afu->hrrq_curr = hrrq_curr;
1207 afu->toggle = toggle;
1208
1209 return IRQ_HANDLED;
1210}
1211
1212
1213
1214
1215
1216
1217
1218
1219static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1220{
1221 struct afu *afu = (struct afu *)data;
1222 struct cxlflash_cfg *cfg = afu->parent;
1223 struct device *dev = &cfg->dev->dev;
1224 u64 reg_unmasked;
1225 const struct asyc_intr_info *info;
1226 struct sisl_global_map __iomem *global = &afu->afu_map->global;
1227 u64 reg;
1228 u8 port;
1229 int i;
1230
1231 reg = readq_be(&global->regs.aintr_status);
1232 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1233
1234 if (reg_unmasked == 0) {
1235 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
1236 __func__, reg);
1237 goto out;
1238 }
1239
1240
1241 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1242
1243
1244 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1245 info = find_ainfo(1ULL << i);
1246 if (((reg_unmasked & 0x1) == 0) || !info)
1247 continue;
1248
1249 port = info->port;
1250
1251 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
1252 __func__, port, info->desc,
1253 readq_be(&global->fc_regs[port][FC_STATUS / 8]));
1254
1255
1256
1257
1258
1259 if (info->action & LINK_RESET) {
1260 dev_err(dev, "%s: FC Port %d: resetting link\n",
1261 __func__, port);
1262 cfg->lr_state = LINK_RESET_REQUIRED;
1263 cfg->lr_port = port;
1264 schedule_work(&cfg->work_q);
1265 }
1266
1267 if (info->action & CLR_FC_ERROR) {
1268 reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]);
1269
1270
1271
1272
1273
1274
1275 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
1276 __func__, port, reg);
1277
1278 writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]);
1279 writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]);
1280 }
1281
1282 if (info->action & SCAN_HOST) {
1283 atomic_inc(&cfg->scan_host_needed);
1284 schedule_work(&cfg->work_q);
1285 }
1286 }
1287
1288out:
1289 return IRQ_HANDLED;
1290}
1291
1292
1293
1294
1295
1296
1297
1298static int start_context(struct cxlflash_cfg *cfg)
1299{
1300 struct device *dev = &cfg->dev->dev;
1301 int rc = 0;
1302
1303 rc = cxl_start_context(cfg->mcctx,
1304 cfg->afu->work.work_element_descriptor,
1305 NULL);
1306
1307 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1308 return rc;
1309}
1310
1311
1312
1313
1314
1315
1316
1317
1318static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1319{
1320 struct device *dev = &cfg->dev->dev;
1321 struct pci_dev *pdev = cfg->dev;
1322 int rc = 0;
1323 int ro_start, ro_size, i, j, k;
1324 ssize_t vpd_size;
1325 char vpd_data[CXLFLASH_VPD_LEN];
1326 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1327 char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" };
1328
1329
1330 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
1331 if (unlikely(vpd_size <= 0)) {
1332 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1333 __func__, vpd_size);
1334 rc = -ENODEV;
1335 goto out;
1336 }
1337
1338
1339 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1340 PCI_VPD_LRDT_RO_DATA);
1341 if (unlikely(ro_start < 0)) {
1342 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
1343 rc = -ENODEV;
1344 goto out;
1345 }
1346
1347
1348 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1349 j = ro_size;
1350 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1351 if (unlikely((i + j) > vpd_size)) {
1352 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1353 __func__, (i + j), vpd_size);
1354 ro_size = vpd_size - i;
1355 }
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365 for (k = 0; k < NUM_FC_PORTS; k++) {
1366 j = ro_size;
1367 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1368
1369 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1370 if (unlikely(i < 0)) {
1371 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1372 __func__, k);
1373 rc = -ENODEV;
1374 goto out;
1375 }
1376
1377 j = pci_vpd_info_field_size(&vpd_data[i]);
1378 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1379 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
1380 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1381 __func__, k);
1382 rc = -ENODEV;
1383 goto out;
1384 }
1385
1386 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1387 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1388 if (unlikely(rc)) {
1389 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1390 __func__, k);
1391 rc = -ENODEV;
1392 goto out;
1393 }
1394 }
1395
1396out:
1397 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1398 return rc;
1399}
1400
1401
1402
1403
1404
1405
1406
1407
1408static void init_pcr(struct cxlflash_cfg *cfg)
1409{
1410 struct afu *afu = cfg->afu;
1411 struct sisl_ctrl_map __iomem *ctrl_map;
1412 int i;
1413
1414 for (i = 0; i < MAX_CONTEXT; i++) {
1415 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
1416
1417
1418 writeq_be(0, &ctrl_map->rht_start);
1419 writeq_be(0, &ctrl_map->rht_cnt_id);
1420 writeq_be(0, &ctrl_map->ctx_cap);
1421 }
1422
1423
1424 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
1425 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1426 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1427
1428
1429 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
1430}
1431
1432
1433
1434
1435
1436static int init_global(struct cxlflash_cfg *cfg)
1437{
1438 struct afu *afu = cfg->afu;
1439 struct device *dev = &cfg->dev->dev;
1440 u64 wwpn[NUM_FC_PORTS];
1441 int i = 0, num_ports = 0;
1442 int rc = 0;
1443 u64 reg;
1444
1445 rc = read_vpd(cfg, &wwpn[0]);
1446 if (rc) {
1447 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
1448 goto out;
1449 }
1450
1451 dev_dbg(dev, "%s: wwpn0=%016llx wwpn1=%016llx\n",
1452 __func__, wwpn[0], wwpn[1]);
1453
1454
1455 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1456 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1457
1458 if (afu_is_sq_cmd_mode(afu)) {
1459 writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start);
1460 writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end);
1461 }
1462
1463
1464 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1465 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1466
1467
1468
1469
1470 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1471
1472
1473 if (afu->internal_lun) {
1474
1475 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1476 num_ports = NUM_FC_PORTS - 1;
1477 } else {
1478 writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel);
1479 num_ports = NUM_FC_PORTS;
1480 }
1481
1482 for (i = 0; i < num_ports; i++) {
1483
1484 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]);
1485
1486 (void)readq_be(&afu->afu_map->global.
1487 fc_regs[i][FC_CNT_CRCERR / 8]);
1488 writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i]
1489 [FC_CRC_THRESH / 8]);
1490
1491
1492 if (wwpn[i] != 0)
1493 afu_set_wwpn(afu, i,
1494 &afu->afu_map->global.fc_regs[i][0],
1495 wwpn[i]);
1496
1497
1498
1499 msleep(100);
1500 }
1501
1502
1503
1504
1505 (void)readq_be(&afu->ctrl_map->mbox_r);
1506 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1507 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1508 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1509 &afu->ctrl_map->ctx_cap);
1510
1511 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
1512out:
1513 return rc;
1514}
1515
1516
1517
1518
1519
1520static int start_afu(struct cxlflash_cfg *cfg)
1521{
1522 struct afu *afu = cfg->afu;
1523 struct device *dev = &cfg->dev->dev;
1524 int rc = 0;
1525
1526 init_pcr(cfg);
1527
1528
1529 memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry));
1530
1531
1532 afu->hrrq_start = &afu->rrq_entry[0];
1533 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1534 afu->hrrq_curr = afu->hrrq_start;
1535 afu->toggle = 1;
1536
1537
1538 if (afu_is_sq_cmd_mode(afu)) {
1539 memset(&afu->sq, 0, sizeof(afu->sq));
1540 afu->hsq_start = &afu->sq[0];
1541 afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1];
1542 afu->hsq_curr = afu->hsq_start;
1543
1544 spin_lock_init(&afu->hsq_slock);
1545 atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1);
1546 }
1547
1548 rc = init_global(cfg);
1549
1550 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1551 return rc;
1552}
1553
1554
1555
1556
1557
1558
1559
1560static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1561 struct cxl_context *ctx)
1562{
1563 struct afu *afu = cfg->afu;
1564 struct device *dev = &cfg->dev->dev;
1565 int rc = 0;
1566 enum undo_level level = UNDO_NOOP;
1567
1568 rc = cxl_allocate_afu_irqs(ctx, 3);
1569 if (unlikely(rc)) {
1570 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
1571 __func__, rc);
1572 level = UNDO_NOOP;
1573 goto out;
1574 }
1575
1576 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1577 "SISL_MSI_SYNC_ERROR");
1578 if (unlikely(rc <= 0)) {
1579 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
1580 level = FREE_IRQ;
1581 goto out;
1582 }
1583
1584 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1585 "SISL_MSI_RRQ_UPDATED");
1586 if (unlikely(rc <= 0)) {
1587 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
1588 level = UNMAP_ONE;
1589 goto out;
1590 }
1591
1592 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1593 "SISL_MSI_ASYNC_ERROR");
1594 if (unlikely(rc <= 0)) {
1595 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
1596 level = UNMAP_TWO;
1597 goto out;
1598 }
1599out:
1600 return level;
1601}
1602
1603
1604
1605
1606
1607
1608
1609static int init_mc(struct cxlflash_cfg *cfg)
1610{
1611 struct cxl_context *ctx;
1612 struct device *dev = &cfg->dev->dev;
1613 int rc = 0;
1614 enum undo_level level;
1615
1616 ctx = cxl_get_context(cfg->dev);
1617 if (unlikely(!ctx)) {
1618 rc = -ENOMEM;
1619 goto ret;
1620 }
1621 cfg->mcctx = ctx;
1622
1623
1624 cxl_set_master(ctx);
1625
1626
1627 rc = cxl_afu_reset(cfg->mcctx);
1628 if (unlikely(rc)) {
1629 dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc);
1630 goto ret;
1631 }
1632
1633 level = init_intr(cfg, ctx);
1634 if (unlikely(level)) {
1635 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
1636 goto out;
1637 }
1638
1639
1640
1641
1642
1643 rc = start_context(cfg);
1644 if (unlikely(rc)) {
1645 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1646 level = UNMAP_THREE;
1647 goto out;
1648 }
1649ret:
1650 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1651 return rc;
1652out:
1653 term_intr(cfg, level);
1654 goto ret;
1655}
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666static int init_afu(struct cxlflash_cfg *cfg)
1667{
1668 u64 reg;
1669 int rc = 0;
1670 struct afu *afu = cfg->afu;
1671 struct device *dev = &cfg->dev->dev;
1672
1673 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1674
1675 rc = init_mc(cfg);
1676 if (rc) {
1677 dev_err(dev, "%s: init_mc failed rc=%d\n",
1678 __func__, rc);
1679 goto out;
1680 }
1681
1682
1683 afu->afu_map = cxl_psa_map(cfg->mcctx);
1684 if (!afu->afu_map) {
1685 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
1686 rc = -ENOMEM;
1687 goto err1;
1688 }
1689
1690
1691 reg = readq(&afu->afu_map->global.regs.afu_version);
1692 memcpy(afu->version, ®, sizeof(reg));
1693 afu->interface_version =
1694 readq_be(&afu->afu_map->global.regs.interface_version);
1695 if ((afu->interface_version + 1) == 0) {
1696 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1697 "interface version %016llx\n", afu->version,
1698 afu->interface_version);
1699 rc = -EINVAL;
1700 goto err1;
1701 }
1702
1703 if (afu_is_sq_cmd_mode(afu)) {
1704 afu->send_cmd = send_cmd_sq;
1705 afu->context_reset = context_reset_sq;
1706 } else {
1707 afu->send_cmd = send_cmd_ioarrin;
1708 afu->context_reset = context_reset_ioarrin;
1709 }
1710
1711 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
1712 afu->version, afu->interface_version);
1713
1714 rc = start_afu(cfg);
1715 if (rc) {
1716 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
1717 goto err1;
1718 }
1719
1720 afu_err_intr_init(cfg->afu);
1721 spin_lock_init(&afu->rrin_slock);
1722 afu->room = readq_be(&afu->host_map->cmd_room);
1723
1724
1725 cxlflash_restore_luntable(cfg);
1726out:
1727 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1728 return rc;
1729
1730err1:
1731 term_intr(cfg, UNMAP_THREE);
1732 term_mc(cfg);
1733 goto out;
1734}
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
1759 res_hndl_t res_hndl_u, u8 mode)
1760{
1761 struct cxlflash_cfg *cfg = afu->parent;
1762 struct device *dev = &cfg->dev->dev;
1763 struct afu_cmd *cmd = NULL;
1764 char *buf = NULL;
1765 int rc = 0;
1766 static DEFINE_MUTEX(sync_active);
1767
1768 if (cfg->state != STATE_NORMAL) {
1769 dev_dbg(dev, "%s: Sync not required state=%u\n",
1770 __func__, cfg->state);
1771 return 0;
1772 }
1773
1774 mutex_lock(&sync_active);
1775 atomic_inc(&afu->cmds_active);
1776 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
1777 if (unlikely(!buf)) {
1778 dev_err(dev, "%s: no memory for command\n", __func__);
1779 rc = -1;
1780 goto out;
1781 }
1782
1783 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
1784 init_completion(&cmd->cevent);
1785 cmd->parent = afu;
1786
1787 dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
1788
1789 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
1790 cmd->rcb.ctx_id = afu->ctx_hndl;
1791 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
1792 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
1793
1794 cmd->rcb.cdb[0] = 0xC0;
1795 cmd->rcb.cdb[1] = mode;
1796
1797
1798 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
1799 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
1800
1801 rc = afu->send_cmd(afu, cmd);
1802 if (unlikely(rc))
1803 goto out;
1804
1805 rc = wait_resp(afu, cmd);
1806 if (unlikely(rc))
1807 rc = -1;
1808out:
1809 atomic_dec(&afu->cmds_active);
1810 mutex_unlock(&sync_active);
1811 kfree(buf);
1812 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1813 return rc;
1814}
1815
1816
1817
1818
1819
1820
1821
1822static int afu_reset(struct cxlflash_cfg *cfg)
1823{
1824 struct device *dev = &cfg->dev->dev;
1825 int rc = 0;
1826
1827
1828
1829
1830 term_afu(cfg);
1831
1832 rc = init_afu(cfg);
1833
1834 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1835 return rc;
1836}
1837
1838
1839
1840
1841
1842
1843
1844
1845static void drain_ioctls(struct cxlflash_cfg *cfg)
1846{
1847 down_write(&cfg->ioctl_rwsem);
1848 up_write(&cfg->ioctl_rwsem);
1849}
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
1860{
1861 int rc = SUCCESS;
1862 struct Scsi_Host *host = scp->device->host;
1863 struct cxlflash_cfg *cfg = shost_priv(host);
1864 struct device *dev = &cfg->dev->dev;
1865 struct afu *afu = cfg->afu;
1866 int rcr = 0;
1867
1868 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
1869 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
1870 scp->device->channel, scp->device->id, scp->device->lun,
1871 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
1872 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
1873 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
1874 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
1875
1876retry:
1877 switch (cfg->state) {
1878 case STATE_NORMAL:
1879 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
1880 if (unlikely(rcr))
1881 rc = FAILED;
1882 break;
1883 case STATE_RESET:
1884 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
1885 goto retry;
1886 default:
1887 rc = FAILED;
1888 break;
1889 }
1890
1891 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1892 return rc;
1893}
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
1909{
1910 int rc = SUCCESS;
1911 int rcr = 0;
1912 struct Scsi_Host *host = scp->device->host;
1913 struct cxlflash_cfg *cfg = shost_priv(host);
1914 struct device *dev = &cfg->dev->dev;
1915
1916 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
1917 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
1918 scp->device->channel, scp->device->id, scp->device->lun,
1919 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
1920 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
1921 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
1922 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
1923
1924 switch (cfg->state) {
1925 case STATE_NORMAL:
1926 cfg->state = STATE_RESET;
1927 drain_ioctls(cfg);
1928 cxlflash_mark_contexts_error(cfg);
1929 rcr = afu_reset(cfg);
1930 if (rcr) {
1931 rc = FAILED;
1932 cfg->state = STATE_FAILTERM;
1933 } else
1934 cfg->state = STATE_NORMAL;
1935 wake_up_all(&cfg->reset_waitq);
1936 ssleep(1);
1937
1938 case STATE_RESET:
1939 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
1940 if (cfg->state == STATE_NORMAL)
1941 break;
1942
1943 default:
1944 rc = FAILED;
1945 break;
1946 }
1947
1948 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1949 return rc;
1950}
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
1962{
1963
1964 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
1965 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
1966
1967 scsi_change_queue_depth(sdev, qdepth);
1968 return sdev->queue_depth;
1969}
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979static ssize_t cxlflash_show_port_status(u32 port, struct afu *afu, char *buf)
1980{
1981 char *disp_status;
1982 u64 status;
1983 __be64 __iomem *fc_regs;
1984
1985 if (port >= NUM_FC_PORTS)
1986 return 0;
1987
1988 fc_regs = &afu->afu_map->global.fc_regs[port][0];
1989 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1990 status &= FC_MTIP_STATUS_MASK;
1991
1992 if (status == FC_MTIP_STATUS_ONLINE)
1993 disp_status = "online";
1994 else if (status == FC_MTIP_STATUS_OFFLINE)
1995 disp_status = "offline";
1996 else
1997 disp_status = "unknown";
1998
1999 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2000}
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010static ssize_t port0_show(struct device *dev,
2011 struct device_attribute *attr,
2012 char *buf)
2013{
2014 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2015 struct afu *afu = cfg->afu;
2016
2017 return cxlflash_show_port_status(0, afu, buf);
2018}
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028static ssize_t port1_show(struct device *dev,
2029 struct device_attribute *attr,
2030 char *buf)
2031{
2032 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2033 struct afu *afu = cfg->afu;
2034
2035 return cxlflash_show_port_status(1, afu, buf);
2036}
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046static ssize_t lun_mode_show(struct device *dev,
2047 struct device_attribute *attr, char *buf)
2048{
2049 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2050 struct afu *afu = cfg->afu;
2051
2052 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
2053}
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077static ssize_t lun_mode_store(struct device *dev,
2078 struct device_attribute *attr,
2079 const char *buf, size_t count)
2080{
2081 struct Scsi_Host *shost = class_to_shost(dev);
2082 struct cxlflash_cfg *cfg = shost_priv(shost);
2083 struct afu *afu = cfg->afu;
2084 int rc;
2085 u32 lun_mode;
2086
2087 rc = kstrtouint(buf, 10, &lun_mode);
2088 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2089 afu->internal_lun = lun_mode;
2090
2091
2092
2093
2094
2095 if (afu->internal_lun)
2096 shost->max_channel = 0;
2097 else
2098 shost->max_channel = NUM_FC_PORTS - 1;
2099
2100 afu_reset(cfg);
2101 scsi_scan_host(cfg->host);
2102 }
2103
2104 return count;
2105}
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115static ssize_t ioctl_version_show(struct device *dev,
2116 struct device_attribute *attr, char *buf)
2117{
2118 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2119}
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129static ssize_t cxlflash_show_port_lun_table(u32 port,
2130 struct afu *afu,
2131 char *buf)
2132{
2133 int i;
2134 ssize_t bytes = 0;
2135 __be64 __iomem *fc_port;
2136
2137 if (port >= NUM_FC_PORTS)
2138 return 0;
2139
2140 fc_port = &afu->afu_map->global.fc_port[port][0];
2141
2142 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2143 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
2144 "%03d: %016llx\n", i, readq_be(&fc_port[i]));
2145 return bytes;
2146}
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156static ssize_t port0_lun_table_show(struct device *dev,
2157 struct device_attribute *attr,
2158 char *buf)
2159{
2160 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2161 struct afu *afu = cfg->afu;
2162
2163 return cxlflash_show_port_lun_table(0, afu, buf);
2164}
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174static ssize_t port1_lun_table_show(struct device *dev,
2175 struct device_attribute *attr,
2176 char *buf)
2177{
2178 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2179 struct afu *afu = cfg->afu;
2180
2181 return cxlflash_show_port_lun_table(1, afu, buf);
2182}
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192static ssize_t mode_show(struct device *dev,
2193 struct device_attribute *attr, char *buf)
2194{
2195 struct scsi_device *sdev = to_scsi_device(dev);
2196
2197 return scnprintf(buf, PAGE_SIZE, "%s\n",
2198 sdev->hostdata ? "superpipe" : "legacy");
2199}
2200
2201
2202
2203
2204static DEVICE_ATTR_RO(port0);
2205static DEVICE_ATTR_RO(port1);
2206static DEVICE_ATTR_RW(lun_mode);
2207static DEVICE_ATTR_RO(ioctl_version);
2208static DEVICE_ATTR_RO(port0_lun_table);
2209static DEVICE_ATTR_RO(port1_lun_table);
2210
2211static struct device_attribute *cxlflash_host_attrs[] = {
2212 &dev_attr_port0,
2213 &dev_attr_port1,
2214 &dev_attr_lun_mode,
2215 &dev_attr_ioctl_version,
2216 &dev_attr_port0_lun_table,
2217 &dev_attr_port1_lun_table,
2218 NULL
2219};
2220
2221
2222
2223
2224static DEVICE_ATTR_RO(mode);
2225
2226static struct device_attribute *cxlflash_dev_attrs[] = {
2227 &dev_attr_mode,
2228 NULL
2229};
2230
2231
2232
2233
2234static struct scsi_host_template driver_template = {
2235 .module = THIS_MODULE,
2236 .name = CXLFLASH_ADAPTER_NAME,
2237 .info = cxlflash_driver_info,
2238 .ioctl = cxlflash_ioctl,
2239 .proc_name = CXLFLASH_NAME,
2240 .queuecommand = cxlflash_queuecommand,
2241 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2242 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2243 .change_queue_depth = cxlflash_change_queue_depth,
2244 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
2245 .can_queue = CXLFLASH_MAX_CMDS,
2246 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
2247 .this_id = -1,
2248 .sg_tablesize = 1,
2249 .max_sectors = CXLFLASH_MAX_SECTORS,
2250 .use_clustering = ENABLE_CLUSTERING,
2251 .shost_attrs = cxlflash_host_attrs,
2252 .sdev_attrs = cxlflash_dev_attrs,
2253};
2254
2255
2256
2257
2258static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2259 0ULL };
2260static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
2261 CXLFLASH_NOTIFY_SHUTDOWN };
2262static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2263 CXLFLASH_NOTIFY_SHUTDOWN };
2264
2265
2266
2267
2268static struct pci_device_id cxlflash_pci_table[] = {
2269 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
2271 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
2273 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
2275 {}
2276};
2277
2278MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289static void cxlflash_worker_thread(struct work_struct *work)
2290{
2291 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2292 work_q);
2293 struct afu *afu = cfg->afu;
2294 struct device *dev = &cfg->dev->dev;
2295 int port;
2296 ulong lock_flags;
2297
2298
2299
2300 if (cfg->state != STATE_NORMAL)
2301 return;
2302
2303 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2304
2305 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2306 port = cfg->lr_port;
2307 if (port < 0)
2308 dev_err(dev, "%s: invalid port index %d\n",
2309 __func__, port);
2310 else {
2311 spin_unlock_irqrestore(cfg->host->host_lock,
2312 lock_flags);
2313
2314
2315 afu_link_reset(afu, port,
2316 &afu->afu_map->global.fc_regs[port][0]);
2317 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2318 }
2319
2320 cfg->lr_state = LINK_RESET_COMPLETE;
2321 }
2322
2323 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
2324
2325 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
2326 scsi_scan_host(cfg->host);
2327}
2328
2329
2330
2331
2332
2333
2334
2335
2336static int cxlflash_probe(struct pci_dev *pdev,
2337 const struct pci_device_id *dev_id)
2338{
2339 struct Scsi_Host *host;
2340 struct cxlflash_cfg *cfg = NULL;
2341 struct device *dev = &pdev->dev;
2342 struct dev_dependent_vals *ddv;
2343 int rc = 0;
2344
2345 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2346 __func__, pdev->irq);
2347
2348 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2349 driver_template.max_sectors = ddv->max_sectors;
2350
2351 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2352 if (!host) {
2353 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
2354 rc = -ENOMEM;
2355 goto out;
2356 }
2357
2358 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2359 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2360 host->max_channel = NUM_FC_PORTS - 1;
2361 host->unique_id = host->host_no;
2362 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2363
2364 cfg = shost_priv(host);
2365 cfg->host = host;
2366 rc = alloc_mem(cfg);
2367 if (rc) {
2368 dev_err(dev, "%s: alloc_mem failed\n", __func__);
2369 rc = -ENOMEM;
2370 scsi_host_put(cfg->host);
2371 goto out;
2372 }
2373
2374 cfg->init_state = INIT_STATE_NONE;
2375 cfg->dev = pdev;
2376 cfg->cxl_fops = cxlflash_cxl_fops;
2377
2378
2379
2380
2381
2382
2383
2384 cfg->promote_lun_index = 0;
2385 cfg->last_lun_index[0] = CXLFLASH_NUM_VLUNS/2 - 1;
2386 cfg->last_lun_index[1] = CXLFLASH_NUM_VLUNS/2 - 1;
2387
2388 cfg->dev_id = (struct pci_device_id *)dev_id;
2389
2390 init_waitqueue_head(&cfg->tmf_waitq);
2391 init_waitqueue_head(&cfg->reset_waitq);
2392
2393 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2394 cfg->lr_state = LINK_RESET_INVALID;
2395 cfg->lr_port = -1;
2396 spin_lock_init(&cfg->tmf_slock);
2397 mutex_init(&cfg->ctx_tbl_list_mutex);
2398 mutex_init(&cfg->ctx_recovery_mutex);
2399 init_rwsem(&cfg->ioctl_rwsem);
2400 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
2401 INIT_LIST_HEAD(&cfg->lluns);
2402
2403 pci_set_drvdata(pdev, cfg);
2404
2405 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2406
2407 rc = init_pci(cfg);
2408 if (rc) {
2409 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
2410 goto out_remove;
2411 }
2412 cfg->init_state = INIT_STATE_PCI;
2413
2414 rc = init_afu(cfg);
2415 if (rc) {
2416 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
2417 goto out_remove;
2418 }
2419 cfg->init_state = INIT_STATE_AFU;
2420
2421 rc = init_scsi(cfg);
2422 if (rc) {
2423 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
2424 goto out_remove;
2425 }
2426 cfg->init_state = INIT_STATE_SCSI;
2427
2428out:
2429 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2430 return rc;
2431
2432out_remove:
2433 cxlflash_remove(pdev);
2434 goto out;
2435}
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2448 pci_channel_state_t state)
2449{
2450 int rc = 0;
2451 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2452 struct device *dev = &cfg->dev->dev;
2453
2454 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2455
2456 switch (state) {
2457 case pci_channel_io_frozen:
2458 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2459 if (cfg->state == STATE_FAILTERM)
2460 return PCI_ERS_RESULT_DISCONNECT;
2461
2462 cfg->state = STATE_RESET;
2463 scsi_block_requests(cfg->host);
2464 drain_ioctls(cfg);
2465 rc = cxlflash_mark_contexts_error(cfg);
2466 if (unlikely(rc))
2467 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
2468 __func__, rc);
2469 term_afu(cfg);
2470 return PCI_ERS_RESULT_NEED_RESET;
2471 case pci_channel_io_perm_failure:
2472 cfg->state = STATE_FAILTERM;
2473 wake_up_all(&cfg->reset_waitq);
2474 scsi_unblock_requests(cfg->host);
2475 return PCI_ERS_RESULT_DISCONNECT;
2476 default:
2477 break;
2478 }
2479 return PCI_ERS_RESULT_NEED_RESET;
2480}
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2492{
2493 int rc = 0;
2494 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2495 struct device *dev = &cfg->dev->dev;
2496
2497 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2498
2499 rc = init_afu(cfg);
2500 if (unlikely(rc)) {
2501 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
2502 return PCI_ERS_RESULT_DISCONNECT;
2503 }
2504
2505 return PCI_ERS_RESULT_RECOVERED;
2506}
2507
2508
2509
2510
2511
2512static void cxlflash_pci_resume(struct pci_dev *pdev)
2513{
2514 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2515 struct device *dev = &cfg->dev->dev;
2516
2517 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2518
2519 cfg->state = STATE_NORMAL;
2520 wake_up_all(&cfg->reset_waitq);
2521 scsi_unblock_requests(cfg->host);
2522}
2523
2524static const struct pci_error_handlers cxlflash_err_handler = {
2525 .error_detected = cxlflash_pci_error_detected,
2526 .slot_reset = cxlflash_pci_slot_reset,
2527 .resume = cxlflash_pci_resume,
2528};
2529
2530
2531
2532
2533static struct pci_driver cxlflash_driver = {
2534 .name = CXLFLASH_NAME,
2535 .id_table = cxlflash_pci_table,
2536 .probe = cxlflash_probe,
2537 .remove = cxlflash_remove,
2538 .shutdown = cxlflash_remove,
2539 .err_handler = &cxlflash_err_handler,
2540};
2541
2542
2543
2544
2545
2546
2547static int __init init_cxlflash(void)
2548{
2549 cxlflash_list_init();
2550
2551 return pci_register_driver(&cxlflash_driver);
2552}
2553
2554
2555
2556
2557static void __exit exit_cxlflash(void)
2558{
2559 cxlflash_term_global_luns();
2560 cxlflash_free_errpage();
2561
2562 pci_unregister_driver(&cxlflash_driver);
2563}
2564
2565module_init(init_cxlflash);
2566module_exit(exit_cxlflash);
2567