LXR linux/drivers/staging/fbtft/fb

   1/*
   2 * FB driver for the SSD1289 LCD Controller
   3 *
   4 * Copyright (C) 2013 Noralf Tronnes
   5 *
   6 * Init sequence taken from ITDB02_Graph16.cpp - (C)2010-2011 Henning Karlsen
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 */
  18
  19#include <linux/module.h>
  20#include <linux/kernel.h>
  21#include <linux/init.h>
  22#include <linux/gpio.h>
  23
  24#include "fbtft.h"
  25
  26#define DRVNAME         "fb_ssd1289"
  27#define WIDTH           240
  28#define HEIGHT          320
  29#define DEFAULT_GAMMA   "02 03 2 5 7 7 4 2 4 2\n" \
  30                        "02 03 2 5 7 5 4 2 4 2"
  31
  32static unsigned int reg11 = 0x6040;
  33module_param(reg11, uint, 0000);
  34MODULE_PARM_DESC(reg11, "Register 11h value");
  35
  36static int init_display(struct fbtft_par *par)
  37{
  38        par->fbtftops.reset(par);
  39
  40        if (par->gpio.cs != -1)
  41                gpio_set_value(par->gpio.cs, 0);  /* Activate chip */
  42
  43        write_reg(par, 0x00, 0x0001);
  44        write_reg(par, 0x03, 0xA8A4);
  45        write_reg(par, 0x0C, 0x0000);
  46        write_reg(par, 0x0D, 0x080C);
  47        write_reg(par, 0x0E, 0x2B00);
  48        write_reg(par, 0x1E, 0x00B7);
  49        write_reg(par, 0x01,
  50                (1 << 13) | (par->bgr << 11) | (1 << 9) | (HEIGHT - 1));
  51        write_reg(par, 0x02, 0x0600);
  52        write_reg(par, 0x10, 0x0000);
  53        write_reg(par, 0x05, 0x0000);
  54        write_reg(par, 0x06, 0x0000);
  55        write_reg(par, 0x16, 0xEF1C);
  56        write_reg(par, 0x17, 0x0003);
  57        write_reg(par, 0x07, 0x0233);
  58        write_reg(par, 0x0B, 0x0000);
  59        write_reg(par, 0x0F, 0x0000);
  60        write_reg(par, 0x41, 0x0000);
  61        write_reg(par, 0x42, 0x0000);
  62        write_reg(par, 0x48, 0x0000);
  63        write_reg(par, 0x49, 0x013F);
  64        write_reg(par, 0x4A, 0x0000);
  65        write_reg(par, 0x4B, 0x0000);
  66        write_reg(par, 0x44, 0xEF00);
  67        write_reg(par, 0x45, 0x0000);
  68        write_reg(par, 0x46, 0x013F);
  69        write_reg(par, 0x23, 0x0000);
  70        write_reg(par, 0x24, 0x0000);
  71        write_reg(par, 0x25, 0x8000);
  72        write_reg(par, 0x4f, 0x0000);
  73        write_reg(par, 0x4e, 0x0000);
  74        write_reg(par, 0x22);
  75        return 0;
  76}
  77
  78static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
  79{
  80        switch (par->info->var.rotate) {
  81        /* R4Eh - Set GDDRAM X address counter */
  82        /* R4Fh - Set GDDRAM Y address counter */
  83        case 0:
  84                write_reg(par, 0x4e, xs);
  85                write_reg(par, 0x4f, ys);
  86                break;
  87        case 180:
  88                write_reg(par, 0x4e, par->info->var.xres - 1 - xs);
  89                write_reg(par, 0x4f, par->info->var.yres - 1 - ys);
  90                break;
  91        case 270:
  92                write_reg(par, 0x4e, par->info->var.yres - 1 - ys);
  93                write_reg(par, 0x4f, xs);
  94                break;
  95        case 90:
  96                write_reg(par, 0x4e, ys);
  97                write_reg(par, 0x4f, par->info->var.xres - 1 - xs);
  98                break;
  99        }
 100
 101        /* R22h - RAM data write */
 102        write_reg(par, 0x22);
 103}
 104
 105static int set_var(struct fbtft_par *par)
 106{
 107        if (par->fbtftops.init_display != init_display) {
 108                /* don't risk messing up register 11h */
 109                fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
 110                        "%s: skipping since custom init_display() is used\n",
 111                        __func__);
 112                return 0;
 113        }
 114
 115        switch (par->info->var.rotate) {
 116        case 0:
 117                write_reg(par, 0x11, reg11 | 0x30);
 118                break;
 119        case 270:
 120                write_reg(par, 0x11, reg11 | 0x28);
 121                break;
 122        case 180:
 123                write_reg(par, 0x11, reg11 | 0x00);
 124                break;
 125        case 90:
 126                write_reg(par, 0x11, reg11 | 0x18);
 127                break;
 128        }
 129
 130        return 0;
 131}
 132
 133/*
 134 * Gamma string format:
 135 * VRP0 VRP1 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 PKP5
 136 * VRN0 VRN1 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 PKN5
 137 */
 138#define CURVE(num, idx)  curves[num * par->gamma.num_values + idx]
 139static int set_gamma(struct fbtft_par *par, u32 *curves)
 140{
 141        unsigned long mask[] = {
 142                0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
 143                0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
 144        };
 145        int i, j;
 146
 147        /* apply mask */
 148        for (i = 0; i < 2; i++)
 149                for (j = 0; j < 10; j++)
 150                        CURVE(i, j) &= mask[i * par->gamma.num_values + j];
 151
 152        write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
 153        write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
 154        write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
 155        write_reg(par, 0x0033, CURVE(0, 3) << 8 | CURVE(0, 2));
 156        write_reg(par, 0x0034, CURVE(1, 5) << 8 | CURVE(1, 4));
 157        write_reg(par, 0x0035, CURVE(1, 7) << 8 | CURVE(1, 6));
 158        write_reg(par, 0x0036, CURVE(1, 9) << 8 | CURVE(1, 8));
 159        write_reg(par, 0x0037, CURVE(1, 3) << 8 | CURVE(1, 2));
 160        write_reg(par, 0x003A, CURVE(0, 1) << 8 | CURVE(0, 0));
 161        write_reg(par, 0x003B, CURVE(1, 1) << 8 | CURVE(1, 0));
 162
 163        return 0;
 164}
 165#undef CURVE
 166
 167static struct fbtft_display display = {
 168        .regwidth = 16,
 169        .width = WIDTH,
 170        .height = HEIGHT,
 171        .gamma_num = 2,
 172        .gamma_len = 10,
 173        .gamma = DEFAULT_GAMMA,
 174        .fbtftops = {
 175                .init_display = init_display,
 176                .set_addr_win = set_addr_win,
 177                .set_var = set_var,
 178                .set_gamma = set_gamma,
 179        },
 180};
 181
 182FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1289", &display);
 183
 184MODULE_ALIAS("spi:" DRVNAME);
 185MODULE_ALIAS("platform:" DRVNAME);
 186MODULE_ALIAS("spi:ssd1289");
 187MODULE_ALIAS("platform:ssd1289");
 188
 189MODULE_DESCRIPTION("FB driver for the SSD1289 LCD Controller");
 190MODULE_AUTHOR("Noralf Tronnes");
 191MODULE_LICENSE("GPL");
 192