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44#ifndef __ACTBL2_H__
45#define __ACTBL2_H__
46
47
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62
63
64#define ACPI_SIG_ASF "ASF!"
65#define ACPI_SIG_BOOT "BOOT"
66#define ACPI_SIG_CSRT "CSRT"
67#define ACPI_SIG_DBG2 "DBG2"
68#define ACPI_SIG_DBGP "DBGP"
69#define ACPI_SIG_DMAR "DMAR"
70#define ACPI_SIG_HPET "HPET"
71#define ACPI_SIG_IBFT "IBFT"
72#define ACPI_SIG_IORT "IORT"
73#define ACPI_SIG_IVRS "IVRS"
74#define ACPI_SIG_LPIT "LPIT"
75#define ACPI_SIG_MCFG "MCFG"
76#define ACPI_SIG_MCHI "MCHI"
77#define ACPI_SIG_MSDM "MSDM"
78#define ACPI_SIG_MTMR "MTMR"
79#define ACPI_SIG_SLIC "SLIC"
80#define ACPI_SIG_SPCR "SPCR"
81#define ACPI_SIG_SPMI "SPMI"
82#define ACPI_SIG_TCPA "TCPA"
83#define ACPI_SIG_TPM2 "TPM2"
84#define ACPI_SIG_UEFI "UEFI"
85#define ACPI_SIG_VRTC "VRTC"
86#define ACPI_SIG_WAET "WAET"
87#define ACPI_SIG_WDAT "WDAT"
88#define ACPI_SIG_WDDT "WDDT"
89#define ACPI_SIG_WDRT "WDRT"
90
91#ifdef ACPI_UNDEFINED_TABLES
92
93
94
95#define ACPI_SIG_ATKG "ATKG"
96#define ACPI_SIG_GSCI "GSCI"
97#define ACPI_SIG_IEIT "IEIT"
98#endif
99
100
101
102
103
104#pragma pack(1)
105
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125
126
127struct acpi_table_asf {
128 struct acpi_table_header header;
129};
130
131
132
133struct acpi_asf_header {
134 u8 type;
135 u8 reserved;
136 u16 length;
137};
138
139
140
141enum acpi_asf_type {
142 ACPI_ASF_TYPE_INFO = 0,
143 ACPI_ASF_TYPE_ALERT = 1,
144 ACPI_ASF_TYPE_CONTROL = 2,
145 ACPI_ASF_TYPE_BOOT = 3,
146 ACPI_ASF_TYPE_ADDRESS = 4,
147 ACPI_ASF_TYPE_RESERVED = 5
148};
149
150
151
152
153
154
155
156struct acpi_asf_info {
157 struct acpi_asf_header header;
158 u8 min_reset_value;
159 u8 min_poll_interval;
160 u16 system_id;
161 u32 mfg_id;
162 u8 flags;
163 u8 reserved2[3];
164};
165
166
167
168#define ACPI_ASF_SMBUS_PROTOCOLS (1)
169
170
171
172struct acpi_asf_alert {
173 struct acpi_asf_header header;
174 u8 assert_mask;
175 u8 deassert_mask;
176 u8 alerts;
177 u8 data_length;
178};
179
180struct acpi_asf_alert_data {
181 u8 address;
182 u8 command;
183 u8 mask;
184 u8 value;
185 u8 sensor_type;
186 u8 type;
187 u8 offset;
188 u8 source_type;
189 u8 severity;
190 u8 sensor_number;
191 u8 entity;
192 u8 instance;
193};
194
195
196
197struct acpi_asf_remote {
198 struct acpi_asf_header header;
199 u8 controls;
200 u8 data_length;
201 u16 reserved2;
202};
203
204struct acpi_asf_control_data {
205 u8 function;
206 u8 address;
207 u8 command;
208 u8 value;
209};
210
211
212
213struct acpi_asf_rmcp {
214 struct acpi_asf_header header;
215 u8 capabilities[7];
216 u8 completion_code;
217 u32 enterprise_id;
218 u8 command;
219 u16 parameter;
220 u16 boot_options;
221 u16 oem_parameters;
222};
223
224
225
226struct acpi_asf_address {
227 struct acpi_asf_header header;
228 u8 eprom_address;
229 u8 devices;
230};
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239
240
241struct acpi_table_boot {
242 struct acpi_table_header header;
243 u8 cmos_index;
244 u8 reserved[3];
245};
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255
256struct acpi_table_csrt {
257 struct acpi_table_header header;
258};
259
260
261
262struct acpi_csrt_group {
263 u32 length;
264 u32 vendor_id;
265 u32 subvendor_id;
266 u16 device_id;
267 u16 subdevice_id;
268 u16 revision;
269 u16 reserved;
270 u32 shared_info_length;
271
272
273};
274
275
276
277struct acpi_csrt_shared_info {
278 u16 major_version;
279 u16 minor_version;
280 u32 mmio_base_low;
281 u32 mmio_base_high;
282 u32 gsi_interrupt;
283 u8 interrupt_polarity;
284 u8 interrupt_mode;
285 u8 num_channels;
286 u8 dma_address_width;
287 u16 base_request_line;
288 u16 num_handshake_signals;
289 u32 max_block_size;
290
291
292};
293
294
295
296struct acpi_csrt_descriptor {
297 u32 length;
298 u16 type;
299 u16 subtype;
300 u32 uid;
301
302
303};
304
305
306
307#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
308#define ACPI_CSRT_TYPE_TIMER 0x0002
309#define ACPI_CSRT_TYPE_DMA 0x0003
310
311
312
313#define ACPI_CSRT_XRUPT_LINE 0x0000
314#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
315#define ACPI_CSRT_TIMER 0x0000
316#define ACPI_CSRT_DMA_CHANNEL 0x0000
317#define ACPI_CSRT_DMA_CONTROLLER 0x0001
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326
327
328struct acpi_table_dbg2 {
329 struct acpi_table_header header;
330 u32 info_offset;
331 u32 info_count;
332};
333
334struct acpi_dbg2_header {
335 u32 info_offset;
336 u32 info_count;
337};
338
339
340
341struct acpi_dbg2_device {
342 u8 revision;
343 u16 length;
344 u8 register_count;
345 u16 namepath_length;
346 u16 namepath_offset;
347 u16 oem_data_length;
348 u16 oem_data_offset;
349 u16 port_type;
350 u16 port_subtype;
351 u16 reserved;
352 u16 base_address_offset;
353 u16 address_size_offset;
354
355
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357
358
359
360
361};
362
363
364
365#define ACPI_DBG2_SERIAL_PORT 0x8000
366#define ACPI_DBG2_1394_PORT 0x8001
367#define ACPI_DBG2_USB_PORT 0x8002
368#define ACPI_DBG2_NET_PORT 0x8003
369
370
371
372#define ACPI_DBG2_16550_COMPATIBLE 0x0000
373#define ACPI_DBG2_16550_SUBSET 0x0001
374#define ACPI_DBG2_ARM_PL011 0x0003
375#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
376#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
377#define ACPI_DBG2_ARM_DCC 0x000F
378#define ACPI_DBG2_BCM2835 0x0010
379
380#define ACPI_DBG2_1394_STANDARD 0x0000
381
382#define ACPI_DBG2_USB_XHCI 0x0000
383#define ACPI_DBG2_USB_EHCI 0x0001
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391
392
393
394struct acpi_table_dbgp {
395 struct acpi_table_header header;
396 u8 type;
397 u8 reserved[3];
398 struct acpi_generic_address debug_port;
399};
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410
411struct acpi_table_dmar {
412 struct acpi_table_header header;
413 u8 width;
414 u8 flags;
415 u8 reserved[10];
416};
417
418
419
420#define ACPI_DMAR_INTR_REMAP (1)
421#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
422#define ACPI_DMAR_X2APIC_MODE (1<<2)
423
424
425
426struct acpi_dmar_header {
427 u16 type;
428 u16 length;
429};
430
431
432
433enum acpi_dmar_type {
434 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
435 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
436 ACPI_DMAR_TYPE_ROOT_ATS = 2,
437 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
438 ACPI_DMAR_TYPE_NAMESPACE = 4,
439 ACPI_DMAR_TYPE_RESERVED = 5
440};
441
442
443
444struct acpi_dmar_device_scope {
445 u8 entry_type;
446 u8 length;
447 u16 reserved;
448 u8 enumeration_id;
449 u8 bus;
450};
451
452
453
454enum acpi_dmar_scope_type {
455 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
456 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
457 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
458 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
459 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
460 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
461 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6
462};
463
464struct acpi_dmar_pci_path {
465 u8 device;
466 u8 function;
467};
468
469
470
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472
473
474
475struct acpi_dmar_hardware_unit {
476 struct acpi_dmar_header header;
477 u8 flags;
478 u8 reserved;
479 u16 segment;
480 u64 address;
481};
482
483
484
485#define ACPI_DMAR_INCLUDE_ALL (1)
486
487
488
489struct acpi_dmar_reserved_memory {
490 struct acpi_dmar_header header;
491 u16 reserved;
492 u16 segment;
493 u64 base_address;
494 u64 end_address;
495};
496
497
498
499#define ACPI_DMAR_ALLOW_ALL (1)
500
501
502
503struct acpi_dmar_atsr {
504 struct acpi_dmar_header header;
505 u8 flags;
506 u8 reserved;
507 u16 segment;
508};
509
510
511
512#define ACPI_DMAR_ALL_PORTS (1)
513
514
515
516struct acpi_dmar_rhsa {
517 struct acpi_dmar_header header;
518 u32 reserved;
519 u64 base_address;
520 u32 proximity_domain;
521};
522
523
524
525struct acpi_dmar_andd {
526 struct acpi_dmar_header header;
527 u8 reserved[3];
528 u8 device_number;
529 char device_name[1];
530};
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541
542struct acpi_table_hpet {
543 struct acpi_table_header header;
544 u32 id;
545 struct acpi_generic_address address;
546 u8 sequence;
547 u16 minimum_tick;
548 u8 flags;
549};
550
551
552
553#define ACPI_HPET_PAGE_PROTECT_MASK (3)
554
555
556
557enum acpi_hpet_page_protect {
558 ACPI_HPET_NO_PAGE_PROTECT = 0,
559 ACPI_HPET_PAGE_PROTECT4 = 1,
560 ACPI_HPET_PAGE_PROTECT64 = 2
561};
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576struct acpi_table_ibft {
577 struct acpi_table_header header;
578 u8 reserved[12];
579};
580
581
582
583struct acpi_ibft_header {
584 u8 type;
585 u8 version;
586 u16 length;
587 u8 index;
588 u8 flags;
589};
590
591
592
593enum acpi_ibft_type {
594 ACPI_IBFT_TYPE_NOT_USED = 0,
595 ACPI_IBFT_TYPE_CONTROL = 1,
596 ACPI_IBFT_TYPE_INITIATOR = 2,
597 ACPI_IBFT_TYPE_NIC = 3,
598 ACPI_IBFT_TYPE_TARGET = 4,
599 ACPI_IBFT_TYPE_EXTENSIONS = 5,
600 ACPI_IBFT_TYPE_RESERVED = 6
601};
602
603
604
605struct acpi_ibft_control {
606 struct acpi_ibft_header header;
607 u16 extensions;
608 u16 initiator_offset;
609 u16 nic0_offset;
610 u16 target0_offset;
611 u16 nic1_offset;
612 u16 target1_offset;
613};
614
615struct acpi_ibft_initiator {
616 struct acpi_ibft_header header;
617 u8 sns_server[16];
618 u8 slp_server[16];
619 u8 primary_server[16];
620 u8 secondary_server[16];
621 u16 name_length;
622 u16 name_offset;
623};
624
625struct acpi_ibft_nic {
626 struct acpi_ibft_header header;
627 u8 ip_address[16];
628 u8 subnet_mask_prefix;
629 u8 origin;
630 u8 gateway[16];
631 u8 primary_dns[16];
632 u8 secondary_dns[16];
633 u8 dhcp[16];
634 u16 vlan;
635 u8 mac_address[6];
636 u16 pci_address;
637 u16 name_length;
638 u16 name_offset;
639};
640
641struct acpi_ibft_target {
642 struct acpi_ibft_header header;
643 u8 target_ip_address[16];
644 u16 target_ip_socket;
645 u8 target_boot_lun[8];
646 u8 chap_type;
647 u8 nic_association;
648 u16 target_name_length;
649 u16 target_name_offset;
650 u16 chap_name_length;
651 u16 chap_name_offset;
652 u16 chap_secret_length;
653 u16 chap_secret_offset;
654 u16 reverse_chap_name_length;
655 u16 reverse_chap_name_offset;
656 u16 reverse_chap_secret_length;
657 u16 reverse_chap_secret_offset;
658};
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668
669struct acpi_table_iort {
670 struct acpi_table_header header;
671 u32 node_count;
672 u32 node_offset;
673 u32 reserved;
674};
675
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677
678
679struct acpi_iort_node {
680 u8 type;
681 u16 length;
682 u8 revision;
683 u32 reserved;
684 u32 mapping_count;
685 u32 mapping_offset;
686 char node_data[1];
687};
688
689
690
691enum acpi_iort_node_type {
692 ACPI_IORT_NODE_ITS_GROUP = 0x00,
693 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
694 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
695 ACPI_IORT_NODE_SMMU = 0x03,
696 ACPI_IORT_NODE_SMMU_V3 = 0x04
697};
698
699struct acpi_iort_id_mapping {
700 u32 input_base;
701 u32 id_count;
702 u32 output_base;
703 u32 output_reference;
704 u32 flags;
705};
706
707
708
709#define ACPI_IORT_ID_SINGLE_MAPPING (1)
710
711struct acpi_iort_memory_access {
712 u32 cache_coherency;
713 u8 hints;
714 u16 reserved;
715 u8 memory_flags;
716};
717
718
719
720#define ACPI_IORT_NODE_COHERENT 0x00000001
721#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000
722
723
724
725#define ACPI_IORT_HT_TRANSIENT (1)
726#define ACPI_IORT_HT_WRITE (1<<1)
727#define ACPI_IORT_HT_READ (1<<2)
728#define ACPI_IORT_HT_OVERRIDE (1<<3)
729
730
731
732#define ACPI_IORT_MF_COHERENCY (1)
733#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
734
735
736
737
738struct acpi_iort_its_group {
739 u32 its_count;
740 u32 identifiers[1];
741};
742
743struct acpi_iort_named_component {
744 u32 node_flags;
745 u64 memory_properties;
746 u8 memory_address_limit;
747 char device_name[1];
748};
749
750struct acpi_iort_root_complex {
751 u64 memory_properties;
752 u32 ats_attribute;
753 u32 pci_segment_number;
754};
755
756
757
758#define ACPI_IORT_ATS_SUPPORTED 0x00000001
759#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000
760
761struct acpi_iort_smmu {
762 u64 base_address;
763 u64 span;
764 u32 model;
765 u32 flags;
766 u32 global_interrupt_offset;
767 u32 context_interrupt_count;
768 u32 context_interrupt_offset;
769 u32 pmu_interrupt_count;
770 u32 pmu_interrupt_offset;
771 u64 interrupts[1];
772};
773
774
775
776#define ACPI_IORT_SMMU_V1 0x00000000
777#define ACPI_IORT_SMMU_V2 0x00000001
778#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002
779#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003
780
781
782
783#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
784#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
785
786struct acpi_iort_smmu_v3 {
787 u64 base_address;
788 u32 flags;
789 u32 reserved;
790 u64 vatos_address;
791 u32 model;
792 u32 event_gsiv;
793 u32 pri_gsiv;
794 u32 gerr_gsiv;
795 u32 sync_gsiv;
796};
797
798
799
800#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
801#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1)
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811
812
813struct acpi_table_ivrs {
814 struct acpi_table_header header;
815 u32 info;
816 u64 reserved;
817};
818
819
820
821#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00
822#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000
823#define ACPI_IVRS_ATS_RESERVED 0x00400000
824
825
826
827struct acpi_ivrs_header {
828 u8 type;
829 u8 flags;
830 u16 length;
831 u16 device_id;
832};
833
834
835
836enum acpi_ivrs_type {
837 ACPI_IVRS_TYPE_HARDWARE = 0x10,
838 ACPI_IVRS_TYPE_MEMORY1 = 0x20,
839 ACPI_IVRS_TYPE_MEMORY2 = 0x21,
840 ACPI_IVRS_TYPE_MEMORY3 = 0x22
841};
842
843
844
845#define ACPI_IVHD_TT_ENABLE (1)
846#define ACPI_IVHD_PASS_PW (1<<1)
847#define ACPI_IVHD_RES_PASS_PW (1<<2)
848#define ACPI_IVHD_ISOC (1<<3)
849#define ACPI_IVHD_IOTLB (1<<4)
850
851
852
853#define ACPI_IVMD_UNITY (1)
854#define ACPI_IVMD_READ (1<<1)
855#define ACPI_IVMD_WRITE (1<<2)
856#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
857
858
859
860
861
862
863
864struct acpi_ivrs_hardware {
865 struct acpi_ivrs_header header;
866 u16 capability_offset;
867 u64 base_address;
868 u16 pci_segment_group;
869 u16 info;
870 u32 reserved;
871};
872
873
874
875#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F
876#define ACPI_IVHD_UNIT_ID_MASK 0x1F00
877
878
879
880
881
882
883
884struct acpi_ivrs_de_header {
885 u8 type;
886 u16 id;
887 u8 data_setting;
888};
889
890
891
892#define ACPI_IVHD_ENTRY_LENGTH 0xC0
893
894
895
896enum acpi_ivrs_device_entry_type {
897
898
899 ACPI_IVRS_TYPE_PAD4 = 0,
900 ACPI_IVRS_TYPE_ALL = 1,
901 ACPI_IVRS_TYPE_SELECT = 2,
902 ACPI_IVRS_TYPE_START = 3,
903 ACPI_IVRS_TYPE_END = 4,
904
905
906
907 ACPI_IVRS_TYPE_PAD8 = 64,
908 ACPI_IVRS_TYPE_NOT_USED = 65,
909 ACPI_IVRS_TYPE_ALIAS_SELECT = 66,
910 ACPI_IVRS_TYPE_ALIAS_START = 67,
911 ACPI_IVRS_TYPE_EXT_SELECT = 70,
912 ACPI_IVRS_TYPE_EXT_START = 71,
913 ACPI_IVRS_TYPE_SPECIAL = 72
914};
915
916
917
918#define ACPI_IVHD_INIT_PASS (1)
919#define ACPI_IVHD_EINT_PASS (1<<1)
920#define ACPI_IVHD_NMI_PASS (1<<2)
921#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
922#define ACPI_IVHD_LINT0_PASS (1<<6)
923#define ACPI_IVHD_LINT1_PASS (1<<7)
924
925
926
927struct acpi_ivrs_device4 {
928 struct acpi_ivrs_de_header header;
929};
930
931
932
933struct acpi_ivrs_device8a {
934 struct acpi_ivrs_de_header header;
935 u8 reserved1;
936 u16 used_id;
937 u8 reserved2;
938};
939
940
941
942struct acpi_ivrs_device8b {
943 struct acpi_ivrs_de_header header;
944 u32 extended_data;
945};
946
947
948
949#define ACPI_IVHD_ATS_DISABLED (1<<31)
950
951
952
953struct acpi_ivrs_device8c {
954 struct acpi_ivrs_de_header header;
955 u8 handle;
956 u16 used_id;
957 u8 variety;
958};
959
960
961
962#define ACPI_IVHD_IOAPIC 1
963#define ACPI_IVHD_HPET 2
964
965
966
967struct acpi_ivrs_memory {
968 struct acpi_ivrs_header header;
969 u16 aux_data;
970 u64 reserved;
971 u64 start_address;
972 u64 memory_length;
973};
974
975
976
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979
980
981
982
983struct acpi_table_lpit {
984 struct acpi_table_header header;
985};
986
987
988
989struct acpi_lpit_header {
990 u32 type;
991 u32 length;
992 u16 unique_id;
993 u16 reserved;
994 u32 flags;
995};
996
997
998
999enum acpi_lpit_type {
1000 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
1001 ACPI_LPIT_TYPE_RESERVED = 0x01
1002};
1003
1004
1005
1006#define ACPI_LPIT_STATE_DISABLED (1)
1007#define ACPI_LPIT_NO_COUNTER (1<<1)
1008
1009
1010
1011
1012
1013
1014
1015struct acpi_lpit_native {
1016 struct acpi_lpit_header header;
1017 struct acpi_generic_address entry_trigger;
1018 u32 residency;
1019 u32 latency;
1020 struct acpi_generic_address residency_counter;
1021 u64 counter_frequency;
1022};
1023
1024
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1031
1032
1033struct acpi_table_mcfg {
1034 struct acpi_table_header header;
1035 u8 reserved[8];
1036};
1037
1038
1039
1040struct acpi_mcfg_allocation {
1041 u64 address;
1042 u16 pci_segment;
1043 u8 start_bus_number;
1044 u8 end_bus_number;
1045 u32 reserved;
1046};
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1058struct acpi_table_mchi {
1059 struct acpi_table_header header;
1060 u8 interface_type;
1061 u8 protocol;
1062 u64 protocol_data;
1063 u8 interrupt_type;
1064 u8 gpe;
1065 u8 pci_device_flag;
1066 u32 global_interrupt;
1067 struct acpi_generic_address control_register;
1068 u8 pci_segment;
1069 u8 pci_bus;
1070 u8 pci_device;
1071 u8 pci_function;
1072};
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1085struct acpi_table_msdm {
1086 struct acpi_table_header header;
1087};
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1099
1100struct acpi_table_mtmr {
1101 struct acpi_table_header header;
1102};
1103
1104
1105
1106struct acpi_mtmr_entry {
1107 struct acpi_generic_address physical_address;
1108 u32 frequency;
1109 u32 irq;
1110};
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1123struct acpi_table_slic {
1124 struct acpi_table_header header;
1125};
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1137struct acpi_table_spcr {
1138 struct acpi_table_header header;
1139 u8 interface_type;
1140 u8 reserved[3];
1141 struct acpi_generic_address serial_port;
1142 u8 interrupt_type;
1143 u8 pc_interrupt;
1144 u32 interrupt;
1145 u8 baud_rate;
1146 u8 parity;
1147 u8 stop_bits;
1148 u8 flow_control;
1149 u8 terminal_type;
1150 u8 reserved1;
1151 u16 pci_device_id;
1152 u16 pci_vendor_id;
1153 u8 pci_bus;
1154 u8 pci_device;
1155 u8 pci_function;
1156 u32 pci_flags;
1157 u8 pci_segment;
1158 u32 reserved2;
1159};
1160
1161
1162
1163#define ACPI_SPCR_DO_NOT_DISABLE (1)
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1177
1178struct acpi_table_spmi {
1179 struct acpi_table_header header;
1180 u8 interface_type;
1181 u8 reserved;
1182 u16 spec_revision;
1183 u8 interrupt_type;
1184 u8 gpe_number;
1185 u8 reserved1;
1186 u8 pci_device_flag;
1187 u32 interrupt;
1188 struct acpi_generic_address ipmi_register;
1189 u8 pci_segment;
1190 u8 pci_bus;
1191 u8 pci_device;
1192 u8 pci_function;
1193 u8 reserved2;
1194};
1195
1196
1197
1198enum acpi_spmi_interface_types {
1199 ACPI_SPMI_NOT_USED = 0,
1200 ACPI_SPMI_KEYBOARD = 1,
1201 ACPI_SPMI_SMI = 2,
1202 ACPI_SPMI_BLOCK_TRANSFER = 3,
1203 ACPI_SPMI_SMBUS = 4,
1204 ACPI_SPMI_RESERVED = 5
1205};
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1221struct acpi_table_tcpa_hdr {
1222 struct acpi_table_header header;
1223 u16 platform_class;
1224};
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1229
1230#define ACPI_TCPA_CLIENT_TABLE 0
1231#define ACPI_TCPA_SERVER_TABLE 1
1232
1233struct acpi_table_tcpa_client {
1234 u32 minimum_log_length;
1235 u64 log_address;
1236};
1237
1238struct acpi_table_tcpa_server {
1239 u16 reserved;
1240 u64 minimum_log_length;
1241 u64 log_address;
1242 u16 spec_revision;
1243 u8 device_flags;
1244 u8 interrupt_flags;
1245 u8 gpe_number;
1246 u8 reserved2[3];
1247 u32 global_interrupt;
1248 struct acpi_generic_address address;
1249 u32 reserved3;
1250 struct acpi_generic_address config_address;
1251 u8 group;
1252 u8 bus;
1253 u8 device;
1254 u8 function;
1255};
1256
1257
1258
1259#define ACPI_TCPA_PCI_DEVICE (1)
1260#define ACPI_TCPA_BUS_PNP (1<<1)
1261#define ACPI_TCPA_ADDRESS_VALID (1<<2)
1262
1263
1264
1265#define ACPI_TCPA_INTERRUPT_MODE (1)
1266#define ACPI_TCPA_INTERRUPT_POLARITY (1<<1)
1267#define ACPI_TCPA_SCI_VIA_GPE (1<<2)
1268#define ACPI_TCPA_GLOBAL_INTERRUPT (1<<3)
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1280struct acpi_table_tpm2 {
1281 struct acpi_table_header header;
1282 u16 platform_class;
1283 u16 reserved;
1284 u64 control_address;
1285 u32 start_method;
1286
1287
1288};
1289
1290
1291
1292#define ACPI_TPM2_NOT_ALLOWED 0
1293#define ACPI_TPM2_START_METHOD 2
1294#define ACPI_TPM2_MEMORY_MAPPED 6
1295#define ACPI_TPM2_COMMAND_BUFFER 7
1296#define ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD 8
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1308struct acpi_table_uefi {
1309 struct acpi_table_header header;
1310 u8 identifier[16];
1311 u16 data_offset;
1312};
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1324
1325struct acpi_table_vrtc {
1326 struct acpi_table_header header;
1327};
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1331struct acpi_vrtc_entry {
1332 struct acpi_generic_address physical_address;
1333 u32 irq;
1334};
1335
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1344
1345struct acpi_table_waet {
1346 struct acpi_table_header header;
1347 u32 flags;
1348};
1349
1350
1351
1352#define ACPI_WAET_RTC_NO_ACK (1)
1353#define ACPI_WAET_TIMER_ONE_READ (1<<1)
1354
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1365struct acpi_table_wdat {
1366 struct acpi_table_header header;
1367 u32 header_length;
1368 u16 pci_segment;
1369 u8 pci_bus;
1370 u8 pci_device;
1371 u8 pci_function;
1372 u8 reserved[3];
1373 u32 timer_period;
1374 u32 max_count;
1375 u32 min_count;
1376 u8 flags;
1377 u8 reserved2[3];
1378 u32 entries;
1379};
1380
1381
1382
1383#define ACPI_WDAT_ENABLED (1)
1384#define ACPI_WDAT_STOPPED 0x80
1385
1386
1387
1388struct acpi_wdat_entry {
1389 u8 action;
1390 u8 instruction;
1391 u16 reserved;
1392 struct acpi_generic_address register_region;
1393 u32 value;
1394 u32 mask;
1395};
1396
1397
1398
1399enum acpi_wdat_actions {
1400 ACPI_WDAT_RESET = 1,
1401 ACPI_WDAT_GET_CURRENT_COUNTDOWN = 4,
1402 ACPI_WDAT_GET_COUNTDOWN = 5,
1403 ACPI_WDAT_SET_COUNTDOWN = 6,
1404 ACPI_WDAT_GET_RUNNING_STATE = 8,
1405 ACPI_WDAT_SET_RUNNING_STATE = 9,
1406 ACPI_WDAT_GET_STOPPED_STATE = 10,
1407 ACPI_WDAT_SET_STOPPED_STATE = 11,
1408 ACPI_WDAT_GET_REBOOT = 16,
1409 ACPI_WDAT_SET_REBOOT = 17,
1410 ACPI_WDAT_GET_SHUTDOWN = 18,
1411 ACPI_WDAT_SET_SHUTDOWN = 19,
1412 ACPI_WDAT_GET_STATUS = 32,
1413 ACPI_WDAT_SET_STATUS = 33,
1414 ACPI_WDAT_ACTION_RESERVED = 34
1415};
1416
1417
1418
1419enum acpi_wdat_instructions {
1420 ACPI_WDAT_READ_VALUE = 0,
1421 ACPI_WDAT_READ_COUNTDOWN = 1,
1422 ACPI_WDAT_WRITE_VALUE = 2,
1423 ACPI_WDAT_WRITE_COUNTDOWN = 3,
1424 ACPI_WDAT_INSTRUCTION_RESERVED = 4,
1425 ACPI_WDAT_PRESERVE_REGISTER = 0x80
1426};
1427
1428
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1437
1438struct acpi_table_wddt {
1439 struct acpi_table_header header;
1440 u16 spec_version;
1441 u16 table_version;
1442 u16 pci_vendor_id;
1443 struct acpi_generic_address address;
1444 u16 max_count;
1445 u16 min_count;
1446 u16 period;
1447 u16 status;
1448 u16 capability;
1449};
1450
1451
1452
1453#define ACPI_WDDT_AVAILABLE (1)
1454#define ACPI_WDDT_ACTIVE (1<<1)
1455#define ACPI_WDDT_TCO_OS_OWNED (1<<2)
1456#define ACPI_WDDT_USER_RESET (1<<11)
1457#define ACPI_WDDT_WDT_RESET (1<<12)
1458#define ACPI_WDDT_POWER_FAIL (1<<13)
1459#define ACPI_WDDT_UNKNOWN_RESET (1<<14)
1460
1461
1462
1463#define ACPI_WDDT_AUTO_RESET (1)
1464#define ACPI_WDDT_ALERT_SUPPORT (1<<1)
1465
1466
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1471
1472
1473
1474
1475
1476struct acpi_table_wdrt {
1477 struct acpi_table_header header;
1478 struct acpi_generic_address control_register;
1479 struct acpi_generic_address count_register;
1480 u16 pci_device_id;
1481 u16 pci_vendor_id;
1482 u8 pci_bus;
1483 u8 pci_device;
1484 u8 pci_function;
1485 u8 pci_segment;
1486 u16 max_count;
1487 u8 units;
1488};
1489
1490
1491
1492#pragma pack()
1493
1494#endif
1495