1#ifndef __LINUX_GPIO_DRIVER_H
2#define __LINUX_GPIO_DRIVER_H
3
4#include <linux/device.h>
5#include <linux/types.h>
6#include <linux/irq.h>
7#include <linux/irqchip/chained_irq.h>
8#include <linux/irqdomain.h>
9#include <linux/lockdep.h>
10#include <linux/pinctrl/pinctrl.h>
11#include <linux/pinctrl/pinconf-generic.h>
12
13struct gpio_desc;
14struct of_phandle_args;
15struct device_node;
16struct seq_file;
17struct gpio_device;
18struct module;
19
20#ifdef CONFIG_GPIOLIB
21
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111struct gpio_chip {
112 const char *label;
113 struct gpio_device *gpiodev;
114 struct device *parent;
115 struct module *owner;
116
117 int (*request)(struct gpio_chip *chip,
118 unsigned offset);
119 void (*free)(struct gpio_chip *chip,
120 unsigned offset);
121 int (*get_direction)(struct gpio_chip *chip,
122 unsigned offset);
123 int (*direction_input)(struct gpio_chip *chip,
124 unsigned offset);
125 int (*direction_output)(struct gpio_chip *chip,
126 unsigned offset, int value);
127 int (*get)(struct gpio_chip *chip,
128 unsigned offset);
129 void (*set)(struct gpio_chip *chip,
130 unsigned offset, int value);
131 void (*set_multiple)(struct gpio_chip *chip,
132 unsigned long *mask,
133 unsigned long *bits);
134 int (*set_config)(struct gpio_chip *chip,
135 unsigned offset,
136 unsigned long config);
137 int (*to_irq)(struct gpio_chip *chip,
138 unsigned offset);
139
140 void (*dbg_show)(struct seq_file *s,
141 struct gpio_chip *chip);
142 int base;
143 u16 ngpio;
144 const char *const *names;
145 bool can_sleep;
146
147#if IS_ENABLED(CONFIG_GPIO_GENERIC)
148 unsigned long (*read_reg)(void __iomem *reg);
149 void (*write_reg)(void __iomem *reg, unsigned long data);
150 unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
151 void __iomem *reg_dat;
152 void __iomem *reg_set;
153 void __iomem *reg_clr;
154 void __iomem *reg_dir;
155 int bgpio_bits;
156 spinlock_t bgpio_lock;
157 unsigned long bgpio_data;
158 unsigned long bgpio_dir;
159#endif
160
161#ifdef CONFIG_GPIOLIB_IRQCHIP
162
163
164
165
166 struct irq_chip *irqchip;
167 struct irq_domain *irqdomain;
168 unsigned int irq_base;
169 irq_flow_handler_t irq_handler;
170 unsigned int irq_default_type;
171 int irq_chained_parent;
172 bool irq_nested;
173 bool irq_need_valid_mask;
174 unsigned long *irq_valid_mask;
175 struct lock_class_key *lock_key;
176#endif
177
178#if defined(CONFIG_OF_GPIO)
179
180
181
182
183 struct device_node *of_node;
184 int of_gpio_n_cells;
185 int (*of_xlate)(struct gpio_chip *gc,
186 const struct of_phandle_args *gpiospec, u32 *flags);
187#endif
188};
189
190extern const char *gpiochip_is_requested(struct gpio_chip *chip,
191 unsigned offset);
192
193
194extern int gpiochip_add_data(struct gpio_chip *chip, void *data);
195static inline int gpiochip_add(struct gpio_chip *chip)
196{
197 return gpiochip_add_data(chip, NULL);
198}
199extern void gpiochip_remove(struct gpio_chip *chip);
200extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
201 void *data);
202extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
203
204extern struct gpio_chip *gpiochip_find(void *data,
205 int (*match)(struct gpio_chip *chip, void *data));
206
207
208int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
209void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
210bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
211
212
213bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
214bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
215
216
217void *gpiochip_get_data(struct gpio_chip *chip);
218
219struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
220
221struct bgpio_pdata {
222 const char *label;
223 int base;
224 int ngpio;
225};
226
227#if IS_ENABLED(CONFIG_GPIO_GENERIC)
228
229int bgpio_init(struct gpio_chip *gc, struct device *dev,
230 unsigned long sz, void __iomem *dat, void __iomem *set,
231 void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
232 unsigned long flags);
233
234#define BGPIOF_BIG_ENDIAN BIT(0)
235#define BGPIOF_UNREADABLE_REG_SET BIT(1)
236#define BGPIOF_UNREADABLE_REG_DIR BIT(2)
237#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
238#define BGPIOF_READ_OUTPUT_REG_SET BIT(4)
239#define BGPIOF_NO_OUTPUT BIT(5)
240
241#endif
242
243#ifdef CONFIG_GPIOLIB_IRQCHIP
244
245void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
246 struct irq_chip *irqchip,
247 int parent_irq,
248 irq_flow_handler_t parent_handler);
249
250void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
251 struct irq_chip *irqchip,
252 int parent_irq);
253
254int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
255 struct irq_chip *irqchip,
256 unsigned int first_irq,
257 irq_flow_handler_t handler,
258 unsigned int type,
259 bool nested,
260 struct lock_class_key *lock_key);
261
262#ifdef CONFIG_LOCKDEP
263
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269
270static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
271 struct irq_chip *irqchip,
272 unsigned int first_irq,
273 irq_flow_handler_t handler,
274 unsigned int type)
275{
276 static struct lock_class_key key;
277
278 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
279 handler, type, false, &key);
280}
281
282static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
283 struct irq_chip *irqchip,
284 unsigned int first_irq,
285 irq_flow_handler_t handler,
286 unsigned int type)
287{
288
289 static struct lock_class_key key;
290
291 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
292 handler, type, true, &key);
293}
294#else
295static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
296 struct irq_chip *irqchip,
297 unsigned int first_irq,
298 irq_flow_handler_t handler,
299 unsigned int type)
300{
301 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
302 handler, type, false, NULL);
303}
304
305static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
306 struct irq_chip *irqchip,
307 unsigned int first_irq,
308 irq_flow_handler_t handler,
309 unsigned int type)
310{
311 return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
312 handler, type, true, NULL);
313}
314#endif
315
316#endif
317
318int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
319void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
320int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
321 unsigned long config);
322
323#ifdef CONFIG_PINCTRL
324
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331
332struct gpio_pin_range {
333 struct list_head node;
334 struct pinctrl_dev *pctldev;
335 struct pinctrl_gpio_range range;
336};
337
338int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
339 unsigned int gpio_offset, unsigned int pin_offset,
340 unsigned int npins);
341int gpiochip_add_pingroup_range(struct gpio_chip *chip,
342 struct pinctrl_dev *pctldev,
343 unsigned int gpio_offset, const char *pin_group);
344void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
345
346#else
347
348static inline int
349gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
350 unsigned int gpio_offset, unsigned int pin_offset,
351 unsigned int npins)
352{
353 return 0;
354}
355static inline int
356gpiochip_add_pingroup_range(struct gpio_chip *chip,
357 struct pinctrl_dev *pctldev,
358 unsigned int gpio_offset, const char *pin_group)
359{
360 return 0;
361}
362
363static inline void
364gpiochip_remove_pin_ranges(struct gpio_chip *chip)
365{
366}
367
368#endif
369
370struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
371 const char *label);
372void gpiochip_free_own_desc(struct gpio_desc *desc);
373
374#else
375
376static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
377{
378
379 WARN_ON(1);
380 return ERR_PTR(-ENODEV);
381}
382
383#endif
384
385#endif
386