1/* 2 * Orion CPU Bridge Registers 3 * 4 * This file is licensed under the terms of the GNU General Public 5 * License version 2. This program is licensed "as is" without any 6 * warranty of any kind, whether express or implied. 7 */ 8 9#ifndef __ASM_ARCH_BRIDGE_REGS_H 10#define __ASM_ARCH_BRIDGE_REGS_H 11 12#include "orion5x.h" 13 14#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) 15 16#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) 17 18#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) 19#define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) 20 21#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) 22 23#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) 24 25#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) 26 27#define BRIDGE_INT_TIMER1_CLR (~0x0004) 28 29#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) 30 31#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) 32 33#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300) 34#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300) 35#endif 36