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4
5#ifdef __KERNEL__
6#ifndef __ASM_POWERPC_REG_FSL_EMB_H__
7#define __ASM_POWERPC_REG_FSL_EMB_H__
8
9#ifndef __ASSEMBLY__
10
11#define mfpmr(rn) ({unsigned int rval; \
12 asm volatile("mfpmr %0," __stringify(rn) \
13 : "=r" (rval)); rval;})
14#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
15#endif
16
17
18#define PMRN_PMC0 0x010
19#define PMRN_PMC1 0x011
20#define PMRN_PMC2 0x012
21#define PMRN_PMC3 0x013
22#define PMRN_PMC4 0x014
23#define PMRN_PMC5 0x015
24#define PMRN_PMLCA0 0x090
25#define PMRN_PMLCA1 0x091
26#define PMRN_PMLCA2 0x092
27#define PMRN_PMLCA3 0x093
28#define PMRN_PMLCA4 0x094
29#define PMRN_PMLCA5 0x095
30
31#define PMLCA_FC 0x80000000
32#define PMLCA_FCS 0x40000000
33#define PMLCA_FCU 0x20000000
34#define PMLCA_FCM1 0x10000000
35#define PMLCA_FCM0 0x08000000
36#define PMLCA_CE 0x04000000
37#define PMLCA_FGCS1 0x00000002
38#define PMLCA_FGCS0 0x00000001
39
40#define PMLCA_EVENT_MASK 0x01ff0000
41#define PMLCA_EVENT_SHIFT 16
42
43#define PMRN_PMLCB0 0x110
44#define PMRN_PMLCB1 0x111
45#define PMRN_PMLCB2 0x112
46#define PMRN_PMLCB3 0x113
47#define PMRN_PMLCB4 0x114
48#define PMRN_PMLCB5 0x115
49
50#define PMLCB_THRESHMUL_MASK 0x0700
51#define PMLCB_THRESHMUL_SHIFT 8
52
53#define PMLCB_THRESHOLD_MASK 0x003f
54#define PMLCB_THRESHOLD_SHIFT 0
55
56#define PMRN_PMGC0 0x190
57
58#define PMGC0_FAC 0x80000000
59#define PMGC0_PMIE 0x40000000
60#define PMGC0_FCECE 0x20000000
61
62
63
64#define PMRN_UPMC0 0x000
65#define PMRN_UPMC1 0x001
66#define PMRN_UPMC2 0x002
67#define PMRN_UPMC3 0x003
68#define PMRN_UPMC4 0x004
69#define PMRN_UPMC5 0x005
70#define PMRN_UPMLCA0 0x080
71#define PMRN_UPMLCA1 0x081
72#define PMRN_UPMLCA2 0x082
73#define PMRN_UPMLCA3 0x083
74#define PMRN_UPMLCA4 0x084
75#define PMRN_UPMLCA5 0x085
76#define PMRN_UPMLCB0 0x100
77#define PMRN_UPMLCB1 0x101
78#define PMRN_UPMLCB2 0x102
79#define PMRN_UPMLCB3 0x103
80#define PMRN_UPMLCB4 0x104
81#define PMRN_UPMLCB5 0x105
82#define PMRN_UPMGC0 0x180
83
84
85#endif
86#endif
87