LXR linux/arch/s390/include/asm/pgtable.h

   1/*
   2 *  S390 version
   3 *    Copyright IBM Corp. 1999, 2000
   4 *    Author(s): Hartmut Penner (hp@de.ibm.com)
   5 *               Ulrich Weigand (weigand@de.ibm.com)
   6 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   7 *
   8 *  Derived from "include/asm-i386/pgtable.h"
   9 */
  10
  11#ifndef _ASM_S390_PGTABLE_H
  12#define _ASM_S390_PGTABLE_H
  13
  14/*
  15 * The Linux memory management assumes a three-level page table setup.
  16 * For s390 64 bit we use up to four of the five levels the hardware
  17 * provides (region first tables are not used).
  18 *
  19 * The "pgd_xxx()" functions are trivial for a folded two-level
  20 * setup: the pgd is never bad, and a pmd always exists (as it's folded
  21 * into the pgd entry)
  22 *
  23 * This file contains the functions and defines necessary to modify and use
  24 * the S390 page table tree.
  25 */
  26#ifndef __ASSEMBLY__
  27#include <asm-generic/5level-fixup.h>
  28#include <linux/sched.h>
  29#include <linux/mm_types.h>
  30#include <linux/page-flags.h>
  31#include <linux/radix-tree.h>
  32#include <linux/atomic.h>
  33#include <asm/bug.h>
  34#include <asm/page.h>
  35
  36extern pgd_t swapper_pg_dir[];
  37extern void paging_init(void);
  38extern void vmem_map_init(void);
  39pmd_t *vmem_pmd_alloc(void);
  40pte_t *vmem_pte_alloc(void);
  41
  42enum {
  43        PG_DIRECT_MAP_4K = 0,
  44        PG_DIRECT_MAP_1M,
  45        PG_DIRECT_MAP_2G,
  46        PG_DIRECT_MAP_MAX
  47};
  48
  49extern atomic_long_t direct_pages_count[PG_DIRECT_MAP_MAX];
  50
  51static inline void update_page_count(int level, long count)
  52{
  53        if (IS_ENABLED(CONFIG_PROC_FS))
  54                atomic_long_add(count, &direct_pages_count[level]);
  55}
  56
  57struct seq_file;
  58void arch_report_meminfo(struct seq_file *m);
  59
  60/*
  61 * The S390 doesn't have any external MMU info: the kernel page
  62 * tables contain all the necessary information.
  63 */
  64#define update_mmu_cache(vma, address, ptep)     do { } while (0)
  65#define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
  66
  67/*
  68 * ZERO_PAGE is a global shared page that is always zero; used
  69 * for zero-mapped memory areas etc..
  70 */
  71
  72extern unsigned long empty_zero_page;
  73extern unsigned long zero_page_mask;
  74
  75#define ZERO_PAGE(vaddr) \
  76        (virt_to_page((void *)(empty_zero_page + \
  77         (((unsigned long)(vaddr)) &zero_page_mask))))
  78#define __HAVE_COLOR_ZERO_PAGE
  79
  80/* TODO: s390 cannot support io_remap_pfn_range... */
  81#endif /* !__ASSEMBLY__ */
  82
  83/*
  84 * PMD_SHIFT determines the size of the area a second-level page
  85 * table can map
  86 * PGDIR_SHIFT determines what a third-level page table entry can map
  87 */
  88#define PMD_SHIFT       20
  89#define PUD_SHIFT       31
  90#define PGDIR_SHIFT     42
  91
  92#define PMD_SIZE        (1UL << PMD_SHIFT)
  93#define PMD_MASK        (~(PMD_SIZE-1))
  94#define PUD_SIZE        (1UL << PUD_SHIFT)
  95#define PUD_MASK        (~(PUD_SIZE-1))
  96#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  97#define PGDIR_MASK      (~(PGDIR_SIZE-1))
  98
  99/*
 100 * entries per page directory level: the S390 is two-level, so
 101 * we don't really have any PMD directory physically.
 102 * for S390 segment-table entries are combined to one PGD
 103 * that leads to 1024 pte per pgd
 104 */
 105#define PTRS_PER_PTE    256
 106#define PTRS_PER_PMD    2048
 107#define PTRS_PER_PUD    2048
 108#define PTRS_PER_PGD    2048
 109
 110#define FIRST_USER_ADDRESS  0UL
 111
 112#define pte_ERROR(e) \
 113        printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
 114#define pmd_ERROR(e) \
 115        printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
 116#define pud_ERROR(e) \
 117        printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
 118#define pgd_ERROR(e) \
 119        printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
 120
 121#ifndef __ASSEMBLY__
 122/*
 123 * The vmalloc and module area will always be on the topmost area of the
 124 * kernel mapping. We reserve 128GB (64bit) for vmalloc and modules.
 125 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
 126 * modules will reside. That makes sure that inter module branches always
 127 * happen without trampolines and in addition the placement within a 2GB frame
 128 * is branch prediction unit friendly.
 129 */
 130extern unsigned long VMALLOC_START;
 131extern unsigned long VMALLOC_END;
 132extern struct page *vmemmap;
 133
 134#define VMEM_MAX_PHYS ((unsigned long) vmemmap)
 135
 136extern unsigned long MODULES_VADDR;
 137extern unsigned long MODULES_END;
 138#define MODULES_VADDR   MODULES_VADDR
 139#define MODULES_END     MODULES_END
 140#define MODULES_LEN     (1UL << 31)
 141
 142static inline int is_module_addr(void *addr)
 143{
 144        BUILD_BUG_ON(MODULES_LEN > (1UL << 31));
 145        if (addr < (void *)MODULES_VADDR)
 146                return 0;
 147        if (addr > (void *)MODULES_END)
 148                return 0;
 149        return 1;
 150}
 151
 152/*
 153 * A 64 bit pagetable entry of S390 has following format:
 154 * |                     PFRA                         |0IPC|  OS  |
 155 * 0000000000111111111122222222223333333333444444444455555555556666
 156 * 0123456789012345678901234567890123456789012345678901234567890123
 157 *
 158 * I Page-Invalid Bit:    Page is not available for address-translation
 159 * P Page-Protection Bit: Store access not possible for page
 160 * C Change-bit override: HW is not required to set change bit
 161 *
 162 * A 64 bit segmenttable entry of S390 has following format:
 163 * |        P-table origin                              |      TT
 164 * 0000000000111111111122222222223333333333444444444455555555556666
 165 * 0123456789012345678901234567890123456789012345678901234567890123
 166 *
 167 * I Segment-Invalid Bit:    Segment is not available for address-translation
 168 * C Common-Segment Bit:     Segment is not private (PoP 3-30)
 169 * P Page-Protection Bit: Store access not possible for page
 170 * TT Type 00
 171 *
 172 * A 64 bit region table entry of S390 has following format:
 173 * |        S-table origin                             |   TF  TTTL
 174 * 0000000000111111111122222222223333333333444444444455555555556666
 175 * 0123456789012345678901234567890123456789012345678901234567890123
 176 *
 177 * I Segment-Invalid Bit:    Segment is not available for address-translation
 178 * TT Type 01
 179 * TF
 180 * TL Table length
 181 *
 182 * The 64 bit regiontable origin of S390 has following format:
 183 * |      region table origon                          |       DTTL
 184 * 0000000000111111111122222222223333333333444444444455555555556666
 185 * 0123456789012345678901234567890123456789012345678901234567890123
 186 *
 187 * X Space-Switch event:
 188 * G Segment-Invalid Bit:  
 189 * P Private-Space Bit:    
 190 * S Storage-Alteration:
 191 * R Real space
 192 * TL Table-Length:
 193 *
 194 * A storage key has the following format:
 195 * | ACC |F|R|C|0|
 196 *  0   3 4 5 6 7
 197 * ACC: access key
 198 * F  : fetch protection bit
 199 * R  : referenced bit
 200 * C  : changed bit
 201 */
 202
 203/* Hardware bits in the page table entry */
 204#define _PAGE_NOEXEC    0x100           /* HW no-execute bit  */
 205#define _PAGE_PROTECT   0x200           /* HW read-only bit  */
 206#define _PAGE_INVALID   0x400           /* HW invalid bit    */
 207#define _PAGE_LARGE     0x800           /* Bit to mark a large pte */
 208
 209/* Software bits in the page table entry */
 210#define _PAGE_PRESENT   0x001           /* SW pte present bit */
 211#define _PAGE_YOUNG     0x004           /* SW pte young bit */
 212#define _PAGE_DIRTY     0x008           /* SW pte dirty bit */
 213#define _PAGE_READ      0x010           /* SW pte read bit */
 214#define _PAGE_WRITE     0x020           /* SW pte write bit */
 215#define _PAGE_SPECIAL   0x040           /* SW associated with special page */
 216#define _PAGE_UNUSED    0x080           /* SW bit for pgste usage state */
 217#define __HAVE_ARCH_PTE_SPECIAL
 218
 219#ifdef CONFIG_MEM_SOFT_DIRTY
 220#define _PAGE_SOFT_DIRTY 0x002          /* SW pte soft dirty bit */
 221#else
 222#define _PAGE_SOFT_DIRTY 0x000
 223#endif
 224
 225/* Set of bits not changed in pte_modify */
 226#define _PAGE_CHG_MASK          (PAGE_MASK | _PAGE_SPECIAL | _PAGE_DIRTY | \
 227                                 _PAGE_YOUNG | _PAGE_SOFT_DIRTY)
 228
 229/*
 230 * handle_pte_fault uses pte_present and pte_none to find out the pte type
 231 * WITHOUT holding the page table lock. The _PAGE_PRESENT bit is used to
 232 * distinguish present from not-present ptes. It is changed only with the page
 233 * table lock held.
 234 *
 235 * The following table gives the different possible bit combinations for
 236 * the pte hardware and software bits in the last 12 bits of a pte
 237 * (. unassigned bit, x don't care, t swap type):
 238 *
 239 *                              842100000000
 240 *                              000084210000
 241 *                              000000008421
 242 *                              .IR.uswrdy.p
 243 * empty                        .10.00000000
 244 * swap                         .11..ttttt.0
 245 * prot-none, clean, old        .11.xx0000.1
 246 * prot-none, clean, young      .11.xx0001.1
 247 * prot-none, dirty, old        .11.xx0010.1
 248 * prot-none, dirty, young      .11.xx0011.1
 249 * read-only, clean, old        .11.xx0100.1
 250 * read-only, clean, young      .01.xx0101.1
 251 * read-only, dirty, old        .11.xx0110.1
 252 * read-only, dirty, young      .01.xx0111.1
 253 * read-write, clean, old       .11.xx1100.1
 254 * read-write, clean, young     .01.xx1101.1
 255 * read-write, dirty, old       .10.xx1110.1
 256 * read-write, dirty, young     .00.xx1111.1
 257 * HW-bits: R read-only, I invalid
 258 * SW-bits: p present, y young, d dirty, r read, w write, s special,
 259 *          u unused, l large
 260 *
 261 * pte_none    is true for the bit pattern .10.00000000, pte == 0x400
 262 * pte_swap    is true for the bit pattern .11..ooooo.0, (pte & 0x201) == 0x200
 263 * pte_present is true for the bit pattern .xx.xxxxxx.1, (pte & 0x001) == 0x001
 264 */
 265
 266/* Bits in the segment/region table address-space-control-element */
 267#define _ASCE_ORIGIN            ~0xfffUL/* segment table origin             */
 268#define _ASCE_PRIVATE_SPACE     0x100   /* private space control            */
 269#define _ASCE_ALT_EVENT         0x80    /* storage alteration event control */
 270#define _ASCE_SPACE_SWITCH      0x40    /* space switch event               */
 271#define _ASCE_REAL_SPACE        0x20    /* real space control               */
 272#define _ASCE_TYPE_MASK         0x0c    /* asce table type mask             */
 273#define _ASCE_TYPE_REGION1      0x0c    /* region first table type          */
 274#define _ASCE_TYPE_REGION2      0x08    /* region second table type         */
 275#define _ASCE_TYPE_REGION3      0x04    /* region third table type          */
 276#define _ASCE_TYPE_SEGMENT      0x00    /* segment table type               */
 277#define _ASCE_TABLE_LENGTH      0x03    /* region table length              */
 278
 279/* Bits in the region table entry */
 280#define _REGION_ENTRY_ORIGIN    ~0xfffUL/* region/segment table origin      */
 281#define _REGION_ENTRY_PROTECT   0x200   /* region protection bit            */
 282#define _REGION_ENTRY_NOEXEC    0x100   /* region no-execute bit            */
 283#define _REGION_ENTRY_OFFSET    0xc0    /* region table offset              */
 284#define _REGION_ENTRY_INVALID   0x20    /* invalid region table entry       */
 285#define _REGION_ENTRY_TYPE_MASK 0x0c    /* region/segment table type mask   */
 286#define _REGION_ENTRY_TYPE_R1   0x0c    /* region first table type          */
 287#define _REGION_ENTRY_TYPE_R2   0x08    /* region second table type         */
 288#define _REGION_ENTRY_TYPE_R3   0x04    /* region third table type          */
 289#define _REGION_ENTRY_LENGTH    0x03    /* region third length              */
 290
 291#define _REGION1_ENTRY          (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
 292#define _REGION1_ENTRY_EMPTY    (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
 293#define _REGION2_ENTRY          (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
 294#define _REGION2_ENTRY_EMPTY    (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
 295#define _REGION3_ENTRY          (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
 296#define _REGION3_ENTRY_EMPTY    (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
 297
 298#define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address      */
 299#define _REGION3_ENTRY_ORIGIN  ~0x7ffUL/* region third table origin          */
 300
 301#define _REGION3_ENTRY_DIRTY    0x2000  /* SW region dirty bit */
 302#define _REGION3_ENTRY_YOUNG    0x1000  /* SW region young bit */
 303#define _REGION3_ENTRY_LARGE    0x0400  /* RTTE-format control, large page  */
 304#define _REGION3_ENTRY_READ     0x0002  /* SW region read bit */
 305#define _REGION3_ENTRY_WRITE    0x0001  /* SW region write bit */
 306
 307#ifdef CONFIG_MEM_SOFT_DIRTY
 308#define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */
 309#else
 310#define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */
 311#endif
 312
 313#define _REGION_ENTRY_BITS       0xfffffffffffff227UL
 314#define _REGION_ENTRY_BITS_LARGE 0xffffffff8000fe27UL
 315
 316/* Bits in the segment table entry */
 317#define _SEGMENT_ENTRY_BITS     0xfffffffffffffe33UL
 318#define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
 319#define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address        */
 320#define _SEGMENT_ENTRY_ORIGIN   ~0x7ffUL/* segment table origin             */
 321#define _SEGMENT_ENTRY_PROTECT  0x200   /* page protection bit              */
 322#define _SEGMENT_ENTRY_NOEXEC   0x100   /* region no-execute bit            */
 323#define _SEGMENT_ENTRY_INVALID  0x20    /* invalid segment table entry      */
 324
 325#define _SEGMENT_ENTRY          (0)
 326#define _SEGMENT_ENTRY_EMPTY    (_SEGMENT_ENTRY_INVALID)
 327
 328#define _SEGMENT_ENTRY_DIRTY    0x2000  /* SW segment dirty bit */
 329#define _SEGMENT_ENTRY_YOUNG    0x1000  /* SW segment young bit */
 330#define _SEGMENT_ENTRY_LARGE    0x0400  /* STE-format control, large page */
 331#define _SEGMENT_ENTRY_WRITE    0x0002  /* SW segment write bit */
 332#define _SEGMENT_ENTRY_READ     0x0001  /* SW segment read bit */
 333
 334#ifdef CONFIG_MEM_SOFT_DIRTY
 335#define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */
 336#else
 337#define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
 338#endif
 339
 340/*
 341 * Segment table and region3 table entry encoding
 342 * (R = read-only, I = invalid, y = young bit):
 343 *                              dy..R...I...wr
 344 * prot-none, clean, old        00..1...1...00
 345 * prot-none, clean, young      01..1...1...00
 346 * prot-none, dirty, old        10..1...1...00
 347 * prot-none, dirty, young      11..1...1...00
 348 * read-only, clean, old        00..1...1...01
 349 * read-only, clean, young      01..1...0...01
 350 * read-only, dirty, old        10..1...1...01
 351 * read-only, dirty, young      11..1...0...01
 352 * read-write, clean, old       00..1...1...11
 353 * read-write, clean, young     01..1...0...11
 354 * read-write, dirty, old       10..0...1...11
 355 * read-write, dirty, young     11..0...0...11
 356 * The segment table origin is used to distinguish empty (origin==0) from
 357 * read-write, old segment table entries (origin!=0)
 358 * HW-bits: R read-only, I invalid
 359 * SW-bits: y young, d dirty, r read, w write
 360 */
 361
 362/* Page status table bits for virtualization */
 363#define PGSTE_ACC_BITS  0xf000000000000000UL
 364#define PGSTE_FP_BIT    0x0800000000000000UL
 365#define PGSTE_PCL_BIT   0x0080000000000000UL
 366#define PGSTE_HR_BIT    0x0040000000000000UL
 367#define PGSTE_HC_BIT    0x0020000000000000UL
 368#define PGSTE_GR_BIT    0x0004000000000000UL
 369#define PGSTE_GC_BIT    0x0002000000000000UL
 370#define PGSTE_UC_BIT    0x0000800000000000UL    /* user dirty (migration) */
 371#define PGSTE_IN_BIT    0x0000400000000000UL    /* IPTE notify bit */
 372#define PGSTE_VSIE_BIT  0x0000200000000000UL    /* ref'd in a shadow table */
 373
 374/* Guest Page State used for virtualization */
 375#define _PGSTE_GPS_ZERO                 0x0000000080000000UL
 376#define _PGSTE_GPS_USAGE_MASK           0x0000000003000000UL
 377#define _PGSTE_GPS_USAGE_STABLE         0x0000000000000000UL
 378#define _PGSTE_GPS_USAGE_UNUSED         0x0000000001000000UL
 379#define _PGSTE_GPS_USAGE_POT_VOLATILE   0x0000000002000000UL
 380#define _PGSTE_GPS_USAGE_VOLATILE       _PGSTE_GPS_USAGE_MASK
 381
 382/*
 383 * A user page table pointer has the space-switch-event bit, the
 384 * private-space-control bit and the storage-alteration-event-control
 385 * bit set. A kernel page table pointer doesn't need them.
 386 */
 387#define _ASCE_USER_BITS         (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
 388                                 _ASCE_ALT_EVENT)
 389
 390/*
 391 * Page protection definitions.
 392 */
 393#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_INVALID | _PAGE_PROTECT)
 394#define PAGE_RO         __pgprot(_PAGE_PRESENT | _PAGE_READ | \
 395                                 _PAGE_NOEXEC  | _PAGE_INVALID | _PAGE_PROTECT)
 396#define PAGE_RX         __pgprot(_PAGE_PRESENT | _PAGE_READ | \
 397                                 _PAGE_INVALID | _PAGE_PROTECT)
 398#define PAGE_RW         __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 399                                 _PAGE_NOEXEC  | _PAGE_INVALID | _PAGE_PROTECT)
 400#define PAGE_RWX        __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 401                                 _PAGE_INVALID | _PAGE_PROTECT)
 402
 403#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 404                                 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
 405#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 406                                 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
 407#define PAGE_KERNEL_RO  __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
 408                                 _PAGE_PROTECT | _PAGE_NOEXEC)
 409#define PAGE_KERNEL_EXEC __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
 410                                  _PAGE_YOUNG | _PAGE_DIRTY)
 411
 412/*
 413 * On s390 the page table entry has an invalid bit and a read-only bit.
 414 * Read permission implies execute permission and write permission
 415 * implies read permission.
 416 */
 417         /*xwr*/
 418#define __P000  PAGE_NONE
 419#define __P001  PAGE_RO
 420#define __P010  PAGE_RO
 421#define __P011  PAGE_RO
 422#define __P100  PAGE_RX
 423#define __P101  PAGE_RX
 424#define __P110  PAGE_RX
 425#define __P111  PAGE_RX
 426
 427#define __S000  PAGE_NONE
 428#define __S001  PAGE_RO
 429#define __S010  PAGE_RW
 430#define __S011  PAGE_RW
 431#define __S100  PAGE_RX
 432#define __S101  PAGE_RX
 433#define __S110  PAGE_RWX
 434#define __S111  PAGE_RWX
 435
 436/*
 437 * Segment entry (large page) protection definitions.
 438 */
 439#define SEGMENT_NONE    __pgprot(_SEGMENT_ENTRY_INVALID | \
 440                                 _SEGMENT_ENTRY_PROTECT)
 441#define SEGMENT_RO      __pgprot(_SEGMENT_ENTRY_PROTECT | \
 442                                 _SEGMENT_ENTRY_READ | \
 443                                 _SEGMENT_ENTRY_NOEXEC)
 444#define SEGMENT_RX      __pgprot(_SEGMENT_ENTRY_PROTECT | \
 445                                 _SEGMENT_ENTRY_READ)
 446#define SEGMENT_RW      __pgprot(_SEGMENT_ENTRY_READ | \
 447                                 _SEGMENT_ENTRY_WRITE | \
 448                                 _SEGMENT_ENTRY_NOEXEC)
 449#define SEGMENT_RWX     __pgprot(_SEGMENT_ENTRY_READ | \
 450                                 _SEGMENT_ENTRY_WRITE)
 451#define SEGMENT_KERNEL  __pgprot(_SEGMENT_ENTRY |       \
 452                                 _SEGMENT_ENTRY_LARGE | \
 453                                 _SEGMENT_ENTRY_READ |  \
 454                                 _SEGMENT_ENTRY_WRITE | \
 455                                 _SEGMENT_ENTRY_YOUNG | \
 456                                 _SEGMENT_ENTRY_DIRTY | \
 457                                 _SEGMENT_ENTRY_NOEXEC)
 458#define SEGMENT_KERNEL_RO __pgprot(_SEGMENT_ENTRY |     \
 459                                 _SEGMENT_ENTRY_LARGE | \
 460                                 _SEGMENT_ENTRY_READ |  \
 461                                 _SEGMENT_ENTRY_YOUNG | \
 462                                 _SEGMENT_ENTRY_PROTECT | \
 463                                 _SEGMENT_ENTRY_NOEXEC)
 464
 465/*
 466 * Region3 entry (large page) protection definitions.
 467 */
 468
 469#define REGION3_KERNEL  __pgprot(_REGION_ENTRY_TYPE_R3 | \
 470                                 _REGION3_ENTRY_LARGE |  \
 471                                 _REGION3_ENTRY_READ |   \
 472                                 _REGION3_ENTRY_WRITE |  \
 473                                 _REGION3_ENTRY_YOUNG |  \
 474                                 _REGION3_ENTRY_DIRTY | \
 475                                 _REGION_ENTRY_NOEXEC)
 476#define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \
 477                                   _REGION3_ENTRY_LARGE |  \
 478                                   _REGION3_ENTRY_READ |   \
 479                                   _REGION3_ENTRY_YOUNG |  \
 480                                   _REGION_ENTRY_PROTECT | \
 481                                   _REGION_ENTRY_NOEXEC)
 482
 483static inline int mm_has_pgste(struct mm_struct *mm)
 484{
 485#ifdef CONFIG_PGSTE
 486        if (unlikely(mm->context.has_pgste))
 487                return 1;
 488#endif
 489        return 0;
 490}
 491
 492static inline int mm_alloc_pgste(struct mm_struct *mm)
 493{
 494#ifdef CONFIG_PGSTE
 495        if (unlikely(mm->context.alloc_pgste))
 496                return 1;
 497#endif
 498        return 0;
 499}
 500
 501/*
 502 * In the case that a guest uses storage keys
 503 * faults should no longer be backed by zero pages
 504 */
 505#define mm_forbids_zeropage mm_use_skey
 506static inline int mm_use_skey(struct mm_struct *mm)
 507{
 508#ifdef CONFIG_PGSTE
 509        if (mm->context.use_skey)
 510                return 1;
 511#endif
 512        return 0;
 513}
 514
 515static inline void csp(unsigned int *ptr, unsigned int old, unsigned int new)
 516{
 517        register unsigned long reg2 asm("2") = old;
 518        register unsigned long reg3 asm("3") = new;
 519        unsigned long address = (unsigned long)ptr | 1;
 520
 521        asm volatile(
 522                "       csp     %0,%3"
 523                : "+d" (reg2), "+m" (*ptr)
 524                : "d" (reg3), "d" (address)
 525                : "cc");
 526}
 527
 528static inline void cspg(unsigned long *ptr, unsigned long old, unsigned long new)
 529{
 530        register unsigned long reg2 asm("2") = old;
 531        register unsigned long reg3 asm("3") = new;
 532        unsigned long address = (unsigned long)ptr | 1;
 533
 534        asm volatile(
 535                "       .insn   rre,0xb98a0000,%0,%3"
 536                : "+d" (reg2), "+m" (*ptr)
 537                : "d" (reg3), "d" (address)
 538                : "cc");
 539}
 540
 541#define CRDTE_DTT_PAGE          0x00UL
 542#define CRDTE_DTT_SEGMENT       0x10UL
 543#define CRDTE_DTT_REGION3       0x14UL
 544#define CRDTE_DTT_REGION2       0x18UL
 545#define CRDTE_DTT_REGION1       0x1cUL
 546
 547static inline void crdte(unsigned long old, unsigned long new,
 548                         unsigned long table, unsigned long dtt,
 549                         unsigned long address, unsigned long asce)
 550{
 551        register unsigned long reg2 asm("2") = old;
 552        register unsigned long reg3 asm("3") = new;
 553        register unsigned long reg4 asm("4") = table | dtt;
 554        register unsigned long reg5 asm("5") = address;
 555
 556        asm volatile(".insn rrf,0xb98f0000,%0,%2,%4,0"
 557                     : "+d" (reg2)
 558                     : "d" (reg3), "d" (reg4), "d" (reg5), "a" (asce)
 559                     : "memory", "cc");
 560}
 561
 562/*
 563 * pgd/pmd/pte query functions
 564 */
 565static inline int pgd_present(pgd_t pgd)
 566{
 567        if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
 568                return 1;
 569        return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
 570}
 571
 572static inline int pgd_none(pgd_t pgd)
 573{
 574        if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
 575                return 0;
 576        return (pgd_val(pgd) & _REGION_ENTRY_INVALID) != 0UL;
 577}
 578
 579static inline int pgd_bad(pgd_t pgd)
 580{
 581        /*
 582         * With dynamic page table levels the pgd can be a region table
 583         * entry or a segment table entry. Check for the bit that are
 584         * invalid for either table entry.
 585         */
 586        unsigned long mask =
 587                ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INVALID &
 588                ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
 589        return (pgd_val(pgd) & mask) != 0;
 590}
 591
 592static inline int pud_present(pud_t pud)
 593{
 594        if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
 595                return 1;
 596        return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
 597}
 598
 599static inline int pud_none(pud_t pud)
 600{
 601        if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
 602                return 0;
 603        return pud_val(pud) == _REGION3_ENTRY_EMPTY;
 604}
 605
 606static inline int pud_large(pud_t pud)
 607{
 608        if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
 609                return 0;
 610        return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
 611}
 612
 613static inline unsigned long pud_pfn(pud_t pud)
 614{
 615        unsigned long origin_mask;
 616
 617        origin_mask = _REGION3_ENTRY_ORIGIN;
 618        if (pud_large(pud))
 619                origin_mask = _REGION3_ENTRY_ORIGIN_LARGE;
 620        return (pud_val(pud) & origin_mask) >> PAGE_SHIFT;
 621}
 622
 623static inline int pmd_large(pmd_t pmd)
 624{
 625        return (pmd_val(pmd) & _SEGMENT_ENTRY_LARGE) != 0;
 626}
 627
 628static inline int pmd_bad(pmd_t pmd)
 629{
 630        if (pmd_large(pmd))
 631                return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS_LARGE) != 0;
 632        return (pmd_val(pmd) & ~_SEGMENT_ENTRY_BITS) != 0;
 633}
 634
 635static inline int pud_bad(pud_t pud)
 636{
 637        if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
 638                return pmd_bad(__pmd(pud_val(pud)));
 639        if (pud_large(pud))
 640                return (pud_val(pud) & ~_REGION_ENTRY_BITS_LARGE) != 0;
 641        return (pud_val(pud) & ~_REGION_ENTRY_BITS) != 0;
 642}
 643
 644static inline int pmd_present(pmd_t pmd)
 645{
 646        return pmd_val(pmd) != _SEGMENT_ENTRY_EMPTY;
 647}
 648
 649static inline int pmd_none(pmd_t pmd)
 650{
 651        return pmd_val(pmd) == _SEGMENT_ENTRY_EMPTY;
 652}
 653
 654static inline unsigned long pmd_pfn(pmd_t pmd)
 655{
 656        unsigned long origin_mask;
 657
 658        origin_mask = _SEGMENT_ENTRY_ORIGIN;
 659        if (pmd_large(pmd))
 660                origin_mask = _SEGMENT_ENTRY_ORIGIN_LARGE;
 661        return (pmd_val(pmd) & origin_mask) >> PAGE_SHIFT;
 662}
 663
 664#define __HAVE_ARCH_PMD_WRITE
 665static inline int pmd_write(pmd_t pmd)
 666{
 667        return (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE) != 0;
 668}
 669
 670static inline int pmd_dirty(pmd_t pmd)
 671{
 672        int dirty = 1;
 673        if (pmd_large(pmd))
 674                dirty = (pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY) != 0;
 675        return dirty;
 676}
 677
 678static inline int pmd_young(pmd_t pmd)
 679{
 680        int young = 1;
 681        if (pmd_large(pmd))
 682                young = (pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG) != 0;
 683        return young;
 684}
 685
 686static inline int pte_present(pte_t pte)
 687{
 688        /* Bit pattern: (pte & 0x001) == 0x001 */
 689        return (pte_val(pte) & _PAGE_PRESENT) != 0;
 690}
 691
 692static inline int pte_none(pte_t pte)
 693{
 694        /* Bit pattern: pte == 0x400 */
 695        return pte_val(pte) == _PAGE_INVALID;
 696}
 697
 698static inline int pte_swap(pte_t pte)
 699{
 700        /* Bit pattern: (pte & 0x201) == 0x200 */
 701        return (pte_val(pte) & (_PAGE_PROTECT | _PAGE_PRESENT))
 702                == _PAGE_PROTECT;
 703}
 704
 705static inline int pte_special(pte_t pte)
 706{
 707        return (pte_val(pte) & _PAGE_SPECIAL);
 708}
 709
 710#define __HAVE_ARCH_PTE_SAME
 711static inline int pte_same(pte_t a, pte_t b)
 712{
 713        return pte_val(a) == pte_val(b);
 714}
 715
 716#ifdef CONFIG_NUMA_BALANCING
 717static inline int pte_protnone(pte_t pte)
 718{
 719        return pte_present(pte) && !(pte_val(pte) & _PAGE_READ);
 720}
 721
 722static inline int pmd_protnone(pmd_t pmd)
 723{
 724        /* pmd_large(pmd) implies pmd_present(pmd) */
 725        return pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_READ);
 726}
 727#endif
 728
 729static inline int pte_soft_dirty(pte_t pte)
 730{
 731        return pte_val(pte) & _PAGE_SOFT_DIRTY;
 732}
 733#define pte_swp_soft_dirty pte_soft_dirty
 734
 735static inline pte_t pte_mksoft_dirty(pte_t pte)
 736{
 737        pte_val(pte) |= _PAGE_SOFT_DIRTY;
 738        return pte;
 739}
 740#define pte_swp_mksoft_dirty pte_mksoft_dirty
 741
 742static inline pte_t pte_clear_soft_dirty(pte_t pte)
 743{
 744        pte_val(pte) &= ~_PAGE_SOFT_DIRTY;
 745        return pte;
 746}
 747#define pte_swp_clear_soft_dirty pte_clear_soft_dirty
 748
 749static inline int pmd_soft_dirty(pmd_t pmd)
 750{
 751        return pmd_val(pmd) & _SEGMENT_ENTRY_SOFT_DIRTY;
 752}
 753
 754static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
 755{
 756        pmd_val(pmd) |= _SEGMENT_ENTRY_SOFT_DIRTY;
 757        return pmd;
 758}
 759
 760static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
 761{
 762        pmd_val(pmd) &= ~_SEGMENT_ENTRY_SOFT_DIRTY;
 763        return pmd;
 764}
 765
 766/*
 767 * query functions pte_write/pte_dirty/pte_young only work if
 768 * pte_present() is true. Undefined behaviour if not..
 769 */
 770static inline int pte_write(pte_t pte)
 771{
 772        return (pte_val(pte) & _PAGE_WRITE) != 0;
 773}
 774
 775static inline int pte_dirty(pte_t pte)
 776{
 777        return (pte_val(pte) & _PAGE_DIRTY) != 0;
 778}
 779
 780static inline int pte_young(pte_t pte)
 781{
 782        return (pte_val(pte) & _PAGE_YOUNG) != 0;
 783}
 784
 785#define __HAVE_ARCH_PTE_UNUSED
 786static inline int pte_unused(pte_t pte)
 787{
 788        return pte_val(pte) & _PAGE_UNUSED;
 789}
 790
 791/*
 792 * pgd/pmd/pte modification functions
 793 */
 794
 795static inline void pgd_clear(pgd_t *pgd)
 796{
 797        if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
 798                pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
 799}
 800
 801static inline void pud_clear(pud_t *pud)
 802{
 803        if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
 804                pud_val(*pud) = _REGION3_ENTRY_EMPTY;
 805}
 806
 807static inline void pmd_clear(pmd_t *pmdp)
 808{
 809        pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
 810}
 811
 812static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
 813{
 814        pte_val(*ptep) = _PAGE_INVALID;
 815}
 816
 817/*
 818 * The following pte modification functions only work if
 819 * pte_present() is true. Undefined behaviour if not..
 820 */
 821static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 822{
 823        pte_val(pte) &= _PAGE_CHG_MASK;
 824        pte_val(pte) |= pgprot_val(newprot);
 825        /*
 826         * newprot for PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX
 827         * has the invalid bit set, clear it again for readable, young pages
 828         */
 829        if ((pte_val(pte) & _PAGE_YOUNG) && (pte_val(pte) & _PAGE_READ))
 830                pte_val(pte) &= ~_PAGE_INVALID;
 831        /*
 832         * newprot for PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX has the page
 833         * protection bit set, clear it again for writable, dirty pages
 834         */
 835        if ((pte_val(pte) & _PAGE_DIRTY) && (pte_val(pte) & _PAGE_WRITE))
 836                pte_val(pte) &= ~_PAGE_PROTECT;
 837        return pte;
 838}
 839
 840static inline pte_t pte_wrprotect(pte_t pte)
 841{
 842        pte_val(pte) &= ~_PAGE_WRITE;
 843        pte_val(pte) |= _PAGE_PROTECT;
 844        return pte;
 845}
 846
 847static inline pte_t pte_mkwrite(pte_t pte)
 848{
 849        pte_val(pte) |= _PAGE_WRITE;
 850        if (pte_val(pte) & _PAGE_DIRTY)
 851                pte_val(pte) &= ~_PAGE_PROTECT;
 852        return pte;
 853}
 854
 855static inline pte_t pte_mkclean(pte_t pte)
 856{
 857        pte_val(pte) &= ~_PAGE_DIRTY;
 858        pte_val(pte) |= _PAGE_PROTECT;
 859        return pte;
 860}
 861
 862static inline pte_t pte_mkdirty(pte_t pte)
 863{
 864        pte_val(pte) |= _PAGE_DIRTY | _PAGE_SOFT_DIRTY;
 865        if (pte_val(pte) & _PAGE_WRITE)
 866                pte_val(pte) &= ~_PAGE_PROTECT;
 867        return pte;
 868}
 869
 870static inline pte_t pte_mkold(pte_t pte)
 871{
 872        pte_val(pte) &= ~_PAGE_YOUNG;
 873        pte_val(pte) |= _PAGE_INVALID;
 874        return pte;
 875}
 876
 877static inline pte_t pte_mkyoung(pte_t pte)
 878{
 879        pte_val(pte) |= _PAGE_YOUNG;
 880        if (pte_val(pte) & _PAGE_READ)
 881                pte_val(pte) &= ~_PAGE_INVALID;
 882        return pte;
 883}
 884
 885static inline pte_t pte_mkspecial(pte_t pte)
 886{
 887        pte_val(pte) |= _PAGE_SPECIAL;
 888        return pte;
 889}
 890
 891#ifdef CONFIG_HUGETLB_PAGE
 892static inline pte_t pte_mkhuge(pte_t pte)
 893{
 894        pte_val(pte) |= _PAGE_LARGE;
 895        return pte;
 896}
 897#endif
 898
 899#define IPTE_GLOBAL     0
 900#define IPTE_LOCAL      1
 901
 902static inline void __ptep_ipte(unsigned long address, pte_t *ptep, int local)
 903{
 904        unsigned long pto = (unsigned long) ptep;
 905
 906        /* Invalidation + TLB flush for the pte */
 907        asm volatile(
 908                "       .insn rrf,0xb2210000,%[r1],%[r2],0,%[m4]"
 909                : "+m" (*ptep) : [r1] "a" (pto), [r2] "a" (address),
 910                  [m4] "i" (local));
 911}
 912
 913static inline void __ptep_ipte_range(unsigned long address, int nr,
 914                                     pte_t *ptep, int local)
 915{
 916        unsigned long pto = (unsigned long) ptep;
 917
 918        /* Invalidate a range of ptes + TLB flush of the ptes */
 919        do {
 920                asm volatile(
 921                        "       .insn rrf,0xb2210000,%[r1],%[r2],%[r3],%[m4]"
 922                        : [r2] "+a" (address), [r3] "+a" (nr)
 923                        : [r1] "a" (pto), [m4] "i" (local) : "memory");
 924        } while (nr != 255);
 925}
 926
 927/*
 928 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
 929 * both clear the TLB for the unmapped pte. The reason is that
 930 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
 931 * to modify an active pte. The sequence is
 932 *   1) ptep_get_and_clear
 933 *   2) set_pte_at
 934 *   3) flush_tlb_range
 935 * On s390 the tlb needs to get flushed with the modification of the pte
 936 * if the pte is active. The only way how this can be implemented is to
 937 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
 938 * is a nop.
 939 */
 940pte_t ptep_xchg_direct(struct mm_struct *, unsigned long, pte_t *, pte_t);
 941pte_t ptep_xchg_lazy(struct mm_struct *, unsigned long, pte_t *, pte_t);
 942
 943#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 944static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 945                                            unsigned long addr, pte_t *ptep)
 946{
 947        pte_t pte = *ptep;
 948
 949        pte = ptep_xchg_direct(vma->vm_mm, addr, ptep, pte_mkold(pte));
 950        return pte_young(pte);
 951}
 952
 953#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 954static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
 955                                         unsigned long address, pte_t *ptep)
 956{
 957        return ptep_test_and_clear_young(vma, address, ptep);
 958}
 959
 960#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 961static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 962                                       unsigned long addr, pte_t *ptep)
 963{
 964        return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
 965}
 966
 967#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 968pte_t ptep_modify_prot_start(struct mm_struct *, unsigned long, pte_t *);
 969void ptep_modify_prot_commit(struct mm_struct *, unsigned long, pte_t *, pte_t);
 970
 971#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
 972static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
 973                                     unsigned long addr, pte_t *ptep)
 974{
 975        return ptep_xchg_direct(vma->vm_mm, addr, ptep, __pte(_PAGE_INVALID));
 976}
 977
 978/*
 979 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
 980 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
 981 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
 982 * cannot be accessed while the batched unmap is running. In this case
 983 * full==1 and a simple pte_clear is enough. See tlb.h.
 984 */
 985#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
 986static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
 987                                            unsigned long addr,
 988                                            pte_t *ptep, int full)
 989{
 990        if (full) {
 991                pte_t pte = *ptep;
 992                *ptep = __pte(_PAGE_INVALID);
 993                return pte;
 994        }
 995        return ptep_xchg_lazy(mm, addr, ptep, __pte(_PAGE_INVALID));
 996}
 997
 998#define __HAVE_ARCH_PTEP_SET_WRPROTECT
 999static inline void ptep_set_wrprotect(struct mm_struct *mm,
1000                                      unsigned long addr, pte_t *ptep)

1001{
1002        pte_t pte = *ptep;
1003
1004        if (pte_write(pte))
1005                ptep_xchg_lazy(mm, addr, ptep, pte_wrprotect(pte));
1006}
1007
1008#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1009static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1010                                        unsigned long addr, pte_t *ptep,
1011                                        pte_t entry, int dirty)
1012{
1013        if (pte_same(*ptep, entry))
1014                return 0;
1015        ptep_xchg_direct(vma->vm_mm, addr, ptep, entry);
1016        return 1;
1017}
1018
1019/*
1020 * Additional functions to handle KVM guest page tables
1021 */
1022void ptep_set_pte_at(struct mm_struct *mm, unsigned long addr,
1023                     pte_t *ptep, pte_t entry);
1024void ptep_set_notify(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1025void ptep_notify(struct mm_struct *mm, unsigned long addr,
1026                 pte_t *ptep, unsigned long bits);
1027int ptep_force_prot(struct mm_struct *mm, unsigned long gaddr,
1028                    pte_t *ptep, int prot, unsigned long bit);
1029void ptep_zap_unused(struct mm_struct *mm, unsigned long addr,
1030                     pte_t *ptep , int reset);
1031void ptep_zap_key(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
1032int ptep_shadow_pte(struct mm_struct *mm, unsigned long saddr,
1033                    pte_t *sptep, pte_t *tptep, pte_t pte);
1034void ptep_unshadow_pte(struct mm_struct *mm, unsigned long saddr, pte_t *ptep);
1035
1036bool test_and_clear_guest_dirty(struct mm_struct *mm, unsigned long address);
1037int set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1038                          unsigned char key, bool nq);
1039int cond_set_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1040                               unsigned char key, unsigned char *oldkey,
1041                               bool nq, bool mr, bool mc);
1042int reset_guest_reference_bit(struct mm_struct *mm, unsigned long addr);
1043int get_guest_storage_key(struct mm_struct *mm, unsigned long addr,
1044                          unsigned char *key);
1045
1046int set_pgste_bits(struct mm_struct *mm, unsigned long addr,
1047                                unsigned long bits, unsigned long value);
1048int get_pgste(struct mm_struct *mm, unsigned long hva, unsigned long *pgstep);
1049int pgste_perform_essa(struct mm_struct *mm, unsigned long hva, int orc,
1050                        unsigned long *oldpte, unsigned long *oldpgste);
1051
1052/*
1053 * Certain architectures need to do special things when PTEs
1054 * within a page table are directly modified.  Thus, the following
1055 * hook is made available.
1056 */
1057static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1058                              pte_t *ptep, pte_t entry)
1059{
1060        if (!MACHINE_HAS_NX)
1061                pte_val(entry) &= ~_PAGE_NOEXEC;
1062        if (pte_present(entry))
1063                pte_val(entry) &= ~_PAGE_UNUSED;
1064        if (mm_has_pgste(mm))
1065                ptep_set_pte_at(mm, addr, ptep, entry);
1066        else
1067                *ptep = entry;
1068}
1069
1070/*
1071 * Conversion functions: convert a page and protection to a page entry,
1072 * and a page entry and page directory to the page they refer to.
1073 */
1074static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1075{
1076        pte_t __pte;
1077        pte_val(__pte) = physpage + pgprot_val(pgprot);
1078        return pte_mkyoung(__pte);
1079}
1080
1081static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1082{
1083        unsigned long physpage = page_to_phys(page);
1084        pte_t __pte = mk_pte_phys(physpage, pgprot);
1085
1086        if (pte_write(__pte) && PageDirty(page))
1087                __pte = pte_mkdirty(__pte);
1088        return __pte;
1089}
1090
1091#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1092#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1093#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1094#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1095
1096#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1097#define pgd_offset_k(address) pgd_offset(&init_mm, address)
1098
1099#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1100#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1101#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1102
1103static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1104{
1105        pud_t *pud = (pud_t *) pgd;
1106        if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1107                pud = (pud_t *) pgd_deref(*pgd);
1108        return pud  + pud_index(address);
1109}
1110
1111static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1112{
1113        pmd_t *pmd = (pmd_t *) pud;
1114        if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1115                pmd = (pmd_t *) pud_deref(*pud);
1116        return pmd + pmd_index(address);
1117}
1118
1119#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1120#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1121#define pte_page(x) pfn_to_page(pte_pfn(x))
1122
1123#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1124#define pud_page(pud) pfn_to_page(pud_pfn(pud))
1125
1126/* Find an entry in the lowest level page table.. */
1127#define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1128#define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1129#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1130#define pte_unmap(pte) do { } while (0)
1131
1132static inline pmd_t pmd_wrprotect(pmd_t pmd)
1133{
1134        pmd_val(pmd) &= ~_SEGMENT_ENTRY_WRITE;
1135        pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1136        return pmd;
1137}
1138
1139static inline pmd_t pmd_mkwrite(pmd_t pmd)
1140{
1141        pmd_val(pmd) |= _SEGMENT_ENTRY_WRITE;
1142        if (pmd_large(pmd) && !(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1143                return pmd;
1144        pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1145        return pmd;
1146}
1147
1148static inline pmd_t pmd_mkclean(pmd_t pmd)
1149{
1150        if (pmd_large(pmd)) {
1151                pmd_val(pmd) &= ~_SEGMENT_ENTRY_DIRTY;
1152                pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1153        }
1154        return pmd;
1155}
1156
1157static inline pmd_t pmd_mkdirty(pmd_t pmd)
1158{
1159        if (pmd_large(pmd)) {
1160                pmd_val(pmd) |= _SEGMENT_ENTRY_DIRTY |
1161                                _SEGMENT_ENTRY_SOFT_DIRTY;
1162                if (pmd_val(pmd) & _SEGMENT_ENTRY_WRITE)
1163                        pmd_val(pmd) &= ~_SEGMENT_ENTRY_PROTECT;
1164        }
1165        return pmd;
1166}
1167
1168static inline pud_t pud_wrprotect(pud_t pud)
1169{
1170        pud_val(pud) &= ~_REGION3_ENTRY_WRITE;
1171        pud_val(pud) |= _REGION_ENTRY_PROTECT;
1172        return pud;
1173}
1174
1175static inline pud_t pud_mkwrite(pud_t pud)
1176{
1177        pud_val(pud) |= _REGION3_ENTRY_WRITE;
1178        if (pud_large(pud) && !(pud_val(pud) & _REGION3_ENTRY_DIRTY))
1179                return pud;
1180        pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1181        return pud;
1182}
1183
1184static inline pud_t pud_mkclean(pud_t pud)
1185{
1186        if (pud_large(pud)) {
1187                pud_val(pud) &= ~_REGION3_ENTRY_DIRTY;
1188                pud_val(pud) |= _REGION_ENTRY_PROTECT;
1189        }
1190        return pud;
1191}
1192
1193static inline pud_t pud_mkdirty(pud_t pud)
1194{
1195        if (pud_large(pud)) {
1196                pud_val(pud) |= _REGION3_ENTRY_DIRTY |
1197                                _REGION3_ENTRY_SOFT_DIRTY;
1198                if (pud_val(pud) & _REGION3_ENTRY_WRITE)
1199                        pud_val(pud) &= ~_REGION_ENTRY_PROTECT;
1200        }
1201        return pud;
1202}
1203
1204#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1205static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1206{
1207        /*
1208         * pgprot is PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW or PAGE_RWX
1209         * (see __Pxxx / __Sxxx). Convert to segment table entry format.
1210         */
1211        if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1212                return pgprot_val(SEGMENT_NONE);
1213        if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1214                return pgprot_val(SEGMENT_RO);
1215        if (pgprot_val(pgprot) == pgprot_val(PAGE_RX))
1216                return pgprot_val(SEGMENT_RX);
1217        if (pgprot_val(pgprot) == pgprot_val(PAGE_RW))
1218                return pgprot_val(SEGMENT_RW);
1219        return pgprot_val(SEGMENT_RWX);
1220}
1221
1222static inline pmd_t pmd_mkyoung(pmd_t pmd)
1223{
1224        if (pmd_large(pmd)) {
1225                pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1226                if (pmd_val(pmd) & _SEGMENT_ENTRY_READ)
1227                        pmd_val(pmd) &= ~_SEGMENT_ENTRY_INVALID;
1228        }
1229        return pmd;
1230}
1231
1232static inline pmd_t pmd_mkold(pmd_t pmd)
1233{
1234        if (pmd_large(pmd)) {
1235                pmd_val(pmd) &= ~_SEGMENT_ENTRY_YOUNG;
1236                pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1237        }
1238        return pmd;
1239}
1240
1241static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1242{
1243        if (pmd_large(pmd)) {
1244                pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN_LARGE |
1245                        _SEGMENT_ENTRY_DIRTY | _SEGMENT_ENTRY_YOUNG |
1246                        _SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_SOFT_DIRTY;
1247                pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1248                if (!(pmd_val(pmd) & _SEGMENT_ENTRY_DIRTY))
1249                        pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1250                if (!(pmd_val(pmd) & _SEGMENT_ENTRY_YOUNG))
1251                        pmd_val(pmd) |= _SEGMENT_ENTRY_INVALID;
1252                return pmd;
1253        }
1254        pmd_val(pmd) &= _SEGMENT_ENTRY_ORIGIN;
1255        pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1256        return pmd;
1257}
1258
1259static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1260{
1261        pmd_t __pmd;
1262        pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1263        return __pmd;
1264}
1265
1266#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1267
1268static inline void __pmdp_csp(pmd_t *pmdp)
1269{
1270        csp((unsigned int *)pmdp + 1, pmd_val(*pmdp),
1271            pmd_val(*pmdp) | _SEGMENT_ENTRY_INVALID);
1272}
1273
1274#define IDTE_GLOBAL     0
1275#define IDTE_LOCAL      1
1276
1277static inline void __pmdp_idte(unsigned long address, pmd_t *pmdp, int local)
1278{
1279        unsigned long sto;
1280
1281        sto = (unsigned long) pmdp - pmd_index(address) * sizeof(pmd_t);
1282        asm volatile(
1283                "       .insn   rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1284                : "+m" (*pmdp)
1285                : [r1] "a" (sto), [r2] "a" ((address & HPAGE_MASK)),
1286                  [m4] "i" (local)
1287                : "cc" );
1288}
1289
1290static inline void __pudp_idte(unsigned long address, pud_t *pudp, int local)
1291{
1292        unsigned long r3o;
1293
1294        r3o = (unsigned long) pudp - pud_index(address) * sizeof(pud_t);
1295        r3o |= _ASCE_TYPE_REGION3;
1296        asm volatile(
1297                "       .insn   rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1298                : "+m" (*pudp)
1299                : [r1] "a" (r3o), [r2] "a" ((address & PUD_MASK)),
1300                  [m4] "i" (local)
1301                : "cc");
1302}
1303
1304pmd_t pmdp_xchg_direct(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1305pmd_t pmdp_xchg_lazy(struct mm_struct *, unsigned long, pmd_t *, pmd_t);
1306pud_t pudp_xchg_direct(struct mm_struct *, unsigned long, pud_t *, pud_t);
1307
1308#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1309
1310#define __HAVE_ARCH_PGTABLE_DEPOSIT
1311void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
1312                                pgtable_t pgtable);
1313
1314#define __HAVE_ARCH_PGTABLE_WITHDRAW
1315pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
1316
1317#define  __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1318static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
1319                                        unsigned long addr, pmd_t *pmdp,
1320                                        pmd_t entry, int dirty)
1321{
1322        VM_BUG_ON(addr & ~HPAGE_MASK);
1323
1324        entry = pmd_mkyoung(entry);
1325        if (dirty)
1326                entry = pmd_mkdirty(entry);
1327        if (pmd_val(*pmdp) == pmd_val(entry))
1328                return 0;
1329        pmdp_xchg_direct(vma->vm_mm, addr, pmdp, entry);
1330        return 1;
1331}
1332
1333#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1334static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1335                                            unsigned long addr, pmd_t *pmdp)
1336{
1337        pmd_t pmd = *pmdp;
1338
1339        pmd = pmdp_xchg_direct(vma->vm_mm, addr, pmdp, pmd_mkold(pmd));
1340        return pmd_young(pmd);
1341}
1342
1343#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1344static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
1345                                         unsigned long addr, pmd_t *pmdp)
1346{
1347        VM_BUG_ON(addr & ~HPAGE_MASK);
1348        return pmdp_test_and_clear_young(vma, addr, pmdp);
1349}
1350
1351static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1352                              pmd_t *pmdp, pmd_t entry)
1353{
1354        if (!MACHINE_HAS_NX)
1355                pmd_val(entry) &= ~_SEGMENT_ENTRY_NOEXEC;
1356        *pmdp = entry;
1357}
1358
1359static inline pmd_t pmd_mkhuge(pmd_t pmd)
1360{
1361        pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1362        pmd_val(pmd) |= _SEGMENT_ENTRY_YOUNG;
1363        pmd_val(pmd) |= _SEGMENT_ENTRY_PROTECT;
1364        return pmd;
1365}
1366
1367#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1368static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
1369                                            unsigned long addr, pmd_t *pmdp)
1370{
1371        return pmdp_xchg_direct(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
1372}
1373
1374#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
1375static inline pmd_t pmdp_huge_get_and_clear_full(struct mm_struct *mm,
1376                                                 unsigned long addr,
1377                                                 pmd_t *pmdp, int full)
1378{
1379        if (full) {
1380                pmd_t pmd = *pmdp;
1381                *pmdp = __pmd(_SEGMENT_ENTRY_EMPTY);
1382                return pmd;
1383        }
1384        return pmdp_xchg_lazy(mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
1385}
1386
1387#define __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
1388static inline pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
1389                                          unsigned long addr, pmd_t *pmdp)
1390{
1391        return pmdp_huge_get_and_clear(vma->vm_mm, addr, pmdp);
1392}
1393
1394#define __HAVE_ARCH_PMDP_INVALIDATE
1395static inline void pmdp_invalidate(struct vm_area_struct *vma,
1396                                   unsigned long addr, pmd_t *pmdp)
1397{
1398        pmdp_xchg_direct(vma->vm_mm, addr, pmdp, __pmd(_SEGMENT_ENTRY_EMPTY));
1399}
1400
1401#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1402static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1403                                      unsigned long addr, pmd_t *pmdp)
1404{
1405        pmd_t pmd = *pmdp;
1406
1407        if (pmd_write(pmd))
1408                pmd = pmdp_xchg_lazy(mm, addr, pmdp, pmd_wrprotect(pmd));
1409}
1410
1411static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
1412                                        unsigned long address,
1413                                        pmd_t *pmdp)
1414{
1415        return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
1416}
1417#define pmdp_collapse_flush pmdp_collapse_flush
1418
1419#define pfn_pmd(pfn, pgprot)    mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1420#define mk_pmd(page, pgprot)    pfn_pmd(page_to_pfn(page), (pgprot))
1421
1422static inline int pmd_trans_huge(pmd_t pmd)
1423{
1424        return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1425}
1426
1427#define has_transparent_hugepage has_transparent_hugepage
1428static inline int has_transparent_hugepage(void)
1429{
1430        return MACHINE_HAS_EDAT1 ? 1 : 0;
1431}
1432#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1433
1434/*
1435 * 64 bit swap entry format:
1436 * A page-table entry has some bits we have to treat in a special way.
1437 * Bits 52 and bit 55 have to be zero, otherwise a specification
1438 * exception will occur instead of a page translation exception. The
1439 * specification exception has the bad habit not to store necessary
1440 * information in the lowcore.
1441 * Bits 54 and 63 are used to indicate the page type.
1442 * A swap pte is indicated by bit pattern (pte & 0x201) == 0x200
1443 * This leaves the bits 0-51 and bits 56-62 to store type and offset.
1444 * We use the 5 bits from 57-61 for the type and the 52 bits from 0-51
1445 * for the offset.
1446 * |                      offset                        |01100|type |00|
1447 * |0000000000111111111122222222223333333333444444444455|55555|55566|66|
1448 * |0123456789012345678901234567890123456789012345678901|23456|78901|23|
1449 */
1450
1451#define __SWP_OFFSET_MASK       ((1UL << 52) - 1)
1452#define __SWP_OFFSET_SHIFT      12
1453#define __SWP_TYPE_MASK         ((1UL << 5) - 1)
1454#define __SWP_TYPE_SHIFT        2
1455
1456static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1457{
1458        pte_t pte;
1459
1460        pte_val(pte) = _PAGE_INVALID | _PAGE_PROTECT;
1461        pte_val(pte) |= (offset & __SWP_OFFSET_MASK) << __SWP_OFFSET_SHIFT;
1462        pte_val(pte) |= (type & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT;
1463        return pte;
1464}
1465
1466static inline unsigned long __swp_type(swp_entry_t entry)
1467{
1468        return (entry.val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK;
1469}
1470
1471static inline unsigned long __swp_offset(swp_entry_t entry)
1472{
1473        return (entry.val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK;
1474}
1475
1476static inline swp_entry_t __swp_entry(unsigned long type, unsigned long offset)
1477{
1478        return (swp_entry_t) { pte_val(mk_swap_pte(type, offset)) };
1479}
1480
1481#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1482#define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
1483
1484#endif /* !__ASSEMBLY__ */
1485
1486#define kern_addr_valid(addr)   (1)
1487
1488extern int vmem_add_mapping(unsigned long start, unsigned long size);
1489extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1490extern int s390_enable_sie(void);
1491extern int s390_enable_skey(void);
1492extern void s390_reset_cmma(struct mm_struct *mm);
1493
1494/* s390 has a private copy of get unmapped area to deal with cache synonyms */
1495#define HAVE_ARCH_UNMAPPED_AREA
1496#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1497
1498/*
1499 * No page table caches to initialise
1500 */
1501static inline void pgtable_cache_init(void) { }
1502static inline void check_pgt_cache(void) { }
1503
1504#include <asm-generic/pgtable.h>
1505
1506#endif /* _S390_PAGE_H */
1507