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7#ifndef __QDIO_H__
8#define __QDIO_H__
9
10#include <linux/interrupt.h>
11#include <asm/cio.h>
12#include <asm/ccwdev.h>
13
14
15#define QDIO_MAX_QUEUES_PER_IRQ 4
16#define QDIO_MAX_BUFFERS_PER_Q 128
17#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
18#define QDIO_MAX_ELEMENTS_PER_BUFFER 16
19#define QDIO_SBAL_SIZE 256
20
21#define QDIO_QETH_QFMT 0
22#define QDIO_ZFCP_QFMT 1
23#define QDIO_IQDIO_QFMT 2
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35struct qdesfmt0 {
36 u64 sliba;
37 u64 sla;
38 u64 slsba;
39 u32 : 32;
40 u32 akey : 4;
41 u32 bkey : 4;
42 u32 ckey : 4;
43 u32 dkey : 4;
44 u32 : 16;
45} __attribute__ ((packed));
46
47#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
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62struct qdr {
63 u32 qfmt : 8;
64 u32 pfmt : 8;
65 u32 : 8;
66 u32 ac : 8;
67 u32 : 8;
68 u32 iqdcnt : 8;
69 u32 : 8;
70 u32 oqdcnt : 8;
71 u32 : 8;
72 u32 iqdsz : 8;
73 u32 : 8;
74 u32 oqdsz : 8;
75
76 u32 res[9];
77
78 u64 qiba;
79 u32 : 32;
80 u32 qkey : 4;
81 u32 : 28;
82 struct qdesfmt0 qdf0[126];
83} __attribute__ ((packed, aligned(4096)));
84
85#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
86#define QIB_RFLAGS_ENABLE_QEBSM 0x80
87#define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
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100struct qib {
101 u32 qfmt : 8;
102 u32 pfmt : 8;
103 u32 rflags : 8;
104 u32 ac : 8;
105 u32 : 32;
106 u64 isliba;
107 u64 osliba;
108 u32 : 32;
109 u32 : 32;
110 u8 ebcnam[8];
111
112 u8 res[88];
113
114 u8 parm[QDIO_MAX_BUFFERS_PER_Q];
115} __attribute__ ((packed, aligned(256)));
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121struct slibe {
122 u64 parms;
123};
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142struct qaob {
143 u64 res0[6];
144 u8 res1;
145 u8 res2;
146 u8 res3;
147 u8 aorc;
148 u8 flags;
149 u16 cbtbs;
150 u8 sb_count;
151 u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
152 u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
153 u64 user0;
154 u64 res4[2];
155 u64 user1;
156 u64 user2;
157} __attribute__ ((packed, aligned(256)));
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166struct slib {
167 u64 nsliba;
168 u64 sla;
169 u64 slsba;
170
171 u8 res[1000];
172
173 struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
174} __attribute__ ((packed, aligned(2048)));
175
176#define SBAL_EFLAGS_LAST_ENTRY 0x40
177#define SBAL_EFLAGS_CONTIGUOUS 0x20
178#define SBAL_EFLAGS_FIRST_FRAG 0x04
179#define SBAL_EFLAGS_MIDDLE_FRAG 0x08
180#define SBAL_EFLAGS_LAST_FRAG 0x0c
181#define SBAL_EFLAGS_MASK 0x6f
182
183#define SBAL_SFLAGS0_PCI_REQ 0x40
184#define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
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187#define SBAL_SFLAGS0_TYPE_STATUS 0x00
188#define SBAL_SFLAGS0_TYPE_WRITE 0x08
189#define SBAL_SFLAGS0_TYPE_READ 0x10
190#define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
191#define SBAL_SFLAGS0_MORE_SBALS 0x04
192#define SBAL_SFLAGS0_COMMAND 0x02
193#define SBAL_SFLAGS0_LAST_SBAL 0x00
194#define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
195#define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
196#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
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206struct qdio_buffer_element {
207 u8 eflags;
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209 u8 res1;
210
211 u8 scount;
212 u8 sflags;
213 u32 length;
214 void *addr;
215} __attribute__ ((packed, aligned(16)));
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221struct qdio_buffer {
222 struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
223} __attribute__ ((packed, aligned(256)));
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229struct sl_element {
230 unsigned long sbal;
231} __attribute__ ((packed));
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237struct sl {
238 struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
239} __attribute__ ((packed, aligned(1024)));
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245struct slsb {
246 u8 val[QDIO_MAX_BUFFERS_PER_Q];
247} __attribute__ ((packed, aligned(256)));
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258struct qdio_outbuf_state {
259 u8 flags;
260 struct qaob *aob;
261 void *user;
262};
263
264#define QDIO_OUTBUF_STATE_FLAG_NONE 0x00
265#define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01
266
267#define CHSC_AC1_INITIATE_INPUTQ 0x80
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271#define AC1_SIGA_INPUT_NEEDED 0x40
272#define AC1_SIGA_OUTPUT_NEEDED 0x20
273#define AC1_SIGA_SYNC_NEEDED 0x10
274#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08
275#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04
276#define AC1_SC_QEBSM_AVAILABLE 0x02
277#define AC1_SC_QEBSM_ENABLED 0x01
278
279#define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
280#define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
281#define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
282#define CHSC_AC2_DATA_DIV_ENABLED 0x0002
283
284#define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
285
286struct qdio_ssqd_desc {
287 u8 flags;
288 u8:8;
289 u16 sch;
290 u8 qfmt;
291 u8 parm;
292 u8 qdioac1;
293 u8 sch_class;
294 u8 pcnt;
295 u8 icnt;
296 u8:8;
297 u8 ocnt;
298 u8:8;
299 u8 mbccnt;
300 u16 qdioac2;
301 u64 sch_token;
302 u8 mro;
303 u8 mri;
304 u16 qdioac3;
305 u16:16;
306 u8:8;
307 u8 mmwc;
308} __attribute__ ((packed));
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312typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
313 int, int, unsigned long);
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316#define QDIO_ERROR_ACTIVATE 0x0001
317#define QDIO_ERROR_GET_BUF_STATE 0x0002
318#define QDIO_ERROR_SET_BUF_STATE 0x0004
319#define QDIO_ERROR_SLSB_STATE 0x0100
320
321#define QDIO_ERROR_FATAL 0x00ff
322#define QDIO_ERROR_TEMPORARY 0xff00
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325#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
326#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
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348struct qdio_initialize {
349 struct ccw_device *cdev;
350 unsigned char q_format;
351 unsigned char qdr_ac;
352 unsigned char adapter_name[8];
353 unsigned int qib_param_field_format;
354 unsigned char *qib_param_field;
355 unsigned char qib_rflags;
356 unsigned long *input_slib_elements;
357 unsigned long *output_slib_elements;
358 unsigned int no_input_qs;
359 unsigned int no_output_qs;
360 qdio_handler_t *input_handler;
361 qdio_handler_t *output_handler;
362 void (**queue_start_poll_array) (struct ccw_device *, int,
363 unsigned long);
364 int scan_threshold;
365 unsigned long int_parm;
366 void **input_sbal_addr_array;
367 void **output_sbal_addr_array;
368 struct qdio_outbuf_state *output_sbal_state_array;
369};
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377enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};
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386struct qdio_brinfo_entry_l3_ipv6 {
387 u64 nit;
388 struct { unsigned char _s6_addr[16]; } addr;
389} __packed;
390struct qdio_brinfo_entry_l3_ipv4 {
391 u64 nit;
392 struct { uint32_t _s_addr; } addr;
393} __packed;
394struct qdio_brinfo_entry_l2 {
395 u64 nit;
396 struct { u8 mac[6]; u16 lnid; } addr_lnid;
397} __packed;
398
399#define QDIO_STATE_INACTIVE 0x00000002
400#define QDIO_STATE_ESTABLISHED 0x00000004
401#define QDIO_STATE_ACTIVE 0x00000008
402#define QDIO_STATE_STOPPED 0x00000010
403
404#define QDIO_FLAG_SYNC_INPUT 0x01
405#define QDIO_FLAG_SYNC_OUTPUT 0x02
406#define QDIO_FLAG_PCI_OUT 0x10
407
408int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
409void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
410void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
411
412extern int qdio_allocate(struct qdio_initialize *);
413extern int qdio_establish(struct qdio_initialize *);
414extern int qdio_activate(struct ccw_device *);
415extern void qdio_release_aob(struct qaob *);
416extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
417 unsigned int);
418extern int qdio_start_irq(struct ccw_device *, int);
419extern int qdio_stop_irq(struct ccw_device *, int);
420extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
421extern int qdio_shutdown(struct ccw_device *, int);
422extern int qdio_free(struct ccw_device *);
423extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
424extern int qdio_pnso_brinfo(struct subchannel_id schid,
425 int cnc, u16 *response,
426 void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
427 void *entry),
428 void *priv);
429
430#endif
431