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10#include <linux/kernel_stat.h>
11#include <linux/interrupt.h>
12#include <linux/seq_file.h>
13#include <linux/proc_fs.h>
14#include <linux/profile.h>
15#include <linux/export.h>
16#include <linux/kernel.h>
17#include <linux/ftrace.h>
18#include <linux/errno.h>
19#include <linux/slab.h>
20#include <linux/init.h>
21#include <linux/cpu.h>
22#include <linux/irq.h>
23#include <asm/irq_regs.h>
24#include <asm/cputime.h>
25#include <asm/lowcore.h>
26#include <asm/irq.h>
27#include <asm/hw_irq.h>
28#include "entry.h"
29
30DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
31EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
32
33struct irq_class {
34 int irq;
35 char *name;
36 char *desc;
37};
38
39
40
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43
44
45
46
47
48
49static const struct irq_class irqclass_main_desc[NR_IRQS_BASE] = {
50 {.irq = EXT_INTERRUPT, .name = "EXT"},
51 {.irq = IO_INTERRUPT, .name = "I/O"},
52 {.irq = THIN_INTERRUPT, .name = "AIO"},
53};
54
55
56
57
58
59
60static const struct irq_class irqclass_sub_desc[] = {
61 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
62 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
63 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
64 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
65 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
66 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
67 {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
68 {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
69 {.irq = IRQEXT_SCP, .name = "SCP", .desc = "[EXT] Service Call"},
70 {.irq = IRQEXT_IUC, .name = "IUC", .desc = "[EXT] IUCV"},
71 {.irq = IRQEXT_CMS, .name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
72 {.irq = IRQEXT_CMC, .name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
73 {.irq = IRQEXT_FTP, .name = "FTP", .desc = "[EXT] HMC FTP Service"},
74 {.irq = IRQIO_CIO, .name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
75 {.irq = IRQIO_QAI, .name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
76 {.irq = IRQIO_DAS, .name = "DAS", .desc = "[I/O] DASD"},
77 {.irq = IRQIO_C15, .name = "C15", .desc = "[I/O] 3215"},
78 {.irq = IRQIO_C70, .name = "C70", .desc = "[I/O] 3270"},
79 {.irq = IRQIO_TAP, .name = "TAP", .desc = "[I/O] Tape"},
80 {.irq = IRQIO_VMR, .name = "VMR", .desc = "[I/O] Unit Record Devices"},
81 {.irq = IRQIO_LCS, .name = "LCS", .desc = "[I/O] LCS"},
82 {.irq = IRQIO_CTC, .name = "CTC", .desc = "[I/O] CTC"},
83 {.irq = IRQIO_APB, .name = "APB", .desc = "[I/O] AP Bus"},
84 {.irq = IRQIO_ADM, .name = "ADM", .desc = "[I/O] EADM Subchannel"},
85 {.irq = IRQIO_CSC, .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
86 {.irq = IRQIO_PCI, .name = "PCI", .desc = "[I/O] PCI Interrupt" },
87 {.irq = IRQIO_MSI, .name = "MSI", .desc = "[I/O] MSI Interrupt" },
88 {.irq = IRQIO_VIR, .name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
89 {.irq = IRQIO_VAI, .name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
90 {.irq = NMI_NMI, .name = "NMI", .desc = "[NMI] Machine Check"},
91 {.irq = CPU_RST, .name = "RST", .desc = "[CPU] CPU Restart"},
92};
93
94void __init init_IRQ(void)
95{
96 BUILD_BUG_ON(ARRAY_SIZE(irqclass_sub_desc) != NR_ARCH_IRQS);
97 init_cio_interrupts();
98 init_airq_interrupts();
99 init_ext_interrupts();
100}
101
102void do_IRQ(struct pt_regs *regs, int irq)
103{
104 struct pt_regs *old_regs;
105
106 old_regs = set_irq_regs(regs);
107 irq_enter();
108 if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator)
109
110 clock_comparator_work();
111 generic_handle_irq(irq);
112 irq_exit();
113 set_irq_regs(old_regs);
114}
115
116
117
118
119int show_interrupts(struct seq_file *p, void *v)
120{
121 int index = *(loff_t *) v;
122 int cpu, irq;
123
124 get_online_cpus();
125 if (index == 0) {
126 seq_puts(p, " ");
127 for_each_online_cpu(cpu)
128 seq_printf(p, "CPU%d ", cpu);
129 seq_putc(p, '\n');
130 }
131 if (index < NR_IRQS_BASE) {
132 seq_printf(p, "%s: ", irqclass_main_desc[index].name);
133 irq = irqclass_main_desc[index].irq;
134 for_each_online_cpu(cpu)
135 seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu));
136 seq_putc(p, '\n');
137 goto out;
138 }
139 if (index > NR_IRQS_BASE)
140 goto out;
141
142 for (index = 0; index < NR_ARCH_IRQS; index++) {
143 seq_printf(p, "%s: ", irqclass_sub_desc[index].name);
144 irq = irqclass_sub_desc[index].irq;
145 for_each_online_cpu(cpu)
146 seq_printf(p, "%10u ",
147 per_cpu(irq_stat, cpu).irqs[irq]);
148 if (irqclass_sub_desc[index].desc)
149 seq_printf(p, " %s", irqclass_sub_desc[index].desc);
150 seq_putc(p, '\n');
151 }
152out:
153 put_online_cpus();
154 return 0;
155}
156
157unsigned int arch_dynirq_lower_bound(unsigned int from)
158{
159 return from < NR_IRQS_BASE ? NR_IRQS_BASE : from;
160}
161
162
163
164
165void do_softirq_own_stack(void)
166{
167 unsigned long old, new;
168
169 old = current_stack_pointer();
170
171 new = S390_lowcore.async_stack;
172 if (((new - old) >> (PAGE_SHIFT + THREAD_SIZE_ORDER)) != 0) {
173
174 new -= STACK_FRAME_OVERHEAD;
175 ((struct stack_frame *) new)->back_chain = old;
176 asm volatile(" la 15,0(%0)\n"
177 " basr 14,%2\n"
178 " la 15,0(%1)\n"
179 : : "a" (new), "a" (old),
180 "a" (__do_softirq)
181 : "0", "1", "2", "3", "4", "5", "14",
182 "cc", "memory" );
183 } else {
184
185 __do_softirq();
186 }
187}
188
189
190
191
192
193static struct hlist_head ext_int_hash[32] ____cacheline_aligned;
194
195struct ext_int_info {
196 ext_int_handler_t handler;
197 struct hlist_node entry;
198 struct rcu_head rcu;
199 u16 code;
200};
201
202
203static DEFINE_SPINLOCK(ext_int_hash_lock);
204
205static inline int ext_hash(u16 code)
206{
207 BUILD_BUG_ON(!is_power_of_2(ARRAY_SIZE(ext_int_hash)));
208
209 return (code + (code >> 9)) & (ARRAY_SIZE(ext_int_hash) - 1);
210}
211
212int register_external_irq(u16 code, ext_int_handler_t handler)
213{
214 struct ext_int_info *p;
215 unsigned long flags;
216 int index;
217
218 p = kmalloc(sizeof(*p), GFP_ATOMIC);
219 if (!p)
220 return -ENOMEM;
221 p->code = code;
222 p->handler = handler;
223 index = ext_hash(code);
224
225 spin_lock_irqsave(&ext_int_hash_lock, flags);
226 hlist_add_head_rcu(&p->entry, &ext_int_hash[index]);
227 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
228 return 0;
229}
230EXPORT_SYMBOL(register_external_irq);
231
232int unregister_external_irq(u16 code, ext_int_handler_t handler)
233{
234 struct ext_int_info *p;
235 unsigned long flags;
236 int index = ext_hash(code);
237
238 spin_lock_irqsave(&ext_int_hash_lock, flags);
239 hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
240 if (p->code == code && p->handler == handler) {
241 hlist_del_rcu(&p->entry);
242 kfree_rcu(p, rcu);
243 }
244 }
245 spin_unlock_irqrestore(&ext_int_hash_lock, flags);
246 return 0;
247}
248EXPORT_SYMBOL(unregister_external_irq);
249
250static irqreturn_t do_ext_interrupt(int irq, void *dummy)
251{
252 struct pt_regs *regs = get_irq_regs();
253 struct ext_code ext_code;
254 struct ext_int_info *p;
255 int index;
256
257 ext_code = *(struct ext_code *) ®s->int_code;
258 if (ext_code.code != EXT_IRQ_CLK_COMP)
259 set_cpu_flag(CIF_NOHZ_DELAY);
260
261 index = ext_hash(ext_code.code);
262 rcu_read_lock();
263 hlist_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
264 if (unlikely(p->code != ext_code.code))
265 continue;
266 p->handler(ext_code, regs->int_parm, regs->int_parm_long);
267 }
268 rcu_read_unlock();
269 return IRQ_HANDLED;
270}
271
272static struct irqaction external_interrupt = {
273 .name = "EXT",
274 .handler = do_ext_interrupt,
275};
276
277void __init init_ext_interrupts(void)
278{
279 int idx;
280
281 for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
282 INIT_HLIST_HEAD(&ext_int_hash[idx]);
283
284 irq_set_chip_and_handler(EXT_INTERRUPT,
285 &dummy_irq_chip, handle_percpu_irq);
286 setup_irq(EXT_INTERRUPT, &external_interrupt);
287}
288
289static DEFINE_SPINLOCK(irq_subclass_lock);
290static unsigned char irq_subclass_refcount[64];
291
292void irq_subclass_register(enum irq_subclass subclass)
293{
294 spin_lock(&irq_subclass_lock);
295 if (!irq_subclass_refcount[subclass])
296 ctl_set_bit(0, subclass);
297 irq_subclass_refcount[subclass]++;
298 spin_unlock(&irq_subclass_lock);
299}
300EXPORT_SYMBOL(irq_subclass_register);
301
302void irq_subclass_unregister(enum irq_subclass subclass)
303{
304 spin_lock(&irq_subclass_lock);
305 irq_subclass_refcount[subclass]--;
306 if (!irq_subclass_refcount[subclass])
307 ctl_clear_bit(0, subclass);
308 spin_unlock(&irq_subclass_lock);
309}
310EXPORT_SYMBOL(irq_subclass_unregister);
311
