LXR linux/arch/x86/include/asm/microcode

   1#ifndef _ASM_X86_MICROCODE_INTEL_H
   2#define _ASM_X86_MICROCODE_INTEL_H
   3
   4#include <asm/microcode.h>
   5
   6struct microcode_header_intel {
   7        unsigned int            hdrver;
   8        unsigned int            rev;
   9        unsigned int            date;
  10        unsigned int            sig;
  11        unsigned int            cksum;
  12        unsigned int            ldrver;
  13        unsigned int            pf;
  14        unsigned int            datasize;
  15        unsigned int            totalsize;
  16        unsigned int            reserved[3];
  17};
  18
  19struct microcode_intel {
  20        struct microcode_header_intel hdr;
  21        unsigned int            bits[0];
  22};
  23
  24/* microcode format is extended from prescott processors */
  25struct extended_signature {
  26        unsigned int            sig;
  27        unsigned int            pf;
  28        unsigned int            cksum;
  29};
  30
  31struct extended_sigtable {
  32        unsigned int            count;
  33        unsigned int            cksum;
  34        unsigned int            reserved[3];
  35        struct extended_signature sigs[0];
  36};
  37
  38#define DEFAULT_UCODE_DATASIZE  (2000)
  39#define MC_HEADER_SIZE          (sizeof(struct microcode_header_intel))
  40#define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  41#define EXT_HEADER_SIZE         (sizeof(struct extended_sigtable))
  42#define EXT_SIGNATURE_SIZE      (sizeof(struct extended_signature))
  43
  44#define get_totalsize(mc) \
  45        (((struct microcode_intel *)mc)->hdr.datasize ? \
  46         ((struct microcode_intel *)mc)->hdr.totalsize : \
  47         DEFAULT_UCODE_TOTALSIZE)
  48
  49#define get_datasize(mc) \
  50        (((struct microcode_intel *)mc)->hdr.datasize ? \
  51         ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  52
  53#define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  54
  55static inline u32 intel_get_microcode_revision(void)
  56{
  57        u32 rev, dummy;
  58
  59        native_wrmsrl(MSR_IA32_UCODE_REV, 0);
  60
  61        /* As documented in the SDM: Do a CPUID 1 here */
  62        native_cpuid_eax(1);
  63
  64        /* get the current revision from MSR 0x8B */
  65        native_rdmsr(MSR_IA32_UCODE_REV, dummy, rev);
  66
  67        return rev;
  68}
  69
  70#ifdef CONFIG_MICROCODE_INTEL
  71extern void __init load_ucode_intel_bsp(void);
  72extern void load_ucode_intel_ap(void);
  73extern void show_ucode_info_early(void);
  74extern int __init save_microcode_in_initrd_intel(void);
  75void reload_ucode_intel(void);
  76#else
  77static inline __init void load_ucode_intel_bsp(void) {}
  78static inline void load_ucode_intel_ap(void) {}
  79static inline void show_ucode_info_early(void) {}
  80static inline int __init save_microcode_in_initrd_intel(void) { return -EINVAL; }
  81static inline void reload_ucode_intel(void) {}
  82#endif
  83
  84#endif /* _ASM_X86_MICROCODE_INTEL_H */
  85