LXR linux/drivers/ata/ahci

   1/*
   2 * DaVinci DM816 AHCI SATA platform driver
   3 *
   4 * Copyright (C) 2017 BayLibre SAS
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2, or (at your option)
   9 * any later version.
  10 */
  11
  12#include <linux/kernel.h>
  13#include <linux/module.h>
  14#include <linux/device.h>
  15#include <linux/pm.h>
  16#include <linux/platform_device.h>
  17#include <linux/libata.h>
  18#include <linux/ahci_platform.h>
  19
  20#include "ahci.h"
  21
  22#define AHCI_DM816_DRV_NAME             "ahci-dm816"
  23
  24#define AHCI_DM816_PHY_ENPLL(x)         ((x) << 0)
  25#define AHCI_DM816_PHY_MPY(x)           ((x) << 1)
  26#define AHCI_DM816_PHY_LOS(x)           ((x) << 12)
  27#define AHCI_DM816_PHY_RXCDR(x)         ((x) << 13)
  28#define AHCI_DM816_PHY_RXEQ(x)          ((x) << 16)
  29#define AHCI_DM816_PHY_TXSWING(x)       ((x) << 23)
  30
  31#define AHCI_DM816_P0PHYCR_REG          0x178
  32#define AHCI_DM816_P1PHYCR_REG          0x1f8
  33
  34#define AHCI_DM816_PLL_OUT              1500000000LU
  35
  36static const unsigned long pll_mpy_table[] = {
  37          400,  500,  600,  800,  825, 1000, 1200,
  38         1250, 1500, 1600, 1650, 2000, 2200, 2500
  39};
  40
  41static int ahci_dm816_get_mpy_bits(unsigned long refclk_rate)
  42{
  43        unsigned long pll_multiplier;
  44        int i;
  45
  46        /*
  47         * We need to determine the value of the multiplier (MPY) bits.
  48         * In order to include the 8.25 multiplier we need to first divide
  49         * the refclk rate by 100.
  50         */
  51        pll_multiplier = AHCI_DM816_PLL_OUT / (refclk_rate / 100);
  52
  53        for (i = 0; i < ARRAY_SIZE(pll_mpy_table); i++) {
  54                if (pll_mpy_table[i] == pll_multiplier)
  55                        return i;
  56        }
  57
  58        /*
  59         * We should have divided evenly - if not, return an invalid
  60         * value.
  61         */
  62        return -1;
  63}
  64
  65static int ahci_dm816_phy_init(struct ahci_host_priv *hpriv, struct device *dev)
  66{
  67        unsigned long refclk_rate;
  68        int mpy;
  69        u32 val;
  70
  71        /*
  72         * We should have been supplied two clocks: the functional and
  73         * keep-alive clock and the external reference clock. We need the
  74         * rate of the latter to calculate the correct value of MPY bits.
  75         */
  76        if (!hpriv->clks[1]) {
  77                dev_err(dev, "reference clock not supplied\n");
  78                return -EINVAL;
  79        }
  80
  81        refclk_rate = clk_get_rate(hpriv->clks[1]);
  82        if ((refclk_rate % 100) != 0) {
  83                dev_err(dev, "reference clock rate must be divisible by 100\n");
  84                return -EINVAL;
  85        }
  86
  87        mpy = ahci_dm816_get_mpy_bits(refclk_rate);
  88        if (mpy < 0) {
  89                dev_err(dev, "can't calculate the MPY bits value\n");
  90                return -EINVAL;
  91        }
  92
  93        /* Enable the PHY and configure the first HBA port. */
  94        val = AHCI_DM816_PHY_MPY(mpy) | AHCI_DM816_PHY_LOS(1) |
  95              AHCI_DM816_PHY_RXCDR(4) | AHCI_DM816_PHY_RXEQ(1) |
  96              AHCI_DM816_PHY_TXSWING(3) | AHCI_DM816_PHY_ENPLL(1);
  97        writel(val, hpriv->mmio + AHCI_DM816_P0PHYCR_REG);
  98
  99        /* Configure the second HBA port. */
 100        val = AHCI_DM816_PHY_LOS(1) | AHCI_DM816_PHY_RXCDR(4) |
 101              AHCI_DM816_PHY_RXEQ(1) | AHCI_DM816_PHY_TXSWING(3);
 102        writel(val, hpriv->mmio + AHCI_DM816_P1PHYCR_REG);
 103
 104        return 0;
 105}
 106
 107static int ahci_dm816_softreset(struct ata_link *link,
 108                                unsigned int *class, unsigned long deadline)
 109{
 110        int pmp, ret;
 111
 112        pmp = sata_srst_pmp(link);
 113
 114        /*
 115         * There's an issue with the SATA controller on DM816 SoC: if we
 116         * enable Port Multiplier support, but the drive is connected directly
 117         * to the board, it can't be detected. As a workaround: if PMP is
 118         * enabled, we first call ahci_do_softreset() and pass it the result of
 119         * sata_srst_pmp(). If this call fails, we retry with pmp = 0.
 120         */
 121        ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready);
 122        if (pmp && ret == -EBUSY)
 123                return ahci_do_softreset(link, class, 0,
 124                                         deadline, ahci_check_ready);
 125
 126        return ret;
 127}
 128
 129static struct ata_port_operations ahci_dm816_port_ops = {
 130        .inherits = &ahci_platform_ops,
 131        .softreset = ahci_dm816_softreset,
 132};
 133
 134static const struct ata_port_info ahci_dm816_port_info = {
 135        .flags          = AHCI_FLAG_COMMON,
 136        .pio_mask       = ATA_PIO4,
 137        .udma_mask      = ATA_UDMA6,
 138        .port_ops       = &ahci_dm816_port_ops,
 139};
 140
 141static struct scsi_host_template ahci_dm816_platform_sht = {
 142        AHCI_SHT(AHCI_DM816_DRV_NAME),
 143};
 144
 145static int ahci_dm816_probe(struct platform_device *pdev)
 146{
 147        struct device *dev = &pdev->dev;
 148        struct ahci_host_priv *hpriv;
 149        int rc;
 150
 151        hpriv = ahci_platform_get_resources(pdev);
 152        if (IS_ERR(hpriv))
 153                return PTR_ERR(hpriv);
 154
 155        rc = ahci_platform_enable_resources(hpriv);
 156        if (rc)
 157                return rc;
 158
 159        rc = ahci_dm816_phy_init(hpriv, dev);
 160        if (rc)
 161                goto disable_resources;
 162
 163        rc = ahci_platform_init_host(pdev, hpriv,
 164                                     &ahci_dm816_port_info,
 165                                     &ahci_dm816_platform_sht);
 166        if (rc)
 167                goto disable_resources;
 168
 169        return 0;
 170
 171disable_resources:
 172        ahci_platform_disable_resources(hpriv);
 173
 174        return rc;
 175}
 176
 177static SIMPLE_DEV_PM_OPS(ahci_dm816_pm_ops,
 178                         ahci_platform_suspend,
 179                         ahci_platform_resume);
 180
 181static const struct of_device_id ahci_dm816_of_match[] = {
 182        { .compatible = "ti,dm816-ahci", },
 183        { },
 184};
 185MODULE_DEVICE_TABLE(of, ahci_dm816_of_match);
 186
 187static struct platform_driver ahci_dm816_driver = {
 188        .probe = ahci_dm816_probe,
 189        .remove = ata_platform_remove_one,
 190        .driver = {
 191                .name = AHCI_DM816_DRV_NAME,
 192                .of_match_table = ahci_dm816_of_match,
 193                .pm = &ahci_dm816_pm_ops,
 194        },
 195};
 196module_platform_driver(ahci_dm816_driver);
 197
 198MODULE_DESCRIPTION("DaVinci DM816 AHCI SATA platform driver");
 199MODULE_AUTHOR("Bartosz Golaszewski <bgolaszewski@baylibre.com>");
 200MODULE_LICENSE("GPL");
 201