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7#include <linux/clk.h>
8#include <linux/component.h>
9#include <linux/debugfs.h>
10#include <linux/hdmi.h>
11#include <linux/module.h>
12#include <linux/of_gpio.h>
13#include <linux/platform_device.h>
14#include <linux/reset.h>
15
16#include <drm/drmP.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_crtc_helper.h>
19#include <drm/drm_edid.h>
20
21#include <sound/hdmi-codec.h>
22
23#include "sti_hdmi.h"
24#include "sti_hdmi_tx3g4c28phy.h"
25#include "sti_vtg.h"
26
27#define HDMI_CFG 0x0000
28#define HDMI_INT_EN 0x0004
29#define HDMI_INT_STA 0x0008
30#define HDMI_INT_CLR 0x000C
31#define HDMI_STA 0x0010
32#define HDMI_ACTIVE_VID_XMIN 0x0100
33#define HDMI_ACTIVE_VID_XMAX 0x0104
34#define HDMI_ACTIVE_VID_YMIN 0x0108
35#define HDMI_ACTIVE_VID_YMAX 0x010C
36#define HDMI_DFLT_CHL0_DAT 0x0110
37#define HDMI_DFLT_CHL1_DAT 0x0114
38#define HDMI_DFLT_CHL2_DAT 0x0118
39#define HDMI_AUDIO_CFG 0x0200
40#define HDMI_SPDIF_FIFO_STATUS 0x0204
41#define HDMI_SW_DI_1_HEAD_WORD 0x0210
42#define HDMI_SW_DI_1_PKT_WORD0 0x0214
43#define HDMI_SW_DI_1_PKT_WORD1 0x0218
44#define HDMI_SW_DI_1_PKT_WORD2 0x021C
45#define HDMI_SW_DI_1_PKT_WORD3 0x0220
46#define HDMI_SW_DI_1_PKT_WORD4 0x0224
47#define HDMI_SW_DI_1_PKT_WORD5 0x0228
48#define HDMI_SW_DI_1_PKT_WORD6 0x022C
49#define HDMI_SW_DI_CFG 0x0230
50#define HDMI_SAMPLE_FLAT_MASK 0x0244
51#define HDMI_AUDN 0x0400
52#define HDMI_AUD_CTS 0x0404
53#define HDMI_SW_DI_2_HEAD_WORD 0x0600
54#define HDMI_SW_DI_2_PKT_WORD0 0x0604
55#define HDMI_SW_DI_2_PKT_WORD1 0x0608
56#define HDMI_SW_DI_2_PKT_WORD2 0x060C
57#define HDMI_SW_DI_2_PKT_WORD3 0x0610
58#define HDMI_SW_DI_2_PKT_WORD4 0x0614
59#define HDMI_SW_DI_2_PKT_WORD5 0x0618
60#define HDMI_SW_DI_2_PKT_WORD6 0x061C
61#define HDMI_SW_DI_3_HEAD_WORD 0x0620
62#define HDMI_SW_DI_3_PKT_WORD0 0x0624
63#define HDMI_SW_DI_3_PKT_WORD1 0x0628
64#define HDMI_SW_DI_3_PKT_WORD2 0x062C
65#define HDMI_SW_DI_3_PKT_WORD3 0x0630
66#define HDMI_SW_DI_3_PKT_WORD4 0x0634
67#define HDMI_SW_DI_3_PKT_WORD5 0x0638
68#define HDMI_SW_DI_3_PKT_WORD6 0x063C
69
70#define HDMI_IFRAME_SLOT_AVI 1
71#define HDMI_IFRAME_SLOT_AUDIO 2
72#define HDMI_IFRAME_SLOT_VENDOR 3
73
74#define XCAT(prefix, x, suffix) prefix ## x ## suffix
75#define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD)
76#define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0)
77#define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1)
78#define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2)
79#define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3)
80#define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4)
81#define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5)
82#define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6)
83
84#define HDMI_SW_DI_MAX_WORD 7
85
86#define HDMI_IFRAME_DISABLED 0x0
87#define HDMI_IFRAME_SINGLE_SHOT 0x1
88#define HDMI_IFRAME_FIELD 0x2
89#define HDMI_IFRAME_FRAME 0x3
90#define HDMI_IFRAME_MASK 0x3
91#define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4))
92
93#define HDMI_CFG_DEVICE_EN BIT(0)
94#define HDMI_CFG_HDMI_NOT_DVI BIT(1)
95#define HDMI_CFG_HDCP_EN BIT(2)
96#define HDMI_CFG_ESS_NOT_OESS BIT(3)
97#define HDMI_CFG_H_SYNC_POL_NEG BIT(4)
98#define HDMI_CFG_V_SYNC_POL_NEG BIT(6)
99#define HDMI_CFG_422_EN BIT(8)
100#define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12)
101#define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13)
102#define HDMI_CFG_SW_RST_EN BIT(31)
103
104#define HDMI_INT_GLOBAL BIT(0)
105#define HDMI_INT_SW_RST BIT(1)
106#define HDMI_INT_PIX_CAP BIT(3)
107#define HDMI_INT_HOT_PLUG BIT(4)
108#define HDMI_INT_DLL_LCK BIT(5)
109#define HDMI_INT_NEW_FRAME BIT(6)
110#define HDMI_INT_GENCTRL_PKT BIT(7)
111#define HDMI_INT_AUDIO_FIFO_XRUN BIT(8)
112#define HDMI_INT_SINK_TERM_PRESENT BIT(11)
113
114#define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \
115 | HDMI_INT_DLL_LCK \
116 | HDMI_INT_HOT_PLUG \
117 | HDMI_INT_GLOBAL)
118
119#define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \
120 | HDMI_INT_AUDIO_FIFO_XRUN \
121 | HDMI_INT_GENCTRL_PKT \
122 | HDMI_INT_NEW_FRAME \
123 | HDMI_INT_DLL_LCK \
124 | HDMI_INT_HOT_PLUG \
125 | HDMI_INT_PIX_CAP \
126 | HDMI_INT_SW_RST \
127 | HDMI_INT_GLOBAL)
128
129#define HDMI_STA_SW_RST BIT(1)
130
131#define HDMI_AUD_CFG_8CH BIT(0)
132#define HDMI_AUD_CFG_SPDIF_DIV_2 BIT(1)
133#define HDMI_AUD_CFG_SPDIF_DIV_3 BIT(2)
134#define HDMI_AUD_CFG_SPDIF_CLK_DIV_4 (BIT(1) | BIT(2))
135#define HDMI_AUD_CFG_CTS_CLK_256FS BIT(12)
136#define HDMI_AUD_CFG_DTS_INVALID BIT(16)
137#define HDMI_AUD_CFG_ONE_BIT_INVALID (BIT(18) | BIT(19) | BIT(20) | BIT(21))
138#define HDMI_AUD_CFG_CH12_VALID BIT(28)
139#define HDMI_AUD_CFG_CH34_VALID BIT(29)
140#define HDMI_AUD_CFG_CH56_VALID BIT(30)
141#define HDMI_AUD_CFG_CH78_VALID BIT(31)
142
143
144#define HDMI_SAMPLE_FLAT_NO 0
145#define HDMI_SAMPLE_FLAT_SP0 BIT(0)
146#define HDMI_SAMPLE_FLAT_SP1 BIT(1)
147#define HDMI_SAMPLE_FLAT_SP2 BIT(2)
148#define HDMI_SAMPLE_FLAT_SP3 BIT(3)
149#define HDMI_SAMPLE_FLAT_ALL (HDMI_SAMPLE_FLAT_SP0 | HDMI_SAMPLE_FLAT_SP1 |\
150 HDMI_SAMPLE_FLAT_SP2 | HDMI_SAMPLE_FLAT_SP3)
151
152#define HDMI_INFOFRAME_HEADER_TYPE(x) (((x) & 0xff) << 0)
153#define HDMI_INFOFRAME_HEADER_VERSION(x) (((x) & 0xff) << 8)
154#define HDMI_INFOFRAME_HEADER_LEN(x) (((x) & 0x0f) << 16)
155
156struct sti_hdmi_connector {
157 struct drm_connector drm_connector;
158 struct drm_encoder *encoder;
159 struct sti_hdmi *hdmi;
160 struct drm_property *colorspace_property;
161};
162
163#define to_sti_hdmi_connector(x) \
164 container_of(x, struct sti_hdmi_connector, drm_connector)
165
166u32 hdmi_read(struct sti_hdmi *hdmi, int offset)
167{
168 return readl(hdmi->regs + offset);
169}
170
171void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset)
172{
173 writel(val, hdmi->regs + offset);
174}
175
176
177
178
179
180
181
182static irqreturn_t hdmi_irq_thread(int irq, void *arg)
183{
184 struct sti_hdmi *hdmi = arg;
185
186
187 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) {
188 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
189 if (hdmi->drm_dev)
190 drm_helper_hpd_irq_event(hdmi->drm_dev);
191 }
192
193
194
195
196 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) {
197 hdmi->event_received = true;
198 wake_up_interruptible(&hdmi->wait_event);
199 }
200
201
202 if (hdmi->irq_status & HDMI_INT_AUDIO_FIFO_XRUN)
203 DRM_INFO("Warning: audio FIFO underrun occurs!\n");
204
205 return IRQ_HANDLED;
206}
207
208
209
210
211
212
213
214static irqreturn_t hdmi_irq(int irq, void *arg)
215{
216 struct sti_hdmi *hdmi = arg;
217
218
219 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA);
220
221
222 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR);
223
224
225 hdmi_read(hdmi, HDMI_INT_STA);
226
227 return IRQ_WAKE_THREAD;
228}
229
230
231
232
233
234
235static void hdmi_active_area(struct sti_hdmi *hdmi)
236{
237 u32 xmin, xmax;
238 u32 ymin, ymax;
239
240 xmin = sti_vtg_get_pixel_number(hdmi->mode, 1);
241 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay);
242 ymin = sti_vtg_get_line_number(hdmi->mode, 0);
243 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1);
244
245 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN);
246 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX);
247 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN);
248 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX);
249}
250
251
252
253
254
255
256static void hdmi_config(struct sti_hdmi *hdmi)
257{
258 u32 conf;
259
260 DRM_DEBUG_DRIVER("\n");
261
262
263 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR;
264
265
266 conf |= HDMI_CFG_ESS_NOT_OESS;
267 if (hdmi->hdmi_monitor)
268 conf |= HDMI_CFG_HDMI_NOT_DVI;
269
270
271 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) {
272 DRM_DEBUG_DRIVER("H Sync Negative\n");
273 conf |= HDMI_CFG_H_SYNC_POL_NEG;
274 }
275
276
277 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) {
278 DRM_DEBUG_DRIVER("V Sync Negative\n");
279 conf |= HDMI_CFG_V_SYNC_POL_NEG;
280 }
281
282
283 conf |= HDMI_CFG_DEVICE_EN;
284
285 hdmi_write(hdmi, conf, HDMI_CFG);
286}
287
288
289
290
291
292
293
294static void hdmi_infoframe_reset(struct sti_hdmi *hdmi,
295 u32 slot)
296{
297 u32 val, i;
298 u32 head_offset, pack_offset;
299
300 switch (slot) {
301 case HDMI_IFRAME_SLOT_AVI:
302 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
303 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
304 break;
305 case HDMI_IFRAME_SLOT_AUDIO:
306 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
307 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
308 break;
309 case HDMI_IFRAME_SLOT_VENDOR:
310 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
311 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
312 break;
313 default:
314 DRM_ERROR("unsupported infoframe slot: %#x\n", slot);
315 return;
316 }
317
318
319 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
320 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
321 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
322
323
324 hdmi_write(hdmi, 0x0, head_offset);
325 for (i = 0; i < HDMI_SW_DI_MAX_WORD; i += sizeof(u32))
326 hdmi_write(hdmi, 0x0, pack_offset + i);
327}
328
329
330
331
332
333
334
335
336static inline unsigned int hdmi_infoframe_subpack(const u8 *ptr, size_t size)
337{
338 unsigned long value = 0;
339 size_t i;
340
341 for (i = size; i > 0; i--)
342 value = (value << 8) | ptr[i - 1];
343
344 return value;
345}
346
347
348
349
350
351
352
353
354static void hdmi_infoframe_write_infopack(struct sti_hdmi *hdmi,
355 const u8 *data,
356 size_t size)
357{
358 const u8 *ptr = data;
359 u32 val, slot, mode, i;
360 u32 head_offset, pack_offset;
361
362 switch (*ptr) {
363 case HDMI_INFOFRAME_TYPE_AVI:
364 slot = HDMI_IFRAME_SLOT_AVI;
365 mode = HDMI_IFRAME_FIELD;
366 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI);
367 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI);
368 break;
369 case HDMI_INFOFRAME_TYPE_AUDIO:
370 slot = HDMI_IFRAME_SLOT_AUDIO;
371 mode = HDMI_IFRAME_FRAME;
372 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AUDIO);
373 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AUDIO);
374 break;
375 case HDMI_INFOFRAME_TYPE_VENDOR:
376 slot = HDMI_IFRAME_SLOT_VENDOR;
377 mode = HDMI_IFRAME_FRAME;
378 head_offset = HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_VENDOR);
379 pack_offset = HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_VENDOR);
380 break;
381 default:
382 DRM_ERROR("unsupported infoframe type: %#x\n", *ptr);
383 return;
384 }
385
386
387 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
388 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, slot);
389 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
390
391 val = HDMI_INFOFRAME_HEADER_TYPE(*ptr++);
392 val |= HDMI_INFOFRAME_HEADER_VERSION(*ptr++);
393 val |= HDMI_INFOFRAME_HEADER_LEN(*ptr++);
394 writel(val, hdmi->regs + head_offset);
395
396
397
398
399
400
401 size = size - HDMI_INFOFRAME_HEADER_SIZE + 1;
402 for (i = 0; i < size; i += sizeof(u32)) {
403 size_t num;
404
405 num = min_t(size_t, size - i, sizeof(u32));
406 val = hdmi_infoframe_subpack(ptr, num);
407 ptr += sizeof(u32);
408 writel(val, hdmi->regs + pack_offset + i);
409 }
410
411
412 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
413 val |= HDMI_IFRAME_CFG_DI_N(mode, slot);
414 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
415}
416
417
418
419
420
421
422
423
424
425
426
427
428static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi)
429{
430 struct drm_display_mode *mode = &hdmi->mode;
431 struct hdmi_avi_infoframe infoframe;
432 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)];
433 int ret;
434
435 DRM_DEBUG_DRIVER("\n");
436
437 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode);
438 if (ret < 0) {
439 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret);
440 return ret;
441 }
442
443
444 infoframe.colorspace = hdmi->colorspace;
445 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
446 infoframe.colorimetry = HDMI_COLORIMETRY_NONE;
447
448 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer));
449 if (ret < 0) {
450 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
451 return ret;
452 }
453
454 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
455
456 return 0;
457}
458
459
460
461
462
463
464
465
466
467
468
469
470static int hdmi_audio_infoframe_config(struct sti_hdmi *hdmi)
471{
472 struct hdmi_audio_params *audio = &hdmi->audio;
473 u8 buffer[HDMI_INFOFRAME_SIZE(AUDIO)];
474 int ret, val;
475
476 DRM_DEBUG_DRIVER("enter %s, AIF %s\n", __func__,
477 audio->enabled ? "enable" : "disable");
478 if (audio->enabled) {
479
480 ret = hdmi_audio_infoframe_pack(&audio->cea, buffer,
481 sizeof(buffer));
482 if (ret < 0) {
483 DRM_ERROR("failed to pack audio infoframe: %d\n", ret);
484 return ret;
485 }
486 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
487 } else {
488
489 val = hdmi_read(hdmi, HDMI_SW_DI_CFG);
490 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK,
491 HDMI_IFRAME_SLOT_AUDIO);
492 hdmi_write(hdmi, val, HDMI_SW_DI_CFG);
493 }
494
495 return 0;
496}
497
498
499
500
501
502
503
504
505
506
507
508#define HDMI_VENDOR_INFOFRAME_MAX_SIZE 6
509static int hdmi_vendor_infoframe_config(struct sti_hdmi *hdmi)
510{
511 struct drm_display_mode *mode = &hdmi->mode;
512 struct hdmi_vendor_infoframe infoframe;
513 u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_VENDOR_INFOFRAME_MAX_SIZE];
514 int ret;
515
516 DRM_DEBUG_DRIVER("\n");
517
518 ret = drm_hdmi_vendor_infoframe_from_display_mode(&infoframe, mode);
519 if (ret < 0) {
520
521
522
523
524
525
526 return 0;
527 }
528
529 ret = hdmi_vendor_infoframe_pack(&infoframe, buffer, sizeof(buffer));
530 if (ret < 0) {
531 DRM_ERROR("failed to pack VS infoframe: %d\n", ret);
532 return ret;
533 }
534
535 hdmi_infoframe_write_infopack(hdmi, buffer, ret);
536
537 return 0;
538}
539
540
541
542
543
544
545
546#define HDMI_TIMEOUT_SWRESET 100
547static void hdmi_swreset(struct sti_hdmi *hdmi)
548{
549 u32 val;
550
551 DRM_DEBUG_DRIVER("\n");
552
553
554 if (clk_prepare_enable(hdmi->clk_audio))
555 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n");
556
557
558 hdmi->event_received = false;
559
560 val = hdmi_read(hdmi, HDMI_CFG);
561 val |= HDMI_CFG_SW_RST_EN;
562 hdmi_write(hdmi, val, HDMI_CFG);
563
564
565 wait_event_interruptible_timeout(hdmi->wait_event,
566 hdmi->event_received,
567 msecs_to_jiffies
568 (HDMI_TIMEOUT_SWRESET));
569
570
571
572
573
574 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0)
575 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n");
576
577 val = hdmi_read(hdmi, HDMI_CFG);
578 val &= ~HDMI_CFG_SW_RST_EN;
579 hdmi_write(hdmi, val, HDMI_CFG);
580
581
582 clk_disable_unprepare(hdmi->clk_audio);
583}
584
585#define DBGFS_PRINT_STR(str1, str2) seq_printf(s, "%-24s %s\n", str1, str2)
586#define DBGFS_PRINT_INT(str1, int2) seq_printf(s, "%-24s %d\n", str1, int2)
587#define DBGFS_DUMP(str, reg) seq_printf(s, "%s %-25s 0x%08X", str, #reg, \
588 hdmi_read(hdmi, reg))
589#define DBGFS_DUMP_DI(reg, slot) DBGFS_DUMP("\n", reg(slot))
590
591static void hdmi_dbg_cfg(struct seq_file *s, int val)
592{
593 int tmp;
594
595 seq_puts(s, "\t");
596 tmp = val & HDMI_CFG_HDMI_NOT_DVI;
597 DBGFS_PRINT_STR("mode:", tmp ? "HDMI" : "DVI");
598 seq_puts(s, "\t\t\t\t\t");
599 tmp = val & HDMI_CFG_HDCP_EN;
600 DBGFS_PRINT_STR("HDCP:", tmp ? "enable" : "disable");
601 seq_puts(s, "\t\t\t\t\t");
602 tmp = val & HDMI_CFG_ESS_NOT_OESS;
603 DBGFS_PRINT_STR("HDCP mode:", tmp ? "ESS enable" : "OESS enable");
604 seq_puts(s, "\t\t\t\t\t");
605 tmp = val & HDMI_CFG_H_SYNC_POL_NEG;
606 DBGFS_PRINT_STR("Hsync polarity:", tmp ? "inverted" : "normal");
607 seq_puts(s, "\t\t\t\t\t");
608 tmp = val & HDMI_CFG_V_SYNC_POL_NEG;
609 DBGFS_PRINT_STR("Vsync polarity:", tmp ? "inverted" : "normal");
610 seq_puts(s, "\t\t\t\t\t");
611 tmp = val & HDMI_CFG_422_EN;
612 DBGFS_PRINT_STR("YUV422 format:", tmp ? "enable" : "disable");
613}
614
615static void hdmi_dbg_sta(struct seq_file *s, int val)
616{
617 int tmp;
618
619 seq_puts(s, "\t");
620 tmp = (val & HDMI_STA_DLL_LCK);
621 DBGFS_PRINT_STR("pll:", tmp ? "locked" : "not locked");
622 seq_puts(s, "\t\t\t\t\t");
623 tmp = (val & HDMI_STA_HOT_PLUG);
624 DBGFS_PRINT_STR("hdmi cable:", tmp ? "connected" : "not connected");
625}
626
627static void hdmi_dbg_sw_di_cfg(struct seq_file *s, int val)
628{
629 int tmp;
630 char *const en_di[] = {"no transmission",
631 "single transmission",
632 "once every field",
633 "once every frame"};
634
635 seq_puts(s, "\t");
636 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 1));
637 DBGFS_PRINT_STR("Data island 1:", en_di[tmp]);
638 seq_puts(s, "\t\t\t\t\t");
639 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 2)) >> 4;
640 DBGFS_PRINT_STR("Data island 2:", en_di[tmp]);
641 seq_puts(s, "\t\t\t\t\t");
642 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 3)) >> 8;
643 DBGFS_PRINT_STR("Data island 3:", en_di[tmp]);
644 seq_puts(s, "\t\t\t\t\t");
645 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 4)) >> 12;
646 DBGFS_PRINT_STR("Data island 4:", en_di[tmp]);
647 seq_puts(s, "\t\t\t\t\t");
648 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 5)) >> 16;
649 DBGFS_PRINT_STR("Data island 5:", en_di[tmp]);
650 seq_puts(s, "\t\t\t\t\t");
651 tmp = (val & HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, 6)) >> 20;
652 DBGFS_PRINT_STR("Data island 6:", en_di[tmp]);
653}
654
655static int hdmi_dbg_show(struct seq_file *s, void *data)
656{
657 struct drm_info_node *node = s->private;
658 struct sti_hdmi *hdmi = (struct sti_hdmi *)node->info_ent->data;
659
660 seq_printf(s, "HDMI: (vaddr = 0x%p)", hdmi->regs);
661 DBGFS_DUMP("\n", HDMI_CFG);
662 hdmi_dbg_cfg(s, hdmi_read(hdmi, HDMI_CFG));
663 DBGFS_DUMP("", HDMI_INT_EN);
664 DBGFS_DUMP("\n", HDMI_STA);
665 hdmi_dbg_sta(s, hdmi_read(hdmi, HDMI_STA));
666 DBGFS_DUMP("", HDMI_ACTIVE_VID_XMIN);
667 seq_puts(s, "\t");
668 DBGFS_PRINT_INT("Xmin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMIN));
669 DBGFS_DUMP("", HDMI_ACTIVE_VID_XMAX);
670 seq_puts(s, "\t");
671 DBGFS_PRINT_INT("Xmax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_XMAX));
672 DBGFS_DUMP("", HDMI_ACTIVE_VID_YMIN);
673 seq_puts(s, "\t");
674 DBGFS_PRINT_INT("Ymin:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMIN));
675 DBGFS_DUMP("", HDMI_ACTIVE_VID_YMAX);
676 seq_puts(s, "\t");
677 DBGFS_PRINT_INT("Ymax:", hdmi_read(hdmi, HDMI_ACTIVE_VID_YMAX));
678 DBGFS_DUMP("", HDMI_SW_DI_CFG);
679 hdmi_dbg_sw_di_cfg(s, hdmi_read(hdmi, HDMI_SW_DI_CFG));
680
681 DBGFS_DUMP("\n", HDMI_AUDIO_CFG);
682 DBGFS_DUMP("\n", HDMI_SPDIF_FIFO_STATUS);
683 DBGFS_DUMP("\n", HDMI_AUDN);
684
685 seq_printf(s, "\n AVI Infoframe (Data Island slot N=%d):",
686 HDMI_IFRAME_SLOT_AVI);
687 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AVI);
688 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AVI);
689 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AVI);
690 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AVI);
691 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AVI);
692 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AVI);
693 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AVI);
694 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AVI);
695 seq_puts(s, "\n");
696 seq_printf(s, "\n AUDIO Infoframe (Data Island slot N=%d):",
697 HDMI_IFRAME_SLOT_AUDIO);
698 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_AUDIO);
699 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_AUDIO);
700 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_AUDIO);
701 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_AUDIO);
702 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_AUDIO);
703 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_AUDIO);
704 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_AUDIO);
705 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_AUDIO);
706 seq_puts(s, "\n");
707 seq_printf(s, "\n VENDOR SPECIFIC Infoframe (Data Island slot N=%d):",
708 HDMI_IFRAME_SLOT_VENDOR);
709 DBGFS_DUMP_DI(HDMI_SW_DI_N_HEAD_WORD, HDMI_IFRAME_SLOT_VENDOR);
710 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD0, HDMI_IFRAME_SLOT_VENDOR);
711 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD1, HDMI_IFRAME_SLOT_VENDOR);
712 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD2, HDMI_IFRAME_SLOT_VENDOR);
713 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD3, HDMI_IFRAME_SLOT_VENDOR);
714 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD4, HDMI_IFRAME_SLOT_VENDOR);
715 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD5, HDMI_IFRAME_SLOT_VENDOR);
716 DBGFS_DUMP_DI(HDMI_SW_DI_N_PKT_WORD6, HDMI_IFRAME_SLOT_VENDOR);
717 seq_puts(s, "\n");
718
719 return 0;
720}
721
722static struct drm_info_list hdmi_debugfs_files[] = {
723 { "hdmi", hdmi_dbg_show, 0, NULL },
724};
725
726static int hdmi_debugfs_init(struct sti_hdmi *hdmi, struct drm_minor *minor)
727{
728 unsigned int i;
729
730 for (i = 0; i < ARRAY_SIZE(hdmi_debugfs_files); i++)
731 hdmi_debugfs_files[i].data = hdmi;
732
733 return drm_debugfs_create_files(hdmi_debugfs_files,
734 ARRAY_SIZE(hdmi_debugfs_files),
735 minor->debugfs_root, minor);
736}
737
738static void sti_hdmi_disable(struct drm_bridge *bridge)
739{
740 struct sti_hdmi *hdmi = bridge->driver_private;
741
742 u32 val = hdmi_read(hdmi, HDMI_CFG);
743
744 if (!hdmi->enabled)
745 return;
746
747 DRM_DEBUG_DRIVER("\n");
748
749
750 val &= ~HDMI_CFG_DEVICE_EN;
751 hdmi_write(hdmi, val, HDMI_CFG);
752
753 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR);
754
755
756 hdmi->phy_ops->stop(hdmi);
757
758
759 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AVI);
760 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_AUDIO);
761 hdmi_infoframe_reset(hdmi, HDMI_IFRAME_SLOT_VENDOR);
762
763
764 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT);
765 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT);
766 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT);
767
768
769 clk_disable_unprepare(hdmi->clk_phy);
770 clk_disable_unprepare(hdmi->clk_tmds);
771 clk_disable_unprepare(hdmi->clk_pix);
772
773 hdmi->enabled = false;
774
775 cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
776}
777
778
779
780
781
782
783
784
785
786
787
788
789
790static int sti_hdmi_audio_get_non_coherent_n(unsigned int audio_fs)
791{
792 unsigned int n;
793
794 switch (audio_fs) {
795 case 32000:
796 n = 4096;
797 break;
798 case 44100:
799 n = 6272;
800 break;
801 case 48000:
802 n = 6144;
803 break;
804 case 88200:
805 n = 6272 * 2;
806 break;
807 case 96000:
808 n = 6144 * 2;
809 break;
810 case 176400:
811 n = 6272 * 4;
812 break;
813 case 192000:
814 n = 6144 * 4;
815 break;
816 default:
817
818 n = (audio_fs * 128) / 1000;
819 }
820
821 return n;
822}
823
824static int hdmi_audio_configure(struct sti_hdmi *hdmi)
825{
826 int audio_cfg, n;
827 struct hdmi_audio_params *params = &hdmi->audio;
828 struct hdmi_audio_infoframe *info = ¶ms->cea;
829
830 DRM_DEBUG_DRIVER("\n");
831
832 if (!hdmi->enabled)
833 return 0;
834
835
836 n = sti_hdmi_audio_get_non_coherent_n(params->sample_rate);
837
838 DRM_DEBUG_DRIVER("Audio rate = %d Hz, TMDS clock = %d Hz, n = %d\n",
839 params->sample_rate, hdmi->mode.clock * 1000, n);
840 hdmi_write(hdmi, n, HDMI_AUDN);
841
842
843 audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID |
844 HDMI_AUD_CFG_ONE_BIT_INVALID;
845
846 switch (info->channels) {
847 case 8:
848 audio_cfg |= HDMI_AUD_CFG_CH78_VALID;
849 case 6:
850 audio_cfg |= HDMI_AUD_CFG_CH56_VALID;
851 case 4:
852 audio_cfg |= HDMI_AUD_CFG_CH34_VALID | HDMI_AUD_CFG_8CH;
853 case 2:
854 audio_cfg |= HDMI_AUD_CFG_CH12_VALID;
855 break;
856 default:
857 DRM_ERROR("ERROR: Unsupported number of channels (%d)!\n",
858 info->channels);
859 return -EINVAL;
860 }
861
862 hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
863
864 return hdmi_audio_infoframe_config(hdmi);
865}
866
867static void sti_hdmi_pre_enable(struct drm_bridge *bridge)
868{
869 struct sti_hdmi *hdmi = bridge->driver_private;
870
871 DRM_DEBUG_DRIVER("\n");
872
873 if (hdmi->enabled)
874 return;
875
876
877 if (clk_prepare_enable(hdmi->clk_pix))
878 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n");
879 if (clk_prepare_enable(hdmi->clk_tmds))
880 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n");
881 if (clk_prepare_enable(hdmi->clk_phy))
882 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n");
883
884 hdmi->enabled = true;
885
886
887 if (!hdmi->phy_ops->start(hdmi)) {
888 DRM_ERROR("Unable to start hdmi phy\n");
889 return;
890 }
891
892
893 hdmi_active_area(hdmi);
894
895
896 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN);
897
898
899 hdmi_config(hdmi);
900
901
902 if (hdmi_avi_infoframe_config(hdmi))
903 DRM_ERROR("Unable to configure AVI infoframe\n");
904
905 if (hdmi->audio.enabled) {
906 if (hdmi_audio_configure(hdmi))
907 DRM_ERROR("Unable to configure audio\n");
908 } else {
909 hdmi_audio_infoframe_config(hdmi);
910 }
911
912
913 if (hdmi_vendor_infoframe_config(hdmi))
914 DRM_ERROR("Unable to configure VS infoframe\n");
915
916
917 hdmi_swreset(hdmi);
918}
919
920static void sti_hdmi_set_mode(struct drm_bridge *bridge,
921 struct drm_display_mode *mode,
922 struct drm_display_mode *adjusted_mode)
923{
924 struct sti_hdmi *hdmi = bridge->driver_private;
925 int ret;
926
927 DRM_DEBUG_DRIVER("\n");
928
929
930 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode));
931
932
933 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000);
934 if (ret < 0) {
935 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n",
936 mode->clock * 1000);
937 return;
938 }
939 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000);
940 if (ret < 0) {
941 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n",
942 mode->clock * 1000);
943 return;
944 }
945}
946
947static void sti_hdmi_bridge_nope(struct drm_bridge *bridge)
948{
949
950}
951
952static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = {
953 .pre_enable = sti_hdmi_pre_enable,
954 .enable = sti_hdmi_bridge_nope,
955 .disable = sti_hdmi_disable,
956 .post_disable = sti_hdmi_bridge_nope,
957 .mode_set = sti_hdmi_set_mode,
958};
959
960static int sti_hdmi_connector_get_modes(struct drm_connector *connector)
961{
962 struct sti_hdmi_connector *hdmi_connector
963 = to_sti_hdmi_connector(connector);
964 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
965 struct edid *edid;
966 int count;
967
968 DRM_DEBUG_DRIVER("\n");
969
970 edid = drm_get_edid(connector, hdmi->ddc_adapt);
971 if (!edid)
972 goto fail;
973
974 hdmi->hdmi_monitor = drm_detect_hdmi_monitor(edid);
975 DRM_DEBUG_KMS("%s : %dx%d cm\n",
976 (hdmi->hdmi_monitor ? "hdmi monitor" : "dvi monitor"),
977 edid->width_cm, edid->height_cm);
978 cec_notifier_set_phys_addr_from_edid(hdmi->notifier, edid);
979
980 count = drm_add_edid_modes(connector, edid);
981 drm_mode_connector_update_edid_property(connector, edid);
982 drm_edid_to_eld(connector, edid);
983
984 kfree(edid);
985 return count;
986
987fail:
988 DRM_ERROR("Can't read HDMI EDID\n");
989 return 0;
990}
991
992#define CLK_TOLERANCE_HZ 50
993
994static int sti_hdmi_connector_mode_valid(struct drm_connector *connector,
995 struct drm_display_mode *mode)
996{
997 int target = mode->clock * 1000;
998 int target_min = target - CLK_TOLERANCE_HZ;
999 int target_max = target + CLK_TOLERANCE_HZ;
1000 int result;
1001 struct sti_hdmi_connector *hdmi_connector
1002 = to_sti_hdmi_connector(connector);
1003 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1004
1005
1006 result = clk_round_rate(hdmi->clk_pix, target);
1007
1008 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
1009 target, result);
1010
1011 if ((result < target_min) || (result > target_max)) {
1012 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target);
1013 return MODE_BAD;
1014 }
1015
1016 return MODE_OK;
1017}
1018
1019static const
1020struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = {
1021 .get_modes = sti_hdmi_connector_get_modes,
1022 .mode_valid = sti_hdmi_connector_mode_valid,
1023};
1024
1025
1026static enum drm_connector_status
1027sti_hdmi_connector_detect(struct drm_connector *connector, bool force)
1028{
1029 struct sti_hdmi_connector *hdmi_connector
1030 = to_sti_hdmi_connector(connector);
1031 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1032
1033 DRM_DEBUG_DRIVER("\n");
1034
1035 if (hdmi->hpd) {
1036 DRM_DEBUG_DRIVER("hdmi cable connected\n");
1037 return connector_status_connected;
1038 }
1039
1040 DRM_DEBUG_DRIVER("hdmi cable disconnected\n");
1041 cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
1042 return connector_status_disconnected;
1043}
1044
1045static void sti_hdmi_connector_init_property(struct drm_device *drm_dev,
1046 struct drm_connector *connector)
1047{
1048 struct sti_hdmi_connector *hdmi_connector
1049 = to_sti_hdmi_connector(connector);
1050 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1051 struct drm_property *prop;
1052
1053
1054 hdmi->colorspace = DEFAULT_COLORSPACE_MODE;
1055 prop = drm_property_create_enum(drm_dev, 0, "colorspace",
1056 colorspace_mode_names,
1057 ARRAY_SIZE(colorspace_mode_names));
1058 if (!prop) {
1059 DRM_ERROR("fails to create colorspace property\n");
1060 return;
1061 }
1062 hdmi_connector->colorspace_property = prop;
1063 drm_object_attach_property(&connector->base, prop, hdmi->colorspace);
1064}
1065
1066static int
1067sti_hdmi_connector_set_property(struct drm_connector *connector,
1068 struct drm_connector_state *state,
1069 struct drm_property *property,
1070 uint64_t val)
1071{
1072 struct sti_hdmi_connector *hdmi_connector
1073 = to_sti_hdmi_connector(connector);
1074 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1075
1076 if (property == hdmi_connector->colorspace_property) {
1077 hdmi->colorspace = val;
1078 return 0;
1079 }
1080
1081 DRM_ERROR("failed to set hdmi connector property\n");
1082 return -EINVAL;
1083}
1084
1085static int
1086sti_hdmi_connector_get_property(struct drm_connector *connector,
1087 const struct drm_connector_state *state,
1088 struct drm_property *property,
1089 uint64_t *val)
1090{
1091 struct sti_hdmi_connector *hdmi_connector
1092 = to_sti_hdmi_connector(connector);
1093 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1094
1095 if (property == hdmi_connector->colorspace_property) {
1096 *val = hdmi->colorspace;
1097 return 0;
1098 }
1099
1100 DRM_ERROR("failed to get hdmi connector property\n");
1101 return -EINVAL;
1102}
1103
1104static int sti_hdmi_late_register(struct drm_connector *connector)
1105{
1106 struct sti_hdmi_connector *hdmi_connector
1107 = to_sti_hdmi_connector(connector);
1108 struct sti_hdmi *hdmi = hdmi_connector->hdmi;
1109
1110 if (hdmi_debugfs_init(hdmi, hdmi->drm_dev->primary)) {
1111 DRM_ERROR("HDMI debugfs setup failed\n");
1112 return -EINVAL;
1113 }
1114
1115 return 0;
1116}
1117
1118static const struct drm_connector_funcs sti_hdmi_connector_funcs = {
1119 .dpms = drm_atomic_helper_connector_dpms,
1120 .fill_modes = drm_helper_probe_single_connector_modes,
1121 .detect = sti_hdmi_connector_detect,
1122 .destroy = drm_connector_cleanup,
1123 .reset = drm_atomic_helper_connector_reset,
1124 .set_property = drm_atomic_helper_connector_set_property,
1125 .atomic_set_property = sti_hdmi_connector_set_property,
1126 .atomic_get_property = sti_hdmi_connector_get_property,
1127 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
1128 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
1129 .late_register = sti_hdmi_late_register,
1130};
1131
1132static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev)
1133{
1134 struct drm_encoder *encoder;
1135
1136 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1137 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1138 return encoder;
1139 }
1140
1141 return NULL;
1142}
1143
1144static void hdmi_audio_shutdown(struct device *dev, void *data)
1145{
1146 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1147 int audio_cfg;
1148
1149 DRM_DEBUG_DRIVER("\n");
1150
1151
1152 audio_cfg = HDMI_AUD_CFG_SPDIF_DIV_2 | HDMI_AUD_CFG_DTS_INVALID |
1153 HDMI_AUD_CFG_ONE_BIT_INVALID;
1154 hdmi_write(hdmi, audio_cfg, HDMI_AUDIO_CFG);
1155
1156 hdmi->audio.enabled = false;
1157 hdmi_audio_infoframe_config(hdmi);
1158}
1159
1160static int hdmi_audio_hw_params(struct device *dev,
1161 void *data,
1162 struct hdmi_codec_daifmt *daifmt,
1163 struct hdmi_codec_params *params)
1164{
1165 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1166 int ret;
1167
1168 DRM_DEBUG_DRIVER("\n");
1169
1170 if ((daifmt->fmt != HDMI_I2S) || daifmt->bit_clk_inv ||
1171 daifmt->frame_clk_inv || daifmt->bit_clk_master ||
1172 daifmt->frame_clk_master) {
1173 dev_err(dev, "%s: Bad flags %d %d %d %d\n", __func__,
1174 daifmt->bit_clk_inv, daifmt->frame_clk_inv,
1175 daifmt->bit_clk_master,
1176 daifmt->frame_clk_master);
1177 return -EINVAL;
1178 }
1179
1180 hdmi->audio.sample_width = params->sample_width;
1181 hdmi->audio.sample_rate = params->sample_rate;
1182 hdmi->audio.cea = params->cea;
1183
1184 hdmi->audio.enabled = true;
1185
1186 ret = hdmi_audio_configure(hdmi);
1187 if (ret < 0)
1188 return ret;
1189
1190 return 0;
1191}
1192
1193static int hdmi_audio_digital_mute(struct device *dev, void *data, bool enable)
1194{
1195 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1196
1197 DRM_DEBUG_DRIVER("%s\n", enable ? "enable" : "disable");
1198
1199 if (enable)
1200 hdmi_write(hdmi, HDMI_SAMPLE_FLAT_ALL, HDMI_SAMPLE_FLAT_MASK);
1201 else
1202 hdmi_write(hdmi, HDMI_SAMPLE_FLAT_NO, HDMI_SAMPLE_FLAT_MASK);
1203
1204 return 0;
1205}
1206
1207static int hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len)
1208{
1209 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1210 struct drm_connector *connector = hdmi->drm_connector;
1211
1212 DRM_DEBUG_DRIVER("\n");
1213 memcpy(buf, connector->eld, min(sizeof(connector->eld), len));
1214
1215 return 0;
1216}
1217
1218static const struct hdmi_codec_ops audio_codec_ops = {
1219 .hw_params = hdmi_audio_hw_params,
1220 .audio_shutdown = hdmi_audio_shutdown,
1221 .digital_mute = hdmi_audio_digital_mute,
1222 .get_eld = hdmi_audio_get_eld,
1223};
1224
1225static int sti_hdmi_register_audio_driver(struct device *dev,
1226 struct sti_hdmi *hdmi)
1227{
1228 struct hdmi_codec_pdata codec_data = {
1229 .ops = &audio_codec_ops,
1230 .max_i2s_channels = 8,
1231 .i2s = 1,
1232 };
1233
1234 DRM_DEBUG_DRIVER("\n");
1235
1236 hdmi->audio.enabled = false;
1237
1238 hdmi->audio_pdev = platform_device_register_data(
1239 dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
1240 &codec_data, sizeof(codec_data));
1241
1242 if (IS_ERR(hdmi->audio_pdev))
1243 return PTR_ERR(hdmi->audio_pdev);
1244
1245 DRM_INFO("%s Driver bound %s\n", HDMI_CODEC_DRV_NAME, dev_name(dev));
1246
1247 return 0;
1248}
1249
1250static int sti_hdmi_bind(struct device *dev, struct device *master, void *data)
1251{
1252 struct sti_hdmi *hdmi = dev_get_drvdata(dev);
1253 struct drm_device *drm_dev = data;
1254 struct drm_encoder *encoder;
1255 struct sti_hdmi_connector *connector;
1256 struct drm_connector *drm_connector;
1257 struct drm_bridge *bridge;
1258 int err;
1259
1260
1261 hdmi->drm_dev = drm_dev;
1262
1263 encoder = sti_hdmi_find_encoder(drm_dev);
1264 if (!encoder)
1265 return -EINVAL;
1266
1267 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
1268 if (!connector)
1269 return -EINVAL;
1270
1271 connector->hdmi = hdmi;
1272
1273 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
1274 if (!bridge)
1275 return -EINVAL;
1276
1277 bridge->driver_private = hdmi;
1278 bridge->funcs = &sti_hdmi_bridge_funcs;
1279 drm_bridge_attach(encoder, bridge, NULL);
1280
1281 connector->encoder = encoder;
1282
1283 drm_connector = (struct drm_connector *)connector;
1284
1285 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
1286
1287 drm_connector_init(drm_dev, drm_connector,
1288 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA);
1289 drm_connector_helper_add(drm_connector,
1290 &sti_hdmi_connector_helper_funcs);
1291
1292
1293 sti_hdmi_connector_init_property(drm_dev, drm_connector);
1294
1295 hdmi->drm_connector = drm_connector;
1296
1297 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
1298 if (err) {
1299 DRM_ERROR("Failed to attach a connector to a encoder\n");
1300 goto err_sysfs;
1301 }
1302
1303 err = sti_hdmi_register_audio_driver(dev, hdmi);
1304 if (err) {
1305 DRM_ERROR("Failed to attach an audio codec\n");
1306 goto err_sysfs;
1307 }
1308
1309
1310 err = hdmi_audio_infoframe_init(&hdmi->audio.cea);
1311 if (err) {
1312 DRM_ERROR("Failed to init audio infoframe\n");
1313 goto err_sysfs;
1314 }
1315
1316
1317 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN);
1318
1319 return 0;
1320
1321err_sysfs:
1322 drm_bridge_remove(bridge);
1323 hdmi->drm_connector = NULL;
1324 return -EINVAL;
1325}
1326
1327static void sti_hdmi_unbind(struct device *dev,
1328 struct device *master, void *data)
1329{
1330}
1331
1332static const struct component_ops sti_hdmi_ops = {
1333 .bind = sti_hdmi_bind,
1334 .unbind = sti_hdmi_unbind,
1335};
1336
1337static const struct of_device_id hdmi_of_match[] = {
1338 {
1339 .compatible = "st,stih407-hdmi",
1340 .data = &tx3g4c28phy_ops,
1341 }, {
1342
1343 }
1344};
1345MODULE_DEVICE_TABLE(of, hdmi_of_match);
1346
1347static int sti_hdmi_probe(struct platform_device *pdev)
1348{
1349 struct device *dev = &pdev->dev;
1350 struct sti_hdmi *hdmi;
1351 struct device_node *np = dev->of_node;
1352 struct resource *res;
1353 struct device_node *ddc;
1354 int ret;
1355
1356 DRM_INFO("%s\n", __func__);
1357
1358 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
1359 if (!hdmi)
1360 return -ENOMEM;
1361
1362 ddc = of_parse_phandle(pdev->dev.of_node, "ddc", 0);
1363 if (ddc) {
1364 hdmi->ddc_adapt = of_get_i2c_adapter_by_node(ddc);
1365 of_node_put(ddc);
1366 if (!hdmi->ddc_adapt)
1367 return -EPROBE_DEFER;
1368 }
1369
1370 hdmi->dev = pdev->dev;
1371
1372
1373 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg");
1374 if (!res) {
1375 DRM_ERROR("Invalid hdmi resource\n");
1376 ret = -ENOMEM;
1377 goto release_adapter;
1378 }
1379 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res));
1380 if (!hdmi->regs) {
1381 ret = -ENOMEM;
1382 goto release_adapter;
1383 }
1384
1385 hdmi->phy_ops = (struct hdmi_phy_ops *)
1386 of_match_node(hdmi_of_match, np)->data;
1387
1388
1389 hdmi->clk_pix = devm_clk_get(dev, "pix");
1390 if (IS_ERR(hdmi->clk_pix)) {
1391 DRM_ERROR("Cannot get hdmi_pix clock\n");
1392 ret = PTR_ERR(hdmi->clk_pix);
1393 goto release_adapter;
1394 }
1395
1396 hdmi->clk_tmds = devm_clk_get(dev, "tmds");
1397 if (IS_ERR(hdmi->clk_tmds)) {
1398 DRM_ERROR("Cannot get hdmi_tmds clock\n");
1399 ret = PTR_ERR(hdmi->clk_tmds);
1400 goto release_adapter;
1401 }
1402
1403 hdmi->clk_phy = devm_clk_get(dev, "phy");
1404 if (IS_ERR(hdmi->clk_phy)) {
1405 DRM_ERROR("Cannot get hdmi_phy clock\n");
1406 ret = PTR_ERR(hdmi->clk_phy);
1407 goto release_adapter;
1408 }
1409
1410 hdmi->clk_audio = devm_clk_get(dev, "audio");
1411 if (IS_ERR(hdmi->clk_audio)) {
1412 DRM_ERROR("Cannot get hdmi_audio clock\n");
1413 ret = PTR_ERR(hdmi->clk_audio);
1414 goto release_adapter;
1415 }
1416
1417 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG;
1418
1419 init_waitqueue_head(&hdmi->wait_event);
1420
1421 hdmi->irq = platform_get_irq_byname(pdev, "irq");
1422
1423 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq,
1424 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi);
1425 if (ret) {
1426 DRM_ERROR("Failed to register HDMI interrupt\n");
1427 goto release_adapter;
1428 }
1429
1430 hdmi->notifier = cec_notifier_get(&pdev->dev);
1431 if (!hdmi->notifier)
1432 goto release_adapter;
1433
1434 hdmi->reset = devm_reset_control_get(dev, "hdmi");
1435
1436 if (!IS_ERR(hdmi->reset))
1437 reset_control_deassert(hdmi->reset);
1438
1439 platform_set_drvdata(pdev, hdmi);
1440
1441 return component_add(&pdev->dev, &sti_hdmi_ops);
1442
1443 release_adapter:
1444 i2c_put_adapter(hdmi->ddc_adapt);
1445
1446 return ret;
1447}
1448
1449static int sti_hdmi_remove(struct platform_device *pdev)
1450{
1451 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev);
1452
1453 cec_notifier_set_phys_addr(hdmi->notifier, CEC_PHYS_ADDR_INVALID);
1454
1455 i2c_put_adapter(hdmi->ddc_adapt);
1456 if (hdmi->audio_pdev)
1457 platform_device_unregister(hdmi->audio_pdev);
1458 component_del(&pdev->dev, &sti_hdmi_ops);
1459
1460 cec_notifier_put(hdmi->notifier);
1461 return 0;
1462}
1463
1464struct platform_driver sti_hdmi_driver = {
1465 .driver = {
1466 .name = "sti-hdmi",
1467 .owner = THIS_MODULE,
1468 .of_match_table = hdmi_of_match,
1469 },
1470 .probe = sti_hdmi_probe,
1471 .remove = sti_hdmi_remove,
1472};
1473
1474MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
1475MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
1476MODULE_LICENSE("GPL");
1477
