LXR linux/drivers/media/usb/gspca/ov519.c

   1/**
   2 * OV519 driver
   3 *
   4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
   5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
   6 *
   7 * This module is adapted from the ov51x-jpeg package, which itself
   8 * was adapted from the ov511 driver.
   9 *
  10 * Original copyright for the ov511 driver is:
  11 *
  12 * Copyright (c) 1999-2006 Mark W. McClelland
  13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
  14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
  15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
  16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
  17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
  18 *
  19 * ov51x-jpeg original copyright is:
  20 *
  21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
  22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
  23 *
  24 * This program is free software; you can redistribute it and/or modify
  25 * it under the terms of the GNU General Public License as published by
  26 * the Free Software Foundation; either version 2 of the License, or
  27 * any later version.
  28 *
  29 * This program is distributed in the hope that it will be useful,
  30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  32 * GNU General Public License for more details.
  33 *
  34 */
  35
  36#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  37
  38#define MODULE_NAME "ov519"
  39
  40#include <linux/input.h>
  41#include "gspca.h"
  42
  43/* The jpeg_hdr is used by w996Xcf only */
  44/* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
  45#define CONEX_CAM
  46#include "jpeg.h"
  47
  48MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
  49MODULE_DESCRIPTION("OV519 USB Camera Driver");
  50MODULE_LICENSE("GPL");
  51
  52/* global parameters */
  53static int frame_rate;
  54
  55/* Number of times to retry a failed I2C transaction. Increase this if you
  56 * are getting "Failed to read sensor ID..." */
  57static int i2c_detect_tries = 10;
  58
  59/* ov519 device descriptor */
  60struct sd {
  61        struct gspca_dev gspca_dev;             /* !! must be the first item */
  62
  63        struct v4l2_ctrl *jpegqual;
  64        struct v4l2_ctrl *freq;
  65        struct { /* h/vflip control cluster */
  66                struct v4l2_ctrl *hflip;
  67                struct v4l2_ctrl *vflip;
  68        };
  69        struct { /* autobrightness/brightness control cluster */
  70                struct v4l2_ctrl *autobright;
  71                struct v4l2_ctrl *brightness;
  72        };
  73
  74        u8 revision;
  75
  76        u8 packet_nr;
  77
  78        char bridge;
  79#define BRIDGE_OV511            0
  80#define BRIDGE_OV511PLUS        1
  81#define BRIDGE_OV518            2
  82#define BRIDGE_OV518PLUS        3
  83#define BRIDGE_OV519            4               /* = ov530 */
  84#define BRIDGE_OVFX2            5
  85#define BRIDGE_W9968CF          6
  86#define BRIDGE_MASK             7
  87
  88        char invert_led;
  89#define BRIDGE_INVERT_LED       8
  90
  91        char snapshot_pressed;
  92        char snapshot_needs_reset;
  93
  94        /* Determined by sensor type */
  95        u8 sif;
  96
  97#define QUALITY_MIN 50
  98#define QUALITY_MAX 70
  99#define QUALITY_DEF 50
 100
 101        u8 stopped;             /* Streaming is temporarily paused */
 102        u8 first_frame;
 103
 104        u8 frame_rate;          /* current Framerate */
 105        u8 clockdiv;            /* clockdiv override */
 106
 107        s8 sensor;              /* Type of image sensor chip (SEN_*) */
 108
 109        u8 sensor_addr;
 110        u16 sensor_width;
 111        u16 sensor_height;
 112        s16 sensor_reg_cache[256];
 113
 114        u8 jpeg_hdr[JPEG_HDR_SZ];
 115};
 116enum sensors {
 117        SEN_OV2610,
 118        SEN_OV2610AE,
 119        SEN_OV3610,
 120        SEN_OV6620,
 121        SEN_OV6630,
 122        SEN_OV66308AF,
 123        SEN_OV7610,
 124        SEN_OV7620,
 125        SEN_OV7620AE,
 126        SEN_OV7640,
 127        SEN_OV7648,
 128        SEN_OV7660,
 129        SEN_OV7670,
 130        SEN_OV76BE,
 131        SEN_OV8610,
 132        SEN_OV9600,
 133};
 134
 135/* Note this is a bit of a hack, but the w9968cf driver needs the code for all
 136   the ov sensors which is already present here. When we have the time we
 137   really should move the sensor drivers to v4l2 sub drivers. */
 138#include "w996Xcf.c"
 139
 140/* table of the disabled controls */
 141struct ctrl_valid {
 142        unsigned int has_brightness:1;
 143        unsigned int has_contrast:1;
 144        unsigned int has_exposure:1;
 145        unsigned int has_autogain:1;
 146        unsigned int has_sat:1;
 147        unsigned int has_hvflip:1;
 148        unsigned int has_autobright:1;
 149        unsigned int has_freq:1;
 150};
 151
 152static const struct ctrl_valid valid_controls[] = {
 153        [SEN_OV2610] = {
 154                .has_exposure = 1,
 155                .has_autogain = 1,
 156        },
 157        [SEN_OV2610AE] = {
 158                .has_exposure = 1,
 159                .has_autogain = 1,
 160        },
 161        [SEN_OV3610] = {
 162                /* No controls */
 163        },
 164        [SEN_OV6620] = {
 165                .has_brightness = 1,
 166                .has_contrast = 1,
 167                .has_sat = 1,
 168                .has_autobright = 1,
 169                .has_freq = 1,
 170        },
 171        [SEN_OV6630] = {
 172                .has_brightness = 1,
 173                .has_contrast = 1,
 174                .has_sat = 1,
 175                .has_autobright = 1,
 176                .has_freq = 1,
 177        },
 178        [SEN_OV66308AF] = {
 179                .has_brightness = 1,
 180                .has_contrast = 1,
 181                .has_sat = 1,
 182                .has_autobright = 1,
 183                .has_freq = 1,
 184        },
 185        [SEN_OV7610] = {
 186                .has_brightness = 1,
 187                .has_contrast = 1,
 188                .has_sat = 1,
 189                .has_autobright = 1,
 190                .has_freq = 1,
 191        },
 192        [SEN_OV7620] = {
 193                .has_brightness = 1,
 194                .has_contrast = 1,
 195                .has_sat = 1,
 196                .has_autobright = 1,
 197                .has_freq = 1,
 198        },
 199        [SEN_OV7620AE] = {
 200                .has_brightness = 1,
 201                .has_contrast = 1,
 202                .has_sat = 1,
 203                .has_autobright = 1,
 204                .has_freq = 1,
 205        },
 206        [SEN_OV7640] = {
 207                .has_brightness = 1,
 208                .has_sat = 1,
 209                .has_freq = 1,
 210        },
 211        [SEN_OV7648] = {
 212                .has_brightness = 1,
 213                .has_sat = 1,
 214                .has_freq = 1,
 215        },
 216        [SEN_OV7660] = {
 217                .has_brightness = 1,
 218                .has_contrast = 1,
 219                .has_sat = 1,
 220                .has_hvflip = 1,
 221                .has_freq = 1,
 222        },
 223        [SEN_OV7670] = {
 224                .has_brightness = 1,
 225                .has_contrast = 1,
 226                .has_hvflip = 1,
 227                .has_freq = 1,
 228        },
 229        [SEN_OV76BE] = {
 230                .has_brightness = 1,
 231                .has_contrast = 1,
 232                .has_sat = 1,
 233                .has_autobright = 1,
 234                .has_freq = 1,
 235        },
 236        [SEN_OV8610] = {
 237                .has_brightness = 1,
 238                .has_contrast = 1,
 239                .has_sat = 1,
 240                .has_autobright = 1,
 241        },
 242        [SEN_OV9600] = {
 243                .has_exposure = 1,
 244                .has_autogain = 1,
 245        },
 246};
 247
 248static const struct v4l2_pix_format ov519_vga_mode[] = {
 249        {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 250                .bytesperline = 320,
 251                .sizeimage = 320 * 240 * 3 / 8 + 590,
 252                .colorspace = V4L2_COLORSPACE_JPEG,
 253                .priv = 1},
 254        {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 255                .bytesperline = 640,
 256                .sizeimage = 640 * 480 * 3 / 8 + 590,
 257                .colorspace = V4L2_COLORSPACE_JPEG,
 258                .priv = 0},
 259};
 260static const struct v4l2_pix_format ov519_sif_mode[] = {
 261        {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 262                .bytesperline = 160,
 263                .sizeimage = 160 * 120 * 3 / 8 + 590,
 264                .colorspace = V4L2_COLORSPACE_JPEG,
 265                .priv = 3},
 266        {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 267                .bytesperline = 176,
 268                .sizeimage = 176 * 144 * 3 / 8 + 590,
 269                .colorspace = V4L2_COLORSPACE_JPEG,
 270                .priv = 1},
 271        {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 272                .bytesperline = 320,
 273                .sizeimage = 320 * 240 * 3 / 8 + 590,
 274                .colorspace = V4L2_COLORSPACE_JPEG,
 275                .priv = 2},
 276        {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
 277                .bytesperline = 352,
 278                .sizeimage = 352 * 288 * 3 / 8 + 590,
 279                .colorspace = V4L2_COLORSPACE_JPEG,
 280                .priv = 0},
 281};
 282
 283/* Note some of the sizeimage values for the ov511 / ov518 may seem
 284   larger then necessary, however they need to be this big as the ov511 /
 285   ov518 always fills the entire isoc frame, using 0 padding bytes when
 286   it doesn't have any data. So with low framerates the amount of data
 287   transferred can become quite large (libv4l will remove all the 0 padding
 288   in userspace). */
 289static const struct v4l2_pix_format ov518_vga_mode[] = {
 290        {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 291                .bytesperline = 320,
 292                .sizeimage = 320 * 240 * 3,
 293                .colorspace = V4L2_COLORSPACE_JPEG,
 294                .priv = 1},
 295        {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 296                .bytesperline = 640,
 297                .sizeimage = 640 * 480 * 2,
 298                .colorspace = V4L2_COLORSPACE_JPEG,
 299                .priv = 0},
 300};
 301static const struct v4l2_pix_format ov518_sif_mode[] = {
 302        {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 303                .bytesperline = 160,
 304                .sizeimage = 70000,
 305                .colorspace = V4L2_COLORSPACE_JPEG,
 306                .priv = 3},
 307        {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 308                .bytesperline = 176,
 309                .sizeimage = 70000,
 310                .colorspace = V4L2_COLORSPACE_JPEG,
 311                .priv = 1},
 312        {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 313                .bytesperline = 320,
 314                .sizeimage = 320 * 240 * 3,
 315                .colorspace = V4L2_COLORSPACE_JPEG,
 316                .priv = 2},
 317        {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
 318                .bytesperline = 352,
 319                .sizeimage = 352 * 288 * 3,
 320                .colorspace = V4L2_COLORSPACE_JPEG,
 321                .priv = 0},
 322};
 323
 324static const struct v4l2_pix_format ov511_vga_mode[] = {
 325        {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 326                .bytesperline = 320,
 327                .sizeimage = 320 * 240 * 3,
 328                .colorspace = V4L2_COLORSPACE_JPEG,
 329                .priv = 1},
 330        {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 331                .bytesperline = 640,
 332                .sizeimage = 640 * 480 * 2,
 333                .colorspace = V4L2_COLORSPACE_JPEG,
 334                .priv = 0},
 335};
 336static const struct v4l2_pix_format ov511_sif_mode[] = {
 337        {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 338                .bytesperline = 160,
 339                .sizeimage = 70000,
 340                .colorspace = V4L2_COLORSPACE_JPEG,
 341                .priv = 3},
 342        {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 343                .bytesperline = 176,
 344                .sizeimage = 70000,
 345                .colorspace = V4L2_COLORSPACE_JPEG,
 346                .priv = 1},
 347        {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 348                .bytesperline = 320,
 349                .sizeimage = 320 * 240 * 3,
 350                .colorspace = V4L2_COLORSPACE_JPEG,
 351                .priv = 2},
 352        {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
 353                .bytesperline = 352,
 354                .sizeimage = 352 * 288 * 3,
 355                .colorspace = V4L2_COLORSPACE_JPEG,
 356                .priv = 0},
 357};
 358
 359static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
 360        {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 361                .bytesperline = 800,
 362                .sizeimage = 800 * 600,
 363                .colorspace = V4L2_COLORSPACE_SRGB,
 364                .priv = 1},
 365        {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 366                .bytesperline = 1600,
 367                .sizeimage = 1600 * 1200,
 368                .colorspace = V4L2_COLORSPACE_SRGB},
 369};
 370static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
 371        {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 372                .bytesperline = 640,
 373                .sizeimage = 640 * 480,
 374                .colorspace = V4L2_COLORSPACE_SRGB,
 375                .priv = 1},
 376        {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 377                .bytesperline = 800,
 378                .sizeimage = 800 * 600,
 379                .colorspace = V4L2_COLORSPACE_SRGB,
 380                .priv = 1},
 381        {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 382                .bytesperline = 1024,
 383                .sizeimage = 1024 * 768,
 384                .colorspace = V4L2_COLORSPACE_SRGB,
 385                .priv = 1},
 386        {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 387                .bytesperline = 1600,
 388                .sizeimage = 1600 * 1200,
 389                .colorspace = V4L2_COLORSPACE_SRGB,
 390                .priv = 0},
 391        {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 392                .bytesperline = 2048,
 393                .sizeimage = 2048 * 1536,
 394                .colorspace = V4L2_COLORSPACE_SRGB,
 395                .priv = 0},
 396};
 397static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
 398        {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 399                .bytesperline = 640,
 400                .sizeimage = 640 * 480,
 401                .colorspace = V4L2_COLORSPACE_SRGB,
 402                .priv = 1},
 403        {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
 404                .bytesperline = 1280,
 405                .sizeimage = 1280 * 1024,
 406                .colorspace = V4L2_COLORSPACE_SRGB},
 407};
 408
 409/* Registers common to OV511 / OV518 */
 410#define R51x_FIFO_PSIZE                 0x30    /* 2 bytes wide w/ OV518(+) */
 411#define R51x_SYS_RESET                  0x50
 412        /* Reset type flags */
 413        #define OV511_RESET_OMNICE      0x08
 414#define R51x_SYS_INIT                   0x53
 415#define R51x_SYS_SNAP                   0x52
 416#define R51x_SYS_CUST_ID                0x5f
 417#define R51x_COMP_LUT_BEGIN             0x80
 418
 419/* OV511 Camera interface register numbers */
 420#define R511_CAM_DELAY                  0x10
 421#define R511_CAM_EDGE                   0x11
 422#define R511_CAM_PXCNT                  0x12
 423#define R511_CAM_LNCNT                  0x13
 424#define R511_CAM_PXDIV                  0x14
 425#define R511_CAM_LNDIV                  0x15
 426#define R511_CAM_UV_EN                  0x16
 427#define R511_CAM_LINE_MODE              0x17
 428#define R511_CAM_OPTS                   0x18
 429
 430#define R511_SNAP_FRAME                 0x19
 431#define R511_SNAP_PXCNT                 0x1a
 432#define R511_SNAP_LNCNT                 0x1b
 433#define R511_SNAP_PXDIV                 0x1c
 434#define R511_SNAP_LNDIV                 0x1d
 435#define R511_SNAP_UV_EN                 0x1e
 436#define R511_SNAP_OPTS                  0x1f
 437
 438#define R511_DRAM_FLOW_CTL              0x20
 439#define R511_FIFO_OPTS                  0x31
 440#define R511_I2C_CTL                    0x40
 441#define R511_SYS_LED_CTL                0x55    /* OV511+ only */
 442#define R511_COMP_EN                    0x78
 443#define R511_COMP_LUT_EN                0x79
 444
 445/* OV518 Camera interface register numbers */
 446#define R518_GPIO_OUT                   0x56    /* OV518(+) only */
 447#define R518_GPIO_CTL                   0x57    /* OV518(+) only */
 448
 449/* OV519 Camera interface register numbers */
 450#define OV519_R10_H_SIZE                0x10
 451#define OV519_R11_V_SIZE                0x11
 452#define OV519_R12_X_OFFSETL             0x12
 453#define OV519_R13_X_OFFSETH             0x13
 454#define OV519_R14_Y_OFFSETL             0x14
 455#define OV519_R15_Y_OFFSETH             0x15
 456#define OV519_R16_DIVIDER               0x16
 457#define OV519_R20_DFR                   0x20
 458#define OV519_R25_FORMAT                0x25
 459
 460/* OV519 System Controller register numbers */
 461#define OV519_R51_RESET1                0x51
 462#define OV519_R54_EN_CLK1               0x54
 463#define OV519_R57_SNAPSHOT              0x57
 464
 465#define OV519_GPIO_DATA_OUT0            0x71
 466#define OV519_GPIO_IO_CTRL0             0x72
 467
 468/*#define OV511_ENDPOINT_ADDRESS 1       * Isoc endpoint number */
 469
 470/*
 471 * The FX2 chip does not give us a zero length read at end of frame.
 472 * It does, however, give a short read at the end of a frame, if
 473 * necessary, rather than run two frames together.
 474 *
 475 * By choosing the right bulk transfer size, we are guaranteed to always
 476 * get a short read for the last read of each frame.  Frame sizes are
 477 * always a composite number (width * height, or a multiple) so if we
 478 * choose a prime number, we are guaranteed that the last read of a
 479 * frame will be short.
 480 *
 481 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
 482 * otherwise EOVERFLOW "babbling" errors occur.  I have not been able
 483 * to figure out why.  [PMiller]
 484 *
 485 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
 486 *
 487 * It isn't enough to know the number of bytes per frame, in case we
 488 * have data dropouts or buffer overruns (even though the FX2 double
 489 * buffers, there are some pretty strict real time constraints for
 490 * isochronous transfer for larger frame sizes).
 491 */
 492/*jfm: this value does not work for 800x600 - see isoc_init */
 493#define OVFX2_BULK_SIZE (13 * 4096)
 494
 495/* I2C registers */
 496#define R51x_I2C_W_SID          0x41
 497#define R51x_I2C_SADDR_3        0x42
 498#define R51x_I2C_SADDR_2        0x43
 499#define R51x_I2C_R_SID          0x44
 500#define R51x_I2C_DATA           0x45
 501#define R518_I2C_CTL            0x47    /* OV518(+) only */
 502#define OVFX2_I2C_ADDR          0x00
 503
 504/* I2C ADDRESSES */
 505#define OV7xx0_SID   0x42
 506#define OV_HIRES_SID 0x60               /* OV9xxx / OV2xxx / OV3xxx */
 507#define OV8xx0_SID   0xa0
 508#define OV6xx0_SID   0xc0
 509
 510/* OV7610 registers */
 511#define OV7610_REG_GAIN         0x00    /* gain setting (5:0) */
 512#define OV7610_REG_BLUE         0x01    /* blue channel balance */
 513#define OV7610_REG_RED          0x02    /* red channel balance */
 514#define OV7610_REG_SAT          0x03    /* saturation */
 515#define OV8610_REG_HUE          0x04    /* 04 reserved */
 516#define OV7610_REG_CNT          0x05    /* Y contrast */
 517#define OV7610_REG_BRT          0x06    /* Y brightness */
 518#define OV7610_REG_COM_C        0x14    /* misc common regs */
 519#define OV7610_REG_ID_HIGH      0x1c    /* manufacturer ID MSB */
 520#define OV7610_REG_ID_LOW       0x1d    /* manufacturer ID LSB */
 521#define OV7610_REG_COM_I        0x29    /* misc settings */
 522
 523/* OV7660 and OV7670 registers */
 524#define OV7670_R00_GAIN         0x00    /* Gain lower 8 bits (rest in vref) */
 525#define OV7670_R01_BLUE         0x01    /* blue gain */
 526#define OV7670_R02_RED          0x02    /* red gain */
 527#define OV7670_R03_VREF         0x03    /* Pieces of GAIN, VSTART, VSTOP */
 528#define OV7670_R04_COM1         0x04    /* Control 1 */
 529/*#define OV7670_R07_AECHH      0x07     * AEC MS 5 bits */
 530#define OV7670_R0C_COM3         0x0c    /* Control 3 */
 531#define OV7670_R0D_COM4         0x0d    /* Control 4 */
 532#define OV7670_R0E_COM5         0x0e    /* All "reserved" */
 533#define OV7670_R0F_COM6         0x0f    /* Control 6 */
 534#define OV7670_R10_AECH         0x10    /* More bits of AEC value */
 535#define OV7670_R11_CLKRC        0x11    /* Clock control */
 536#define OV7670_R12_COM7         0x12    /* Control 7 */
 537#define   OV7670_COM7_FMT_VGA    0x00
 538/*#define   OV7670_COM7_YUV      0x00    * YUV */
 539#define   OV7670_COM7_FMT_QVGA   0x10   /* QVGA format */
 540#define   OV7670_COM7_FMT_MASK   0x38
 541#define   OV7670_COM7_RESET      0x80   /* Register reset */
 542#define OV7670_R13_COM8         0x13    /* Control 8 */
 543#define   OV7670_COM8_AEC        0x01   /* Auto exposure enable */
 544#define   OV7670_COM8_AWB        0x02   /* White balance enable */
 545#define   OV7670_COM8_AGC        0x04   /* Auto gain enable */
 546#define   OV7670_COM8_BFILT      0x20   /* Band filter enable */
 547#define   OV7670_COM8_AECSTEP    0x40   /* Unlimited AEC step size */
 548#define   OV7670_COM8_FASTAEC    0x80   /* Enable fast AGC/AEC */
 549#define OV7670_R14_COM9         0x14    /* Control 9 - gain ceiling */
 550#define OV7670_R15_COM10        0x15    /* Control 10 */
 551#define OV7670_R17_HSTART       0x17    /* Horiz start high bits */
 552#define OV7670_R18_HSTOP        0x18    /* Horiz stop high bits */
 553#define OV7670_R19_VSTART       0x19    /* Vert start high bits */
 554#define OV7670_R1A_VSTOP        0x1a    /* Vert stop high bits */
 555#define OV7670_R1E_MVFP         0x1e    /* Mirror / vflip */
 556#define   OV7670_MVFP_VFLIP      0x10   /* vertical flip */
 557#define   OV7670_MVFP_MIRROR     0x20   /* Mirror image */
 558#define OV7670_R24_AEW          0x24    /* AGC upper limit */
 559#define OV7670_R25_AEB          0x25    /* AGC lower limit */
 560#define OV7670_R26_VPT          0x26    /* AGC/AEC fast mode op region */
 561#define OV7670_R32_HREF         0x32    /* HREF pieces */
 562#define OV7670_R3A_TSLB         0x3a    /* lots of stuff */
 563#define OV7670_R3B_COM11        0x3b    /* Control 11 */
 564#define   OV7670_COM11_EXP       0x02
 565#define   OV7670_COM11_HZAUTO    0x10   /* Auto detect 50/60 Hz */
 566#define OV7670_R3C_COM12        0x3c    /* Control 12 */
 567#define OV7670_R3D_COM13        0x3d    /* Control 13 */
 568#define   OV7670_COM13_GAMMA     0x80   /* Gamma enable */
 569#define   OV7670_COM13_UVSAT     0x40   /* UV saturation auto adjustment */
 570#define OV7670_R3E_COM14        0x3e    /* Control 14 */
 571#define OV7670_R3F_EDGE         0x3f    /* Edge enhancement factor */
 572#define OV7670_R40_COM15        0x40    /* Control 15 */
 573/*#define   OV7670_COM15_R00FF   0xc0    *      00 to FF */
 574#define OV7670_R41_COM16        0x41    /* Control 16 */
 575#define   OV7670_COM16_AWBGAIN   0x08   /* AWB gain enable */
 576/* end of ov7660 common registers */
 577#define OV7670_R55_BRIGHT       0x55    /* Brightness */
 578#define OV7670_R56_CONTRAS      0x56    /* Contrast control */
 579#define OV7670_R69_GFIX         0x69    /* Fix gain control */
 580/*#define OV7670_R8C_RGB444     0x8c     * RGB 444 control */
 581#define OV7670_R9F_HAECC1       0x9f    /* Hist AEC/AGC control 1 */
 582#define OV7670_RA0_HAECC2       0xa0    /* Hist AEC/AGC control 2 */
 583#define OV7670_RA5_BD50MAX      0xa5    /* 50hz banding step limit */
 584#define OV7670_RA6_HAECC3       0xa6    /* Hist AEC/AGC control 3 */
 585#define OV7670_RA7_HAECC4       0xa7    /* Hist AEC/AGC control 4 */
 586#define OV7670_RA8_HAECC5       0xa8    /* Hist AEC/AGC control 5 */
 587#define OV7670_RA9_HAECC6       0xa9    /* Hist AEC/AGC control 6 */
 588#define OV7670_RAA_HAECC7       0xaa    /* Hist AEC/AGC control 7 */
 589#define OV7670_RAB_BD60MAX      0xab    /* 60hz banding step limit */
 590
 591struct ov_regvals {
 592        u8 reg;
 593        u8 val;
 594};
 595struct ov_i2c_regvals {
 596        u8 reg;
 597        u8 val;
 598};
 599
 600/* Settings for OV2610 camera chip */
 601static const struct ov_i2c_regvals norm_2610[] = {
 602        { 0x12, 0x80 }, /* reset */
 603};
 604
 605static const struct ov_i2c_regvals norm_2610ae[] = {
 606        {0x12, 0x80},   /* reset */
 607        {0x13, 0xcd},
 608        {0x09, 0x01},
 609        {0x0d, 0x00},
 610        {0x11, 0x80},
 611        {0x12, 0x20},   /* 1600x1200 */
 612        {0x33, 0x0c},
 613        {0x35, 0x90},
 614        {0x36, 0x37},
 615/* ms-win traces */
 616        {0x11, 0x83},   /* clock / 3 ? */
 617        {0x2d, 0x00},   /* 60 Hz filter */
 618        {0x24, 0xb0},   /* normal colors */
 619        {0x25, 0x90},
 620        {0x10, 0x43},
 621};
 622
 623static const struct ov_i2c_regvals norm_3620b[] = {
 624        /*
 625         * From the datasheet: "Note that after writing to register COMH
 626         * (0x12) to change the sensor mode, registers related to the
 627         * sensor’s cropping window will be reset back to their default
 628         * values."
 629         *
 630         * "wait 4096 external clock ... to make sure the sensor is
 631         * stable and ready to access registers" i.e. 160us at 24MHz
 632         */
 633        { 0x12, 0x80 }, /* COMH reset */
 634        { 0x12, 0x00 }, /* QXGA, master */
 635
 636        /*
 637         * 11 CLKRC "Clock Rate Control"
 638         * [7] internal frequency doublers: on
 639         * [6] video port mode: master
 640         * [5:0] clock divider: 1
 641         */
 642        { 0x11, 0x80 },
 643
 644        /*
 645         * 13 COMI "Common Control I"
 646         *                  = 192 (0xC0) 11000000
 647         *    COMI[7] "AEC speed selection"
 648         *                  =   1 (0x01) 1....... "Faster AEC correction"
 649         *    COMI[6] "AEC speed step selection"
 650         *                  =   1 (0x01) .1...... "Big steps, fast"
 651         *    COMI[5] "Banding filter on off"
 652         *                  =   0 (0x00) ..0..... "Off"
 653         *    COMI[4] "Banding filter option"
 654         *                  =   0 (0x00) ...0.... "Main clock is 48 MHz and
 655         *                                         the PLL is ON"
 656         *    COMI[3] "Reserved"
 657         *                  =   0 (0x00) ....0...
 658         *    COMI[2] "AGC auto manual control selection"
 659         *                  =   0 (0x00) .....0.. "Manual"
 660         *    COMI[1] "AWB auto manual control selection"
 661         *                  =   0 (0x00) ......0. "Manual"
 662         *    COMI[0] "Exposure control"
 663         *                  =   0 (0x00) .......0 "Manual"
 664         */
 665        { 0x13, 0xc0 },
 666
 667        /*
 668         * 09 COMC "Common Control C"
 669         *                  =   8 (0x08) 00001000
 670         *    COMC[7:5] "Reserved"
 671         *                  =   0 (0x00) 000.....
 672         *    COMC[4] "Sleep Mode Enable"
 673         *                  =   0 (0x00) ...0.... "Normal mode"
 674         *    COMC[3:2] "Sensor sampling reset timing selection"
 675         *                  =   2 (0x02) ....10.. "Longer reset time"
 676         *    COMC[1:0] "Output drive current select"
 677         *                  =   0 (0x00) ......00 "Weakest"
 678         */
 679        { 0x09, 0x08 },
 680
 681        /*
 682         * 0C COMD "Common Control D"
 683         *                  =   8 (0x08) 00001000
 684         *    COMD[7] "Reserved"
 685         *                  =   0 (0x00) 0.......
 686         *    COMD[6] "Swap MSB and LSB at the output port"
 687         *                  =   0 (0x00) .0...... "False"
 688         *    COMD[5:3] "Reserved"
 689         *                  =   1 (0x01) ..001...
 690         *    COMD[2] "Output Average On Off"
 691         *                  =   0 (0x00) .....0.. "Output Normal"
 692         *    COMD[1] "Sensor precharge voltage selection"
 693         *                  =   0 (0x00) ......0. "Selects internal
 694         *                                         reference precharge
 695         *                                         voltage"
 696         *    COMD[0] "Snapshot option"
 697         *                  =   0 (0x00) .......0 "Enable live video output
 698         *                                         after snapshot sequence"
 699         */
 700        { 0x0c, 0x08 },
 701
 702        /*
 703         * 0D COME "Common Control E"
 704         *                  = 161 (0xA1) 10100001
 705         *    COME[7] "Output average option"
 706         *                  =   1 (0x01) 1....... "Output average of 4 pixels"
 707         *    COME[6] "Anti-blooming control"
 708         *                  =   0 (0x00) .0...... "Off"
 709         *    COME[5:3] "Reserved"
 710         *                  =   4 (0x04) ..100...
 711         *    COME[2] "Clock output power down pin status"
 712         *                  =   0 (0x00) .....0.. "Tri-state data output pin
 713         *                                         on power down"
 714         *    COME[1] "Data output pin status selection at power down"
 715         *                  =   0 (0x00) ......0. "Tri-state VSYNC, PCLK,
 716         *                                         HREF, and CHSYNC pins on
 717         *                                         power down"
 718         *    COME[0] "Auto zero circuit select"
 719         *                  =   1 (0x01) .......1 "On"
 720         */
 721        { 0x0d, 0xa1 },
 722
 723        /*
 724         * 0E COMF "Common Control F"
 725         *                  = 112 (0x70) 01110000
 726         *    COMF[7] "System clock selection"
 727         *                  =   0 (0x00) 0....... "Use 24 MHz system clock"
 728         *    COMF[6:4] "Reserved"
 729         *                  =   7 (0x07) .111....
 730         *    COMF[3] "Manual auto negative offset canceling selection"
 731         *                  =   0 (0x00) ....0... "Auto detect negative
 732         *                                         offset and cancel it"
 733         *    COMF[2:0] "Reserved"
 734         *                  =   0 (0x00) .....000
 735         */
 736        { 0x0e, 0x70 },
 737
 738        /*
 739         * 0F COMG "Common Control G"
 740         *                  =  66 (0x42) 01000010
 741         *    COMG[7] "Optical black output selection"
 742         *                  =   0 (0x00) 0....... "Disable"
 743         *    COMG[6] "Black level calibrate selection"
 744         *                  =   1 (0x01) .1...... "Use optical black pixels
 745         *                                         to calibrate"
 746         *    COMG[5:4] "Reserved"
 747         *                  =   0 (0x00) ..00....
 748         *    COMG[3] "Channel offset adjustment"
 749         *                  =   0 (0x00) ....0... "Disable offset adjustment"
 750         *    COMG[2] "ADC black level calibration option"
 751         *                  =   0 (0x00) .....0.. "Use B/G line and G/R
 752         *                                         line to calibrate each
 753         *                                         channel's black level"
 754         *    COMG[1] "Reserved"
 755         *                  =   1 (0x01) ......1.
 756         *    COMG[0] "ADC black level calibration enable"
 757         *                  =   0 (0x00) .......0 "Disable"
 758         */
 759        { 0x0f, 0x42 },
 760
 761        /*
 762         * 14 COMJ "Common Control J"
 763         *                  = 198 (0xC6) 11000110
 764         *    COMJ[7:6] "AGC gain ceiling"
 765         *                  =   3 (0x03) 11...... "8x"
 766         *    COMJ[5:4] "Reserved"
 767         *                  =   0 (0x00) ..00....
 768         *    COMJ[3] "Auto banding filter"
 769         *                  =   0 (0x00) ....0... "Banding filter is always
 770         *                                         on off depending on
 771         *                                         COMI[5] setting"
 772         *    COMJ[2] "VSYNC drop option"
 773         *                  =   1 (0x01) .....1.. "SYNC is dropped if frame
 774         *                                         data is dropped"
 775         *    COMJ[1] "Frame data drop"
 776         *                  =   1 (0x01) ......1. "Drop frame data if
 777         *                                         exposure is not within
 778         *                                         tolerance.  In AEC mode,
 779         *                                         data is normally dropped
 780         *                                         when data is out of
 781         *                                         range."
 782         *    COMJ[0] "Reserved"
 783         *                  =   0 (0x00) .......0
 784         */
 785        { 0x14, 0xc6 },
 786
 787        /*
 788         * 15 COMK "Common Control K"
 789         *                  =   2 (0x02) 00000010
 790         *    COMK[7] "CHSYNC pin output swap"
 791         *                  =   0 (0x00) 0....... "CHSYNC"
 792         *    COMK[6] "HREF pin output swap"
 793         *                  =   0 (0x00) .0...... "HREF"
 794         *    COMK[5] "PCLK output selection"
 795         *                  =   0 (0x00) ..0..... "PCLK always output"
 796         *    COMK[4] "PCLK edge selection"
 797         *                  =   0 (0x00) ...0.... "Data valid on falling edge"
 798         *    COMK[3] "HREF output polarity"
 799         *                  =   0 (0x00) ....0... "positive"
 800         *    COMK[2] "Reserved"
 801         *                  =   0 (0x00) .....0..
 802         *    COMK[1] "VSYNC polarity"
 803         *                  =   1 (0x01) ......1. "negative"
 804         *    COMK[0] "HSYNC polarity"
 805         *                  =   0 (0x00) .......0 "positive"
 806         */
 807        { 0x15, 0x02 },
 808
 809        /*
 810         * 33 CHLF "Current Control"
 811         *                  =   9 (0x09) 00001001
 812         *    CHLF[7:6] "Sensor current control"
 813         *                  =   0 (0x00) 00......
 814         *    CHLF[5] "Sensor current range control"
 815         *                  =   0 (0x00) ..0..... "normal range"
 816         *    CHLF[4] "Sensor current"
 817         *                  =   0 (0x00) ...0.... "normal current"
 818         *    CHLF[3] "Sensor buffer current control"
 819         *                  =   1 (0x01) ....1... "half current"
 820         *    CHLF[2] "Column buffer current control"
 821         *                  =   0 (0x00) .....0.. "normal current"
 822         *    CHLF[1] "Analog DSP current control"
 823         *                  =   0 (0x00) ......0. "normal current"
 824         *    CHLF[1] "ADC current control"
 825         *                  =   0 (0x00) ......0. "normal current"
 826         */
 827        { 0x33, 0x09 },
 828
 829        /*
 830         * 34 VBLM "Blooming Control"
 831         *                  =  80 (0x50) 01010000
 832         *    VBLM[7] "Hard soft reset switch"
 833         *                  =   0 (0x00) 0....... "Hard reset"
 834         *    VBLM[6:4] "Blooming voltage selection"
 835         *                  =   5 (0x05) .101....
 836         *    VBLM[3:0] "Sensor current control"
 837         *                  =   0 (0x00) ....0000
 838         */
 839        { 0x34, 0x50 },
 840
 841        /*
 842         * 36 VCHG "Sensor Precharge Voltage Control"
 843         *                  =   0 (0x00) 00000000
 844         *    VCHG[7] "Reserved"
 845         *                  =   0 (0x00) 0.......
 846         *    VCHG[6:4] "Sensor precharge voltage control"
 847         *                  =   0 (0x00) .000....
 848         *    VCHG[3:0] "Sensor array common reference"
 849         *                  =   0 (0x00) ....0000
 850         */
 851        { 0x36, 0x00 },
 852
 853        /*
 854         * 37 ADC "ADC Reference Control"
 855         *                  =   4 (0x04) 00000100
 856         *    ADC[7:4] "Reserved"
 857         *                  =   0 (0x00) 0000....
 858         *    ADC[3] "ADC input signal range"
 859         *                  =   0 (0x00) ....0... "Input signal 1.0x"
 860         *    ADC[2:0] "ADC range control"
 861         *                  =   4 (0x04) .....100
 862         */
 863        { 0x37, 0x04 },
 864
 865        /*
 866         * 38 ACOM "Analog Common Ground"
 867         *                  =  82 (0x52) 01010010
 868         *    ACOM[7] "Analog gain control"
 869         *                  =   0 (0x00) 0....... "Gain 1x"
 870         *    ACOM[6] "Analog black level calibration"
 871         *                  =   1 (0x01) .1...... "On"
 872         *    ACOM[5:0] "Reserved"
 873         *                  =  18 (0x12) ..010010
 874         */
 875        { 0x38, 0x52 },
 876
 877        /*
 878         * 3A FREFA "Internal Reference Adjustment"
 879         *                  =   0 (0x00) 00000000
 880         *    FREFA[7:0] "Range"
 881         *                  =   0 (0x00) 00000000
 882         */
 883        { 0x3a, 0x00 },
 884
 885        /*
 886         * 3C FVOPT "Internal Reference Adjustment"
 887         *                  =  31 (0x1F) 00011111
 888         *    FVOPT[7:0] "Range"
 889         *                  =  31 (0x1F) 00011111
 890         */
 891        { 0x3c, 0x1f },
 892
 893        /*
 894         * 44 Undocumented  =   0 (0x00) 00000000
 895         *    44[7:0] "It's a secret"
 896         *                  =   0 (0x00) 00000000
 897         */
 898        { 0x44, 0x00 },
 899
 900        /*
 901         * 40 Undocumented  =   0 (0x00) 00000000
 902         *    40[7:0] "It's a secret"
 903         *                  =   0 (0x00) 00000000
 904         */
 905        { 0x40, 0x00 },
 906
 907        /*
 908         * 41 Undocumented  =   0 (0x00) 00000000
 909         *    41[7:0] "It's a secret"
 910         *                  =   0 (0x00) 00000000
 911         */
 912        { 0x41, 0x00 },
 913
 914        /*
 915         * 42 Undocumented  =   0 (0x00) 00000000
 916         *    42[7:0] "It's a secret"
 917         *                  =   0 (0x00) 00000000
 918         */
 919        { 0x42, 0x00 },
 920
 921        /*
 922         * 43 Undocumented  =   0 (0x00) 00000000
 923         *    43[7:0] "It's a secret"
 924         *                  =   0 (0x00) 00000000
 925         */
 926        { 0x43, 0x00 },
 927
 928        /*
 929         * 45 Undocumented  = 128 (0x80) 10000000
 930         *    45[7:0] "It's a secret"
 931         *                  = 128 (0x80) 10000000
 932         */
 933        { 0x45, 0x80 },
 934
 935        /*
 936         * 48 Undocumented  = 192 (0xC0) 11000000
 937         *    48[7:0] "It's a secret"
 938         *                  = 192 (0xC0) 11000000
 939         */
 940        { 0x48, 0xc0 },
 941
 942        /*
 943         * 49 Undocumented  =  25 (0x19) 00011001
 944         *    49[7:0] "It's a secret"
 945         *                  =  25 (0x19) 00011001
 946         */
 947        { 0x49, 0x19 },
 948
 949        /*
 950         * 4B Undocumented  = 128 (0x80) 10000000
 951         *    4B[7:0] "It's a secret"
 952         *                  = 128 (0x80) 10000000
 953         */
 954        { 0x4b, 0x80 },
 955
 956        /*
 957         * 4D Undocumented  = 196 (0xC4) 11000100
 958         *    4D[7:0] "It's a secret"
 959         *                  = 196 (0xC4) 11000100
 960         */
 961        { 0x4d, 0xc4 },
 962
 963        /*
 964         * 35 VREF "Reference Voltage Control"
 965         *                  =  76 (0x4c) 01001100
 966         *    VREF[7:5] "Column high reference control"
 967         *                  =   2 (0x02) 010..... "higher voltage"
 968         *    VREF[4:2] "Column low reference control"
 969         *                  =   3 (0x03) ...011.. "Highest voltage"
 970         *    VREF[1:0] "Reserved"
 971         *                  =   0 (0x00) ......00
 972         */
 973        { 0x35, 0x4c },
 974
 975        /*
 976         * 3D Undocumented  =   0 (0x00) 00000000
 977         *    3D[7:0] "It's a secret"
 978         *                  =   0 (0x00) 00000000
 979         */
 980        { 0x3d, 0x00 },
 981
 982        /*
 983         * 3E Undocumented  =   0 (0x00) 00000000
 984         *    3E[7:0] "It's a secret"
 985         *                  =   0 (0x00) 00000000
 986         */
 987        { 0x3e, 0x00 },
 988
 989        /*
 990         * 3B FREFB "Internal Reference Adjustment"
 991         *                  =  24 (0x18) 00011000
 992         *    FREFB[7:0] "Range"
 993         *                  =  24 (0x18) 00011000
 994         */
 995        { 0x3b, 0x18 },
 996
 997        /*
 998         * 33 CHLF "Current Control"
 999         *                  =  25 (0x19) 00011001
1000         *    CHLF[7:6] "Sensor current control"

1001         *                  =   0 (0x00) 00......
1002         *    CHLF[5] "Sensor current range control"
1003         *                  =   0 (0x00) ..0..... "normal range"
1004         *    CHLF[4] "Sensor current"
1005         *                  =   1 (0x01) ...1.... "double current"
1006         *    CHLF[3] "Sensor buffer current control"
1007         *                  =   1 (0x01) ....1... "half current"
1008         *    CHLF[2] "Column buffer current control"
1009         *                  =   0 (0x00) .....0.. "normal current"
1010         *    CHLF[1] "Analog DSP current control"
1011         *                  =   0 (0x00) ......0. "normal current"
1012         *    CHLF[1] "ADC current control"
1013         *                  =   0 (0x00) ......0. "normal current"
1014         */
1015        { 0x33, 0x19 },
1016
1017        /*
1018         * 34 VBLM "Blooming Control"
1019         *                  =  90 (0x5A) 01011010
1020         *    VBLM[7] "Hard soft reset switch"
1021         *                  =   0 (0x00) 0....... "Hard reset"
1022         *    VBLM[6:4] "Blooming voltage selection"
1023         *                  =   5 (0x05) .101....
1024         *    VBLM[3:0] "Sensor current control"
1025         *                  =  10 (0x0A) ....1010
1026         */
1027        { 0x34, 0x5a },
1028
1029        /*
1030         * 3B FREFB "Internal Reference Adjustment"
1031         *                  =   0 (0x00) 00000000
1032         *    FREFB[7:0] "Range"
1033         *                  =   0 (0x00) 00000000
1034         */
1035        { 0x3b, 0x00 },
1036
1037        /*
1038         * 33 CHLF "Current Control"
1039         *                  =   9 (0x09) 00001001
1040         *    CHLF[7:6] "Sensor current control"
1041         *                  =   0 (0x00) 00......
1042         *    CHLF[5] "Sensor current range control"
1043         *                  =   0 (0x00) ..0..... "normal range"
1044         *    CHLF[4] "Sensor current"
1045         *                  =   0 (0x00) ...0.... "normal current"
1046         *    CHLF[3] "Sensor buffer current control"
1047         *                  =   1 (0x01) ....1... "half current"
1048         *    CHLF[2] "Column buffer current control"
1049         *                  =   0 (0x00) .....0.. "normal current"
1050         *    CHLF[1] "Analog DSP current control"
1051         *                  =   0 (0x00) ......0. "normal current"
1052         *    CHLF[1] "ADC current control"
1053         *                  =   0 (0x00) ......0. "normal current"
1054         */
1055        { 0x33, 0x09 },
1056
1057        /*
1058         * 34 VBLM "Blooming Control"
1059         *                  =  80 (0x50) 01010000
1060         *    VBLM[7] "Hard soft reset switch"
1061         *                  =   0 (0x00) 0....... "Hard reset"
1062         *    VBLM[6:4] "Blooming voltage selection"
1063         *                  =   5 (0x05) .101....
1064         *    VBLM[3:0] "Sensor current control"
1065         *                  =   0 (0x00) ....0000
1066         */
1067        { 0x34, 0x50 },
1068
1069        /*
1070         * 12 COMH "Common Control H"
1071         *                  =  64 (0x40) 01000000
1072         *    COMH[7] "SRST"
1073         *                  =   0 (0x00) 0....... "No-op"
1074         *    COMH[6:4] "Resolution selection"
1075         *                  =   4 (0x04) .100.... "XGA"
1076         *    COMH[3] "Master slave selection"
1077         *                  =   0 (0x00) ....0... "Master mode"
1078         *    COMH[2] "Internal B/R channel option"
1079         *                  =   0 (0x00) .....0.. "B/R use same channel"
1080         *    COMH[1] "Color bar test pattern"
1081         *                  =   0 (0x00) ......0. "Off"
1082         *    COMH[0] "Reserved"
1083         *                  =   0 (0x00) .......0
1084         */
1085        { 0x12, 0x40 },
1086
1087        /*
1088         * 17 HREFST "Horizontal window start"
1089         *                  =  31 (0x1F) 00011111
1090         *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1091         *                  =  31 (0x1F) 00011111
1092         */
1093        { 0x17, 0x1f },
1094
1095        /*
1096         * 18 HREFEND "Horizontal window end"
1097         *                  =  95 (0x5F) 01011111
1098         *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1099         *                  =  95 (0x5F) 01011111
1100         */
1101        { 0x18, 0x5f },
1102
1103        /*
1104         * 19 VSTRT "Vertical window start"
1105         *                  =   0 (0x00) 00000000
1106         *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1107         *                  =   0 (0x00) 00000000
1108         */
1109        { 0x19, 0x00 },
1110
1111        /*
1112         * 1A VEND "Vertical window end"
1113         *                  =  96 (0x60) 01100000
1114         *    VEND[7:0] "Vertical Window End, 8 MSBs"
1115         *                  =  96 (0x60) 01100000
1116         */
1117        { 0x1a, 0x60 },
1118
1119        /*
1120         * 32 COMM "Common Control M"
1121         *                  =  18 (0x12) 00010010
1122         *    COMM[7:6] "Pixel clock divide option"
1123         *                  =   0 (0x00) 00...... "/1"
1124         *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1125         *                  =   2 (0x02) ..010...
1126         *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1127         *                  =   2 (0x02) .....010
1128         */
1129        { 0x32, 0x12 },
1130
1131        /*
1132         * 03 COMA "Common Control A"
1133         *                  =  74 (0x4A) 01001010
1134         *    COMA[7:4] "AWB Update Threshold"
1135         *                  =   4 (0x04) 0100....
1136         *    COMA[3:2] "Vertical window end line control 2 LSBs"
1137         *                  =   2 (0x02) ....10..
1138         *    COMA[1:0] "Vertical window start line control 2 LSBs"
1139         *                  =   2 (0x02) ......10
1140         */
1141        { 0x03, 0x4a },
1142
1143        /*
1144         * 11 CLKRC "Clock Rate Control"
1145         *                  = 128 (0x80) 10000000
1146         *    CLKRC[7] "Internal frequency doublers on off seclection"
1147         *                  =   1 (0x01) 1....... "On"
1148         *    CLKRC[6] "Digital video master slave selection"
1149         *                  =   0 (0x00) .0...... "Master mode, sensor
1150         *                                         provides PCLK"
1151         *    CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1152         *                  =   0 (0x00) ..000000
1153         */
1154        { 0x11, 0x80 },
1155
1156        /*
1157         * 12 COMH "Common Control H"
1158         *                  =   0 (0x00) 00000000
1159         *    COMH[7] "SRST"
1160         *                  =   0 (0x00) 0....... "No-op"
1161         *    COMH[6:4] "Resolution selection"
1162         *                  =   0 (0x00) .000.... "QXGA"
1163         *    COMH[3] "Master slave selection"
1164         *                  =   0 (0x00) ....0... "Master mode"
1165         *    COMH[2] "Internal B/R channel option"
1166         *                  =   0 (0x00) .....0.. "B/R use same channel"
1167         *    COMH[1] "Color bar test pattern"
1168         *                  =   0 (0x00) ......0. "Off"
1169         *    COMH[0] "Reserved"
1170         *                  =   0 (0x00) .......0
1171         */
1172        { 0x12, 0x00 },
1173
1174        /*
1175         * 12 COMH "Common Control H"
1176         *                  =  64 (0x40) 01000000
1177         *    COMH[7] "SRST"
1178         *                  =   0 (0x00) 0....... "No-op"
1179         *    COMH[6:4] "Resolution selection"
1180         *                  =   4 (0x04) .100.... "XGA"
1181         *    COMH[3] "Master slave selection"
1182         *                  =   0 (0x00) ....0... "Master mode"
1183         *    COMH[2] "Internal B/R channel option"
1184         *                  =   0 (0x00) .....0.. "B/R use same channel"
1185         *    COMH[1] "Color bar test pattern"
1186         *                  =   0 (0x00) ......0. "Off"
1187         *    COMH[0] "Reserved"
1188         *                  =   0 (0x00) .......0
1189         */
1190        { 0x12, 0x40 },
1191
1192        /*
1193         * 17 HREFST "Horizontal window start"
1194         *                  =  31 (0x1F) 00011111
1195         *    HREFST[7:0] "Horizontal window start, 8 MSBs"
1196         *                  =  31 (0x1F) 00011111
1197         */
1198        { 0x17, 0x1f },
1199
1200        /*
1201         * 18 HREFEND "Horizontal window end"
1202         *                  =  95 (0x5F) 01011111
1203         *    HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1204         *                  =  95 (0x5F) 01011111
1205         */
1206        { 0x18, 0x5f },
1207
1208        /*
1209         * 19 VSTRT "Vertical window start"
1210         *                  =   0 (0x00) 00000000
1211         *    VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1212         *                  =   0 (0x00) 00000000
1213         */
1214        { 0x19, 0x00 },
1215
1216        /*
1217         * 1A VEND "Vertical window end"
1218         *                  =  96 (0x60) 01100000
1219         *    VEND[7:0] "Vertical Window End, 8 MSBs"
1220         *                  =  96 (0x60) 01100000
1221         */
1222        { 0x1a, 0x60 },
1223
1224        /*
1225         * 32 COMM "Common Control M"
1226         *                  =  18 (0x12) 00010010
1227         *    COMM[7:6] "Pixel clock divide option"
1228         *                  =   0 (0x00) 00...... "/1"
1229         *    COMM[5:3] "Horizontal window end position, 3 LSBs"
1230         *                  =   2 (0x02) ..010...
1231         *    COMM[2:0] "Horizontal window start position, 3 LSBs"
1232         *                  =   2 (0x02) .....010
1233         */
1234        { 0x32, 0x12 },
1235
1236        /*
1237         * 03 COMA "Common Control A"
1238         *                  =  74 (0x4A) 01001010
1239         *    COMA[7:4] "AWB Update Threshold"
1240         *                  =   4 (0x04) 0100....
1241         *    COMA[3:2] "Vertical window end line control 2 LSBs"
1242         *                  =   2 (0x02) ....10..
1243         *    COMA[1:0] "Vertical window start line control 2 LSBs"
1244         *                  =   2 (0x02) ......10
1245         */
1246        { 0x03, 0x4a },
1247
1248        /*
1249         * 02 RED "Red Gain Control"
1250         *                  = 175 (0xAF) 10101111
1251         *    RED[7] "Action"
1252         *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1253         *    RED[6:0] "Value"
1254         *                  =  47 (0x2F) .0101111
1255         */
1256        { 0x02, 0xaf },
1257
1258        /*
1259         * 2D ADDVSL "VSYNC Pulse Width"
1260         *                  = 210 (0xD2) 11010010
1261         *    ADDVSL[7:0] "VSYNC pulse width, LSB"
1262         *                  = 210 (0xD2) 11010010
1263         */
1264        { 0x2d, 0xd2 },
1265
1266        /*
1267         * 00 GAIN          =  24 (0x18) 00011000
1268         *    GAIN[7:6] "Reserved"
1269         *                  =   0 (0x00) 00......
1270         *    GAIN[5] "Double"
1271         *                  =   0 (0x00) ..0..... "False"
1272         *    GAIN[4] "Double"
1273         *                  =   1 (0x01) ...1.... "True"
1274         *    GAIN[3:0] "Range"
1275         *                  =   8 (0x08) ....1000
1276         */
1277        { 0x00, 0x18 },
1278
1279        /*
1280         * 01 BLUE "Blue Gain Control"
1281         *                  = 240 (0xF0) 11110000
1282         *    BLUE[7] "Action"
1283         *                  =   1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1284         *    BLUE[6:0] "Value"
1285         *                  = 112 (0x70) .1110000
1286         */
1287        { 0x01, 0xf0 },
1288
1289        /*
1290         * 10 AEC "Automatic Exposure Control"
1291         *                  =  10 (0x0A) 00001010
1292         *    AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1293         *                  =  10 (0x0A) 00001010
1294         */
1295        { 0x10, 0x0a },
1296
1297        { 0xe1, 0x67 },
1298        { 0xe3, 0x03 },
1299        { 0xe4, 0x26 },
1300        { 0xe5, 0x3e },
1301        { 0xf8, 0x01 },
1302        { 0xff, 0x01 },
1303};
1304
1305static const struct ov_i2c_regvals norm_6x20[] = {
1306        { 0x12, 0x80 }, /* reset */
1307        { 0x11, 0x01 },
1308        { 0x03, 0x60 },
1309        { 0x05, 0x7f }, /* For when autoadjust is off */
1310        { 0x07, 0xa8 },
1311        /* The ratio of 0x0c and 0x0d controls the white point */
1312        { 0x0c, 0x24 },
1313        { 0x0d, 0x24 },
1314        { 0x0f, 0x15 }, /* COMS */
1315        { 0x10, 0x75 }, /* AEC Exposure time */
1316        { 0x12, 0x24 }, /* Enable AGC */
1317        { 0x14, 0x04 },
1318        /* 0x16: 0x06 helps frame stability with moving objects */
1319        { 0x16, 0x06 },
1320/*      { 0x20, 0x30 },  * Aperture correction enable */
1321        { 0x26, 0xb2 }, /* BLC enable */
1322        /* 0x28: 0x05 Selects RGB format if RGB on */
1323        { 0x28, 0x05 },
1324        { 0x2a, 0x04 }, /* Disable framerate adjust */
1325/*      { 0x2b, 0xac },  * Framerate; Set 2a[7] first */
1326        { 0x2d, 0x85 },
1327        { 0x33, 0xa0 }, /* Color Processing Parameter */
1328        { 0x34, 0xd2 }, /* Max A/D range */
1329        { 0x38, 0x8b },
1330        { 0x39, 0x40 },
1331
1332        { 0x3c, 0x39 }, /* Enable AEC mode changing */
1333        { 0x3c, 0x3c }, /* Change AEC mode */
1334        { 0x3c, 0x24 }, /* Disable AEC mode changing */
1335
1336        { 0x3d, 0x80 },
1337        /* These next two registers (0x4a, 0x4b) are undocumented.
1338         * They control the color balance */
1339        { 0x4a, 0x80 },
1340        { 0x4b, 0x80 },
1341        { 0x4d, 0xd2 }, /* This reduces noise a bit */
1342        { 0x4e, 0xc1 },
1343        { 0x4f, 0x04 },
1344/* Do 50-53 have any effect? */
1345/* Toggle 0x12[2] off and on here? */
1346};
1347
1348static const struct ov_i2c_regvals norm_6x30[] = {
1349        { 0x12, 0x80 }, /* Reset */
1350        { 0x00, 0x1f }, /* Gain */
1351        { 0x01, 0x99 }, /* Blue gain */
1352        { 0x02, 0x7c }, /* Red gain */
1353        { 0x03, 0xc0 }, /* Saturation */
1354        { 0x05, 0x0a }, /* Contrast */
1355        { 0x06, 0x95 }, /* Brightness */
1356        { 0x07, 0x2d }, /* Sharpness */
1357        { 0x0c, 0x20 },
1358        { 0x0d, 0x20 },
1359        { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1360        { 0x0f, 0x05 },
1361        { 0x10, 0x9a },
1362        { 0x11, 0x00 }, /* Pixel clock = fastest */
1363        { 0x12, 0x24 }, /* Enable AGC and AWB */
1364        { 0x13, 0x21 },
1365        { 0x14, 0x80 },
1366        { 0x15, 0x01 },
1367        { 0x16, 0x03 },
1368        { 0x17, 0x38 },
1369        { 0x18, 0xea },
1370        { 0x19, 0x04 },
1371        { 0x1a, 0x93 },
1372        { 0x1b, 0x00 },
1373        { 0x1e, 0xc4 },
1374        { 0x1f, 0x04 },
1375        { 0x20, 0x20 },
1376        { 0x21, 0x10 },
1377        { 0x22, 0x88 },
1378        { 0x23, 0xc0 }, /* Crystal circuit power level */
1379        { 0x25, 0x9a }, /* Increase AEC black ratio */
1380        { 0x26, 0xb2 }, /* BLC enable */
1381        { 0x27, 0xa2 },
1382        { 0x28, 0x00 },
1383        { 0x29, 0x00 },
1384        { 0x2a, 0x84 }, /* 60 Hz power */
1385        { 0x2b, 0xa8 }, /* 60 Hz power */
1386        { 0x2c, 0xa0 },
1387        { 0x2d, 0x95 }, /* Enable auto-brightness */
1388        { 0x2e, 0x88 },
1389        { 0x33, 0x26 },
1390        { 0x34, 0x03 },
1391        { 0x36, 0x8f },
1392        { 0x37, 0x80 },
1393        { 0x38, 0x83 },
1394        { 0x39, 0x80 },
1395        { 0x3a, 0x0f },
1396        { 0x3b, 0x3c },
1397        { 0x3c, 0x1a },
1398        { 0x3d, 0x80 },
1399        { 0x3e, 0x80 },
1400        { 0x3f, 0x0e },
1401        { 0x40, 0x00 }, /* White bal */
1402        { 0x41, 0x00 }, /* White bal */
1403        { 0x42, 0x80 },
1404        { 0x43, 0x3f }, /* White bal */
1405        { 0x44, 0x80 },
1406        { 0x45, 0x20 },
1407        { 0x46, 0x20 },
1408        { 0x47, 0x80 },
1409        { 0x48, 0x7f },
1410        { 0x49, 0x00 },
1411        { 0x4a, 0x00 },
1412        { 0x4b, 0x80 },
1413        { 0x4c, 0xd0 },
1414        { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1415        { 0x4e, 0x40 },
1416        { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1417        { 0x50, 0xff },
1418        { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1419        { 0x55, 0xff },
1420        { 0x56, 0x12 },
1421        { 0x57, 0x81 },
1422        { 0x58, 0x75 },
1423        { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1424        { 0x5a, 0x2c },
1425        { 0x5b, 0x0f }, /* AWB chrominance levels */
1426        { 0x5c, 0x10 },
1427        { 0x3d, 0x80 },
1428        { 0x27, 0xa6 },
1429        { 0x12, 0x20 }, /* Toggle AWB */
1430        { 0x12, 0x24 },
1431};
1432
1433/* Lawrence Glaister <lg@jfm.bc.ca> reports:
1434 *
1435 * Register 0x0f in the 7610 has the following effects:
1436 *
1437 * 0x85 (AEC method 1): Best overall, good contrast range
1438 * 0x45 (AEC method 2): Very overexposed
1439 * 0xa5 (spec sheet default): Ok, but the black level is
1440 *      shifted resulting in loss of contrast
1441 * 0x05 (old driver setting): very overexposed, too much
1442 *      contrast
1443 */
1444static const struct ov_i2c_regvals norm_7610[] = {
1445        { 0x10, 0xff },
1446        { 0x16, 0x06 },
1447        { 0x28, 0x24 },
1448        { 0x2b, 0xac },
1449        { 0x12, 0x00 },
1450        { 0x38, 0x81 },
1451        { 0x28, 0x24 }, /* 0c */
1452        { 0x0f, 0x85 }, /* lg's setting */
1453        { 0x15, 0x01 },
1454        { 0x20, 0x1c },
1455        { 0x23, 0x2a },
1456        { 0x24, 0x10 },
1457        { 0x25, 0x8a },
1458        { 0x26, 0xa2 },
1459        { 0x27, 0xc2 },
1460        { 0x2a, 0x04 },
1461        { 0x2c, 0xfe },
1462        { 0x2d, 0x93 },
1463        { 0x30, 0x71 },
1464        { 0x31, 0x60 },
1465        { 0x32, 0x26 },
1466        { 0x33, 0x20 },
1467        { 0x34, 0x48 },
1468        { 0x12, 0x24 },
1469        { 0x11, 0x01 },
1470        { 0x0c, 0x24 },
1471        { 0x0d, 0x24 },
1472};
1473
1474static const struct ov_i2c_regvals norm_7620[] = {
1475        { 0x12, 0x80 },         /* reset */
1476        { 0x00, 0x00 },         /* gain */
1477        { 0x01, 0x80 },         /* blue gain */
1478        { 0x02, 0x80 },         /* red gain */
1479        { 0x03, 0xc0 },         /* OV7670_R03_VREF */
1480        { 0x06, 0x60 },
1481        { 0x07, 0x00 },
1482        { 0x0c, 0x24 },
1483        { 0x0c, 0x24 },
1484        { 0x0d, 0x24 },
1485        { 0x11, 0x01 },
1486        { 0x12, 0x24 },
1487        { 0x13, 0x01 },
1488        { 0x14, 0x84 },
1489        { 0x15, 0x01 },
1490        { 0x16, 0x03 },
1491        { 0x17, 0x2f },
1492        { 0x18, 0xcf },
1493        { 0x19, 0x06 },
1494        { 0x1a, 0xf5 },
1495        { 0x1b, 0x00 },
1496        { 0x20, 0x18 },
1497        { 0x21, 0x80 },
1498        { 0x22, 0x80 },
1499        { 0x23, 0x00 },
1500        { 0x26, 0xa2 },
1501        { 0x27, 0xea },
1502        { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1503        { 0x29, 0x00 },
1504        { 0x2a, 0x10 },
1505        { 0x2b, 0x00 },
1506        { 0x2c, 0x88 },
1507        { 0x2d, 0x91 },
1508        { 0x2e, 0x80 },
1509        { 0x2f, 0x44 },
1510        { 0x60, 0x27 },
1511        { 0x61, 0x02 },
1512        { 0x62, 0x5f },
1513        { 0x63, 0xd5 },
1514        { 0x64, 0x57 },
1515        { 0x65, 0x83 },
1516        { 0x66, 0x55 },
1517        { 0x67, 0x92 },
1518        { 0x68, 0xcf },
1519        { 0x69, 0x76 },
1520        { 0x6a, 0x22 },
1521        { 0x6b, 0x00 },
1522        { 0x6c, 0x02 },
1523        { 0x6d, 0x44 },
1524        { 0x6e, 0x80 },
1525        { 0x6f, 0x1d },
1526        { 0x70, 0x8b },
1527        { 0x71, 0x00 },
1528        { 0x72, 0x14 },
1529        { 0x73, 0x54 },
1530        { 0x74, 0x00 },
1531        { 0x75, 0x8e },
1532        { 0x76, 0x00 },
1533        { 0x77, 0xff },
1534        { 0x78, 0x80 },
1535        { 0x79, 0x80 },
1536        { 0x7a, 0x80 },
1537        { 0x7b, 0xe2 },
1538        { 0x7c, 0x00 },
1539};
1540
1541/* 7640 and 7648. The defaults should be OK for most registers. */
1542static const struct ov_i2c_regvals norm_7640[] = {
1543        { 0x12, 0x80 },
1544        { 0x12, 0x14 },
1545};
1546
1547static const struct ov_regvals init_519_ov7660[] = {
1548        { 0x5d, 0x03 }, /* Turn off suspend mode */
1549        { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1550        { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1551        { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1552        { 0xa3, 0x18 },
1553        { 0xa4, 0x04 },
1554        { 0xa5, 0x28 },
1555        { 0x37, 0x00 }, /* SetUsbInit */
1556        { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1557        /* Enable both fields, YUV Input, disable defect comp (why?) */
1558        { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1559        { 0x21, 0x38 },
1560        { 0x22, 0x1d },
1561        { 0x17, 0x50 }, /* undocumented */
1562        { 0x37, 0x00 }, /* undocumented */
1563        { 0x40, 0xff }, /* I2C timeout counter */
1564        { 0x46, 0x00 }, /* I2C clock prescaler */
1565};
1566static const struct ov_i2c_regvals norm_7660[] = {
1567        {OV7670_R12_COM7, OV7670_COM7_RESET},
1568        {OV7670_R11_CLKRC, 0x81},
1569        {0x92, 0x00},                   /* DM_LNL */
1570        {0x93, 0x00},                   /* DM_LNH */
1571        {0x9d, 0x4c},                   /* BD50ST */
1572        {0x9e, 0x3f},                   /* BD60ST */
1573        {OV7670_R3B_COM11, 0x02},
1574        {OV7670_R13_COM8, 0xf5},
1575        {OV7670_R10_AECH, 0x00},
1576        {OV7670_R00_GAIN, 0x00},
1577        {OV7670_R01_BLUE, 0x7c},
1578        {OV7670_R02_RED, 0x9d},
1579        {OV7670_R12_COM7, 0x00},
1580        {OV7670_R04_COM1, 00},
1581        {OV7670_R18_HSTOP, 0x01},
1582        {OV7670_R17_HSTART, 0x13},
1583        {OV7670_R32_HREF, 0x92},
1584        {OV7670_R19_VSTART, 0x02},
1585        {OV7670_R1A_VSTOP, 0x7a},
1586        {OV7670_R03_VREF, 0x00},
1587        {OV7670_R0E_COM5, 0x04},
1588        {OV7670_R0F_COM6, 0x62},
1589        {OV7670_R15_COM10, 0x00},
1590        {0x16, 0x02},                   /* RSVD */
1591        {0x1b, 0x00},                   /* PSHFT */
1592        {OV7670_R1E_MVFP, 0x01},
1593        {0x29, 0x3c},                   /* RSVD */
1594        {0x33, 0x00},                   /* CHLF */
1595        {0x34, 0x07},                   /* ARBLM */
1596        {0x35, 0x84},                   /* RSVD */
1597        {0x36, 0x00},                   /* RSVD */
1598        {0x37, 0x04},                   /* ADC */
1599        {0x39, 0x43},                   /* OFON */
1600        {OV7670_R3A_TSLB, 0x00},
1601        {OV7670_R3C_COM12, 0x6c},
1602        {OV7670_R3D_COM13, 0x98},
1603        {OV7670_R3F_EDGE, 0x23},
1604        {OV7670_R40_COM15, 0xc1},
1605        {OV7670_R41_COM16, 0x22},
1606        {0x6b, 0x0a},                   /* DBLV */
1607        {0xa1, 0x08},                   /* RSVD */
1608        {0x69, 0x80},                   /* HV */
1609        {0x43, 0xf0},                   /* RSVD.. */
1610        {0x44, 0x10},
1611        {0x45, 0x78},
1612        {0x46, 0xa8},
1613        {0x47, 0x60},
1614        {0x48, 0x80},
1615        {0x59, 0xba},
1616        {0x5a, 0x9a},
1617        {0x5b, 0x22},
1618        {0x5c, 0xb9},
1619        {0x5d, 0x9b},
1620        {0x5e, 0x10},
1621        {0x5f, 0xe0},
1622        {0x60, 0x85},
1623        {0x61, 0x60},
1624        {0x9f, 0x9d},                   /* RSVD */
1625        {0xa0, 0xa0},                   /* DSPC2 */
1626        {0x4f, 0x60},                   /* matrix */
1627        {0x50, 0x64},
1628        {0x51, 0x04},
1629        {0x52, 0x18},
1630        {0x53, 0x3c},
1631        {0x54, 0x54},
1632        {0x55, 0x40},
1633        {0x56, 0x40},
1634        {0x57, 0x40},
1635        {0x58, 0x0d},                   /* matrix sign */
1636        {0x8b, 0xcc},                   /* RSVD */
1637        {0x8c, 0xcc},
1638        {0x8d, 0xcf},
1639        {0x6c, 0x40},                   /* gamma curve */
1640        {0x6d, 0xe0},
1641        {0x6e, 0xa0},
1642        {0x6f, 0x80},
1643        {0x70, 0x70},
1644        {0x71, 0x80},
1645        {0x72, 0x60},
1646        {0x73, 0x60},
1647        {0x74, 0x50},
1648        {0x75, 0x40},
1649        {0x76, 0x38},
1650        {0x77, 0x3c},
1651        {0x78, 0x32},
1652        {0x79, 0x1a},
1653        {0x7a, 0x28},
1654        {0x7b, 0x24},
1655        {0x7c, 0x04},                   /* gamma curve */
1656        {0x7d, 0x12},
1657        {0x7e, 0x26},
1658        {0x7f, 0x46},
1659        {0x80, 0x54},
1660        {0x81, 0x64},
1661        {0x82, 0x70},
1662        {0x83, 0x7c},
1663        {0x84, 0x86},
1664        {0x85, 0x8e},
1665        {0x86, 0x9c},
1666        {0x87, 0xab},
1667        {0x88, 0xc4},
1668        {0x89, 0xd1},
1669        {0x8a, 0xe5},
1670        {OV7670_R14_COM9, 0x1e},
1671        {OV7670_R24_AEW, 0x80},
1672        {OV7670_R25_AEB, 0x72},
1673        {OV7670_R26_VPT, 0xb3},
1674        {0x62, 0x80},                   /* LCC1 */
1675        {0x63, 0x80},                   /* LCC2 */
1676        {0x64, 0x06},                   /* LCC3 */
1677        {0x65, 0x00},                   /* LCC4 */
1678        {0x66, 0x01},                   /* LCC5 */
1679        {0x94, 0x0e},                   /* RSVD.. */
1680        {0x95, 0x14},
1681        {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1682                        | OV7670_COM8_AECSTEP
1683                        | OV7670_COM8_BFILT
1684                        | 0x10
1685                        | OV7670_COM8_AGC
1686                        | OV7670_COM8_AWB
1687                        | OV7670_COM8_AEC},
1688        {0xa1, 0xc8}
1689};
1690static const struct ov_i2c_regvals norm_9600[] = {
1691        {0x12, 0x80},
1692        {0x0c, 0x28},
1693        {0x11, 0x80},
1694        {0x13, 0xb5},
1695        {0x14, 0x3e},
1696        {0x1b, 0x04},
1697        {0x24, 0xb0},
1698        {0x25, 0x90},
1699        {0x26, 0x94},
1700        {0x35, 0x90},
1701        {0x37, 0x07},
1702        {0x38, 0x08},
1703        {0x01, 0x8e},
1704        {0x02, 0x85}
1705};
1706
1707/* 7670. Defaults taken from OmniVision provided data,
1708*  as provided by Jonathan Corbet of OLPC               */
1709static const struct ov_i2c_regvals norm_7670[] = {
1710        { OV7670_R12_COM7, OV7670_COM7_RESET },
1711        { OV7670_R3A_TSLB, 0x04 },              /* OV */
1712        { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1713        { OV7670_R11_CLKRC, 0x01 },
1714/*
1715 * Set the hardware window.  These values from OV don't entirely
1716 * make sense - hstop is less than hstart.  But they work...
1717 */
1718        { OV7670_R17_HSTART, 0x13 },
1719        { OV7670_R18_HSTOP, 0x01 },
1720        { OV7670_R32_HREF, 0xb6 },
1721        { OV7670_R19_VSTART, 0x02 },
1722        { OV7670_R1A_VSTOP, 0x7a },
1723        { OV7670_R03_VREF, 0x0a },
1724
1725        { OV7670_R0C_COM3, 0x00 },
1726        { OV7670_R3E_COM14, 0x00 },
1727/* Mystery scaling numbers */
1728        { 0x70, 0x3a },
1729        { 0x71, 0x35 },
1730        { 0x72, 0x11 },
1731        { 0x73, 0xf0 },
1732        { 0xa2, 0x02 },
1733/*      { OV7670_R15_COM10, 0x0 }, */
1734
1735/* Gamma curve values */
1736        { 0x7a, 0x20 },
1737        { 0x7b, 0x10 },
1738        { 0x7c, 0x1e },
1739        { 0x7d, 0x35 },
1740        { 0x7e, 0x5a },
1741        { 0x7f, 0x69 },
1742        { 0x80, 0x76 },
1743        { 0x81, 0x80 },
1744        { 0x82, 0x88 },
1745        { 0x83, 0x8f },
1746        { 0x84, 0x96 },
1747        { 0x85, 0xa3 },
1748        { 0x86, 0xaf },
1749        { 0x87, 0xc4 },
1750        { 0x88, 0xd7 },
1751        { 0x89, 0xe8 },
1752
1753/* AGC and AEC parameters.  Note we start by disabling those features,
1754   then turn them only after tweaking the values. */
1755        { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1756                         | OV7670_COM8_AECSTEP
1757                         | OV7670_COM8_BFILT },
1758        { OV7670_R00_GAIN, 0x00 },
1759        { OV7670_R10_AECH, 0x00 },
1760        { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1761        { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1762        { OV7670_RA5_BD50MAX, 0x05 },
1763        { OV7670_RAB_BD60MAX, 0x07 },
1764        { OV7670_R24_AEW, 0x95 },
1765        { OV7670_R25_AEB, 0x33 },
1766        { OV7670_R26_VPT, 0xe3 },
1767        { OV7670_R9F_HAECC1, 0x78 },
1768        { OV7670_RA0_HAECC2, 0x68 },
1769        { 0xa1, 0x03 }, /* magic */
1770        { OV7670_RA6_HAECC3, 0xd8 },
1771        { OV7670_RA7_HAECC4, 0xd8 },
1772        { OV7670_RA8_HAECC5, 0xf0 },
1773        { OV7670_RA9_HAECC6, 0x90 },
1774        { OV7670_RAA_HAECC7, 0x94 },
1775        { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1776                        | OV7670_COM8_AECSTEP
1777                        | OV7670_COM8_BFILT
1778                        | OV7670_COM8_AGC
1779                        | OV7670_COM8_AEC },
1780
1781/* Almost all of these are magic "reserved" values.  */
1782        { OV7670_R0E_COM5, 0x61 },
1783        { OV7670_R0F_COM6, 0x4b },
1784        { 0x16, 0x02 },
1785        { OV7670_R1E_MVFP, 0x07 },
1786        { 0x21, 0x02 },
1787        { 0x22, 0x91 },
1788        { 0x29, 0x07 },
1789        { 0x33, 0x0b },
1790        { 0x35, 0x0b },
1791        { 0x37, 0x1d },
1792        { 0x38, 0x71 },
1793        { 0x39, 0x2a },
1794        { OV7670_R3C_COM12, 0x78 },
1795        { 0x4d, 0x40 },
1796        { 0x4e, 0x20 },
1797        { OV7670_R69_GFIX, 0x00 },
1798        { 0x6b, 0x4a },
1799        { 0x74, 0x10 },
1800        { 0x8d, 0x4f },
1801        { 0x8e, 0x00 },
1802        { 0x8f, 0x00 },
1803        { 0x90, 0x00 },
1804        { 0x91, 0x00 },
1805        { 0x96, 0x00 },
1806        { 0x9a, 0x00 },
1807        { 0xb0, 0x84 },
1808        { 0xb1, 0x0c },
1809        { 0xb2, 0x0e },
1810        { 0xb3, 0x82 },
1811        { 0xb8, 0x0a },
1812
1813/* More reserved magic, some of which tweaks white balance */
1814        { 0x43, 0x0a },
1815        { 0x44, 0xf0 },
1816        { 0x45, 0x34 },
1817        { 0x46, 0x58 },
1818        { 0x47, 0x28 },
1819        { 0x48, 0x3a },
1820        { 0x59, 0x88 },
1821        { 0x5a, 0x88 },
1822        { 0x5b, 0x44 },
1823        { 0x5c, 0x67 },
1824        { 0x5d, 0x49 },
1825        { 0x5e, 0x0e },
1826        { 0x6c, 0x0a },
1827        { 0x6d, 0x55 },
1828        { 0x6e, 0x11 },
1829        { 0x6f, 0x9f },                 /* "9e for advance AWB" */
1830        { 0x6a, 0x40 },
1831        { OV7670_R01_BLUE, 0x40 },
1832        { OV7670_R02_RED, 0x60 },
1833        { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1834                        | OV7670_COM8_AECSTEP
1835                        | OV7670_COM8_BFILT
1836                        | OV7670_COM8_AGC
1837                        | OV7670_COM8_AEC
1838                        | OV7670_COM8_AWB },
1839
1840/* Matrix coefficients */
1841        { 0x4f, 0x80 },
1842        { 0x50, 0x80 },
1843        { 0x51, 0x00 },
1844        { 0x52, 0x22 },
1845        { 0x53, 0x5e },
1846        { 0x54, 0x80 },
1847        { 0x58, 0x9e },
1848
1849        { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1850        { OV7670_R3F_EDGE, 0x00 },
1851        { 0x75, 0x05 },
1852        { 0x76, 0xe1 },
1853        { 0x4c, 0x00 },
1854        { 0x77, 0x01 },
1855        { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1856                          | OV7670_COM13_UVSAT
1857                          | 2},         /* was 3 */
1858        { 0x4b, 0x09 },
1859        { 0xc9, 0x60 },
1860        { OV7670_R41_COM16, 0x38 },
1861        { 0x56, 0x40 },
1862
1863        { 0x34, 0x11 },
1864        { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1865        { 0xa4, 0x88 },
1866        { 0x96, 0x00 },
1867        { 0x97, 0x30 },
1868        { 0x98, 0x20 },
1869        { 0x99, 0x30 },
1870        { 0x9a, 0x84 },
1871        { 0x9b, 0x29 },
1872        { 0x9c, 0x03 },
1873        { 0x9d, 0x4c },
1874        { 0x9e, 0x3f },
1875        { 0x78, 0x04 },
1876
1877/* Extra-weird stuff.  Some sort of multiplexor register */
1878        { 0x79, 0x01 },
1879        { 0xc8, 0xf0 },
1880        { 0x79, 0x0f },
1881        { 0xc8, 0x00 },
1882        { 0x79, 0x10 },
1883        { 0xc8, 0x7e },
1884        { 0x79, 0x0a },
1885        { 0xc8, 0x80 },
1886        { 0x79, 0x0b },
1887        { 0xc8, 0x01 },
1888        { 0x79, 0x0c },
1889        { 0xc8, 0x0f },
1890        { 0x79, 0x0d },
1891        { 0xc8, 0x20 },
1892        { 0x79, 0x09 },
1893        { 0xc8, 0x80 },
1894        { 0x79, 0x02 },
1895        { 0xc8, 0xc0 },
1896        { 0x79, 0x03 },
1897        { 0xc8, 0x40 },
1898        { 0x79, 0x05 },
1899        { 0xc8, 0x30 },
1900        { 0x79, 0x26 },
1901};
1902
1903static const struct ov_i2c_regvals norm_8610[] = {
1904        { 0x12, 0x80 },
1905        { 0x00, 0x00 },
1906        { 0x01, 0x80 },
1907        { 0x02, 0x80 },
1908        { 0x03, 0xc0 },
1909        { 0x04, 0x30 },
1910        { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1911        { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1912        { 0x0a, 0x86 },
1913        { 0x0b, 0xb0 },
1914        { 0x0c, 0x20 },
1915        { 0x0d, 0x20 },
1916        { 0x11, 0x01 },
1917        { 0x12, 0x25 },
1918        { 0x13, 0x01 },
1919        { 0x14, 0x04 },
1920        { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1921        { 0x16, 0x03 },
1922        { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1923        { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1924        { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1925        { 0x1a, 0xf5 },
1926        { 0x1b, 0x00 },
1927        { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1928        { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1929        { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1930        { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1931        { 0x26, 0xa2 },
1932        { 0x27, 0xea },
1933        { 0x28, 0x00 },
1934        { 0x29, 0x00 },
1935        { 0x2a, 0x80 },
1936        { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1937        { 0x2c, 0xac },
1938        { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1939        { 0x2e, 0x80 },
1940        { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1941        { 0x4c, 0x00 },
1942        { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1943        { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1944        { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1945        { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1946        { 0x63, 0xff },
1947        { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1948                         * maybe thats wrong */
1949        { 0x65, 0x00 },
1950        { 0x66, 0x55 },
1951        { 0x67, 0xb0 },
1952        { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1953        { 0x69, 0x02 },
1954        { 0x6a, 0x22 },
1955        { 0x6b, 0x00 },
1956        { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1957                         * deleting bit7 colors the first images red */
1958        { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1959        { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1960        { 0x6f, 0x01 },
1961        { 0x70, 0x8b },
1962        { 0x71, 0x00 },
1963        { 0x72, 0x14 },
1964        { 0x73, 0x54 },
1965        { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1966        { 0x75, 0x0e },
1967        { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1968        { 0x77, 0xff },
1969        { 0x78, 0x80 },
1970        { 0x79, 0x80 },
1971        { 0x7a, 0x80 },
1972        { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1973        { 0x7c, 0x00 },
1974        { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1975        { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1976        { 0x7f, 0xfb },
1977        { 0x80, 0x28 },
1978        { 0x81, 0x00 },
1979        { 0x82, 0x23 },
1980        { 0x83, 0x0b },
1981        { 0x84, 0x00 },
1982        { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1983        { 0x86, 0xc9 },
1984        { 0x87, 0x00 },
1985        { 0x88, 0x00 },
1986        { 0x89, 0x01 },
1987        { 0x12, 0x20 },
1988        { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1989};
1990
1991static unsigned char ov7670_abs_to_sm(unsigned char v)
1992{
1993        if (v > 127)
1994                return v & 0x7f;
1995        return (128 - v) | 0x80;
1996}
1997
1998/* Write a OV519 register */
1999static void reg_w(struct sd *sd, u16 index, u16 value)
2000{

2001        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2002        int ret, req = 0;
2003
2004        if (sd->gspca_dev.usb_err < 0)
2005                return;
2006
2007        /* Avoid things going to fast for the bridge with a xhci host */
2008        udelay(150);
2009
2010        switch (sd->bridge) {
2011        case BRIDGE_OV511:
2012        case BRIDGE_OV511PLUS:
2013                req = 2;
2014                break;
2015        case BRIDGE_OVFX2:
2016                req = 0x0a;
2017                /* fall through */
2018        case BRIDGE_W9968CF:
2019                PDEBUG(D_USBO, "SET %02x %04x %04x",
2020                                req, value, index);
2021                ret = usb_control_msg(sd->gspca_dev.dev,
2022                        usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2023                        req,
2024                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2025                        value, index, NULL, 0, 500);
2026                goto leave;
2027        default:
2028                req = 1;
2029        }
2030
2031        PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2032                        req, index, value);
2033        sd->gspca_dev.usb_buf[0] = value;
2034        ret = usb_control_msg(sd->gspca_dev.dev,
2035                        usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2036                        req,
2037                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2038                        0, index,
2039                        sd->gspca_dev.usb_buf, 1, 500);
2040leave:
2041        if (ret < 0) {
2042                PERR("reg_w %02x failed %d\n", index, ret);
2043                sd->gspca_dev.usb_err = ret;
2044                return;
2045        }
2046}
2047
2048/* Read from a OV519 register, note not valid for the w9968cf!! */
2049/* returns: negative is error, pos or zero is data */
2050static int reg_r(struct sd *sd, u16 index)
2051{
2052        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2053        int ret;
2054        int req;
2055
2056        if (sd->gspca_dev.usb_err < 0)
2057                return -1;
2058
2059        switch (sd->bridge) {
2060        case BRIDGE_OV511:
2061        case BRIDGE_OV511PLUS:
2062                req = 3;
2063                break;
2064        case BRIDGE_OVFX2:
2065                req = 0x0b;
2066                break;
2067        default:
2068                req = 1;
2069        }
2070
2071        /* Avoid things going to fast for the bridge with a xhci host */
2072        udelay(150);
2073        ret = usb_control_msg(sd->gspca_dev.dev,
2074                        usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2075                        req,
2076                        USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2077                        0, index, sd->gspca_dev.usb_buf, 1, 500);
2078
2079        if (ret >= 0) {
2080                ret = sd->gspca_dev.usb_buf[0];
2081                PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2082                        req, index, ret);
2083        } else {
2084                PERR("reg_r %02x failed %d\n", index, ret);
2085                sd->gspca_dev.usb_err = ret;
2086        }
2087
2088        return ret;
2089}
2090
2091/* Read 8 values from a OV519 register */
2092static int reg_r8(struct sd *sd,
2093                  u16 index)
2094{
2095        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2096        int ret;
2097
2098        if (sd->gspca_dev.usb_err < 0)
2099                return -1;
2100
2101        /* Avoid things going to fast for the bridge with a xhci host */
2102        udelay(150);
2103        ret = usb_control_msg(sd->gspca_dev.dev,
2104                        usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2105                        1,                      /* REQ_IO */
2106                        USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2107                        0, index, sd->gspca_dev.usb_buf, 8, 500);
2108
2109        if (ret >= 0) {
2110                ret = sd->gspca_dev.usb_buf[0];
2111        } else {
2112                PERR("reg_r8 %02x failed %d\n", index, ret);
2113                sd->gspca_dev.usb_err = ret;
2114        }
2115
2116        return ret;
2117}
2118
2119/*
2120 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2121 * the same position as 1's in "mask" are cleared and set to "value". Bits
2122 * that are in the same position as 0's in "mask" are preserved, regardless
2123 * of their respective state in "value".
2124 */
2125static void reg_w_mask(struct sd *sd,
2126                        u16 index,
2127                        u8 value,
2128                        u8 mask)
2129{
2130        int ret;
2131        u8 oldval;
2132
2133        if (mask != 0xff) {
2134                value &= mask;                  /* Enforce mask on value */
2135                ret = reg_r(sd, index);
2136                if (ret < 0)
2137                        return;
2138
2139                oldval = ret & ~mask;           /* Clear the masked bits */
2140                value |= oldval;                /* Set the desired bits */
2141        }
2142        reg_w(sd, index, value);
2143}
2144
2145/*
2146 * Writes multiple (n) byte value to a single register. Only valid with certain
2147 * registers (0x30 and 0xc4 - 0xce).
2148 */
2149static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2150{
2151        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2152        int ret;
2153
2154        if (sd->gspca_dev.usb_err < 0)
2155                return;
2156
2157        *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2158
2159        /* Avoid things going to fast for the bridge with a xhci host */
2160        udelay(150);
2161        ret = usb_control_msg(sd->gspca_dev.dev,
2162                        usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2163                        1 /* REG_IO */,
2164                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2165                        0, index,
2166                        sd->gspca_dev.usb_buf, n, 500);
2167        if (ret < 0) {
2168                PERR("reg_w32 %02x failed %d\n", index, ret);
2169                sd->gspca_dev.usb_err = ret;
2170        }
2171}
2172
2173static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2174{
2175        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2176        int rc, retries;
2177
2178        PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2179
2180        /* Three byte write cycle */
2181        for (retries = 6; ; ) {
2182                /* Select camera register */
2183                reg_w(sd, R51x_I2C_SADDR_3, reg);
2184
2185                /* Write "value" to I2C data port of OV511 */
2186                reg_w(sd, R51x_I2C_DATA, value);
2187
2188                /* Initiate 3-byte write cycle */
2189                reg_w(sd, R511_I2C_CTL, 0x01);
2190
2191                do {
2192                        rc = reg_r(sd, R511_I2C_CTL);
2193                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2194
2195                if (rc < 0)
2196                        return;
2197
2198                if ((rc & 2) == 0) /* Ack? */
2199                        break;
2200                if (--retries < 0) {
2201                        PDEBUG(D_USBO, "i2c write retries exhausted");
2202                        return;
2203                }
2204        }
2205}
2206
2207static int ov511_i2c_r(struct sd *sd, u8 reg)
2208{
2209        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2210        int rc, value, retries;
2211
2212        /* Two byte write cycle */
2213        for (retries = 6; ; ) {
2214                /* Select camera register */
2215                reg_w(sd, R51x_I2C_SADDR_2, reg);
2216
2217                /* Initiate 2-byte write cycle */
2218                reg_w(sd, R511_I2C_CTL, 0x03);
2219
2220                do {
2221                        rc = reg_r(sd, R511_I2C_CTL);
2222                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2223
2224                if (rc < 0)
2225                        return rc;
2226
2227                if ((rc & 2) == 0) /* Ack? */
2228                        break;
2229
2230                /* I2C abort */
2231                reg_w(sd, R511_I2C_CTL, 0x10);
2232
2233                if (--retries < 0) {
2234                        PDEBUG(D_USBI, "i2c write retries exhausted");
2235                        return -1;
2236                }
2237        }
2238
2239        /* Two byte read cycle */
2240        for (retries = 6; ; ) {
2241                /* Initiate 2-byte read cycle */
2242                reg_w(sd, R511_I2C_CTL, 0x05);
2243
2244                do {
2245                        rc = reg_r(sd, R511_I2C_CTL);
2246                } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2247
2248                if (rc < 0)
2249                        return rc;
2250
2251                if ((rc & 2) == 0) /* Ack? */
2252                        break;
2253
2254                /* I2C abort */
2255                reg_w(sd, R511_I2C_CTL, 0x10);
2256
2257                if (--retries < 0) {
2258                        PDEBUG(D_USBI, "i2c read retries exhausted");
2259                        return -1;
2260                }
2261        }
2262
2263        value = reg_r(sd, R51x_I2C_DATA);
2264
2265        PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2266
2267        /* This is needed to make i2c_w() work */
2268        reg_w(sd, R511_I2C_CTL, 0x05);
2269
2270        return value;
2271}
2272
2273/*
2274 * The OV518 I2C I/O procedure is different, hence, this function.
2275 * This is normally only called from i2c_w(). Note that this function
2276 * always succeeds regardless of whether the sensor is present and working.
2277 */
2278static void ov518_i2c_w(struct sd *sd,
2279                u8 reg,
2280                u8 value)
2281{
2282        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2283
2284        PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2285
2286        /* Select camera register */
2287        reg_w(sd, R51x_I2C_SADDR_3, reg);
2288
2289        /* Write "value" to I2C data port of OV511 */
2290        reg_w(sd, R51x_I2C_DATA, value);
2291
2292        /* Initiate 3-byte write cycle */
2293        reg_w(sd, R518_I2C_CTL, 0x01);
2294
2295        /* wait for write complete */
2296        msleep(4);
2297        reg_r8(sd, R518_I2C_CTL);
2298}
2299
2300/*
2301 * returns: negative is error, pos or zero is data
2302 *
2303 * The OV518 I2C I/O procedure is different, hence, this function.
2304 * This is normally only called from i2c_r(). Note that this function
2305 * always succeeds regardless of whether the sensor is present and working.
2306 */
2307static int ov518_i2c_r(struct sd *sd, u8 reg)
2308{
2309        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2310        int value;
2311
2312        /* Select camera register */
2313        reg_w(sd, R51x_I2C_SADDR_2, reg);
2314
2315        /* Initiate 2-byte write cycle */
2316        reg_w(sd, R518_I2C_CTL, 0x03);
2317        reg_r8(sd, R518_I2C_CTL);
2318
2319        /* Initiate 2-byte read cycle */
2320        reg_w(sd, R518_I2C_CTL, 0x05);
2321        reg_r8(sd, R518_I2C_CTL);
2322
2323        value = reg_r(sd, R51x_I2C_DATA);
2324        PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2325        return value;
2326}
2327
2328static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2329{
2330        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2331        int ret;
2332
2333        if (sd->gspca_dev.usb_err < 0)
2334                return;
2335
2336        ret = usb_control_msg(sd->gspca_dev.dev,
2337                        usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2338                        0x02,
2339                        USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2340                        (u16) value, (u16) reg, NULL, 0, 500);
2341
2342        if (ret < 0) {
2343                PERR("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2344                sd->gspca_dev.usb_err = ret;
2345        }
2346
2347        PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2348}
2349
2350static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2351{
2352        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2353        int ret;
2354
2355        if (sd->gspca_dev.usb_err < 0)
2356                return -1;
2357
2358        ret = usb_control_msg(sd->gspca_dev.dev,
2359                        usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2360                        0x03,
2361                        USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2362                        0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2363
2364        if (ret >= 0) {
2365                ret = sd->gspca_dev.usb_buf[0];
2366                PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2367        } else {
2368                PERR("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2369                sd->gspca_dev.usb_err = ret;
2370        }
2371
2372        return ret;
2373}
2374
2375static void i2c_w(struct sd *sd, u8 reg, u8 value)
2376{
2377        if (sd->sensor_reg_cache[reg] == value)
2378                return;
2379
2380        switch (sd->bridge) {
2381        case BRIDGE_OV511:
2382        case BRIDGE_OV511PLUS:
2383                ov511_i2c_w(sd, reg, value);
2384                break;
2385        case BRIDGE_OV518:
2386        case BRIDGE_OV518PLUS:
2387        case BRIDGE_OV519:
2388                ov518_i2c_w(sd, reg, value);
2389                break;
2390        case BRIDGE_OVFX2:
2391                ovfx2_i2c_w(sd, reg, value);
2392                break;
2393        case BRIDGE_W9968CF:
2394                w9968cf_i2c_w(sd, reg, value);
2395                break;
2396        }
2397
2398        if (sd->gspca_dev.usb_err >= 0) {
2399                /* Up on sensor reset empty the register cache */
2400                if (reg == 0x12 && (value & 0x80))
2401                        memset(sd->sensor_reg_cache, -1,
2402                                sizeof(sd->sensor_reg_cache));
2403                else
2404                        sd->sensor_reg_cache[reg] = value;
2405        }
2406}
2407
2408static int i2c_r(struct sd *sd, u8 reg)
2409{
2410        int ret = -1;
2411
2412        if (sd->sensor_reg_cache[reg] != -1)
2413                return sd->sensor_reg_cache[reg];
2414
2415        switch (sd->bridge) {
2416        case BRIDGE_OV511:
2417        case BRIDGE_OV511PLUS:
2418                ret = ov511_i2c_r(sd, reg);
2419                break;
2420        case BRIDGE_OV518:
2421        case BRIDGE_OV518PLUS:
2422        case BRIDGE_OV519:
2423                ret = ov518_i2c_r(sd, reg);
2424                break;
2425        case BRIDGE_OVFX2:
2426                ret = ovfx2_i2c_r(sd, reg);
2427                break;
2428        case BRIDGE_W9968CF:
2429                ret = w9968cf_i2c_r(sd, reg);
2430                break;
2431        }
2432
2433        if (ret >= 0)
2434                sd->sensor_reg_cache[reg] = ret;
2435
2436        return ret;
2437}
2438
2439/* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2440 * the same position as 1's in "mask" are cleared and set to "value". Bits
2441 * that are in the same position as 0's in "mask" are preserved, regardless
2442 * of their respective state in "value".
2443 */
2444static void i2c_w_mask(struct sd *sd,
2445                        u8 reg,
2446                        u8 value,
2447                        u8 mask)
2448{
2449        int rc;
2450        u8 oldval;
2451
2452        value &= mask;                  /* Enforce mask on value */
2453        rc = i2c_r(sd, reg);
2454        if (rc < 0)
2455                return;
2456        oldval = rc & ~mask;            /* Clear the masked bits */
2457        value |= oldval;                /* Set the desired bits */
2458        i2c_w(sd, reg, value);
2459}
2460
2461/* Temporarily stops OV511 from functioning. Must do this before changing
2462 * registers while the camera is streaming */
2463static inline void ov51x_stop(struct sd *sd)
2464{
2465        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2466
2467        PDEBUG(D_STREAM, "stopping");
2468        sd->stopped = 1;
2469        switch (sd->bridge) {
2470        case BRIDGE_OV511:
2471        case BRIDGE_OV511PLUS:
2472                reg_w(sd, R51x_SYS_RESET, 0x3d);
2473                break;
2474        case BRIDGE_OV518:
2475        case BRIDGE_OV518PLUS:
2476                reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2477                break;
2478        case BRIDGE_OV519:
2479                reg_w(sd, OV519_R51_RESET1, 0x0f);
2480                reg_w(sd, OV519_R51_RESET1, 0x00);
2481                reg_w(sd, 0x22, 0x00);          /* FRAR */
2482                break;
2483        case BRIDGE_OVFX2:
2484                reg_w_mask(sd, 0x0f, 0x00, 0x02);
2485                break;
2486        case BRIDGE_W9968CF:
2487                reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2488                break;
2489        }
2490}
2491
2492/* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2493 * actually stopped (for performance). */
2494static inline void ov51x_restart(struct sd *sd)
2495{
2496        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2497
2498        PDEBUG(D_STREAM, "restarting");
2499        if (!sd->stopped)
2500                return;
2501        sd->stopped = 0;
2502
2503        /* Reinitialize the stream */
2504        switch (sd->bridge) {
2505        case BRIDGE_OV511:
2506        case BRIDGE_OV511PLUS:
2507                reg_w(sd, R51x_SYS_RESET, 0x00);
2508                break;
2509        case BRIDGE_OV518:
2510        case BRIDGE_OV518PLUS:
2511                reg_w(sd, 0x2f, 0x80);
2512                reg_w(sd, R51x_SYS_RESET, 0x00);
2513                break;
2514        case BRIDGE_OV519:
2515                reg_w(sd, OV519_R51_RESET1, 0x0f);
2516                reg_w(sd, OV519_R51_RESET1, 0x00);
2517                reg_w(sd, 0x22, 0x1d);          /* FRAR */
2518                break;
2519        case BRIDGE_OVFX2:
2520                reg_w_mask(sd, 0x0f, 0x02, 0x02);
2521                break;
2522        case BRIDGE_W9968CF:
2523                reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2524                break;
2525        }
2526}
2527
2528static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2529
2530/* This does an initial reset of an OmniVision sensor and ensures that I2C
2531 * is synchronized. Returns <0 on failure.
2532 */
2533static int init_ov_sensor(struct sd *sd, u8 slave)
2534{
2535        int i;
2536        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2537
2538        ov51x_set_slave_ids(sd, slave);
2539
2540        /* Reset the sensor */
2541        i2c_w(sd, 0x12, 0x80);
2542
2543        /* Wait for it to initialize */
2544        msleep(150);
2545
2546        for (i = 0; i < i2c_detect_tries; i++) {
2547                if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2548                    i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2549                        PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2550                        return 0;
2551                }
2552
2553                /* Reset the sensor */
2554                i2c_w(sd, 0x12, 0x80);
2555
2556                /* Wait for it to initialize */
2557                msleep(150);
2558
2559                /* Dummy read to sync I2C */
2560                if (i2c_r(sd, 0x00) < 0)
2561                        return -1;
2562        }
2563        return -1;
2564}
2565
2566/* Set the read and write slave IDs. The "slave" argument is the write slave,
2567 * and the read slave will be set to (slave + 1).
2568 * This should not be called from outside the i2c I/O functions.
2569 * Sets I2C read and write slave IDs. Returns <0 for error
2570 */
2571static void ov51x_set_slave_ids(struct sd *sd,
2572                                u8 slave)
2573{
2574        switch (sd->bridge) {
2575        case BRIDGE_OVFX2:
2576                reg_w(sd, OVFX2_I2C_ADDR, slave);
2577                return;
2578        case BRIDGE_W9968CF:
2579                sd->sensor_addr = slave;
2580                return;
2581        }
2582
2583        reg_w(sd, R51x_I2C_W_SID, slave);
2584        reg_w(sd, R51x_I2C_R_SID, slave + 1);
2585}
2586
2587static void write_regvals(struct sd *sd,
2588                         const struct ov_regvals *regvals,
2589                         int n)
2590{
2591        while (--n >= 0) {
2592                reg_w(sd, regvals->reg, regvals->val);
2593                regvals++;
2594        }
2595}
2596
2597static void write_i2c_regvals(struct sd *sd,
2598                        const struct ov_i2c_regvals *regvals,
2599                        int n)
2600{
2601        while (--n >= 0) {
2602                i2c_w(sd, regvals->reg, regvals->val);
2603                regvals++;
2604        }
2605}
2606
2607/****************************************************************************
2608 *
2609 * OV511 and sensor configuration
2610 *
2611 ***************************************************************************/
2612
2613/* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2614static void ov_hires_configure(struct sd *sd)
2615{
2616        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2617        int high, low;
2618
2619        if (sd->bridge != BRIDGE_OVFX2) {
2620                PERR("error hires sensors only supported with ovfx2\n");
2621                return;
2622        }
2623
2624        PDEBUG(D_PROBE, "starting ov hires configuration");
2625
2626        /* Detect sensor (sub)type */
2627        high = i2c_r(sd, 0x0a);
2628        low = i2c_r(sd, 0x0b);
2629        /* info("%x, %x", high, low); */
2630        switch (high) {
2631        case 0x96:
2632                switch (low) {
2633                case 0x40:
2634                        PDEBUG(D_PROBE, "Sensor is a OV2610");
2635                        sd->sensor = SEN_OV2610;
2636                        return;
2637                case 0x41:
2638                        PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2639                        sd->sensor = SEN_OV2610AE;
2640                        return;
2641                case 0xb1:
2642                        PDEBUG(D_PROBE, "Sensor is a OV9600");
2643                        sd->sensor = SEN_OV9600;
2644                        return;
2645                }
2646                break;
2647        case 0x36:
2648                if ((low & 0x0f) == 0x00) {
2649                        PDEBUG(D_PROBE, "Sensor is a OV3610");
2650                        sd->sensor = SEN_OV3610;
2651                        return;
2652                }
2653                break;
2654        }
2655        PERR("Error unknown sensor type: %02x%02x\n", high, low);
2656}
2657
2658/* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2659 * the same register settings as the OV8610, since they are very similar.
2660 */
2661static void ov8xx0_configure(struct sd *sd)
2662{
2663        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2664        int rc;
2665
2666        PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2667
2668        /* Detect sensor (sub)type */
2669        rc = i2c_r(sd, OV7610_REG_COM_I);
2670        if (rc < 0) {
2671                PERR("Error detecting sensor type");
2672                return;
2673        }
2674        if ((rc & 3) == 1)
2675                sd->sensor = SEN_OV8610;
2676        else
2677                PERR("Unknown image sensor version: %d\n", rc & 3);
2678}
2679
2680/* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2681 * the same register settings as the OV7610, since they are very similar.
2682 */
2683static void ov7xx0_configure(struct sd *sd)
2684{
2685        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2686        int rc, high, low;
2687
2688        PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2689
2690        /* Detect sensor (sub)type */
2691        rc = i2c_r(sd, OV7610_REG_COM_I);
2692
2693        /* add OV7670 here
2694         * it appears to be wrongly detected as a 7610 by default */
2695        if (rc < 0) {
2696                PERR("Error detecting sensor type\n");
2697                return;
2698        }
2699        if ((rc & 3) == 3) {
2700                /* quick hack to make OV7670s work */
2701                high = i2c_r(sd, 0x0a);
2702                low = i2c_r(sd, 0x0b);
2703                /* info("%x, %x", high, low); */
2704                if (high == 0x76 && (low & 0xf0) == 0x70) {
2705                        PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2706                        sd->sensor = SEN_OV7670;
2707                } else {
2708                        PDEBUG(D_PROBE, "Sensor is an OV7610");
2709                        sd->sensor = SEN_OV7610;
2710                }
2711        } else if ((rc & 3) == 1) {
2712                /* I don't know what's different about the 76BE yet. */
2713                if (i2c_r(sd, 0x15) & 1) {
2714                        PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2715                        sd->sensor = SEN_OV7620AE;
2716                } else {
2717                        PDEBUG(D_PROBE, "Sensor is an OV76BE");
2718                        sd->sensor = SEN_OV76BE;
2719                }
2720        } else if ((rc & 3) == 0) {
2721                /* try to read product id registers */
2722                high = i2c_r(sd, 0x0a);
2723                if (high < 0) {
2724                        PERR("Error detecting camera chip PID\n");
2725                        return;
2726                }
2727                low = i2c_r(sd, 0x0b);
2728                if (low < 0) {
2729                        PERR("Error detecting camera chip VER\n");
2730                        return;
2731                }
2732                if (high == 0x76) {
2733                        switch (low) {
2734                        case 0x30:
2735                                PERR("Sensor is an OV7630/OV7635\n");
2736                                PERR("7630 is not supported by this driver\n");
2737                                return;
2738                        case 0x40:
2739                                PDEBUG(D_PROBE, "Sensor is an OV7645");
2740                                sd->sensor = SEN_OV7640; /* FIXME */
2741                                break;
2742                        case 0x45:
2743                                PDEBUG(D_PROBE, "Sensor is an OV7645B");
2744                                sd->sensor = SEN_OV7640; /* FIXME */
2745                                break;
2746                        case 0x48:
2747                                PDEBUG(D_PROBE, "Sensor is an OV7648");
2748                                sd->sensor = SEN_OV7648;
2749                                break;
2750                        case 0x60:
2751                                PDEBUG(D_PROBE, "Sensor is a OV7660");
2752                                sd->sensor = SEN_OV7660;
2753                                break;
2754                        default:
2755                                PERR("Unknown sensor: 0x76%02x\n", low);
2756                                return;
2757                        }
2758                } else {
2759                        PDEBUG(D_PROBE, "Sensor is an OV7620");
2760                        sd->sensor = SEN_OV7620;
2761                }
2762        } else {
2763                PERR("Unknown image sensor version: %d\n", rc & 3);
2764        }
2765}
2766
2767/* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2768static void ov6xx0_configure(struct sd *sd)
2769{
2770        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2771        int rc;
2772
2773        PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2774
2775        /* Detect sensor (sub)type */
2776        rc = i2c_r(sd, OV7610_REG_COM_I);
2777        if (rc < 0) {
2778                PERR("Error detecting sensor type\n");
2779                return;
2780        }
2781
2782        /* Ugh. The first two bits are the version bits, but
2783         * the entire register value must be used. I guess OVT
2784         * underestimated how many variants they would make. */
2785        switch (rc) {
2786        case 0x00:
2787                sd->sensor = SEN_OV6630;
2788                pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2789                break;
2790        case 0x01:
2791                sd->sensor = SEN_OV6620;
2792                PDEBUG(D_PROBE, "Sensor is an OV6620");
2793                break;
2794        case 0x02:
2795                sd->sensor = SEN_OV6630;
2796                PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2797                break;
2798        case 0x03:
2799                sd->sensor = SEN_OV66308AF;
2800                PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2801                break;
2802        case 0x90:
2803                sd->sensor = SEN_OV6630;
2804                pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2805                break;
2806        default:
2807                PERR("FATAL: Unknown sensor version: 0x%02x\n", rc);
2808                return;
2809        }
2810
2811        /* Set sensor-specific vars */
2812        sd->sif = 1;
2813}
2814
2815/* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2816static void ov51x_led_control(struct sd *sd, int on)
2817{
2818        if (sd->invert_led)
2819                on = !on;
2820
2821        switch (sd->bridge) {
2822        /* OV511 has no LED control */
2823        case BRIDGE_OV511PLUS:
2824                reg_w(sd, R511_SYS_LED_CTL, on);
2825                break;
2826        case BRIDGE_OV518:
2827        case BRIDGE_OV518PLUS:
2828                reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2829                break;
2830        case BRIDGE_OV519:
2831                reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2832                break;
2833        }
2834}
2835
2836static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2837{
2838        struct sd *sd = (struct sd *) gspca_dev;
2839
2840        if (!sd->snapshot_needs_reset)
2841                return;
2842
2843        /* Note it is important that we clear sd->snapshot_needs_reset,
2844           before actually clearing the snapshot state in the bridge
2845           otherwise we might race with the pkt_scan interrupt handler */
2846        sd->snapshot_needs_reset = 0;
2847
2848        switch (sd->bridge) {
2849        case BRIDGE_OV511:
2850        case BRIDGE_OV511PLUS:
2851                reg_w(sd, R51x_SYS_SNAP, 0x02);
2852                reg_w(sd, R51x_SYS_SNAP, 0x00);
2853                break;
2854        case BRIDGE_OV518:
2855        case BRIDGE_OV518PLUS:
2856                reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2857                reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2858                break;
2859        case BRIDGE_OV519:
2860                reg_w(sd, R51x_SYS_RESET, 0x40);
2861                reg_w(sd, R51x_SYS_RESET, 0x00);
2862                break;
2863        }
2864}
2865
2866static void ov51x_upload_quan_tables(struct sd *sd)
2867{
2868        const unsigned char yQuanTable511[] = {
2869                0, 1, 1, 2, 2, 3, 3, 4,
2870                1, 1, 1, 2, 2, 3, 4, 4,
2871                1, 1, 2, 2, 3, 4, 4, 4,
2872                2, 2, 2, 3, 4, 4, 4, 4,
2873                2, 2, 3, 4, 4, 5, 5, 5,
2874                3, 3, 4, 4, 5, 5, 5, 5,
2875                3, 4, 4, 4, 5, 5, 5, 5,
2876                4, 4, 4, 4, 5, 5, 5, 5
2877        };
2878
2879        const unsigned char uvQuanTable511[] = {
2880                0, 2, 2, 3, 4, 4, 4, 4,
2881                2, 2, 2, 4, 4, 4, 4, 4,
2882                2, 2, 3, 4, 4, 4, 4, 4,
2883                3, 4, 4, 4, 4, 4, 4, 4,
2884                4, 4, 4, 4, 4, 4, 4, 4,
2885                4, 4, 4, 4, 4, 4, 4, 4,
2886                4, 4, 4, 4, 4, 4, 4, 4,
2887                4, 4, 4, 4, 4, 4, 4, 4
2888        };
2889
2890        /* OV518 quantization tables are 8x4 (instead of 8x8) */
2891        const unsigned char yQuanTable518[] = {
2892                5, 4, 5, 6, 6, 7, 7, 7,
2893                5, 5, 5, 5, 6, 7, 7, 7,
2894                6, 6, 6, 6, 7, 7, 7, 8,
2895                7, 7, 6, 7, 7, 7, 8, 8
2896        };
2897        const unsigned char uvQuanTable518[] = {
2898                6, 6, 6, 7, 7, 7, 7, 7,
2899                6, 6, 6, 7, 7, 7, 7, 7,
2900                6, 6, 6, 7, 7, 7, 7, 8,
2901                7, 7, 7, 7, 7, 7, 8, 8
2902        };
2903
2904        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
2905        const unsigned char *pYTable, *pUVTable;
2906        unsigned char val0, val1;
2907        int i, size, reg = R51x_COMP_LUT_BEGIN;
2908
2909        PDEBUG(D_PROBE, "Uploading quantization tables");
2910
2911        if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2912                pYTable = yQuanTable511;
2913                pUVTable = uvQuanTable511;
2914                size = 32;
2915        } else {
2916                pYTable = yQuanTable518;
2917                pUVTable = uvQuanTable518;
2918                size = 16;
2919        }
2920
2921        for (i = 0; i < size; i++) {
2922                val0 = *pYTable++;
2923                val1 = *pYTable++;
2924                val0 &= 0x0f;
2925                val1 &= 0x0f;
2926                val0 |= val1 << 4;
2927                reg_w(sd, reg, val0);
2928
2929                val0 = *pUVTable++;
2930                val1 = *pUVTable++;
2931                val0 &= 0x0f;
2932                val1 &= 0x0f;
2933                val0 |= val1 << 4;
2934                reg_w(sd, reg + size, val0);
2935
2936                reg++;
2937        }
2938}
2939
2940/* This initializes the OV511/OV511+ and the sensor */
2941static void ov511_configure(struct gspca_dev *gspca_dev)
2942{
2943        struct sd *sd = (struct sd *) gspca_dev;
2944
2945        /* For 511 and 511+ */
2946        const struct ov_regvals init_511[] = {
2947                { R51x_SYS_RESET,       0x7f },
2948                { R51x_SYS_INIT,        0x01 },
2949                { R51x_SYS_RESET,       0x7f },
2950                { R51x_SYS_INIT,        0x01 },
2951                { R51x_SYS_RESET,       0x3f },
2952                { R51x_SYS_INIT,        0x01 },
2953                { R51x_SYS_RESET,       0x3d },
2954        };
2955
2956        const struct ov_regvals norm_511[] = {
2957                { R511_DRAM_FLOW_CTL,   0x01 },
2958                { R51x_SYS_SNAP,        0x00 },
2959                { R51x_SYS_SNAP,        0x02 },
2960                { R51x_SYS_SNAP,        0x00 },
2961                { R511_FIFO_OPTS,       0x1f },
2962                { R511_COMP_EN,         0x00 },
2963                { R511_COMP_LUT_EN,     0x03 },
2964        };
2965
2966        const struct ov_regvals norm_511_p[] = {
2967                { R511_DRAM_FLOW_CTL,   0xff },
2968                { R51x_SYS_SNAP,        0x00 },
2969                { R51x_SYS_SNAP,        0x02 },
2970                { R51x_SYS_SNAP,        0x00 },
2971                { R511_FIFO_OPTS,       0xff },
2972                { R511_COMP_EN,         0x00 },
2973                { R511_COMP_LUT_EN,     0x03 },
2974        };
2975
2976        const struct ov_regvals compress_511[] = {
2977                { 0x70, 0x1f },
2978                { 0x71, 0x05 },
2979                { 0x72, 0x06 },
2980                { 0x73, 0x06 },
2981                { 0x74, 0x14 },
2982                { 0x75, 0x03 },
2983                { 0x76, 0x04 },
2984                { 0x77, 0x04 },
2985        };
2986
2987        PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2988
2989        write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2990
2991        switch (sd->bridge) {
2992        case BRIDGE_OV511:
2993                write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2994                break;
2995        case BRIDGE_OV511PLUS:
2996                write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2997                break;
2998        }
2999
3000        /* Init compression */

3001        write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3002
3003        ov51x_upload_quan_tables(sd);
3004}
3005
3006/* This initializes the OV518/OV518+ and the sensor */
3007static void ov518_configure(struct gspca_dev *gspca_dev)
3008{
3009        struct sd *sd = (struct sd *) gspca_dev;
3010
3011        /* For 518 and 518+ */
3012        const struct ov_regvals init_518[] = {
3013                { R51x_SYS_RESET,       0x40 },
3014                { R51x_SYS_INIT,        0xe1 },
3015                { R51x_SYS_RESET,       0x3e },
3016                { R51x_SYS_INIT,        0xe1 },
3017                { R51x_SYS_RESET,       0x00 },
3018                { R51x_SYS_INIT,        0xe1 },
3019                { 0x46,                 0x00 },
3020                { 0x5d,                 0x03 },
3021        };
3022
3023        const struct ov_regvals norm_518[] = {
3024                { R51x_SYS_SNAP,        0x02 }, /* Reset */
3025                { R51x_SYS_SNAP,        0x01 }, /* Enable */
3026                { 0x31,                 0x0f },
3027                { 0x5d,                 0x03 },
3028                { 0x24,                 0x9f },
3029                { 0x25,                 0x90 },
3030                { 0x20,                 0x00 },
3031                { 0x51,                 0x04 },
3032                { 0x71,                 0x19 },
3033                { 0x2f,                 0x80 },
3034        };
3035
3036        const struct ov_regvals norm_518_p[] = {
3037                { R51x_SYS_SNAP,        0x02 }, /* Reset */
3038                { R51x_SYS_SNAP,        0x01 }, /* Enable */
3039                { 0x31,                 0x0f },
3040                { 0x5d,                 0x03 },
3041                { 0x24,                 0x9f },
3042                { 0x25,                 0x90 },
3043                { 0x20,                 0x60 },
3044                { 0x51,                 0x02 },
3045                { 0x71,                 0x19 },
3046                { 0x40,                 0xff },
3047                { 0x41,                 0x42 },
3048                { 0x46,                 0x00 },
3049                { 0x33,                 0x04 },
3050                { 0x21,                 0x19 },
3051                { 0x3f,                 0x10 },
3052                { 0x2f,                 0x80 },
3053        };
3054
3055        /* First 5 bits of custom ID reg are a revision ID on OV518 */
3056        sd->revision = reg_r(sd, R51x_SYS_CUST_ID) & 0x1f;
3057        PDEBUG(D_PROBE, "Device revision %d", sd->revision);
3058
3059        write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3060
3061        /* Set LED GPIO pin to output mode */
3062        reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3063
3064        switch (sd->bridge) {
3065        case BRIDGE_OV518:
3066                write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3067                break;
3068        case BRIDGE_OV518PLUS:
3069                write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3070                break;
3071        }
3072
3073        ov51x_upload_quan_tables(sd);
3074
3075        reg_w(sd, 0x2f, 0x80);
3076}
3077
3078static void ov519_configure(struct sd *sd)
3079{
3080        static const struct ov_regvals init_519[] = {
3081                { 0x5a, 0x6d }, /* EnableSystem */
3082                { 0x53, 0x9b }, /* don't enable the microcontroller */
3083                { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3084                { 0x5d, 0x03 },
3085                { 0x49, 0x01 },
3086                { 0x48, 0x00 },
3087                /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3088                 * detection will fail. This deserves further investigation. */
3089                { OV519_GPIO_IO_CTRL0,   0xee },
3090                { OV519_R51_RESET1, 0x0f },
3091                { OV519_R51_RESET1, 0x00 },
3092                { 0x22, 0x00 },
3093                /* windows reads 0x55 at this point*/
3094        };
3095
3096        write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3097}
3098
3099static void ovfx2_configure(struct sd *sd)
3100{
3101        static const struct ov_regvals init_fx2[] = {
3102                { 0x00, 0x60 },
3103                { 0x02, 0x01 },
3104                { 0x0f, 0x1d },
3105                { 0xe9, 0x82 },
3106                { 0xea, 0xc7 },
3107                { 0xeb, 0x10 },
3108                { 0xec, 0xf6 },
3109        };
3110
3111        sd->stopped = 1;
3112
3113        write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3114}
3115
3116/* set the mode */
3117/* This function works for ov7660 only */
3118static void ov519_set_mode(struct sd *sd)
3119{
3120        static const struct ov_regvals bridge_ov7660[2][10] = {
3121                {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3122                 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3123                 {0x25, 0x01}, {0x26, 0x00}},
3124                {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3125                 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3126                 {0x25, 0x03}, {0x26, 0x00}}
3127        };
3128        static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3129                {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3130                {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3131        };
3132        static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3133                {OV7670_R17_HSTART, 0x13},
3134                {OV7670_R18_HSTOP, 0x01},
3135                {OV7670_R32_HREF, 0x92},
3136                {OV7670_R19_VSTART, 0x02},
3137                {OV7670_R1A_VSTOP, 0x7a},
3138                {OV7670_R03_VREF, 0x00},
3139/*              {0x33, 0x00}, */
3140/*              {0x34, 0x07}, */
3141/*              {0x36, 0x00}, */
3142/*              {0x6b, 0x0a}, */
3143        };
3144
3145        write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3146                        ARRAY_SIZE(bridge_ov7660[0]));
3147        write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3148                        ARRAY_SIZE(sensor_ov7660[0]));
3149        write_i2c_regvals(sd, sensor_ov7660_2,
3150                        ARRAY_SIZE(sensor_ov7660_2));
3151}
3152
3153/* set the frame rate */
3154/* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3155static void ov519_set_fr(struct sd *sd)
3156{
3157        int fr;
3158        u8 clock;
3159        /* frame rate table with indices:
3160         *      - mode = 0: 320x240, 1: 640x480
3161         *      - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3162         *      - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3163         */
3164        static const u8 fr_tb[2][6][3] = {
3165                {{0x04, 0xff, 0x00},
3166                 {0x04, 0x1f, 0x00},
3167                 {0x04, 0x1b, 0x00},
3168                 {0x04, 0x15, 0x00},
3169                 {0x04, 0x09, 0x00},
3170                 {0x04, 0x01, 0x00}},
3171                {{0x0c, 0xff, 0x00},
3172                 {0x0c, 0x1f, 0x00},
3173                 {0x0c, 0x1b, 0x00},
3174                 {0x04, 0xff, 0x01},
3175                 {0x04, 0x1f, 0x01},
3176                 {0x04, 0x1b, 0x01}},
3177        };
3178
3179        if (frame_rate > 0)
3180                sd->frame_rate = frame_rate;
3181        if (sd->frame_rate >= 30)
3182                fr = 0;
3183        else if (sd->frame_rate >= 25)
3184                fr = 1;
3185        else if (sd->frame_rate >= 20)
3186                fr = 2;
3187        else if (sd->frame_rate >= 15)
3188                fr = 3;
3189        else if (sd->frame_rate >= 10)
3190                fr = 4;
3191        else
3192                fr = 5;
3193        reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3194        reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3195        clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3196        if (sd->sensor == SEN_OV7660)
3197                clock |= 0x80;          /* enable double clock */
3198        ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3199}
3200
3201static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3202{
3203        struct sd *sd = (struct sd *) gspca_dev;
3204
3205        i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3206}
3207
3208/* this function is called at probe time */
3209static int sd_config(struct gspca_dev *gspca_dev,
3210                        const struct usb_device_id *id)
3211{
3212        struct sd *sd = (struct sd *) gspca_dev;
3213        struct cam *cam = &gspca_dev->cam;
3214
3215        sd->bridge = id->driver_info & BRIDGE_MASK;
3216        sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3217
3218        switch (sd->bridge) {
3219        case BRIDGE_OV511:
3220        case BRIDGE_OV511PLUS:
3221                cam->cam_mode = ov511_vga_mode;
3222                cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3223                break;
3224        case BRIDGE_OV518:
3225        case BRIDGE_OV518PLUS:
3226                cam->cam_mode = ov518_vga_mode;
3227                cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3228                break;
3229        case BRIDGE_OV519:
3230                cam->cam_mode = ov519_vga_mode;
3231                cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3232                break;
3233        case BRIDGE_OVFX2:
3234                cam->cam_mode = ov519_vga_mode;
3235                cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3236                cam->bulk_size = OVFX2_BULK_SIZE;
3237                cam->bulk_nurbs = MAX_NURBS;
3238                cam->bulk = 1;
3239                break;
3240        case BRIDGE_W9968CF:
3241                cam->cam_mode = w9968cf_vga_mode;
3242                cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3243                break;
3244        }
3245
3246        sd->frame_rate = 15;
3247
3248        return 0;
3249}
3250
3251/* this function is called at probe and resume time */
3252static int sd_init(struct gspca_dev *gspca_dev)
3253{
3254        struct sd *sd = (struct sd *) gspca_dev;
3255        struct cam *cam = &gspca_dev->cam;
3256
3257        switch (sd->bridge) {
3258        case BRIDGE_OV511:
3259        case BRIDGE_OV511PLUS:
3260                ov511_configure(gspca_dev);
3261                break;
3262        case BRIDGE_OV518:
3263        case BRIDGE_OV518PLUS:
3264                ov518_configure(gspca_dev);
3265                break;
3266        case BRIDGE_OV519:
3267                ov519_configure(sd);
3268                break;
3269        case BRIDGE_OVFX2:
3270                ovfx2_configure(sd);
3271                break;
3272        case BRIDGE_W9968CF:
3273                w9968cf_configure(sd);
3274                break;
3275        }
3276
3277        /* The OV519 must be more aggressive about sensor detection since
3278         * I2C write will never fail if the sensor is not present. We have
3279         * to try to initialize the sensor to detect its presence */
3280        sd->sensor = -1;
3281
3282        /* Test for 76xx */
3283        if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3284                ov7xx0_configure(sd);
3285
3286        /* Test for 6xx0 */
3287        } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3288                ov6xx0_configure(sd);
3289
3290        /* Test for 8xx0 */
3291        } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3292                ov8xx0_configure(sd);
3293
3294        /* Test for 3xxx / 2xxx */
3295        } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3296                ov_hires_configure(sd);
3297        } else {
3298                PERR("Can't determine sensor slave IDs\n");
3299                goto error;
3300        }
3301
3302        if (sd->sensor < 0)
3303                goto error;
3304
3305        ov51x_led_control(sd, 0);       /* turn LED off */
3306
3307        switch (sd->bridge) {
3308        case BRIDGE_OV511:
3309        case BRIDGE_OV511PLUS:
3310                if (sd->sif) {
3311                        cam->cam_mode = ov511_sif_mode;
3312                        cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3313                }
3314                break;
3315        case BRIDGE_OV518:
3316        case BRIDGE_OV518PLUS:
3317                if (sd->sif) {
3318                        cam->cam_mode = ov518_sif_mode;
3319                        cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3320                }
3321                break;
3322        case BRIDGE_OV519:
3323                if (sd->sif) {
3324                        cam->cam_mode = ov519_sif_mode;
3325                        cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3326                }
3327                break;
3328        case BRIDGE_OVFX2:
3329                switch (sd->sensor) {
3330                case SEN_OV2610:
3331                case SEN_OV2610AE:
3332                        cam->cam_mode = ovfx2_ov2610_mode;
3333                        cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3334                        break;
3335                case SEN_OV3610:
3336                        cam->cam_mode = ovfx2_ov3610_mode;
3337                        cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3338                        break;
3339                case SEN_OV9600:
3340                        cam->cam_mode = ovfx2_ov9600_mode;
3341                        cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3342                        break;
3343                default:
3344                        if (sd->sif) {
3345                                cam->cam_mode = ov519_sif_mode;
3346                                cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3347                        }
3348                        break;
3349                }
3350                break;
3351        case BRIDGE_W9968CF:
3352                if (sd->sif)
3353                        cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3354
3355                /* w9968cf needs initialisation once the sensor is known */
3356                w9968cf_init(sd);
3357                break;
3358        }
3359
3360        /* initialize the sensor */
3361        switch (sd->sensor) {
3362        case SEN_OV2610:
3363                write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3364
3365                /* Enable autogain, autoexpo, awb, bandfilter */
3366                i2c_w_mask(sd, 0x13, 0x27, 0x27);
3367                break;
3368        case SEN_OV2610AE:
3369                write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3370
3371                /* enable autoexpo */
3372                i2c_w_mask(sd, 0x13, 0x05, 0x05);
3373                break;
3374        case SEN_OV3610:
3375                write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3376
3377                /* Enable autogain, autoexpo, awb, bandfilter */
3378                i2c_w_mask(sd, 0x13, 0x27, 0x27);
3379                break;
3380        case SEN_OV6620:
3381                write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3382                break;
3383        case SEN_OV6630:
3384        case SEN_OV66308AF:
3385                write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3386                break;
3387        default:
3388/*      case SEN_OV7610: */
3389/*      case SEN_OV76BE: */
3390                write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3391                i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3392                break;
3393        case SEN_OV7620:
3394        case SEN_OV7620AE:
3395                write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3396                break;
3397        case SEN_OV7640:
3398        case SEN_OV7648:
3399                write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3400                break;
3401        case SEN_OV7660:
3402                i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3403                msleep(14);
3404                reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3405                write_regvals(sd, init_519_ov7660,
3406                                ARRAY_SIZE(init_519_ov7660));
3407                write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3408                sd->gspca_dev.curr_mode = 1;    /* 640x480 */
3409                ov519_set_mode(sd);
3410                ov519_set_fr(sd);
3411                sd_reset_snapshot(gspca_dev);
3412                ov51x_restart(sd);
3413                ov51x_stop(sd);                 /* not in win traces */
3414                ov51x_led_control(sd, 0);
3415                break;
3416        case SEN_OV7670:
3417                write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3418                break;
3419        case SEN_OV8610:
3420                write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3421                break;
3422        case SEN_OV9600:
3423                write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3424
3425                /* enable autoexpo */
3426/*              i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3427                break;
3428        }
3429        return gspca_dev->usb_err;
3430error:
3431        PERR("OV519 Config failed");
3432        return -EINVAL;
3433}
3434
3435/* function called at start time before URB creation */
3436static int sd_isoc_init(struct gspca_dev *gspca_dev)
3437{
3438        struct sd *sd = (struct sd *) gspca_dev;
3439
3440        switch (sd->bridge) {
3441        case BRIDGE_OVFX2:
3442                if (gspca_dev->pixfmt.width != 800)
3443                        gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3444                else
3445                        gspca_dev->cam.bulk_size = 7 * 4096;
3446                break;
3447        }
3448        return 0;
3449}
3450
3451/* Set up the OV511/OV511+ with the given image parameters.
3452 *
3453 * Do not put any sensor-specific code in here (including I2C I/O functions)
3454 */
3455static void ov511_mode_init_regs(struct sd *sd)
3456{
3457        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3458        int hsegs, vsegs, packet_size, fps, needed;
3459        int interlaced = 0;
3460        struct usb_host_interface *alt;
3461        struct usb_interface *intf;
3462
3463        intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3464        alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3465        if (!alt) {
3466                PERR("Couldn't get altsetting\n");
3467                sd->gspca_dev.usb_err = -EIO;
3468                return;
3469        }
3470
3471        packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3472        reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3473
3474        reg_w(sd, R511_CAM_UV_EN, 0x01);
3475        reg_w(sd, R511_SNAP_UV_EN, 0x01);
3476        reg_w(sd, R511_SNAP_OPTS, 0x03);
3477
3478        /* Here I'm assuming that snapshot size == image size.
3479         * I hope that's always true. --claudio
3480         */
3481        hsegs = (sd->gspca_dev.pixfmt.width >> 3) - 1;
3482        vsegs = (sd->gspca_dev.pixfmt.height >> 3) - 1;
3483
3484        reg_w(sd, R511_CAM_PXCNT, hsegs);
3485        reg_w(sd, R511_CAM_LNCNT, vsegs);
3486        reg_w(sd, R511_CAM_PXDIV, 0x00);
3487        reg_w(sd, R511_CAM_LNDIV, 0x00);
3488
3489        /* YUV420, low pass filter on */
3490        reg_w(sd, R511_CAM_OPTS, 0x03);
3491
3492        /* Snapshot additions */
3493        reg_w(sd, R511_SNAP_PXCNT, hsegs);
3494        reg_w(sd, R511_SNAP_LNCNT, vsegs);
3495        reg_w(sd, R511_SNAP_PXDIV, 0x00);
3496        reg_w(sd, R511_SNAP_LNDIV, 0x00);
3497
3498        /******** Set the framerate ********/
3499        if (frame_rate > 0)
3500                sd->frame_rate = frame_rate;
3501
3502        switch (sd->sensor) {
3503        case SEN_OV6620:
3504                /* No framerate control, doesn't like higher rates yet */
3505                sd->clockdiv = 3;
3506                break;
3507
3508        /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3509           for more sensors we need to do this for them too */
3510        case SEN_OV7620:
3511        case SEN_OV7620AE:
3512        case SEN_OV7640:
3513        case SEN_OV7648:
3514        case SEN_OV76BE:
3515                if (sd->gspca_dev.pixfmt.width == 320)
3516                        interlaced = 1;
3517                /* Fall through */
3518        case SEN_OV6630:
3519        case SEN_OV7610:
3520        case SEN_OV7670:
3521                switch (sd->frame_rate) {
3522                case 30:
3523                case 25:
3524                        /* Not enough bandwidth to do 640x480 @ 30 fps */
3525                        if (sd->gspca_dev.pixfmt.width != 640) {
3526                                sd->clockdiv = 0;
3527                                break;
3528                        }
3529                        /* Fall through for 640x480 case */
3530                default:
3531/*              case 20: */
3532/*              case 15: */
3533                        sd->clockdiv = 1;
3534                        break;
3535                case 10:
3536                        sd->clockdiv = 2;
3537                        break;
3538                case 5:
3539                        sd->clockdiv = 5;
3540                        break;
3541                }
3542                if (interlaced) {
3543                        sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3544                        /* Higher then 10 does not work */
3545                        if (sd->clockdiv > 10)
3546                                sd->clockdiv = 10;
3547                }
3548                break;
3549
3550        case SEN_OV8610:
3551                /* No framerate control ?? */
3552                sd->clockdiv = 0;
3553                break;
3554        }
3555
3556        /* Check if we have enough bandwidth to disable compression */
3557        fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3558        needed = fps * sd->gspca_dev.pixfmt.width *
3559                        sd->gspca_dev.pixfmt.height * 3 / 2;
3560        /* 1000 isoc packets/sec */
3561        if (needed > 1000 * packet_size) {
3562                /* Enable Y and UV quantization and compression */
3563                reg_w(sd, R511_COMP_EN, 0x07);
3564                reg_w(sd, R511_COMP_LUT_EN, 0x03);
3565        } else {
3566                reg_w(sd, R511_COMP_EN, 0x06);
3567                reg_w(sd, R511_COMP_LUT_EN, 0x00);
3568        }
3569
3570        reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3571        reg_w(sd, R51x_SYS_RESET, 0);
3572}
3573
3574/* Sets up the OV518/OV518+ with the given image parameters
3575 *
3576 * OV518 needs a completely different approach, until we can figure out what
3577 * the individual registers do. Also, only 15 FPS is supported now.
3578 *
3579 * Do not put any sensor-specific code in here (including I2C I/O functions)
3580 */
3581static void ov518_mode_init_regs(struct sd *sd)
3582{
3583        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3584        int hsegs, vsegs, packet_size;
3585        struct usb_host_interface *alt;
3586        struct usb_interface *intf;
3587
3588        intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3589        alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3590        if (!alt) {
3591                PERR("Couldn't get altsetting\n");
3592                sd->gspca_dev.usb_err = -EIO;
3593                return;
3594        }
3595
3596        packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3597        ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3598
3599        /******** Set the mode ********/
3600        reg_w(sd, 0x2b, 0);
3601        reg_w(sd, 0x2c, 0);
3602        reg_w(sd, 0x2d, 0);
3603        reg_w(sd, 0x2e, 0);
3604        reg_w(sd, 0x3b, 0);
3605        reg_w(sd, 0x3c, 0);
3606        reg_w(sd, 0x3d, 0);
3607        reg_w(sd, 0x3e, 0);
3608
3609        if (sd->bridge == BRIDGE_OV518) {
3610                /* Set 8-bit (YVYU) input format */
3611                reg_w_mask(sd, 0x20, 0x08, 0x08);
3612
3613                /* Set 12-bit (4:2:0) output format */
3614                reg_w_mask(sd, 0x28, 0x80, 0xf0);
3615                reg_w_mask(sd, 0x38, 0x80, 0xf0);
3616        } else {
3617                reg_w(sd, 0x28, 0x80);
3618                reg_w(sd, 0x38, 0x80);
3619        }
3620
3621        hsegs = sd->gspca_dev.pixfmt.width / 16;
3622        vsegs = sd->gspca_dev.pixfmt.height / 4;
3623
3624        reg_w(sd, 0x29, hsegs);
3625        reg_w(sd, 0x2a, vsegs);
3626
3627        reg_w(sd, 0x39, hsegs);
3628        reg_w(sd, 0x3a, vsegs);
3629
3630        /* Windows driver does this here; who knows why */
3631        reg_w(sd, 0x2f, 0x80);
3632
3633        /******** Set the framerate ********/
3634        if (sd->bridge == BRIDGE_OV518PLUS && sd->revision == 0 &&
3635                                              sd->sensor == SEN_OV7620AE)
3636                sd->clockdiv = 0;
3637        else
3638                sd->clockdiv = 1;
3639
3640        /* Mode independent, but framerate dependent, regs */
3641        /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3642        reg_w(sd, 0x51, 0x04);
3643        reg_w(sd, 0x22, 0x18);
3644        reg_w(sd, 0x23, 0xff);
3645
3646        if (sd->bridge == BRIDGE_OV518PLUS) {
3647                switch (sd->sensor) {
3648                case SEN_OV7620AE:
3649                        /*
3650                         * HdG: 640x480 needs special handling on device
3651                         * revision 2, we check for device revison > 0 to
3652                         * avoid regressions, as we don't know the correct
3653                         * thing todo for revision 1.
3654                         *
3655                         * Also this likely means we don't need to
3656                         * differentiate between the OV7620 and OV7620AE,
3657                         * earlier testing hitting this same problem likely
3658                         * happened to be with revision < 2 cams using an
3659                         * OV7620 and revision 2 cams using an OV7620AE.
3660                         */
3661                        if (sd->revision > 0 &&
3662                                        sd->gspca_dev.pixfmt.width == 640) {
3663                                reg_w(sd, 0x20, 0x60);
3664                                reg_w(sd, 0x21, 0x1f);
3665                        } else {
3666                                reg_w(sd, 0x20, 0x00);
3667                                reg_w(sd, 0x21, 0x19);
3668                        }
3669                        break;
3670                case SEN_OV7620:
3671                        reg_w(sd, 0x20, 0x00);
3672                        reg_w(sd, 0x21, 0x19);
3673                        break;
3674                default:
3675                        reg_w(sd, 0x21, 0x19);
3676                }
3677        } else
3678                reg_w(sd, 0x71, 0x17);  /* Compression-related? */
3679
3680        /* FIXME: Sensor-specific */
3681        /* Bit 5 is what matters here. Of course, it is "reserved" */
3682        i2c_w(sd, 0x54, 0x23);
3683
3684        reg_w(sd, 0x2f, 0x80);
3685
3686        if (sd->bridge == BRIDGE_OV518PLUS) {
3687                reg_w(sd, 0x24, 0x94);
3688                reg_w(sd, 0x25, 0x90);
3689                ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3690                ov518_reg_w32(sd, 0xc6,    540, 2);     /* 21ch   */
3691                ov518_reg_w32(sd, 0xc7,    540, 2);     /* 21ch   */
3692                ov518_reg_w32(sd, 0xc8,    108, 2);     /* 6ch    */
3693                ov518_reg_w32(sd, 0xca, 131098, 3);     /* 2001ah */
3694                ov518_reg_w32(sd, 0xcb,    532, 2);     /* 214h   */
3695                ov518_reg_w32(sd, 0xcc,   2400, 2);     /* 960h   */
3696                ov518_reg_w32(sd, 0xcd,     32, 2);     /* 20h    */
3697                ov518_reg_w32(sd, 0xce,    608, 2);     /* 260h   */
3698        } else {
3699                reg_w(sd, 0x24, 0x9f);
3700                reg_w(sd, 0x25, 0x90);
3701                ov518_reg_w32(sd, 0xc4,    400, 2);     /* 190h   */
3702                ov518_reg_w32(sd, 0xc6,    381, 2);     /* 17dh   */
3703                ov518_reg_w32(sd, 0xc7,    381, 2);     /* 17dh   */
3704                ov518_reg_w32(sd, 0xc8,    128, 2);     /* 80h    */
3705                ov518_reg_w32(sd, 0xca, 183331, 3);     /* 2cc23h */
3706                ov518_reg_w32(sd, 0xcb,    746, 2);     /* 2eah   */
3707                ov518_reg_w32(sd, 0xcc,   1750, 2);     /* 6d6h   */
3708                ov518_reg_w32(sd, 0xcd,     45, 2);     /* 2dh    */
3709                ov518_reg_w32(sd, 0xce,    851, 2);     /* 353h   */
3710        }
3711
3712        reg_w(sd, 0x2f, 0x80);
3713}
3714
3715/* Sets up the OV519 with the given image parameters
3716 *
3717 * OV519 needs a completely different approach, until we can figure out what
3718 * the individual registers do.
3719 *
3720 * Do not put any sensor-specific code in here (including I2C I/O functions)
3721 */
3722static void ov519_mode_init_regs(struct sd *sd)
3723{
3724        static const struct ov_regvals mode_init_519_ov7670[] = {
3725                { 0x5d, 0x03 }, /* Turn off suspend mode */
3726                { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3727                { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3728                { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3729                { 0xa3, 0x18 },
3730                { 0xa4, 0x04 },
3731                { 0xa5, 0x28 },
3732                { 0x37, 0x00 }, /* SetUsbInit */
3733                { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3734                /* Enable both fields, YUV Input, disable defect comp (why?) */
3735                { 0x20, 0x0c },
3736                { 0x21, 0x38 },
3737                { 0x22, 0x1d },
3738                { 0x17, 0x50 }, /* undocumented */
3739                { 0x37, 0x00 }, /* undocumented */
3740                { 0x40, 0xff }, /* I2C timeout counter */
3741                { 0x46, 0x00 }, /* I2C clock prescaler */
3742                { 0x59, 0x04 }, /* new from windrv 090403 */
3743                { 0xff, 0x00 }, /* undocumented */
3744                /* windows reads 0x55 at this point, why? */
3745        };
3746
3747        static const struct ov_regvals mode_init_519[] = {
3748                { 0x5d, 0x03 }, /* Turn off suspend mode */
3749                { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3750                { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3751                { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3752                { 0xa3, 0x18 },
3753                { 0xa4, 0x04 },
3754                { 0xa5, 0x28 },
3755                { 0x37, 0x00 }, /* SetUsbInit */
3756                { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3757                /* Enable both fields, YUV Input, disable defect comp (why?) */
3758                { 0x22, 0x1d },
3759                { 0x17, 0x50 }, /* undocumented */
3760                { 0x37, 0x00 }, /* undocumented */
3761                { 0x40, 0xff }, /* I2C timeout counter */
3762                { 0x46, 0x00 }, /* I2C clock prescaler */
3763                { 0x59, 0x04 }, /* new from windrv 090403 */
3764                { 0xff, 0x00 }, /* undocumented */
3765                /* windows reads 0x55 at this point, why? */
3766        };
3767
3768        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3769
3770        /******** Set the mode ********/
3771        switch (sd->sensor) {
3772        default:
3773                write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3774                if (sd->sensor == SEN_OV7640 ||
3775                    sd->sensor == SEN_OV7648) {
3776                        /* Select 8-bit input mode */
3777                        reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3778                }
3779                break;
3780        case SEN_OV7660:
3781                return;         /* done by ov519_set_mode/fr() */
3782        case SEN_OV7670:
3783                write_regvals(sd, mode_init_519_ov7670,
3784                                ARRAY_SIZE(mode_init_519_ov7670));
3785                break;
3786        }
3787
3788        reg_w(sd, OV519_R10_H_SIZE,     sd->gspca_dev.pixfmt.width >> 4);
3789        reg_w(sd, OV519_R11_V_SIZE,     sd->gspca_dev.pixfmt.height >> 3);
3790        if (sd->sensor == SEN_OV7670 &&
3791            sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3792                reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3793        else if (sd->sensor == SEN_OV7648 &&
3794            sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3795                reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3796        else
3797                reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3798        reg_w(sd, OV519_R13_X_OFFSETH,  0x00);
3799        reg_w(sd, OV519_R14_Y_OFFSETL,  0x00);
3800        reg_w(sd, OV519_R15_Y_OFFSETH,  0x00);
3801        reg_w(sd, OV519_R16_DIVIDER,    0x00);
3802        reg_w(sd, OV519_R25_FORMAT,     0x03); /* YUV422 */
3803        reg_w(sd, 0x26,                 0x00); /* Undocumented */
3804
3805        /******** Set the framerate ********/
3806        if (frame_rate > 0)
3807                sd->frame_rate = frame_rate;
3808
3809/* FIXME: These are only valid at the max resolution. */
3810        sd->clockdiv = 0;
3811        switch (sd->sensor) {
3812        case SEN_OV7640:
3813        case SEN_OV7648:
3814                switch (sd->frame_rate) {
3815                default:
3816/*              case 30: */
3817                        reg_w(sd, 0xa4, 0x0c);
3818                        reg_w(sd, 0x23, 0xff);
3819                        break;
3820                case 25:
3821                        reg_w(sd, 0xa4, 0x0c);
3822                        reg_w(sd, 0x23, 0x1f);
3823                        break;
3824                case 20:
3825                        reg_w(sd, 0xa4, 0x0c);
3826                        reg_w(sd, 0x23, 0x1b);
3827                        break;
3828                case 15:
3829                        reg_w(sd, 0xa4, 0x04);
3830                        reg_w(sd, 0x23, 0xff);
3831                        sd->clockdiv = 1;
3832                        break;
3833                case 10:
3834                        reg_w(sd, 0xa4, 0x04);
3835                        reg_w(sd, 0x23, 0x1f);
3836                        sd->clockdiv = 1;
3837                        break;
3838                case 5:
3839                        reg_w(sd, 0xa4, 0x04);
3840                        reg_w(sd, 0x23, 0x1b);
3841                        sd->clockdiv = 1;
3842                        break;
3843                }
3844                break;
3845        case SEN_OV8610:
3846                switch (sd->frame_rate) {
3847                default:        /* 15 fps */
3848/*              case 15: */
3849                        reg_w(sd, 0xa4, 0x06);
3850                        reg_w(sd, 0x23, 0xff);
3851                        break;
3852                case 10:
3853                        reg_w(sd, 0xa4, 0x06);
3854                        reg_w(sd, 0x23, 0x1f);
3855                        break;
3856                case 5:
3857                        reg_w(sd, 0xa4, 0x06);
3858                        reg_w(sd, 0x23, 0x1b);
3859                        break;
3860                }
3861                break;
3862        case SEN_OV7670:                /* guesses, based on 7640 */
3863                PDEBUG(D_STREAM, "Setting framerate to %d fps",
3864                                 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3865                reg_w(sd, 0xa4, 0x10);
3866                switch (sd->frame_rate) {
3867                case 30:
3868                        reg_w(sd, 0x23, 0xff);
3869                        break;
3870                case 20:
3871                        reg_w(sd, 0x23, 0x1b);
3872                        break;
3873                default:
3874/*              case 15: */
3875                        reg_w(sd, 0x23, 0xff);
3876                        sd->clockdiv = 1;
3877                        break;
3878                }
3879                break;
3880        }
3881}
3882
3883static void mode_init_ov_sensor_regs(struct sd *sd)
3884{
3885        struct gspca_dev *gspca_dev = (struct gspca_dev *)sd;
3886        int qvga, xstart, xend, ystart, yend;
3887        u8 v;
3888
3889        qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3890
3891        /******** Mode (VGA/QVGA) and sensor specific regs ********/
3892        switch (sd->sensor) {
3893        case SEN_OV2610:
3894                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3895                i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3896                i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3897                i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3898                i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3899                i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3900                i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3901                return;
3902        case SEN_OV2610AE: {
3903                u8 v;
3904
3905                /* frame rates:
3906                 *      10fps / 5 fps for 1600x1200
3907                 *      40fps / 20fps for 800x600
3908                 */
3909                v = 80;
3910                if (qvga) {
3911                        if (sd->frame_rate < 25)
3912                                v = 0x81;
3913                } else {
3914                        if (sd->frame_rate < 10)
3915                                v = 0x81;
3916                }
3917                i2c_w(sd, 0x11, v);
3918                i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3919                return;
3920            }
3921        case SEN_OV3610:
3922                if (qvga) {
3923                        xstart = (1040 - gspca_dev->pixfmt.width) / 2 +
3924                                (0x1f << 4);
3925                        ystart = (776 - gspca_dev->pixfmt.height) / 2;
3926                } else {
3927                        xstart = (2076 - gspca_dev->pixfmt.width) / 2 +
3928                                (0x10 << 4);
3929                        ystart = (1544 - gspca_dev->pixfmt.height) / 2;
3930                }
3931                xend = xstart + gspca_dev->pixfmt.width;
3932                yend = ystart + gspca_dev->pixfmt.height;
3933                /* Writing to the COMH register resets the other windowing regs
3934                   to their default values, so we must do this first. */
3935                i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3936                i2c_w_mask(sd, 0x32,
3937                           (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3938                           0x3f);
3939                i2c_w_mask(sd, 0x03,
3940                           (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3941                           0x0f);
3942                i2c_w(sd, 0x17, xstart >> 4);
3943                i2c_w(sd, 0x18, xend >> 4);
3944                i2c_w(sd, 0x19, ystart >> 3);
3945                i2c_w(sd, 0x1a, yend >> 3);
3946                return;
3947        case SEN_OV8610:
3948                /* For OV8610 qvga means qsvga */
3949                i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3950                i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3951                i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3952                i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3953                i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3954                break;
3955        case SEN_OV7610:
3956                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3957                i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3958                i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3959                i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3960                break;
3961        case SEN_OV7620:
3962        case SEN_OV7620AE:
3963        case SEN_OV76BE:
3964                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3965                i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3966                i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3967                i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3968                i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3969                i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3970                i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3971                i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3972                i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3973                if (sd->sensor == SEN_OV76BE)
3974                        i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3975                break;
3976        case SEN_OV7640:
3977        case SEN_OV7648:
3978                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3979                i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3980                /* Setting this undocumented bit in qvga mode removes a very
3981                   annoying vertical shaking of the image */
3982                i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3983                /* Unknown */
3984                i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3985                /* Allow higher automatic gain (to allow higher framerates) */
3986                i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3987                i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3988                break;
3989        case SEN_OV7670:
3990                /* set COM7_FMT_VGA or COM7_FMT_QVGA
3991                 * do we need to set anything else?
3992                 *      HSTART etc are set in set_ov_sensor_window itself */
3993                i2c_w_mask(sd, OV7670_R12_COM7,
3994                         qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3995                         OV7670_COM7_FMT_MASK);
3996                i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3997                i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3998                                OV7670_COM8_AWB);
3999                if (qvga) {             /* QVGA from ov7670.c by
4000                                         * Jonathan Corbet */

4001                        xstart = 164;
4002                        xend = 28;
4003                        ystart = 14;
4004                        yend = 494;
4005                } else {                /* VGA */
4006                        xstart = 158;
4007                        xend = 14;
4008                        ystart = 10;
4009                        yend = 490;
4010                }
4011                /* OV7670 hardware window registers are split across
4012                 * multiple locations */
4013                i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4014                i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4015                v = i2c_r(sd, OV7670_R32_HREF);
4016                v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4017                msleep(10);     /* need to sleep between read and write to
4018                                 * same reg! */
4019                i2c_w(sd, OV7670_R32_HREF, v);
4020
4021                i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4022                i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4023                v = i2c_r(sd, OV7670_R03_VREF);
4024                v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4025                msleep(10);     /* need to sleep between read and write to
4026                                 * same reg! */
4027                i2c_w(sd, OV7670_R03_VREF, v);
4028                break;
4029        case SEN_OV6620:
4030                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4031                i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4032                i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4033                break;
4034        case SEN_OV6630:
4035        case SEN_OV66308AF:
4036                i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4037                i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4038                break;
4039        case SEN_OV9600: {
4040                const struct ov_i2c_regvals *vals;
4041                static const struct ov_i2c_regvals sxga_15[] = {
4042                        {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4043                };
4044                static const struct ov_i2c_regvals sxga_7_5[] = {
4045                        {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4046                };
4047                static const struct ov_i2c_regvals vga_30[] = {
4048                        {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4049                };
4050                static const struct ov_i2c_regvals vga_15[] = {
4051                        {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4052                };
4053
4054                /* frame rates:
4055                 *      15fps / 7.5 fps for 1280x1024
4056                 *      30fps / 15fps for 640x480
4057                 */
4058                i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4059                if (qvga)
4060                        vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4061                else
4062                        vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4063                write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4064                return;
4065            }
4066        default:
4067                return;
4068        }
4069
4070        /******** Clock programming ********/
4071        i2c_w(sd, 0x11, sd->clockdiv);
4072}
4073
4074/* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4075static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4076{
4077        struct sd *sd = (struct sd *) gspca_dev;
4078
4079        if (sd->gspca_dev.streaming)
4080                reg_w(sd, OV519_R51_RESET1, 0x0f);      /* block stream */
4081        i2c_w_mask(sd, OV7670_R1E_MVFP,
4082                OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4083                OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4084        if (sd->gspca_dev.streaming)
4085                reg_w(sd, OV519_R51_RESET1, 0x00);      /* restart stream */
4086}
4087
4088static void set_ov_sensor_window(struct sd *sd)
4089{
4090        struct gspca_dev *gspca_dev;
4091        int qvga, crop;
4092        int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4093
4094        /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4095        switch (sd->sensor) {
4096        case SEN_OV2610:
4097        case SEN_OV2610AE:
4098        case SEN_OV3610:
4099        case SEN_OV7670:
4100        case SEN_OV9600:
4101                mode_init_ov_sensor_regs(sd);
4102                return;
4103        case SEN_OV7660:
4104                ov519_set_mode(sd);
4105                ov519_set_fr(sd);
4106                return;
4107        }
4108
4109        gspca_dev = &sd->gspca_dev;
4110        qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4111        crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4112
4113        /* The different sensor ICs handle setting up of window differently.
4114         * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4115        switch (sd->sensor) {
4116        case SEN_OV8610:
4117                hwsbase = 0x1e;
4118                hwebase = 0x1e;
4119                vwsbase = 0x02;
4120                vwebase = 0x02;
4121                break;
4122        case SEN_OV7610:
4123        case SEN_OV76BE:
4124                hwsbase = 0x38;
4125                hwebase = 0x3a;
4126                vwsbase = vwebase = 0x05;
4127                break;
4128        case SEN_OV6620:
4129        case SEN_OV6630:
4130        case SEN_OV66308AF:
4131                hwsbase = 0x38;
4132                hwebase = 0x3a;
4133                vwsbase = 0x05;
4134                vwebase = 0x06;
4135                if (sd->sensor == SEN_OV66308AF && qvga)
4136                        /* HDG: this fixes U and V getting swapped */
4137                        hwsbase++;
4138                if (crop) {
4139                        hwsbase += 8;
4140                        hwebase += 8;
4141                        vwsbase += 11;
4142                        vwebase += 11;
4143                }
4144                break;
4145        case SEN_OV7620:
4146        case SEN_OV7620AE:
4147                hwsbase = 0x2f;         /* From 7620.SET (spec is wrong) */
4148                hwebase = 0x2f;
4149                vwsbase = vwebase = 0x05;
4150                break;
4151        case SEN_OV7640:
4152        case SEN_OV7648:
4153                hwsbase = 0x1a;
4154                hwebase = 0x1a;
4155                vwsbase = vwebase = 0x03;
4156                break;
4157        default:
4158                return;
4159        }
4160
4161        switch (sd->sensor) {
4162        case SEN_OV6620:
4163        case SEN_OV6630:
4164        case SEN_OV66308AF:
4165                if (qvga) {             /* QCIF */
4166                        hwscale = 0;
4167                        vwscale = 0;
4168                } else {                /* CIF */
4169                        hwscale = 1;
4170                        vwscale = 1;    /* The datasheet says 0;
4171                                         * it's wrong */
4172                }
4173                break;
4174        case SEN_OV8610:
4175                if (qvga) {             /* QSVGA */
4176                        hwscale = 1;
4177                        vwscale = 1;
4178                } else {                /* SVGA */
4179                        hwscale = 2;
4180                        vwscale = 2;
4181                }
4182                break;
4183        default:                        /* SEN_OV7xx0 */
4184                if (qvga) {             /* QVGA */
4185                        hwscale = 1;
4186                        vwscale = 0;
4187                } else {                /* VGA */
4188                        hwscale = 2;
4189                        vwscale = 1;
4190                }
4191        }
4192
4193        mode_init_ov_sensor_regs(sd);
4194
4195        i2c_w(sd, 0x17, hwsbase);
4196        i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4197        i2c_w(sd, 0x19, vwsbase);
4198        i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4199}
4200
4201/* -- start the camera -- */
4202static int sd_start(struct gspca_dev *gspca_dev)
4203{
4204        struct sd *sd = (struct sd *) gspca_dev;
4205
4206        /* Default for most bridges, allow bridge_mode_init_regs to override */
4207        sd->sensor_width = sd->gspca_dev.pixfmt.width;
4208        sd->sensor_height = sd->gspca_dev.pixfmt.height;
4209
4210        switch (sd->bridge) {
4211        case BRIDGE_OV511:
4212        case BRIDGE_OV511PLUS:
4213                ov511_mode_init_regs(sd);
4214                break;
4215        case BRIDGE_OV518:
4216        case BRIDGE_OV518PLUS:
4217                ov518_mode_init_regs(sd);
4218                break;
4219        case BRIDGE_OV519:
4220                ov519_mode_init_regs(sd);
4221                break;
4222        /* case BRIDGE_OVFX2: nothing to do */
4223        case BRIDGE_W9968CF:
4224                w9968cf_mode_init_regs(sd);
4225                break;
4226        }
4227
4228        set_ov_sensor_window(sd);
4229
4230        /* Force clear snapshot state in case the snapshot button was
4231           pressed while we weren't streaming */
4232        sd->snapshot_needs_reset = 1;
4233        sd_reset_snapshot(gspca_dev);
4234
4235        sd->first_frame = 3;
4236
4237        ov51x_restart(sd);
4238        ov51x_led_control(sd, 1);
4239        return gspca_dev->usb_err;
4240}
4241
4242static void sd_stopN(struct gspca_dev *gspca_dev)
4243{
4244        struct sd *sd = (struct sd *) gspca_dev;
4245
4246        ov51x_stop(sd);
4247        ov51x_led_control(sd, 0);
4248}
4249
4250static void sd_stop0(struct gspca_dev *gspca_dev)
4251{
4252        struct sd *sd = (struct sd *) gspca_dev;
4253
4254        if (!sd->gspca_dev.present)
4255                return;
4256        if (sd->bridge == BRIDGE_W9968CF)
4257                w9968cf_stop0(sd);
4258
4259#if IS_ENABLED(CONFIG_INPUT)
4260        /* If the last button state is pressed, release it now! */
4261        if (sd->snapshot_pressed) {
4262                input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4263                input_sync(gspca_dev->input_dev);
4264                sd->snapshot_pressed = 0;
4265        }
4266#endif
4267        if (sd->bridge == BRIDGE_OV519)
4268                reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4269}
4270
4271static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4272{
4273        struct sd *sd = (struct sd *) gspca_dev;
4274
4275        if (sd->snapshot_pressed != state) {
4276#if IS_ENABLED(CONFIG_INPUT)
4277                input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4278                input_sync(gspca_dev->input_dev);
4279#endif
4280                if (state)
4281                        sd->snapshot_needs_reset = 1;
4282
4283                sd->snapshot_pressed = state;
4284        } else {
4285                /* On the ov511 / ov519 we need to reset the button state
4286                   multiple times, as resetting does not work as long as the
4287                   button stays pressed */
4288                switch (sd->bridge) {
4289                case BRIDGE_OV511:
4290                case BRIDGE_OV511PLUS:
4291                case BRIDGE_OV519:
4292                        if (state)
4293                                sd->snapshot_needs_reset = 1;
4294                        break;
4295                }
4296        }
4297}
4298
4299static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4300                        u8 *in,                 /* isoc packet */
4301                        int len)                /* iso packet length */
4302{
4303        struct sd *sd = (struct sd *) gspca_dev;
4304
4305        /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4306         * byte non-zero. The EOF packet has image width/height in the
4307         * 10th and 11th bytes. The 9th byte is given as follows:
4308         *
4309         * bit 7: EOF
4310         *     6: compression enabled
4311         *     5: 422/420/400 modes
4312         *     4: 422/420/400 modes
4313         *     3: 1
4314         *     2: snapshot button on
4315         *     1: snapshot frame
4316         *     0: even/odd field
4317         */
4318        if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4319            (in[8] & 0x08)) {
4320                ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4321                if (in[8] & 0x80) {
4322                        /* Frame end */
4323                        if ((in[9] + 1) * 8 != gspca_dev->pixfmt.width ||
4324                            (in[10] + 1) * 8 != gspca_dev->pixfmt.height) {
4325                                PERR("Invalid frame size, got: %dx%d, requested: %dx%d\n",
4326                                        (in[9] + 1) * 8, (in[10] + 1) * 8,
4327                                        gspca_dev->pixfmt.width,
4328                                        gspca_dev->pixfmt.height);
4329                                gspca_dev->last_packet_type = DISCARD_PACKET;
4330                                return;
4331                        }
4332                        /* Add 11 byte footer to frame, might be useful */
4333                        gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4334                        return;
4335                } else {
4336                        /* Frame start */
4337                        gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4338                        sd->packet_nr = 0;
4339                }
4340        }
4341
4342        /* Ignore the packet number */
4343        len--;
4344
4345        /* intermediate packet */
4346        gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4347}
4348
4349static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4350                        u8 *data,                       /* isoc packet */
4351                        int len)                        /* iso packet length */
4352{
4353        struct sd *sd = (struct sd *) gspca_dev;
4354
4355        /* A false positive here is likely, until OVT gives me
4356         * the definitive SOF/EOF format */
4357        if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4358                ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4359                gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4360                gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4361                sd->packet_nr = 0;
4362        }
4363
4364        if (gspca_dev->last_packet_type == DISCARD_PACKET)
4365                return;
4366
4367        /* Does this device use packet numbers ? */
4368        if (len & 7) {
4369                len--;
4370                if (sd->packet_nr == data[len])
4371                        sd->packet_nr++;
4372                /* The last few packets of the frame (which are all 0's
4373                   except that they may contain part of the footer), are
4374                   numbered 0 */
4375                else if (sd->packet_nr == 0 || data[len]) {
4376                        PERR("Invalid packet nr: %d (expect: %d)",
4377                                (int)data[len], (int)sd->packet_nr);
4378                        gspca_dev->last_packet_type = DISCARD_PACKET;
4379                        return;
4380                }
4381        }
4382
4383        /* intermediate packet */
4384        gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4385}
4386
4387static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4388                        u8 *data,                       /* isoc packet */
4389                        int len)                        /* iso packet length */
4390{
4391        /* Header of ov519 is 16 bytes:
4392         *     Byte     Value      Description
4393         *      0       0xff    magic
4394         *      1       0xff    magic
4395         *      2       0xff    magic
4396         *      3       0xXX    0x50 = SOF, 0x51 = EOF
4397         *      9       0xXX    0x01 initial frame without data,
4398         *                      0x00 standard frame with image
4399         *      14      Lo      in EOF: length of image data / 8
4400         *      15      Hi
4401         */
4402
4403        if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4404                switch (data[3]) {
4405                case 0x50:              /* start of frame */
4406                        /* Don't check the button state here, as the state
4407                           usually (always ?) changes at EOF and checking it
4408                           here leads to unnecessary snapshot state resets. */
4409#define HDRSZ 16
4410                        data += HDRSZ;
4411                        len -= HDRSZ;
4412#undef HDRSZ
4413                        if (data[0] == 0xff || data[1] == 0xd8)
4414                                gspca_frame_add(gspca_dev, FIRST_PACKET,
4415                                                data, len);
4416                        else
4417                                gspca_dev->last_packet_type = DISCARD_PACKET;
4418                        return;
4419                case 0x51:              /* end of frame */
4420                        ov51x_handle_button(gspca_dev, data[11] & 1);
4421                        if (data[9] != 0)
4422                                gspca_dev->last_packet_type = DISCARD_PACKET;
4423                        gspca_frame_add(gspca_dev, LAST_PACKET,
4424                                        NULL, 0);
4425                        return;
4426                }
4427        }
4428
4429        /* intermediate packet */
4430        gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4431}
4432
4433static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4434                        u8 *data,                       /* isoc packet */
4435                        int len)                        /* iso packet length */
4436{
4437        struct sd *sd = (struct sd *) gspca_dev;
4438
4439        gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4440
4441        /* A short read signals EOF */
4442        if (len < gspca_dev->cam.bulk_size) {
4443                /* If the frame is short, and it is one of the first ones
4444                   the sensor and bridge are still syncing, so drop it. */
4445                if (sd->first_frame) {
4446                        sd->first_frame--;
4447                        if (gspca_dev->image_len <
4448                                  sd->gspca_dev.pixfmt.width *
4449                                        sd->gspca_dev.pixfmt.height)
4450                                gspca_dev->last_packet_type = DISCARD_PACKET;
4451                }
4452                gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4453                gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4454        }
4455}
4456
4457static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4458                        u8 *data,                       /* isoc packet */
4459                        int len)                        /* iso packet length */
4460{
4461        struct sd *sd = (struct sd *) gspca_dev;
4462
4463        switch (sd->bridge) {
4464        case BRIDGE_OV511:
4465        case BRIDGE_OV511PLUS:
4466                ov511_pkt_scan(gspca_dev, data, len);
4467                break;
4468        case BRIDGE_OV518:
4469        case BRIDGE_OV518PLUS:
4470                ov518_pkt_scan(gspca_dev, data, len);
4471                break;
4472        case BRIDGE_OV519:
4473                ov519_pkt_scan(gspca_dev, data, len);
4474                break;
4475        case BRIDGE_OVFX2:
4476                ovfx2_pkt_scan(gspca_dev, data, len);
4477                break;
4478        case BRIDGE_W9968CF:
4479                w9968cf_pkt_scan(gspca_dev, data, len);
4480                break;
4481        }
4482}
4483
4484/* -- management routines -- */
4485
4486static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4487{
4488        struct sd *sd = (struct sd *) gspca_dev;
4489        static const struct ov_i2c_regvals brit_7660[][7] = {
4490                {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4491                        {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4492                {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4493                        {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4494                {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4495                        {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4496                {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4497                        {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4498                {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4499                        {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4500                {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4501                        {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4502                {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4503                        {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4504        };
4505
4506        switch (sd->sensor) {
4507        case SEN_OV8610:
4508        case SEN_OV7610:
4509        case SEN_OV76BE:
4510        case SEN_OV6620:
4511        case SEN_OV6630:
4512        case SEN_OV66308AF:
4513        case SEN_OV7640:
4514        case SEN_OV7648:
4515                i2c_w(sd, OV7610_REG_BRT, val);
4516                break;
4517        case SEN_OV7620:
4518        case SEN_OV7620AE:
4519                i2c_w(sd, OV7610_REG_BRT, val);
4520                break;
4521        case SEN_OV7660:
4522                write_i2c_regvals(sd, brit_7660[val],
4523                                ARRAY_SIZE(brit_7660[0]));
4524                break;
4525        case SEN_OV7670:
4526/*win trace
4527 *              i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4528                i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4529                break;
4530        }
4531}
4532
4533static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4534{
4535        struct sd *sd = (struct sd *) gspca_dev;
4536        static const struct ov_i2c_regvals contrast_7660[][31] = {
4537                {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4538                 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4539                 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4540                 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4541                 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4542                 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4543                 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4544                 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4545                {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4546                 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4547                 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4548                 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4549                 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4550                 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4551                 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4552                 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4553                {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4554                 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4555                 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4556                 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4557                 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4558                 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4559                 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4560                 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4561                {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4562                 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4563                 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4564                 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4565                 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4566                 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4567                 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4568                 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4569                {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4570                 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4571                 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4572                 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4573                 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4574                 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4575                 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4576                 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4577                {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4578                 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4579                 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4580                 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4581                 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4582                 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4583                 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4584                 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4585                {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4586                 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4587                 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4588                 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4589                 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4590                 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4591                 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4592                 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4593        };
4594
4595        switch (sd->sensor) {
4596        case SEN_OV7610:
4597        case SEN_OV6620:
4598                i2c_w(sd, OV7610_REG_CNT, val);
4599                break;
4600        case SEN_OV6630:
4601        case SEN_OV66308AF:
4602                i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4603                break;
4604        case SEN_OV8610: {
4605                static const u8 ctab[] = {
4606                        0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4607                };
4608
4609                /* Use Y gamma control instead. Bit 0 enables it. */
4610                i2c_w(sd, 0x64, ctab[val >> 5]);
4611                break;
4612            }
4613        case SEN_OV7620:
4614        case SEN_OV7620AE: {
4615                static const u8 ctab[] = {
4616                        0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4617                        0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4618                };
4619
4620                /* Use Y gamma control instead. Bit 0 enables it. */
4621                i2c_w(sd, 0x64, ctab[val >> 4]);
4622                break;
4623            }
4624        case SEN_OV7660:
4625                write_i2c_regvals(sd, contrast_7660[val],
4626                                        ARRAY_SIZE(contrast_7660[0]));
4627                break;
4628        case SEN_OV7670:
4629                /* check that this isn't just the same as ov7610 */
4630                i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4631                break;
4632        }
4633}
4634
4635static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4636{
4637        struct sd *sd = (struct sd *) gspca_dev;
4638
4639        i2c_w(sd, 0x10, val);
4640}
4641
4642static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4643{
4644        struct sd *sd = (struct sd *) gspca_dev;
4645        static const struct ov_i2c_regvals colors_7660[][6] = {
4646                {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4647                 {0x53, 0x19}, {0x54, 0x23}},
4648                {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4649                 {0x53, 0x2c}, {0x54, 0x3e}},
4650                {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4651                 {0x53, 0x40}, {0x54, 0x59}},
4652                {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4653                 {0x53, 0x53}, {0x54, 0x73}},
4654                {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4655                 {0x53, 0x66}, {0x54, 0x8e}},
4656        };
4657
4658        switch (sd->sensor) {
4659        case SEN_OV8610:
4660        case SEN_OV7610:
4661        case SEN_OV76BE:
4662        case SEN_OV6620:
4663        case SEN_OV6630:
4664        case SEN_OV66308AF:
4665                i2c_w(sd, OV7610_REG_SAT, val);
4666                break;
4667        case SEN_OV7620:
4668        case SEN_OV7620AE:
4669                /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4670/*              rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4671                if (rc < 0)
4672                        goto out; */
4673                i2c_w(sd, OV7610_REG_SAT, val);
4674                break;
4675        case SEN_OV7640:
4676        case SEN_OV7648:
4677                i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4678                break;
4679        case SEN_OV7660:
4680                write_i2c_regvals(sd, colors_7660[val],
4681                                        ARRAY_SIZE(colors_7660[0]));
4682                break;
4683        case SEN_OV7670:
4684                /* supported later once I work out how to do it
4685                 * transparently fail now! */
4686                /* set REG_COM13 values for UV sat auto mode */
4687                break;
4688        }
4689}
4690
4691static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4692{
4693        struct sd *sd = (struct sd *) gspca_dev;
4694
4695        i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4696}
4697
4698static void setfreq_i(struct sd *sd, s32 val)
4699{
4700        if (sd->sensor == SEN_OV7660
4701         || sd->sensor == SEN_OV7670) {
4702                switch (val) {
4703                case 0: /* Banding filter disabled */
4704                        i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4705                        break;
4706                case 1: /* 50 hz */
4707                        i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4708                                   OV7670_COM8_BFILT);
4709                        i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4710                        break;
4711                case 2: /* 60 hz */
4712                        i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4713                                   OV7670_COM8_BFILT);
4714                        i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4715                        break;
4716                case 3: /* Auto hz - ov7670 only */
4717                        i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4718                                   OV7670_COM8_BFILT);
4719                        i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4720                                   0x18);
4721                        break;
4722                }
4723        } else {
4724                switch (val) {
4725                case 0: /* Banding filter disabled */
4726                        i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4727                        i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4728                        break;
4729                case 1: /* 50 hz (filter on and framerate adj) */
4730                        i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4731                        i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4732                        /* 20 fps -> 16.667 fps */
4733                        if (sd->sensor == SEN_OV6620 ||
4734                            sd->sensor == SEN_OV6630 ||
4735                            sd->sensor == SEN_OV66308AF)
4736                                i2c_w(sd, 0x2b, 0x5e);
4737                        else
4738                                i2c_w(sd, 0x2b, 0xac);
4739                        break;
4740                case 2: /* 60 hz (filter on, ...) */
4741                        i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4742                        if (sd->sensor == SEN_OV6620 ||
4743                            sd->sensor == SEN_OV6630 ||
4744                            sd->sensor == SEN_OV66308AF) {
4745                                /* 20 fps -> 15 fps */
4746                                i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4747                                i2c_w(sd, 0x2b, 0xa8);
4748                        } else {
4749                                /* no framerate adj. */
4750                                i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4751                        }
4752                        break;
4753                }
4754        }
4755}
4756
4757static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4758{
4759        struct sd *sd = (struct sd *) gspca_dev;
4760
4761        setfreq_i(sd, val);
4762
4763        /* Ugly but necessary */
4764        if (sd->bridge == BRIDGE_W9968CF)
4765                w9968cf_set_crop_window(sd);
4766}
4767
4768static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4769                        struct v4l2_jpegcompression *jcomp)
4770{
4771        struct sd *sd = (struct sd *) gspca_dev;
4772
4773        if (sd->bridge != BRIDGE_W9968CF)
4774                return -ENOTTY;
4775
4776        memset(jcomp, 0, sizeof *jcomp);
4777        jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4778        jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4779                              V4L2_JPEG_MARKER_DRI;
4780        return 0;
4781}
4782
4783static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4784                        const struct v4l2_jpegcompression *jcomp)
4785{
4786        struct sd *sd = (struct sd *) gspca_dev;
4787
4788        if (sd->bridge != BRIDGE_W9968CF)
4789                return -ENOTTY;
4790
4791        v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4792        return 0;
4793}
4794
4795static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4796{
4797        struct gspca_dev *gspca_dev =
4798                container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4799        struct sd *sd = (struct sd *)gspca_dev;
4800
4801        gspca_dev->usb_err = 0;
4802
4803        switch (ctrl->id) {
4804        case V4L2_CID_AUTOGAIN:
4805                gspca_dev->exposure->val = i2c_r(sd, 0x10);
4806                break;
4807        }
4808        return 0;
4809}
4810
4811static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4812{
4813        struct gspca_dev *gspca_dev =
4814                container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4815        struct sd *sd = (struct sd *)gspca_dev;
4816
4817        gspca_dev->usb_err = 0;
4818
4819        if (!gspca_dev->streaming)
4820                return 0;
4821
4822        switch (ctrl->id) {
4823        case V4L2_CID_BRIGHTNESS:
4824                setbrightness(gspca_dev, ctrl->val);
4825                break;
4826        case V4L2_CID_CONTRAST:
4827                setcontrast(gspca_dev, ctrl->val);
4828                break;
4829        case V4L2_CID_POWER_LINE_FREQUENCY:
4830                setfreq(gspca_dev, ctrl->val);
4831                break;
4832        case V4L2_CID_AUTOBRIGHTNESS:
4833                if (ctrl->is_new)
4834                        setautobright(gspca_dev, ctrl->val);
4835                if (!ctrl->val && sd->brightness->is_new)
4836                        setbrightness(gspca_dev, sd->brightness->val);
4837                break;
4838        case V4L2_CID_SATURATION:
4839                setcolors(gspca_dev, ctrl->val);
4840                break;
4841        case V4L2_CID_HFLIP:
4842                sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4843                break;
4844        case V4L2_CID_AUTOGAIN:
4845                if (ctrl->is_new)
4846                        setautogain(gspca_dev, ctrl->val);
4847                if (!ctrl->val && gspca_dev->exposure->is_new)
4848                        setexposure(gspca_dev, gspca_dev->exposure->val);
4849                break;
4850        case V4L2_CID_JPEG_COMPRESSION_QUALITY:
4851                return -EBUSY; /* Should never happen, as we grab the ctrl */
4852        }
4853        return gspca_dev->usb_err;
4854}
4855
4856static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4857        .g_volatile_ctrl = sd_g_volatile_ctrl,
4858        .s_ctrl = sd_s_ctrl,
4859};
4860
4861static int sd_init_controls(struct gspca_dev *gspca_dev)
4862{
4863        struct sd *sd = (struct sd *)gspca_dev;
4864        struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4865
4866        gspca_dev->vdev.ctrl_handler = hdl;
4867        v4l2_ctrl_handler_init(hdl, 10);
4868        if (valid_controls[sd->sensor].has_brightness)
4869                sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4870                        V4L2_CID_BRIGHTNESS, 0,
4871                        sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4872                        sd->sensor == SEN_OV7660 ? 3 : 127);
4873        if (valid_controls[sd->sensor].has_contrast) {
4874                if (sd->sensor == SEN_OV7660)
4875                        v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4876                                V4L2_CID_CONTRAST, 0, 6, 1, 3);
4877                else
4878                        v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4879                                V4L2_CID_CONTRAST, 0, 255, 1,
4880                                (sd->sensor == SEN_OV6630 ||
4881                                 sd->sensor == SEN_OV66308AF) ? 200 : 127);
4882        }
4883        if (valid_controls[sd->sensor].has_sat)
4884                v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4885                        V4L2_CID_SATURATION, 0,
4886                        sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4887                        sd->sensor == SEN_OV7660 ? 2 : 127);
4888        if (valid_controls[sd->sensor].has_exposure)
4889                gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4890                        V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4891        if (valid_controls[sd->sensor].has_hvflip) {
4892                sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4893                        V4L2_CID_HFLIP, 0, 1, 1, 0);
4894                sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4895                        V4L2_CID_VFLIP, 0, 1, 1, 0);
4896        }
4897        if (valid_controls[sd->sensor].has_autobright)
4898                sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4899                        V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4900        if (valid_controls[sd->sensor].has_autogain)
4901                gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4902                        V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4903        if (valid_controls[sd->sensor].has_freq) {
4904                if (sd->sensor == SEN_OV7670)
4905                        sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4906                                V4L2_CID_POWER_LINE_FREQUENCY,
4907                                V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
4908                                V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
4909                else
4910                        sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4911                                V4L2_CID_POWER_LINE_FREQUENCY,
4912                                V4L2_CID_POWER_LINE_FREQUENCY_60HZ, 0, 0);
4913        }
4914        if (sd->bridge == BRIDGE_W9968CF)
4915                sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4916                        V4L2_CID_JPEG_COMPRESSION_QUALITY,
4917                        QUALITY_MIN, QUALITY_MAX, 1, QUALITY_DEF);
4918
4919        if (hdl->error) {
4920                PERR("Could not initialize controls\n");
4921                return hdl->error;
4922        }
4923        if (gspca_dev->autogain)
4924                v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4925        if (sd->autobright)
4926                v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4927        if (sd->hflip)
4928                v4l2_ctrl_cluster(2, &sd->hflip);
4929        return 0;
4930}
4931
4932/* sub-driver description */
4933static const struct sd_desc sd_desc = {
4934        .name = MODULE_NAME,
4935        .config = sd_config,
4936        .init = sd_init,
4937        .init_controls = sd_init_controls,
4938        .isoc_init = sd_isoc_init,
4939        .start = sd_start,
4940        .stopN = sd_stopN,
4941        .stop0 = sd_stop0,
4942        .pkt_scan = sd_pkt_scan,
4943        .dq_callback = sd_reset_snapshot,
4944        .get_jcomp = sd_get_jcomp,
4945        .set_jcomp = sd_set_jcomp,
4946#if IS_ENABLED(CONFIG_INPUT)
4947        .other_input = 1,
4948#endif
4949};
4950
4951/* -- module initialisation -- */
4952static const struct usb_device_id device_table[] = {
4953        {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4954        {USB_DEVICE(0x041e, 0x4052),
4955                .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4956        {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4957        {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4958        {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4959        {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4960        {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4961        {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4962        {USB_DEVICE(0x045e, 0x028c),
4963                .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4964        {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4965        {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4966        {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4967        {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4968        {USB_DEVICE(0x05a9, 0x0519),
4969                .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4970        {USB_DEVICE(0x05a9, 0x0530),
4971                .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4972        {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4973        {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4974        {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4975        {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4976        {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4977        {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4978        {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4979        {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4980        {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4981        {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4982        {}
4983};
4984
4985MODULE_DEVICE_TABLE(usb, device_table);
4986
4987/* -- device connect -- */
4988static int sd_probe(struct usb_interface *intf,
4989                        const struct usb_device_id *id)
4990{
4991        return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4992                                THIS_MODULE);
4993}
4994
4995static struct usb_driver sd_driver = {
4996        .name = MODULE_NAME,
4997        .id_table = device_table,
4998        .probe = sd_probe,
4999        .disconnect = gspca_disconnect,
5000#ifdef CONFIG_PM

5001        .suspend = gspca_suspend,
5002        .resume = gspca_resume,
5003        .reset_resume = gspca_resume,
5004#endif
5005};
5006
5007module_usb_driver(sd_driver);
5008
5009module_param(frame_rate, int, 0644);
5010MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
5011