1#ifndef DRIVERS_PCI_H
2#define DRIVERS_PCI_H
3
4#define PCI_FIND_CAP_TTL 48
5
6#define PCI_VSEC_ID_INTEL_TBT 0x1234
7
8extern const unsigned char pcie_link_speed[];
9
10bool pcie_cap_has_lnkctl(const struct pci_dev *dev);
11
12
13
14int pci_create_sysfs_dev_files(struct pci_dev *pdev);
15void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
16#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
17static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
18{ return; }
19static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
20{ return; }
21#else
22void pci_create_firmware_label_files(struct pci_dev *pdev);
23void pci_remove_firmware_label_files(struct pci_dev *pdev);
24#endif
25void pci_cleanup_rom(struct pci_dev *dev);
26
27enum pci_mmap_api {
28 PCI_MMAP_SYSFS,
29 PCI_MMAP_PROCFS
30};
31int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
32 enum pci_mmap_api mmap_api);
33
34int pci_probe_reset_function(struct pci_dev *dev);
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63struct pci_platform_pm_ops {
64 bool (*is_manageable)(struct pci_dev *dev);
65 int (*set_state)(struct pci_dev *dev, pci_power_t state);
66 pci_power_t (*get_state)(struct pci_dev *dev);
67 pci_power_t (*choose_state)(struct pci_dev *dev);
68 int (*sleep_wake)(struct pci_dev *dev, bool enable);
69 int (*run_wake)(struct pci_dev *dev, bool enable);
70 bool (*need_resume)(struct pci_dev *dev);
71};
72
73int pci_set_platform_pm(const struct pci_platform_pm_ops *ops);
74void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
75void pci_power_up(struct pci_dev *dev);
76void pci_disable_enabled_device(struct pci_dev *dev);
77int pci_finish_runtime_suspend(struct pci_dev *dev);
78int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
79bool pci_dev_keep_suspended(struct pci_dev *dev);
80void pci_dev_complete_resume(struct pci_dev *pci_dev);
81void pci_config_pm_runtime_get(struct pci_dev *dev);
82void pci_config_pm_runtime_put(struct pci_dev *dev);
83void pci_pm_init(struct pci_dev *dev);
84void pci_ea_init(struct pci_dev *dev);
85void pci_allocate_cap_save_buffers(struct pci_dev *dev);
86void pci_free_cap_save_buffers(struct pci_dev *dev);
87bool pci_bridge_d3_possible(struct pci_dev *dev);
88void pci_bridge_d3_update(struct pci_dev *dev);
89
90static inline void pci_wakeup_event(struct pci_dev *dev)
91{
92
93 pm_wakeup_event(&dev->dev, 100);
94}
95
96static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
97{
98 return !!(pci_dev->subordinate);
99}
100
101static inline bool pci_power_manageable(struct pci_dev *pci_dev)
102{
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106
107 return !pci_has_subordinate(pci_dev) || pci_dev->bridge_d3;
108}
109
110struct pci_vpd_ops {
111 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
112 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
113 int (*set_size)(struct pci_dev *dev, size_t len);
114};
115
116struct pci_vpd {
117 const struct pci_vpd_ops *ops;
118 struct bin_attribute *attr;
119 struct mutex lock;
120 unsigned int len;
121 u16 flag;
122 u8 cap;
123 u8 busy:1;
124 u8 valid:1;
125};
126
127int pci_vpd_init(struct pci_dev *dev);
128void pci_vpd_release(struct pci_dev *dev);
129
130
131#ifdef CONFIG_PROC_FS
132int pci_proc_attach_device(struct pci_dev *dev);
133int pci_proc_detach_device(struct pci_dev *dev);
134int pci_proc_detach_bus(struct pci_bus *bus);
135#else
136static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
137static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
138static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
139#endif
140
141
142int pci_hp_add_bridge(struct pci_dev *dev);
143
144#ifdef HAVE_PCI_LEGACY
145void pci_create_legacy_files(struct pci_bus *bus);
146void pci_remove_legacy_files(struct pci_bus *bus);
147#else
148static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
149static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
150#endif
151
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153extern struct rw_semaphore pci_bus_sem;
154
155extern raw_spinlock_t pci_lock;
156
157extern unsigned int pci_pm_d3_delay;
158
159#ifdef CONFIG_PCI_MSI
160void pci_no_msi(void);
161#else
162static inline void pci_no_msi(void) { }
163#endif
164
165static inline void pci_msi_set_enable(struct pci_dev *dev, int enable)
166{
167 u16 control;
168
169 pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
170 control &= ~PCI_MSI_FLAGS_ENABLE;
171 if (enable)
172 control |= PCI_MSI_FLAGS_ENABLE;
173 pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
174}
175
176static inline void pci_msix_clear_and_set_ctrl(struct pci_dev *dev, u16 clear, u16 set)
177{
178 u16 ctrl;
179
180 pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &ctrl);
181 ctrl &= ~clear;
182 ctrl |= set;
183 pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, ctrl);
184}
185
186void pci_realloc_get_opt(char *);
187
188static inline int pci_no_d1d2(struct pci_dev *dev)
189{
190 unsigned int parent_dstates = 0;
191
192 if (dev->bus->self)
193 parent_dstates = dev->bus->self->no_d1d2;
194 return (dev->no_d1d2 || parent_dstates);
195
196}
197extern const struct attribute_group *pci_dev_groups[];
198extern const struct attribute_group *pcibus_groups[];
199extern struct device_type pci_dev_type;
200extern const struct attribute_group *pci_bus_groups[];
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211static inline const struct pci_device_id *
212pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
213{
214 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
215 (id->device == PCI_ANY_ID || id->device == dev->device) &&
216 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
217 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
218 !((id->class ^ dev->class) & id->class_mask))
219 return id;
220 return NULL;
221}
222
223
224#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
225
226extern struct kset *pci_slots_kset;
227
228struct pci_slot_attribute {
229 struct attribute attr;
230 ssize_t (*show)(struct pci_slot *, char *);
231 ssize_t (*store)(struct pci_slot *, const char *, size_t);
232};
233#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
234
235enum pci_bar_type {
236 pci_bar_unknown,
237 pci_bar_io,
238 pci_bar_mem32,
239 pci_bar_mem64,
240};
241
242bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
243 int crs_timeout);
244int pci_setup_device(struct pci_dev *dev);
245int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
246 struct resource *res, unsigned int reg);
247void pci_configure_ari(struct pci_dev *dev);
248void __pci_bus_size_bridges(struct pci_bus *bus,
249 struct list_head *realloc_head);
250void __pci_bus_assign_resources(const struct pci_bus *bus,
251 struct list_head *realloc_head,
252 struct list_head *fail_head);
253bool pci_bus_clip_resource(struct pci_dev *dev, int idx);
254
255void pci_reassigndev_resource_alignment(struct pci_dev *dev);
256void pci_disable_bridge_window(struct pci_dev *dev);
257
258
259struct pci_sriov {
260 int pos;
261 int nres;
262 u32 cap;
263 u16 ctrl;
264 u16 total_VFs;
265 u16 initial_VFs;
266 u16 num_VFs;
267 u16 offset;
268 u16 stride;
269 u32 pgsz;
270 u8 link;
271 u8 max_VF_buses;
272 u16 driver_max_VFs;
273 struct pci_dev *dev;
274 struct pci_dev *self;
275 struct mutex lock;
276 resource_size_t barsz[PCI_SRIOV_NUM_BARS];
277 bool drivers_autoprobe;
278};
279
280
281#define PCI_DEV_DISCONNECTED 0
282
283static inline int pci_dev_set_disconnected(struct pci_dev *dev, void *unused)
284{
285 set_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
286 return 0;
287}
288
289static inline bool pci_dev_is_disconnected(const struct pci_dev *dev)
290{
291 return test_bit(PCI_DEV_DISCONNECTED, &dev->priv_flags);
292}
293
294#ifdef CONFIG_PCI_ATS
295void pci_restore_ats_state(struct pci_dev *dev);
296#else
297static inline void pci_restore_ats_state(struct pci_dev *dev)
298{
299}
300#endif
301
302#ifdef CONFIG_PCI_IOV
303int pci_iov_init(struct pci_dev *dev);
304void pci_iov_release(struct pci_dev *dev);
305void pci_iov_update_resource(struct pci_dev *dev, int resno);
306resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
307void pci_restore_iov_state(struct pci_dev *dev);
308int pci_iov_bus_range(struct pci_bus *bus);
309
310#else
311static inline int pci_iov_init(struct pci_dev *dev)
312{
313 return -ENODEV;
314}
315static inline void pci_iov_release(struct pci_dev *dev)
316
317{
318}
319static inline void pci_restore_iov_state(struct pci_dev *dev)
320{
321}
322static inline int pci_iov_bus_range(struct pci_bus *bus)
323{
324 return 0;
325}
326
327#endif
328
329unsigned long pci_cardbus_resource_alignment(struct resource *);
330
331static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
332 struct resource *res)
333{
334#ifdef CONFIG_PCI_IOV
335 int resno = res - dev->resource;
336
337 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
338 return pci_sriov_resource_alignment(dev, resno);
339#endif
340 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
341 return pci_cardbus_resource_alignment(res);
342 return resource_alignment(res);
343}
344
345void pci_enable_acs(struct pci_dev *dev);
346
347#ifdef CONFIG_PCIE_PTM
348void pci_ptm_init(struct pci_dev *dev);
349#else
350static inline void pci_ptm_init(struct pci_dev *dev) { }
351#endif
352
353struct pci_dev_reset_methods {
354 u16 vendor;
355 u16 device;
356 int (*reset)(struct pci_dev *dev, int probe);
357};
358
359#ifdef CONFIG_PCI_QUIRKS
360int pci_dev_specific_reset(struct pci_dev *dev, int probe);
361#else
362static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
363{
364 return -ENOTTY;
365}
366#endif
367
368#if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64)
369int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
370 struct resource *res);
371#endif
372
373#endif
374