linux/drivers/regulator/qcom_spmi-regulator.c
<<
>>
Prefs
   1/*
   2 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 and
   6 * only version 2 as published by the Free Software Foundation.
   7 *
   8 * This program is distributed in the hope that it will be useful,
   9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11 * GNU General Public License for more details.
  12 */
  13
  14#include <linux/module.h>
  15#include <linux/delay.h>
  16#include <linux/err.h>
  17#include <linux/kernel.h>
  18#include <linux/interrupt.h>
  19#include <linux/bitops.h>
  20#include <linux/slab.h>
  21#include <linux/of.h>
  22#include <linux/of_device.h>
  23#include <linux/platform_device.h>
  24#include <linux/ktime.h>
  25#include <linux/regulator/driver.h>
  26#include <linux/regmap.h>
  27#include <linux/list.h>
  28
  29/* Pin control enable input pins. */
  30#define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE             0x00
  31#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0              0x01
  32#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1              0x02
  33#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2              0x04
  34#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3              0x08
  35#define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT       0x10
  36
  37/* Pin control high power mode input pins. */
  38#define SPMI_REGULATOR_PIN_CTRL_HPM_NONE                0x00
  39#define SPMI_REGULATOR_PIN_CTRL_HPM_EN0                 0x01
  40#define SPMI_REGULATOR_PIN_CTRL_HPM_EN1                 0x02
  41#define SPMI_REGULATOR_PIN_CTRL_HPM_EN2                 0x04
  42#define SPMI_REGULATOR_PIN_CTRL_HPM_EN3                 0x08
  43#define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B             0x10
  44#define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT          0x20
  45
  46/*
  47 * Used with enable parameters to specify that hardware default register values
  48 * should be left unaltered.
  49 */
  50#define SPMI_REGULATOR_USE_HW_DEFAULT                   2
  51
  52/* Soft start strength of a voltage switch type regulator */
  53enum spmi_vs_soft_start_str {
  54        SPMI_VS_SOFT_START_STR_0P05_UA = 0,
  55        SPMI_VS_SOFT_START_STR_0P25_UA,
  56        SPMI_VS_SOFT_START_STR_0P55_UA,
  57        SPMI_VS_SOFT_START_STR_0P75_UA,
  58        SPMI_VS_SOFT_START_STR_HW_DEFAULT,
  59};
  60
  61/**
  62 * struct spmi_regulator_init_data - spmi-regulator initialization data
  63 * @pin_ctrl_enable:        Bit mask specifying which hardware pins should be
  64 *                              used to enable the regulator, if any
  65 *                          Value should be an ORing of
  66 *                              SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants.  If
  67 *                              the bit specified by
  68 *                              SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is
  69 *                              set, then pin control enable hardware registers
  70 *                              will not be modified.
  71 * @pin_ctrl_hpm:           Bit mask specifying which hardware pins should be
  72 *                              used to force the regulator into high power
  73 *                              mode, if any
  74 *                          Value should be an ORing of
  75 *                              SPMI_REGULATOR_PIN_CTRL_HPM_* constants.  If
  76 *                              the bit specified by
  77 *                              SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is
  78 *                              set, then pin control mode hardware registers
  79 *                              will not be modified.
  80 * @vs_soft_start_strength: This parameter sets the soft start strength for
  81 *                              voltage switch type regulators.  Its value
  82 *                              should be one of SPMI_VS_SOFT_START_STR_*.  If
  83 *                              its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,
  84 *                              then the soft start strength will be left at its
  85 *                              default hardware value.
  86 */
  87struct spmi_regulator_init_data {
  88        unsigned                                pin_ctrl_enable;
  89        unsigned                                pin_ctrl_hpm;
  90        enum spmi_vs_soft_start_str             vs_soft_start_strength;
  91};
  92
  93/* These types correspond to unique register layouts. */
  94enum spmi_regulator_logical_type {
  95        SPMI_REGULATOR_LOGICAL_TYPE_SMPS,
  96        SPMI_REGULATOR_LOGICAL_TYPE_LDO,
  97        SPMI_REGULATOR_LOGICAL_TYPE_VS,
  98        SPMI_REGULATOR_LOGICAL_TYPE_BOOST,
  99        SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS,
 100        SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP,
 101        SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO,
 102        SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS,
 103        SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS,
 104        SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO,
 105};
 106
 107enum spmi_regulator_type {
 108        SPMI_REGULATOR_TYPE_BUCK                = 0x03,
 109        SPMI_REGULATOR_TYPE_LDO                 = 0x04,
 110        SPMI_REGULATOR_TYPE_VS                  = 0x05,
 111        SPMI_REGULATOR_TYPE_BOOST               = 0x1b,
 112        SPMI_REGULATOR_TYPE_FTS                 = 0x1c,
 113        SPMI_REGULATOR_TYPE_BOOST_BYP           = 0x1f,
 114        SPMI_REGULATOR_TYPE_ULT_LDO             = 0x21,
 115        SPMI_REGULATOR_TYPE_ULT_BUCK            = 0x22,
 116};
 117
 118enum spmi_regulator_subtype {
 119        SPMI_REGULATOR_SUBTYPE_GP_CTL           = 0x08,
 120        SPMI_REGULATOR_SUBTYPE_RF_CTL           = 0x09,
 121        SPMI_REGULATOR_SUBTYPE_N50              = 0x01,
 122        SPMI_REGULATOR_SUBTYPE_N150             = 0x02,
 123        SPMI_REGULATOR_SUBTYPE_N300             = 0x03,
 124        SPMI_REGULATOR_SUBTYPE_N600             = 0x04,
 125        SPMI_REGULATOR_SUBTYPE_N1200            = 0x05,
 126        SPMI_REGULATOR_SUBTYPE_N600_ST          = 0x06,
 127        SPMI_REGULATOR_SUBTYPE_N1200_ST         = 0x07,
 128        SPMI_REGULATOR_SUBTYPE_N900_ST          = 0x14,
 129        SPMI_REGULATOR_SUBTYPE_N300_ST          = 0x15,
 130        SPMI_REGULATOR_SUBTYPE_P50              = 0x08,
 131        SPMI_REGULATOR_SUBTYPE_P150             = 0x09,
 132        SPMI_REGULATOR_SUBTYPE_P300             = 0x0a,
 133        SPMI_REGULATOR_SUBTYPE_P600             = 0x0b,
 134        SPMI_REGULATOR_SUBTYPE_P1200            = 0x0c,
 135        SPMI_REGULATOR_SUBTYPE_LN               = 0x10,
 136        SPMI_REGULATOR_SUBTYPE_LV_P50           = 0x28,
 137        SPMI_REGULATOR_SUBTYPE_LV_P150          = 0x29,
 138        SPMI_REGULATOR_SUBTYPE_LV_P300          = 0x2a,
 139        SPMI_REGULATOR_SUBTYPE_LV_P600          = 0x2b,
 140        SPMI_REGULATOR_SUBTYPE_LV_P1200         = 0x2c,
 141        SPMI_REGULATOR_SUBTYPE_LV_P450          = 0x2d,
 142        SPMI_REGULATOR_SUBTYPE_LV100            = 0x01,
 143        SPMI_REGULATOR_SUBTYPE_LV300            = 0x02,
 144        SPMI_REGULATOR_SUBTYPE_MV300            = 0x08,
 145        SPMI_REGULATOR_SUBTYPE_MV500            = 0x09,
 146        SPMI_REGULATOR_SUBTYPE_HDMI             = 0x10,
 147        SPMI_REGULATOR_SUBTYPE_OTG              = 0x11,
 148        SPMI_REGULATOR_SUBTYPE_5V_BOOST         = 0x01,
 149        SPMI_REGULATOR_SUBTYPE_FTS_CTL          = 0x08,
 150        SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL       = 0x09,
 151        SPMI_REGULATOR_SUBTYPE_BB_2A            = 0x01,
 152        SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1      = 0x0d,
 153        SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2      = 0x0e,
 154        SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3      = 0x0f,
 155        SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4      = 0x10,
 156};
 157
 158enum spmi_common_regulator_registers {
 159        SPMI_COMMON_REG_DIG_MAJOR_REV           = 0x01,
 160        SPMI_COMMON_REG_TYPE                    = 0x04,
 161        SPMI_COMMON_REG_SUBTYPE                 = 0x05,
 162        SPMI_COMMON_REG_VOLTAGE_RANGE           = 0x40,
 163        SPMI_COMMON_REG_VOLTAGE_SET             = 0x41,
 164        SPMI_COMMON_REG_MODE                    = 0x45,
 165        SPMI_COMMON_REG_ENABLE                  = 0x46,
 166        SPMI_COMMON_REG_PULL_DOWN               = 0x48,
 167        SPMI_COMMON_REG_SOFT_START              = 0x4c,
 168        SPMI_COMMON_REG_STEP_CTRL               = 0x61,
 169};
 170
 171enum spmi_vs_registers {
 172        SPMI_VS_REG_OCP                         = 0x4a,
 173        SPMI_VS_REG_SOFT_START                  = 0x4c,
 174};
 175
 176enum spmi_boost_registers {
 177        SPMI_BOOST_REG_CURRENT_LIMIT            = 0x4a,
 178};
 179
 180enum spmi_boost_byp_registers {
 181        SPMI_BOOST_BYP_REG_CURRENT_LIMIT        = 0x4b,
 182};
 183
 184/* Used for indexing into ctrl_reg.  These are offets from 0x40 */
 185enum spmi_common_control_register_index {
 186        SPMI_COMMON_IDX_VOLTAGE_RANGE           = 0,
 187        SPMI_COMMON_IDX_VOLTAGE_SET             = 1,
 188        SPMI_COMMON_IDX_MODE                    = 5,
 189        SPMI_COMMON_IDX_ENABLE                  = 6,
 190};
 191
 192/* Common regulator control register layout */
 193#define SPMI_COMMON_ENABLE_MASK                 0x80
 194#define SPMI_COMMON_ENABLE                      0x80
 195#define SPMI_COMMON_DISABLE                     0x00
 196#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK   0x08
 197#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK   0x04
 198#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK   0x02
 199#define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK   0x01
 200#define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK      0x0f
 201
 202/* Common regulator mode register layout */
 203#define SPMI_COMMON_MODE_HPM_MASK               0x80
 204#define SPMI_COMMON_MODE_AUTO_MASK              0x40
 205#define SPMI_COMMON_MODE_BYPASS_MASK            0x20
 206#define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK      0x10
 207#define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK     0x08
 208#define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK     0x04
 209#define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK     0x02
 210#define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK     0x01
 211#define SPMI_COMMON_MODE_FOLLOW_ALL_MASK        0x1f
 212
 213/* Common regulator pull down control register layout */
 214#define SPMI_COMMON_PULL_DOWN_ENABLE_MASK       0x80
 215
 216/* LDO regulator current limit control register layout */
 217#define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK      0x80
 218
 219/* LDO regulator soft start control register layout */
 220#define SPMI_LDO_SOFT_START_ENABLE_MASK         0x80
 221
 222/* VS regulator over current protection control register layout */
 223#define SPMI_VS_OCP_OVERRIDE                    0x01
 224#define SPMI_VS_OCP_NO_OVERRIDE                 0x00
 225
 226/* VS regulator soft start control register layout */
 227#define SPMI_VS_SOFT_START_ENABLE_MASK          0x80
 228#define SPMI_VS_SOFT_START_SEL_MASK             0x03
 229
 230/* Boost regulator current limit control register layout */
 231#define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK    0x80
 232#define SPMI_BOOST_CURRENT_LIMIT_MASK           0x07
 233
 234#define SPMI_VS_OCP_DEFAULT_MAX_RETRIES         10
 235#define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS      30
 236#define SPMI_VS_OCP_FALL_DELAY_US               90
 237#define SPMI_VS_OCP_FAULT_DELAY_US              20000
 238
 239#define SPMI_FTSMPS_STEP_CTRL_STEP_MASK         0x18
 240#define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT        3
 241#define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK        0x07
 242#define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT       0
 243
 244/* Clock rate in kHz of the FTSMPS regulator reference clock. */
 245#define SPMI_FTSMPS_CLOCK_RATE          19200
 246
 247/* Minimum voltage stepper delay for each step. */
 248#define SPMI_FTSMPS_STEP_DELAY          8
 249#define SPMI_DEFAULT_STEP_DELAY         20
 250
 251/*
 252 * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to
 253 * adjust the step rate in order to account for oscillator variance.
 254 */
 255#define SPMI_FTSMPS_STEP_MARGIN_NUM     4
 256#define SPMI_FTSMPS_STEP_MARGIN_DEN     5
 257
 258/* VSET value to decide the range of ULT SMPS */
 259#define ULT_SMPS_RANGE_SPLIT 0x60
 260
 261/**
 262 * struct spmi_voltage_range - regulator set point voltage mapping description
 263 * @min_uV:             Minimum programmable output voltage resulting from
 264 *                      set point register value 0x00
 265 * @max_uV:             Maximum programmable output voltage
 266 * @step_uV:            Output voltage increase resulting from the set point
 267 *                      register value increasing by 1
 268 * @set_point_min_uV:   Minimum allowed voltage
 269 * @set_point_max_uV:   Maximum allowed voltage.  This may be tweaked in order
 270 *                      to pick which range should be used in the case of
 271 *                      overlapping set points.
 272 * @n_voltages:         Number of preferred voltage set points present in this
 273 *                      range
 274 * @range_sel:          Voltage range register value corresponding to this range
 275 *
 276 * The following relationships must be true for the values used in this struct:
 277 * (max_uV - min_uV) % step_uV == 0
 278 * (set_point_min_uV - min_uV) % step_uV == 0*
 279 * (set_point_max_uV - min_uV) % step_uV == 0*
 280 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1
 281 *
 282 * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to
 283 * specify that the voltage range has meaning, but is not preferred.
 284 */
 285struct spmi_voltage_range {
 286        int                                     min_uV;
 287        int                                     max_uV;
 288        int                                     step_uV;
 289        int                                     set_point_min_uV;
 290        int                                     set_point_max_uV;
 291        unsigned                                n_voltages;
 292        u8                                      range_sel;
 293};
 294
 295/*
 296 * The ranges specified in the spmi_voltage_set_points struct must be listed
 297 * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV.
 298 */
 299struct spmi_voltage_set_points {
 300        struct spmi_voltage_range               *range;
 301        int                                     count;
 302        unsigned                                n_voltages;
 303};
 304
 305struct spmi_regulator {
 306        struct regulator_desc                   desc;
 307        struct device                           *dev;
 308        struct delayed_work                     ocp_work;
 309        struct regmap                           *regmap;
 310        struct spmi_voltage_set_points          *set_points;
 311        enum spmi_regulator_logical_type        logical_type;
 312        int                                     ocp_irq;
 313        int                                     ocp_count;
 314        int                                     ocp_max_retries;
 315        int                                     ocp_retry_delay_ms;
 316        int                                     hpm_min_load;
 317        int                                     slew_rate;
 318        ktime_t                                 vs_enable_time;
 319        u16                                     base;
 320        struct list_head                        node;
 321};
 322
 323struct spmi_regulator_mapping {
 324        enum spmi_regulator_type                type;
 325        enum spmi_regulator_subtype             subtype;
 326        enum spmi_regulator_logical_type        logical_type;
 327        u32                                     revision_min;
 328        u32                                     revision_max;
 329        struct regulator_ops                    *ops;
 330        struct spmi_voltage_set_points          *set_points;
 331        int                                     hpm_min_load;
 332};
 333
 334struct spmi_regulator_data {
 335        const char                      *name;
 336        u16                             base;
 337        const char                      *supply;
 338        const char                      *ocp;
 339        u16                             force_type;
 340};
 341
 342#define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \
 343                      _logical_type, _ops_val, _set_points_val, _hpm_min_load) \
 344        { \
 345                .type           = SPMI_REGULATOR_TYPE_##_type, \
 346                .subtype        = SPMI_REGULATOR_SUBTYPE_##_subtype, \
 347                .revision_min   = _dig_major_min, \
 348                .revision_max   = _dig_major_max, \
 349                .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \
 350                .ops            = &spmi_##_ops_val##_ops, \
 351                .set_points     = &_set_points_val##_set_points, \
 352                .hpm_min_load   = _hpm_min_load, \
 353        }
 354
 355#define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \
 356        { \
 357                .type           = SPMI_REGULATOR_TYPE_VS, \
 358                .subtype        = SPMI_REGULATOR_SUBTYPE_##_subtype, \
 359                .revision_min   = _dig_major_min, \
 360                .revision_max   = _dig_major_max, \
 361                .logical_type   = SPMI_REGULATOR_LOGICAL_TYPE_VS, \
 362                .ops            = &spmi_vs_ops, \
 363        }
 364
 365#define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \
 366                        _set_point_max_uV, _max_uV, _step_uV) \
 367        { \
 368                .min_uV                 = _min_uV, \
 369                .max_uV                 = _max_uV, \
 370                .set_point_min_uV       = _set_point_min_uV, \
 371                .set_point_max_uV       = _set_point_max_uV, \
 372                .step_uV                = _step_uV, \
 373                .range_sel              = _range_sel, \
 374        }
 375
 376#define DEFINE_SPMI_SET_POINTS(name) \
 377struct spmi_voltage_set_points name##_set_points = { \
 378        .range  = name##_ranges, \
 379        .count  = ARRAY_SIZE(name##_ranges), \
 380}
 381
 382/*
 383 * These tables contain the physically available PMIC regulator voltage setpoint
 384 * ranges.  Where two ranges overlap in hardware, one of the ranges is trimmed
 385 * to ensure that the setpoints available to software are monotonically
 386 * increasing and unique.  The set_voltage callback functions expect these
 387 * properties to hold.
 388 */
 389static struct spmi_voltage_range pldo_ranges[] = {
 390        SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
 391        SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000),
 392        SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000),
 393};
 394
 395static struct spmi_voltage_range nldo1_ranges[] = {
 396        SPMI_VOLTAGE_RANGE(2,  750000,  750000, 1537500, 1537500, 12500),
 397};
 398
 399static struct spmi_voltage_range nldo2_ranges[] = {
 400        SPMI_VOLTAGE_RANGE(0,  375000,       0,       0, 1537500, 12500),
 401        SPMI_VOLTAGE_RANGE(1,  375000,  375000,  768750,  768750,  6250),
 402        SPMI_VOLTAGE_RANGE(2,  750000,  775000, 1537500, 1537500, 12500),
 403};
 404
 405static struct spmi_voltage_range nldo3_ranges[] = {
 406        SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
 407        SPMI_VOLTAGE_RANGE(1,  375000,       0,       0, 1537500, 12500),
 408        SPMI_VOLTAGE_RANGE(2,  750000,       0,       0, 1537500, 12500),
 409};
 410
 411static struct spmi_voltage_range ln_ldo_ranges[] = {
 412        SPMI_VOLTAGE_RANGE(1,  690000,  690000, 1110000, 1110000, 60000),
 413        SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000),
 414};
 415
 416static struct spmi_voltage_range smps_ranges[] = {
 417        SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
 418        SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000),
 419};
 420
 421static struct spmi_voltage_range ftsmps_ranges[] = {
 422        SPMI_VOLTAGE_RANGE(0,       0,  350000, 1275000, 1275000,  5000),
 423        SPMI_VOLTAGE_RANGE(1,       0, 1280000, 2040000, 2040000, 10000),
 424};
 425
 426static struct spmi_voltage_range ftsmps2p5_ranges[] = {
 427        SPMI_VOLTAGE_RANGE(0,   80000,  350000, 1355000, 1355000,  5000),
 428        SPMI_VOLTAGE_RANGE(1,  160000, 1360000, 2200000, 2200000, 10000),
 429};
 430
 431static struct spmi_voltage_range boost_ranges[] = {
 432        SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000),
 433};
 434
 435static struct spmi_voltage_range boost_byp_ranges[] = {
 436        SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000),
 437};
 438
 439static struct spmi_voltage_range ult_lo_smps_ranges[] = {
 440        SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1562500, 1562500, 12500),
 441        SPMI_VOLTAGE_RANGE(1,  750000,       0,       0, 1525000, 25000),
 442};
 443
 444static struct spmi_voltage_range ult_ho_smps_ranges[] = {
 445        SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000),
 446};
 447
 448static struct spmi_voltage_range ult_nldo_ranges[] = {
 449        SPMI_VOLTAGE_RANGE(0,  375000,  375000, 1537500, 1537500, 12500),
 450};
 451
 452static struct spmi_voltage_range ult_pldo_ranges[] = {
 453        SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500),
 454};
 455
 456static DEFINE_SPMI_SET_POINTS(pldo);
 457static DEFINE_SPMI_SET_POINTS(nldo1);
 458static DEFINE_SPMI_SET_POINTS(nldo2);
 459static DEFINE_SPMI_SET_POINTS(nldo3);
 460static DEFINE_SPMI_SET_POINTS(ln_ldo);
 461static DEFINE_SPMI_SET_POINTS(smps);
 462static DEFINE_SPMI_SET_POINTS(ftsmps);
 463static DEFINE_SPMI_SET_POINTS(ftsmps2p5);
 464static DEFINE_SPMI_SET_POINTS(boost);
 465static DEFINE_SPMI_SET_POINTS(boost_byp);
 466static DEFINE_SPMI_SET_POINTS(ult_lo_smps);
 467static DEFINE_SPMI_SET_POINTS(ult_ho_smps);
 468static DEFINE_SPMI_SET_POINTS(ult_nldo);
 469static DEFINE_SPMI_SET_POINTS(ult_pldo);
 470
 471static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf,
 472                                 int len)
 473{
 474        return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len);
 475}
 476
 477static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr,
 478                                u8 *buf, int len)
 479{
 480        return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len);
 481}
 482
 483static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val,
 484                u8 mask)
 485{
 486        return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val);
 487}
 488
 489static int spmi_regulator_common_is_enabled(struct regulator_dev *rdev)
 490{
 491        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 492        u8 reg;
 493
 494        spmi_vreg_read(vreg, SPMI_COMMON_REG_ENABLE, &reg, 1);
 495
 496        return (reg & SPMI_COMMON_ENABLE_MASK) == SPMI_COMMON_ENABLE;
 497}
 498
 499static int spmi_regulator_common_enable(struct regulator_dev *rdev)
 500{
 501        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 502
 503        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
 504                SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
 505}
 506
 507static int spmi_regulator_vs_enable(struct regulator_dev *rdev)
 508{
 509        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 510
 511        if (vreg->ocp_irq) {
 512                vreg->ocp_count = 0;
 513                vreg->vs_enable_time = ktime_get();
 514        }
 515
 516        return spmi_regulator_common_enable(rdev);
 517}
 518
 519static int spmi_regulator_vs_ocp(struct regulator_dev *rdev)
 520{
 521        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 522        u8 reg = SPMI_VS_OCP_OVERRIDE;
 523
 524        return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, &reg, 1);
 525}
 526
 527static int spmi_regulator_common_disable(struct regulator_dev *rdev)
 528{
 529        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 530
 531        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
 532                SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
 533}
 534
 535static int spmi_regulator_select_voltage(struct spmi_regulator *vreg,
 536                                         int min_uV, int max_uV)
 537{
 538        const struct spmi_voltage_range *range;
 539        int uV = min_uV;
 540        int lim_min_uV, lim_max_uV, i, range_id, range_max_uV;
 541        int selector, voltage_sel;
 542
 543        /* Check if request voltage is outside of physically settable range. */
 544        lim_min_uV = vreg->set_points->range[0].set_point_min_uV;
 545        lim_max_uV =
 546          vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV;
 547
 548        if (uV < lim_min_uV && max_uV >= lim_min_uV)
 549                uV = lim_min_uV;
 550
 551        if (uV < lim_min_uV || uV > lim_max_uV) {
 552                dev_err(vreg->dev,
 553                        "request v=[%d, %d] is outside possible v=[%d, %d]\n",
 554                         min_uV, max_uV, lim_min_uV, lim_max_uV);
 555                return -EINVAL;
 556        }
 557
 558        /* Find the range which uV is inside of. */
 559        for (i = vreg->set_points->count - 1; i > 0; i--) {
 560                range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV;
 561                if (uV > range_max_uV && range_max_uV > 0)
 562                        break;
 563        }
 564
 565        range_id = i;
 566        range = &vreg->set_points->range[range_id];
 567
 568        /*
 569         * Force uV to be an allowed set point by applying a ceiling function to
 570         * the uV value.
 571         */
 572        voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
 573        uV = voltage_sel * range->step_uV + range->min_uV;
 574
 575        if (uV > max_uV) {
 576                dev_err(vreg->dev,
 577                        "request v=[%d, %d] cannot be met by any set point; "
 578                        "next set point: %d\n",
 579                        min_uV, max_uV, uV);
 580                return -EINVAL;
 581        }
 582
 583        selector = 0;
 584        for (i = 0; i < range_id; i++)
 585                selector += vreg->set_points->range[i].n_voltages;
 586        selector += (uV - range->set_point_min_uV) / range->step_uV;
 587
 588        return selector;
 589}
 590
 591static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg,
 592                                  unsigned selector, u8 *range_sel,
 593                                  u8 *voltage_sel)
 594{
 595        const struct spmi_voltage_range *range, *end;
 596
 597        range = vreg->set_points->range;
 598        end = range + vreg->set_points->count;
 599
 600        for (; range < end; range++) {
 601                if (selector < range->n_voltages) {
 602                        *voltage_sel = selector;
 603                        *range_sel = range->range_sel;
 604                        return 0;
 605                }
 606
 607                selector -= range->n_voltages;
 608        }
 609
 610        return -EINVAL;
 611}
 612
 613static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel,
 614                                  const struct spmi_voltage_range *range)
 615{
 616        int sw_sel = hw_sel;
 617        const struct spmi_voltage_range *r = vreg->set_points->range;
 618
 619        while (r != range) {
 620                sw_sel += r->n_voltages;
 621                r++;
 622        }
 623
 624        return sw_sel;
 625}
 626
 627static const struct spmi_voltage_range *
 628spmi_regulator_find_range(struct spmi_regulator *vreg)
 629{
 630        u8 range_sel;
 631        const struct spmi_voltage_range *range, *end;
 632
 633        range = vreg->set_points->range;
 634        end = range + vreg->set_points->count;
 635
 636        spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1);
 637
 638        for (; range < end; range++)
 639                if (range->range_sel == range_sel)
 640                        return range;
 641
 642        return NULL;
 643}
 644
 645static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg,
 646                int min_uV, int max_uV)
 647{
 648        const struct spmi_voltage_range *range;
 649        int uV = min_uV;
 650        int i, selector;
 651
 652        range = spmi_regulator_find_range(vreg);
 653        if (!range)
 654                goto different_range;
 655
 656        if (uV < range->min_uV && max_uV >= range->min_uV)
 657                uV = range->min_uV;
 658
 659        if (uV < range->min_uV || uV > range->max_uV) {
 660                /* Current range doesn't support the requested voltage. */
 661                goto different_range;
 662        }
 663
 664        /*
 665         * Force uV to be an allowed set point by applying a ceiling function to
 666         * the uV value.
 667         */
 668        uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);
 669        uV = uV * range->step_uV + range->min_uV;
 670
 671        if (uV > max_uV) {
 672                /*
 673                 * No set point in the current voltage range is within the
 674                 * requested min_uV to max_uV range.
 675                 */
 676                goto different_range;
 677        }
 678
 679        selector = 0;
 680        for (i = 0; i < vreg->set_points->count; i++) {
 681                if (uV >= vreg->set_points->range[i].set_point_min_uV
 682                    && uV <= vreg->set_points->range[i].set_point_max_uV) {
 683                        selector +=
 684                            (uV - vreg->set_points->range[i].set_point_min_uV)
 685                                / vreg->set_points->range[i].step_uV;
 686                        break;
 687                }
 688
 689                selector += vreg->set_points->range[i].n_voltages;
 690        }
 691
 692        if (selector >= vreg->set_points->n_voltages)
 693                goto different_range;
 694
 695        return selector;
 696
 697different_range:
 698        return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
 699}
 700
 701static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev,
 702                                             int min_uV, int max_uV)
 703{
 704        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 705
 706        /*
 707         * Favor staying in the current voltage range if possible.  This avoids
 708         * voltage spikes that occur when changing the voltage range.
 709         */
 710        return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV);
 711}
 712
 713static int
 714spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector)
 715{
 716        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 717        int ret;
 718        u8 buf[2];
 719        u8 range_sel, voltage_sel;
 720
 721        ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
 722        if (ret)
 723                return ret;
 724
 725        buf[0] = range_sel;
 726        buf[1] = voltage_sel;
 727        return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2);
 728}
 729
 730static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
 731                unsigned int old_selector, unsigned int new_selector)
 732{
 733        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 734        const struct spmi_voltage_range *range;
 735        int diff_uV;
 736
 737        range = spmi_regulator_find_range(vreg);
 738        if (!range)
 739                return -EINVAL;
 740
 741        diff_uV = abs(new_selector - old_selector) * range->step_uV;
 742
 743        return DIV_ROUND_UP(diff_uV, vreg->slew_rate);
 744}
 745
 746static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev)
 747{
 748        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 749        const struct spmi_voltage_range *range;
 750        u8 voltage_sel;
 751
 752        spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
 753
 754        range = spmi_regulator_find_range(vreg);
 755        if (!range)
 756                return -EINVAL;
 757
 758        return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
 759}
 760
 761static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev,
 762                int min_uV, int max_uV)
 763{
 764        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 765
 766        return spmi_regulator_select_voltage(vreg, min_uV, max_uV);
 767}
 768
 769static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev,
 770                                                   unsigned selector)
 771{
 772        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 773        u8 sel = selector;
 774
 775        /*
 776         * Certain types of regulators do not have a range select register so
 777         * only voltage set register needs to be written.
 778         */
 779        return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1);
 780}
 781
 782static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev)
 783{
 784        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 785        u8 selector;
 786        int ret;
 787
 788        ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1);
 789        if (ret)
 790                return ret;
 791
 792        return selector;
 793}
 794
 795static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev,
 796                                                  unsigned selector)
 797{
 798        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 799        int ret;
 800        u8 range_sel, voltage_sel;
 801
 802        ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel);
 803        if (ret)
 804                return ret;
 805
 806        /*
 807         * Calculate VSET based on range
 808         * In case of range 0: voltage_sel is a 7 bit value, can be written
 809         *                      witout any modification.
 810         * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to
 811         *                      [011].
 812         */
 813        if (range_sel == 1)
 814                voltage_sel |= ULT_SMPS_RANGE_SPLIT;
 815
 816        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET,
 817                                     voltage_sel, 0xff);
 818}
 819
 820static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev)
 821{
 822        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 823        const struct spmi_voltage_range *range;
 824        u8 voltage_sel;
 825
 826        spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1);
 827
 828        range = spmi_regulator_find_range(vreg);
 829        if (!range)
 830                return -EINVAL;
 831
 832        if (range->range_sel == 1)
 833                voltage_sel &= ~ULT_SMPS_RANGE_SPLIT;
 834
 835        return spmi_hw_selector_to_sw(vreg, voltage_sel, range);
 836}
 837
 838static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev,
 839                        unsigned selector)
 840{
 841        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 842        int uV = 0;
 843        int i;
 844
 845        if (selector >= vreg->set_points->n_voltages)
 846                return 0;
 847
 848        for (i = 0; i < vreg->set_points->count; i++) {
 849                if (selector < vreg->set_points->range[i].n_voltages) {
 850                        uV = selector * vreg->set_points->range[i].step_uV
 851                                + vreg->set_points->range[i].set_point_min_uV;
 852                        break;
 853                }
 854
 855                selector -= vreg->set_points->range[i].n_voltages;
 856        }
 857
 858        return uV;
 859}
 860
 861static int
 862spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable)
 863{
 864        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 865        u8 mask = SPMI_COMMON_MODE_BYPASS_MASK;
 866        u8 val = 0;
 867
 868        if (enable)
 869                val = mask;
 870
 871        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
 872}
 873
 874static int
 875spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable)
 876{
 877        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 878        u8 val;
 879        int ret;
 880
 881        ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1);
 882        *enable = val & SPMI_COMMON_MODE_BYPASS_MASK;
 883
 884        return ret;
 885}
 886
 887static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev)
 888{
 889        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 890        u8 reg;
 891
 892        spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &reg, 1);
 893
 894        if (reg & SPMI_COMMON_MODE_HPM_MASK)
 895                return REGULATOR_MODE_NORMAL;
 896
 897        if (reg & SPMI_COMMON_MODE_AUTO_MASK)
 898                return REGULATOR_MODE_FAST;
 899
 900        return REGULATOR_MODE_IDLE;
 901}
 902
 903static int
 904spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)
 905{
 906        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 907        u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;
 908        u8 val = 0;
 909
 910        if (mode == REGULATOR_MODE_NORMAL)
 911                val = SPMI_COMMON_MODE_HPM_MASK;
 912        else if (mode == REGULATOR_MODE_FAST)
 913                val = SPMI_COMMON_MODE_AUTO_MASK;
 914
 915        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);
 916}
 917
 918static int
 919spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA)
 920{
 921        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 922        unsigned int mode;
 923
 924        if (load_uA >= vreg->hpm_min_load)
 925                mode = REGULATOR_MODE_NORMAL;
 926        else
 927                mode = REGULATOR_MODE_IDLE;
 928
 929        return spmi_regulator_common_set_mode(rdev, mode);
 930}
 931
 932static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev)
 933{
 934        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 935        unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK;
 936
 937        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN,
 938                                     mask, mask);
 939}
 940
 941static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev)
 942{
 943        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 944        unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK;
 945
 946        return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START,
 947                                     mask, mask);
 948}
 949
 950static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA)
 951{
 952        struct spmi_regulator *vreg = rdev_get_drvdata(rdev);
 953        enum spmi_regulator_logical_type type = vreg->logical_type;
 954        unsigned int current_reg;
 955        u8 reg;
 956        u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK |
 957                  SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
 958        int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500;
 959
 960        if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST)
 961                current_reg = SPMI_BOOST_REG_CURRENT_LIMIT;
 962        else
 963                current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT;
 964
 965        if (ilim_uA > max || ilim_uA <= 0)
 966                return -EINVAL;
 967
 968        reg = (ilim_uA - 1) / 500;
 969        reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK;
 970
 971        return spmi_vreg_update_bits(vreg, current_reg, reg, mask);
 972}
 973
 974static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg)
 975{
 976        int ret;
 977
 978        ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
 979                SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK);
 980
 981        vreg->vs_enable_time = ktime_get();
 982
 983        ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE,
 984                SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK);
 985
 986        return ret;
 987}
 988
 989static void spmi_regulator_vs_ocp_work(struct work_struct *work)
 990{
 991        struct delayed_work *dwork = to_delayed_work(work);
 992        struct spmi_regulator *vreg
 993                = container_of(dwork, struct spmi_regulator, ocp_work);
 994
 995        spmi_regulator_vs_clear_ocp(vreg);
 996}
 997
 998static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data)
 999{
1000        struct spmi_regulator *vreg = data;
1001        ktime_t ocp_irq_time;
1002        s64 ocp_trigger_delay_us;
1003
1004        ocp_irq_time = ktime_get();
1005        ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time,
1006                                                vreg->vs_enable_time);
1007
1008        /*
1009         * Reset the OCP count if there is a large delay between switch enable
1010         * and when OCP triggers.  This is indicative of a hotplug event as
1011         * opposed to a fault.
1012         */
1013        if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US)
1014                vreg->ocp_count = 0;
1015
1016        /* Wait for switch output to settle back to 0 V after OCP triggered. */
1017        udelay(SPMI_VS_OCP_FALL_DELAY_US);
1018
1019        vreg->ocp_count++;
1020
1021        if (vreg->ocp_count == 1) {
1022                /* Immediately clear the over current condition. */
1023                spmi_regulator_vs_clear_ocp(vreg);
1024        } else if (vreg->ocp_count <= vreg->ocp_max_retries) {
1025                /* Schedule the over current clear task to run later. */
1026                schedule_delayed_work(&vreg->ocp_work,
1027                        msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1);
1028        } else {
1029                dev_err(vreg->dev,
1030                        "OCP triggered %d times; no further retries\n",
1031                        vreg->ocp_count);
1032        }
1033
1034        return IRQ_HANDLED;
1035}
1036
1037static struct regulator_ops spmi_smps_ops = {
1038        .enable                 = spmi_regulator_common_enable,
1039        .disable                = spmi_regulator_common_disable,
1040        .is_enabled             = spmi_regulator_common_is_enabled,
1041        .set_voltage_sel        = spmi_regulator_common_set_voltage,
1042        .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1043        .get_voltage_sel        = spmi_regulator_common_get_voltage,
1044        .map_voltage            = spmi_regulator_common_map_voltage,
1045        .list_voltage           = spmi_regulator_common_list_voltage,
1046        .set_mode               = spmi_regulator_common_set_mode,
1047        .get_mode               = spmi_regulator_common_get_mode,
1048        .set_load               = spmi_regulator_common_set_load,
1049        .set_pull_down          = spmi_regulator_common_set_pull_down,
1050};
1051
1052static struct regulator_ops spmi_ldo_ops = {
1053        .enable                 = spmi_regulator_common_enable,
1054        .disable                = spmi_regulator_common_disable,
1055        .is_enabled             = spmi_regulator_common_is_enabled,
1056        .set_voltage_sel        = spmi_regulator_common_set_voltage,
1057        .get_voltage_sel        = spmi_regulator_common_get_voltage,
1058        .map_voltage            = spmi_regulator_common_map_voltage,
1059        .list_voltage           = spmi_regulator_common_list_voltage,
1060        .set_mode               = spmi_regulator_common_set_mode,
1061        .get_mode               = spmi_regulator_common_get_mode,
1062        .set_load               = spmi_regulator_common_set_load,
1063        .set_bypass             = spmi_regulator_common_set_bypass,
1064        .get_bypass             = spmi_regulator_common_get_bypass,
1065        .set_pull_down          = spmi_regulator_common_set_pull_down,
1066        .set_soft_start         = spmi_regulator_common_set_soft_start,
1067};
1068
1069static struct regulator_ops spmi_ln_ldo_ops = {
1070        .enable                 = spmi_regulator_common_enable,
1071        .disable                = spmi_regulator_common_disable,
1072        .is_enabled             = spmi_regulator_common_is_enabled,
1073        .set_voltage_sel        = spmi_regulator_common_set_voltage,
1074        .get_voltage_sel        = spmi_regulator_common_get_voltage,
1075        .map_voltage            = spmi_regulator_common_map_voltage,
1076        .list_voltage           = spmi_regulator_common_list_voltage,
1077        .set_bypass             = spmi_regulator_common_set_bypass,
1078        .get_bypass             = spmi_regulator_common_get_bypass,
1079};
1080
1081static struct regulator_ops spmi_vs_ops = {
1082        .enable                 = spmi_regulator_vs_enable,
1083        .disable                = spmi_regulator_common_disable,
1084        .is_enabled             = spmi_regulator_common_is_enabled,
1085        .set_pull_down          = spmi_regulator_common_set_pull_down,
1086        .set_soft_start         = spmi_regulator_common_set_soft_start,
1087        .set_over_current_protection = spmi_regulator_vs_ocp,
1088        .set_mode               = spmi_regulator_common_set_mode,
1089        .get_mode               = spmi_regulator_common_get_mode,
1090};
1091
1092static struct regulator_ops spmi_boost_ops = {
1093        .enable                 = spmi_regulator_common_enable,
1094        .disable                = spmi_regulator_common_disable,
1095        .is_enabled             = spmi_regulator_common_is_enabled,
1096        .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1097        .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1098        .map_voltage            = spmi_regulator_single_map_voltage,
1099        .list_voltage           = spmi_regulator_common_list_voltage,
1100        .set_input_current_limit = spmi_regulator_set_ilim,
1101};
1102
1103static struct regulator_ops spmi_ftsmps_ops = {
1104        .enable                 = spmi_regulator_common_enable,
1105        .disable                = spmi_regulator_common_disable,
1106        .is_enabled             = spmi_regulator_common_is_enabled,
1107        .set_voltage_sel        = spmi_regulator_common_set_voltage,
1108        .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1109        .get_voltage_sel        = spmi_regulator_common_get_voltage,
1110        .map_voltage            = spmi_regulator_common_map_voltage,
1111        .list_voltage           = spmi_regulator_common_list_voltage,
1112        .set_mode               = spmi_regulator_common_set_mode,
1113        .get_mode               = spmi_regulator_common_get_mode,
1114        .set_load               = spmi_regulator_common_set_load,
1115        .set_pull_down          = spmi_regulator_common_set_pull_down,
1116};
1117
1118static struct regulator_ops spmi_ult_lo_smps_ops = {
1119        .enable                 = spmi_regulator_common_enable,
1120        .disable                = spmi_regulator_common_disable,
1121        .is_enabled             = spmi_regulator_common_is_enabled,
1122        .set_voltage_sel        = spmi_regulator_ult_lo_smps_set_voltage,
1123        .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1124        .get_voltage_sel        = spmi_regulator_ult_lo_smps_get_voltage,
1125        .list_voltage           = spmi_regulator_common_list_voltage,
1126        .set_mode               = spmi_regulator_common_set_mode,
1127        .get_mode               = spmi_regulator_common_get_mode,
1128        .set_load               = spmi_regulator_common_set_load,
1129        .set_pull_down          = spmi_regulator_common_set_pull_down,
1130};
1131
1132static struct regulator_ops spmi_ult_ho_smps_ops = {
1133        .enable                 = spmi_regulator_common_enable,
1134        .disable                = spmi_regulator_common_disable,
1135        .is_enabled             = spmi_regulator_common_is_enabled,
1136        .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1137        .set_voltage_time_sel   = spmi_regulator_set_voltage_time_sel,
1138        .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1139        .map_voltage            = spmi_regulator_single_map_voltage,
1140        .list_voltage           = spmi_regulator_common_list_voltage,
1141        .set_mode               = spmi_regulator_common_set_mode,
1142        .get_mode               = spmi_regulator_common_get_mode,
1143        .set_load               = spmi_regulator_common_set_load,
1144        .set_pull_down          = spmi_regulator_common_set_pull_down,
1145};
1146
1147static struct regulator_ops spmi_ult_ldo_ops = {
1148        .enable                 = spmi_regulator_common_enable,
1149        .disable                = spmi_regulator_common_disable,
1150        .is_enabled             = spmi_regulator_common_is_enabled,
1151        .set_voltage_sel        = spmi_regulator_single_range_set_voltage,
1152        .get_voltage_sel        = spmi_regulator_single_range_get_voltage,
1153        .map_voltage            = spmi_regulator_single_map_voltage,
1154        .list_voltage           = spmi_regulator_common_list_voltage,
1155        .set_mode               = spmi_regulator_common_set_mode,
1156        .get_mode               = spmi_regulator_common_get_mode,
1157        .set_load               = spmi_regulator_common_set_load,
1158        .set_bypass             = spmi_regulator_common_set_bypass,
1159        .get_bypass             = spmi_regulator_common_get_bypass,
1160        .set_pull_down          = spmi_regulator_common_set_pull_down,
1161        .set_soft_start         = spmi_regulator_common_set_soft_start,
1162};
1163
1164/* Maximum possible digital major revision value */
1165#define INF 0xFF
1166
1167static const struct spmi_regulator_mapping supported_regulators[] = {
1168        /*           type subtype dig_min dig_max ltype ops setpoints hpm_min */
1169        SPMI_VREG(BUCK,  GP_CTL,   0, INF, SMPS,   smps,   smps,   100000),
1170        SPMI_VREG(LDO,   N300,     0, INF, LDO,    ldo,    nldo1,   10000),
1171        SPMI_VREG(LDO,   N600,     0,   0, LDO,    ldo,    nldo2,   10000),
1172        SPMI_VREG(LDO,   N1200,    0,   0, LDO,    ldo,    nldo2,   10000),
1173        SPMI_VREG(LDO,   N600,     1, INF, LDO,    ldo,    nldo3,   10000),
1174        SPMI_VREG(LDO,   N1200,    1, INF, LDO,    ldo,    nldo3,   10000),
1175        SPMI_VREG(LDO,   N600_ST,  0,   0, LDO,    ldo,    nldo2,   10000),
1176        SPMI_VREG(LDO,   N1200_ST, 0,   0, LDO,    ldo,    nldo2,   10000),
1177        SPMI_VREG(LDO,   N600_ST,  1, INF, LDO,    ldo,    nldo3,   10000),
1178        SPMI_VREG(LDO,   N1200_ST, 1, INF, LDO,    ldo,    nldo3,   10000),
1179        SPMI_VREG(LDO,   P50,      0, INF, LDO,    ldo,    pldo,     5000),
1180        SPMI_VREG(LDO,   P150,     0, INF, LDO,    ldo,    pldo,    10000),
1181        SPMI_VREG(LDO,   P300,     0, INF, LDO,    ldo,    pldo,    10000),
1182        SPMI_VREG(LDO,   P600,     0, INF, LDO,    ldo,    pldo,    10000),
1183        SPMI_VREG(LDO,   P1200,    0, INF, LDO,    ldo,    pldo,    10000),
1184        SPMI_VREG(LDO,   LN,       0, INF, LN_LDO, ln_ldo, ln_ldo,      0),
1185        SPMI_VREG(LDO,   LV_P50,   0, INF, LDO,    ldo,    pldo,     5000),
1186        SPMI_VREG(LDO,   LV_P150,  0, INF, LDO,    ldo,    pldo,    10000),
1187        SPMI_VREG(LDO,   LV_P300,  0, INF, LDO,    ldo,    pldo,    10000),
1188        SPMI_VREG(LDO,   LV_P600,  0, INF, LDO,    ldo,    pldo,    10000),
1189        SPMI_VREG(LDO,   LV_P1200, 0, INF, LDO,    ldo,    pldo,    10000),
1190        SPMI_VREG_VS(LV100,        0, INF),
1191        SPMI_VREG_VS(LV300,        0, INF),
1192        SPMI_VREG_VS(MV300,        0, INF),
1193        SPMI_VREG_VS(MV500,        0, INF),
1194        SPMI_VREG_VS(HDMI,         0, INF),
1195        SPMI_VREG_VS(OTG,          0, INF),
1196        SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST,  boost,  boost,       0),
1197        SPMI_VREG(FTS,   FTS_CTL,  0, INF, FTSMPS, ftsmps, ftsmps, 100000),
1198        SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000),
1199        SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0),
1200        SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1201                                                ult_lo_smps,   100000),
1202        SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1203                                                ult_lo_smps,   100000),
1204        SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps,
1205                                                ult_lo_smps,   100000),
1206        SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps,
1207                                                ult_ho_smps,   100000),
1208        SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1209        SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1210        SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1211        SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000),
1212        SPMI_VREG(ULT_LDO, LV_P150,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1213        SPMI_VREG(ULT_LDO, LV_P300,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1214        SPMI_VREG(ULT_LDO, LV_P450,  0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1215        SPMI_VREG(ULT_LDO, P600,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1216        SPMI_VREG(ULT_LDO, P150,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000),
1217        SPMI_VREG(ULT_LDO, P50,     0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000),
1218};
1219
1220static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points)
1221{
1222        unsigned int n;
1223        struct spmi_voltage_range *range = points->range;
1224
1225        for (; range < points->range + points->count; range++) {
1226                n = 0;
1227                if (range->set_point_max_uV) {
1228                        n = range->set_point_max_uV - range->set_point_min_uV;
1229                        n = (n / range->step_uV) + 1;
1230                }
1231                range->n_voltages = n;
1232                points->n_voltages += n;
1233        }
1234}
1235
1236static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type)
1237{
1238        const struct spmi_regulator_mapping *mapping;
1239        int ret, i;
1240        u32 dig_major_rev;
1241        u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1];
1242        u8 type, subtype;
1243
1244        ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version,
1245                ARRAY_SIZE(version));
1246        if (ret) {
1247                dev_dbg(vreg->dev, "could not read version registers\n");
1248                return ret;
1249        }
1250        dig_major_rev   = version[SPMI_COMMON_REG_DIG_MAJOR_REV
1251                                        - SPMI_COMMON_REG_DIG_MAJOR_REV];
1252        if (!force_type) {
1253                type            = version[SPMI_COMMON_REG_TYPE -
1254                                          SPMI_COMMON_REG_DIG_MAJOR_REV];
1255                subtype         = version[SPMI_COMMON_REG_SUBTYPE -
1256                                          SPMI_COMMON_REG_DIG_MAJOR_REV];
1257        } else {
1258                type = force_type >> 8;
1259                subtype = force_type;
1260        }
1261
1262        for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) {
1263                mapping = &supported_regulators[i];
1264                if (mapping->type == type && mapping->subtype == subtype
1265                    && mapping->revision_min <= dig_major_rev
1266                    && mapping->revision_max >= dig_major_rev)
1267                        goto found;
1268        }
1269
1270        dev_err(vreg->dev,
1271                "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n",
1272                vreg->desc.name, type, subtype, dig_major_rev);
1273
1274        return -ENODEV;
1275
1276found:
1277        vreg->logical_type      = mapping->logical_type;
1278        vreg->set_points        = mapping->set_points;
1279        vreg->hpm_min_load      = mapping->hpm_min_load;
1280        vreg->desc.ops          = mapping->ops;
1281
1282        if (mapping->set_points) {
1283                if (!mapping->set_points->n_voltages)
1284                        spmi_calculate_num_voltages(mapping->set_points);
1285                vreg->desc.n_voltages = mapping->set_points->n_voltages;
1286        }
1287
1288        return 0;
1289}
1290
1291static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg)
1292{
1293        int ret;
1294        u8 reg = 0;
1295        int step, delay, slew_rate, step_delay;
1296        const struct spmi_voltage_range *range;
1297
1298        ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, &reg, 1);
1299        if (ret) {
1300                dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret);
1301                return ret;
1302        }
1303
1304        range = spmi_regulator_find_range(vreg);
1305        if (!range)
1306                return -EINVAL;
1307
1308        switch (vreg->logical_type) {
1309        case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1310                step_delay = SPMI_FTSMPS_STEP_DELAY;
1311                break;
1312        default:
1313                step_delay = SPMI_DEFAULT_STEP_DELAY;
1314                break;
1315        }
1316
1317        step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK;
1318        step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT;
1319
1320        delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK;
1321        delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT;
1322
1323        /* slew_rate has units of uV/us */
1324        slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step);
1325        slew_rate /= 1000 * (step_delay << delay);
1326        slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM;
1327        slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN;
1328
1329        /* Ensure that the slew rate is greater than 0 */
1330        vreg->slew_rate = max(slew_rate, 1);
1331
1332        return ret;
1333}
1334
1335static int spmi_regulator_init_registers(struct spmi_regulator *vreg,
1336                                const struct spmi_regulator_init_data *data)
1337{
1338        int ret;
1339        enum spmi_regulator_logical_type type;
1340        u8 ctrl_reg[8], reg, mask;
1341
1342        type = vreg->logical_type;
1343
1344        ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1345        if (ret)
1346                return ret;
1347
1348        /* Set up enable pin control. */
1349        if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1350             || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO
1351             || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)
1352            && !(data->pin_ctrl_enable
1353                        & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {
1354                ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=
1355                        ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1356                ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=
1357                    data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;
1358        }
1359
1360        /* Set up mode pin control. */
1361        if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS
1362            || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)
1363                && !(data->pin_ctrl_hpm
1364                        & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1365                ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1366                        ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1367                ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1368                        data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;
1369        }
1370
1371        if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS
1372           && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1373                ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1374                        ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1375                ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1376                       data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1377        }
1378
1379        if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS
1380                || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS
1381                || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)
1382                && !(data->pin_ctrl_hpm
1383                        & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {
1384                ctrl_reg[SPMI_COMMON_IDX_MODE] &=
1385                        ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1386                ctrl_reg[SPMI_COMMON_IDX_MODE] |=
1387                       data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;
1388        }
1389
1390        /* Write back any control register values that were modified. */
1391        ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);
1392        if (ret)
1393                return ret;
1394
1395        /* Set soft start strength and over current protection for VS. */
1396        if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {
1397                if (data->vs_soft_start_strength
1398                                != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {
1399                        reg = data->vs_soft_start_strength
1400                                & SPMI_VS_SOFT_START_SEL_MASK;
1401                        mask = SPMI_VS_SOFT_START_SEL_MASK;
1402                        return spmi_vreg_update_bits(vreg,
1403                                                     SPMI_VS_REG_SOFT_START,
1404                                                     reg, mask);
1405                }
1406        }
1407
1408        return 0;
1409}
1410
1411static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,
1412                struct device_node *node, struct spmi_regulator_init_data *data)
1413{
1414        /*
1415         * Initialize configuration parameters to use hardware default in case
1416         * no value is specified via device tree.
1417         */
1418        data->pin_ctrl_enable       = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;
1419        data->pin_ctrl_hpm          = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;
1420        data->vs_soft_start_strength    = SPMI_VS_SOFT_START_STR_HW_DEFAULT;
1421
1422        /* These bindings are optional, so it is okay if they aren't found. */
1423        of_property_read_u32(node, "qcom,ocp-max-retries",
1424                &vreg->ocp_max_retries);
1425        of_property_read_u32(node, "qcom,ocp-retry-delay",
1426                &vreg->ocp_retry_delay_ms);
1427        of_property_read_u32(node, "qcom,pin-ctrl-enable",
1428                &data->pin_ctrl_enable);
1429        of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);
1430        of_property_read_u32(node, "qcom,vs-soft-start-strength",
1431                &data->vs_soft_start_strength);
1432}
1433
1434static unsigned int spmi_regulator_of_map_mode(unsigned int mode)
1435{
1436        if (mode == 1)
1437                return REGULATOR_MODE_NORMAL;
1438        if (mode == 2)
1439                return REGULATOR_MODE_FAST;
1440
1441        return REGULATOR_MODE_IDLE;
1442}
1443
1444static int spmi_regulator_of_parse(struct device_node *node,
1445                            const struct regulator_desc *desc,
1446                            struct regulator_config *config)
1447{
1448        struct spmi_regulator_init_data data = { };
1449        struct spmi_regulator *vreg = config->driver_data;
1450        struct device *dev = config->dev;
1451        int ret;
1452
1453        spmi_regulator_get_dt_config(vreg, node, &data);
1454
1455        if (!vreg->ocp_max_retries)
1456                vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;
1457        if (!vreg->ocp_retry_delay_ms)
1458                vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;
1459
1460        ret = spmi_regulator_init_registers(vreg, &data);
1461        if (ret) {
1462                dev_err(dev, "common initialization failed, ret=%d\n", ret);
1463                return ret;
1464        }
1465
1466        switch (vreg->logical_type) {
1467        case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS:
1468        case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS:
1469        case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS:
1470        case SPMI_REGULATOR_LOGICAL_TYPE_SMPS:
1471                ret = spmi_regulator_init_slew_rate(vreg);
1472                if (ret)
1473                        return ret;
1474        default:
1475                break;
1476        }
1477
1478        if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS)
1479                vreg->ocp_irq = 0;
1480
1481        if (vreg->ocp_irq) {
1482                ret = devm_request_irq(dev, vreg->ocp_irq,
1483                        spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp",
1484                        vreg);
1485                if (ret < 0) {
1486                        dev_err(dev, "failed to request irq %d, ret=%d\n",
1487                                vreg->ocp_irq, ret);
1488                        return ret;
1489                }
1490
1491                INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work);
1492        }
1493
1494        return 0;
1495}
1496
1497static const struct spmi_regulator_data pm8941_regulators[] = {
1498        { "s1", 0x1400, "vdd_s1", },
1499        { "s2", 0x1700, "vdd_s2", },
1500        { "s3", 0x1a00, "vdd_s3", },
1501        { "s4", 0xa000, },
1502        { "l1", 0x4000, "vdd_l1_l3", },
1503        { "l2", 0x4100, "vdd_l2_lvs_1_2_3", },
1504        { "l3", 0x4200, "vdd_l1_l3", },
1505        { "l4", 0x4300, "vdd_l4_l11", },
1506        { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 },
1507        { "l6", 0x4500, "vdd_l6_l12_l14_l15", },
1508        { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 },
1509        { "l8", 0x4700, "vdd_l8_l16_l18_19", },
1510        { "l9", 0x4800, "vdd_l9_l10_l17_l22", },
1511        { "l10", 0x4900, "vdd_l9_l10_l17_l22", },
1512        { "l11", 0x4a00, "vdd_l4_l11", },
1513        { "l12", 0x4b00, "vdd_l6_l12_l14_l15", },
1514        { "l13", 0x4c00, "vdd_l13_l20_l23_l24", },
1515        { "l14", 0x4d00, "vdd_l6_l12_l14_l15", },
1516        { "l15", 0x4e00, "vdd_l6_l12_l14_l15", },
1517        { "l16", 0x4f00, "vdd_l8_l16_l18_19", },
1518        { "l17", 0x5000, "vdd_l9_l10_l17_l22", },
1519        { "l18", 0x5100, "vdd_l8_l16_l18_19", },
1520        { "l19", 0x5200, "vdd_l8_l16_l18_19", },
1521        { "l20", 0x5300, "vdd_l13_l20_l23_l24", },
1522        { "l21", 0x5400, "vdd_l21", },
1523        { "l22", 0x5500, "vdd_l9_l10_l17_l22", },
1524        { "l23", 0x5600, "vdd_l13_l20_l23_l24", },
1525        { "l24", 0x5700, "vdd_l13_l20_l23_l24", },
1526        { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", },
1527        { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", },
1528        { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", },
1529        { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", },
1530        { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", },
1531        { }
1532};
1533
1534static const struct spmi_regulator_data pm8841_regulators[] = {
1535        { "s1", 0x1400, "vdd_s1", },
1536        { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 },
1537        { "s3", 0x1a00, "vdd_s3", },
1538        { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 },
1539        { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 },
1540        { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 },
1541        { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 },
1542        { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 },
1543        { }
1544};
1545
1546static const struct spmi_regulator_data pm8916_regulators[] = {
1547        { "s1", 0x1400, "vdd_s1", },
1548        { "s2", 0x1700, "vdd_s2", },
1549        { "s3", 0x1a00, "vdd_s3", },
1550        { "s4", 0x1d00, "vdd_s4", },
1551        { "l1", 0x4000, "vdd_l1_l3", },
1552        { "l2", 0x4100, "vdd_l2", },
1553        { "l3", 0x4200, "vdd_l1_l3", },
1554        { "l4", 0x4300, "vdd_l4_l5_l6", },
1555        { "l5", 0x4400, "vdd_l4_l5_l6", },
1556        { "l6", 0x4500, "vdd_l4_l5_l6", },
1557        { "l7", 0x4600, "vdd_l7", },
1558        { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", },
1559        { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", },
1560        { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", },
1561        { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", },
1562        { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", },
1563        { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", },
1564        { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", },
1565        { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", },
1566        { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", },
1567        { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", },
1568        { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", },
1569        { }
1570};
1571
1572static const struct spmi_regulator_data pm8994_regulators[] = {
1573        { "s1", 0x1400, "vdd_s1", },
1574        { "s2", 0x1700, "vdd_s2", },
1575        { "s3", 0x1a00, "vdd_s3", },
1576        { "s4", 0x1d00, "vdd_s4", },
1577        { "s5", 0x2000, "vdd_s5", },
1578        { "s6", 0x2300, "vdd_s6", },
1579        { "s7", 0x2600, "vdd_s7", },
1580        { "s8", 0x2900, "vdd_s8", },
1581        { "s9", 0x2c00, "vdd_s9", },
1582        { "s10", 0x2f00, "vdd_s10", },
1583        { "s11", 0x3200, "vdd_s11", },
1584        { "s12", 0x3500, "vdd_s12", },
1585        { "l1", 0x4000, "vdd_l1", },
1586        { "l2", 0x4100, "vdd_l2_l26_l28", },
1587        { "l3", 0x4200, "vdd_l3_l11", },
1588        { "l4", 0x4300, "vdd_l4_l27_l31", },
1589        { "l5", 0x4400, "vdd_l5_l7", },
1590        { "l6", 0x4500, "vdd_l6_l12_l32", },
1591        { "l7", 0x4600, "vdd_l5_l7", },
1592        { "l8", 0x4700, "vdd_l8_l16_l30", },
1593        { "l9", 0x4800, "vdd_l9_l10_l18_l22", },
1594        { "l10", 0x4900, "vdd_l9_l10_l18_l22", },
1595        { "l11", 0x4a00, "vdd_l3_l11", },
1596        { "l12", 0x4b00, "vdd_l6_l12_l32", },
1597        { "l13", 0x4c00, "vdd_l13_l19_l23_l24", },
1598        { "l14", 0x4d00, "vdd_l14_l15", },
1599        { "l15", 0x4e00, "vdd_l14_l15", },
1600        { "l16", 0x4f00, "vdd_l8_l16_l30", },
1601        { "l17", 0x5000, "vdd_l17_l29", },
1602        { "l18", 0x5100, "vdd_l9_l10_l18_l22", },
1603        { "l19", 0x5200, "vdd_l13_l19_l23_l24", },
1604        { "l20", 0x5300, "vdd_l20_l21", },
1605        { "l21", 0x5400, "vdd_l20_l21", },
1606        { "l22", 0x5500, "vdd_l9_l10_l18_l22", },
1607        { "l23", 0x5600, "vdd_l13_l19_l23_l24", },
1608        { "l24", 0x5700, "vdd_l13_l19_l23_l24", },
1609        { "l25", 0x5800, "vdd_l25", },
1610        { "l26", 0x5900, "vdd_l2_l26_l28", },
1611        { "l27", 0x5a00, "vdd_l4_l27_l31", },
1612        { "l28", 0x5b00, "vdd_l2_l26_l28", },
1613        { "l29", 0x5c00, "vdd_l17_l29", },
1614        { "l30", 0x5d00, "vdd_l8_l16_l30", },
1615        { "l31", 0x5e00, "vdd_l4_l27_l31", },
1616        { "l32", 0x5f00, "vdd_l6_l12_l32", },
1617        { "lvs1", 0x8000, "vdd_lvs_1_2", },
1618        { "lvs2", 0x8100, "vdd_lvs_1_2", },
1619        { }
1620};
1621
1622static const struct of_device_id qcom_spmi_regulator_match[] = {
1623        { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators },
1624        { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators },
1625        { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators },
1626        { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators },
1627        { }
1628};
1629MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match);
1630
1631static int qcom_spmi_regulator_probe(struct platform_device *pdev)
1632{
1633        const struct spmi_regulator_data *reg;
1634        const struct of_device_id *match;
1635        struct regulator_config config = { };
1636        struct regulator_dev *rdev;
1637        struct spmi_regulator *vreg;
1638        struct regmap *regmap;
1639        const char *name;
1640        struct device *dev = &pdev->dev;
1641        int ret;
1642        struct list_head *vreg_list;
1643
1644        vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL);
1645        if (!vreg_list)
1646                return -ENOMEM;
1647        INIT_LIST_HEAD(vreg_list);
1648        platform_set_drvdata(pdev, vreg_list);
1649
1650        regmap = dev_get_regmap(dev->parent, NULL);
1651        if (!regmap)
1652                return -ENODEV;
1653
1654        match = of_match_device(qcom_spmi_regulator_match, &pdev->dev);
1655        if (!match)
1656                return -ENODEV;
1657
1658        for (reg = match->data; reg->name; reg++) {
1659                vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1660                if (!vreg)
1661                        return -ENOMEM;
1662
1663                vreg->dev = dev;
1664                vreg->base = reg->base;
1665                vreg->regmap = regmap;
1666
1667                if (reg->ocp) {
1668                        vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp);
1669                        if (vreg->ocp_irq < 0) {
1670                                ret = vreg->ocp_irq;
1671                                goto err;
1672                        }
1673                }
1674
1675                vreg->desc.id = -1;
1676                vreg->desc.owner = THIS_MODULE;
1677                vreg->desc.type = REGULATOR_VOLTAGE;
1678                vreg->desc.name = name = reg->name;
1679                vreg->desc.supply_name = reg->supply;
1680                vreg->desc.of_match = reg->name;
1681                vreg->desc.of_parse_cb = spmi_regulator_of_parse;
1682                vreg->desc.of_map_mode = spmi_regulator_of_map_mode;
1683
1684                ret = spmi_regulator_match(vreg, reg->force_type);
1685                if (ret)
1686                        continue;
1687
1688                config.dev = dev;
1689                config.driver_data = vreg;
1690                rdev = devm_regulator_register(dev, &vreg->desc, &config);
1691                if (IS_ERR(rdev)) {
1692                        dev_err(dev, "failed to register %s\n", name);
1693                        ret = PTR_ERR(rdev);
1694                        goto err;
1695                }
1696
1697                INIT_LIST_HEAD(&vreg->node);
1698                list_add(&vreg->node, vreg_list);
1699        }
1700
1701        return 0;
1702
1703err:
1704        list_for_each_entry(vreg, vreg_list, node)
1705                if (vreg->ocp_irq)
1706                        cancel_delayed_work_sync(&vreg->ocp_work);
1707        return ret;
1708}
1709
1710static int qcom_spmi_regulator_remove(struct platform_device *pdev)
1711{
1712        struct spmi_regulator *vreg;
1713        struct list_head *vreg_list = platform_get_drvdata(pdev);
1714
1715        list_for_each_entry(vreg, vreg_list, node)
1716                if (vreg->ocp_irq)
1717                        cancel_delayed_work_sync(&vreg->ocp_work);
1718
1719        return 0;
1720}
1721
1722static struct platform_driver qcom_spmi_regulator_driver = {
1723        .driver         = {
1724                .name   = "qcom-spmi-regulator",
1725                .of_match_table = qcom_spmi_regulator_match,
1726        },
1727        .probe          = qcom_spmi_regulator_probe,
1728        .remove         = qcom_spmi_regulator_remove,
1729};
1730module_platform_driver(qcom_spmi_regulator_driver);
1731
1732MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver");
1733MODULE_LICENSE("GPL v2");
1734MODULE_ALIAS("platform:qcom-spmi-regulator");
1735