1/* Copyright 2013-2016 Freescale Semiconductor Inc. 2 * Copyright 2016 NXP 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright 9 * notice, this list of conditions and the following disclaimer in the 10 * documentation and/or other materials provided with the distribution. 11 * * Neither the name of the above-listed copyright holders nor the 12 * names of any contributors may be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33#ifndef _FSL_DPNI_CMD_H 34#define _FSL_DPNI_CMD_H 35 36#include "dpni.h" 37 38/* DPNI Version */ 39#define DPNI_VER_MAJOR 7 40#define DPNI_VER_MINOR 0 41#define DPNI_CMD_BASE_VERSION 1 42#define DPNI_CMD_ID_OFFSET 4 43 44#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION) 45 46#define DPNI_CMDID_OPEN DPNI_CMD(0x801) 47#define DPNI_CMDID_CLOSE DPNI_CMD(0x800) 48#define DPNI_CMDID_CREATE DPNI_CMD(0x901) 49#define DPNI_CMDID_DESTROY DPNI_CMD(0x900) 50#define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01) 51 52#define DPNI_CMDID_ENABLE DPNI_CMD(0x002) 53#define DPNI_CMDID_DISABLE DPNI_CMD(0x003) 54#define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004) 55#define DPNI_CMDID_RESET DPNI_CMD(0x005) 56#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006) 57 58#define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010) 59#define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011) 60#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012) 61#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013) 62#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014) 63#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015) 64#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016) 65#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017) 66 67#define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200) 68#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B) 69 70#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210) 71#define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212) 72#define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215) 73#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216) 74#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217) 75#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A) 76#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD(0x21B) 77 78#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220) 79#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221) 80#define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222) 81#define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223) 82#define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224) 83#define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225) 84#define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226) 85#define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227) 86#define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228) 87 88#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235) 89 90#define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244) 91#define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245) 92#define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246) 93 94#define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D) 95#define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F) 96#define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260) 97#define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261) 98#define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262) 99 100#define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263) 101 102#define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264) 103#define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265) 104 105#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266) 106#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267) 107#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268) 108#define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269) 109#define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A) 110#define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B) 111#define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C) 112 113/* Macros for accessing command fields smaller than 1byte */ 114#define DPNI_MASK(field) \ 115 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \ 116 DPNI_##field##_SHIFT) 117 118#define dpni_set_field(var, field, val) \ 119 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field))) 120#define dpni_get_field(var, field) \ 121 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT) 122 123struct dpni_cmd_open { 124 __le32 dpni_id; 125}; 126 127#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) 128struct dpni_cmd_set_pools { 129 /* cmd word 0 */ 130 u8 num_dpbp; 131 u8 backup_pool_mask; 132 __le16 pad; 133 /* cmd word 0..4 */ 134 __le32 dpbp_id[DPNI_MAX_DPBP]; 135 /* cmd word 4..6 */ 136 __le16 buffer_size[DPNI_MAX_DPBP]; 137}; 138 139/* The enable indication is always the least significant bit */ 140#define DPNI_ENABLE_SHIFT 0 141#define DPNI_ENABLE_SIZE 1 142 143struct dpni_rsp_is_enabled { 144 u8 enabled; 145}; 146 147struct dpni_rsp_get_irq { 148 /* response word 0 */ 149 __le32 irq_val; 150 __le32 pad; 151 /* response word 1 */ 152 __le64 irq_addr; 153 /* response word 2 */ 154 __le32 irq_num; 155 __le32 type; 156}; 157 158struct dpni_cmd_set_irq_enable { 159 u8 enable; 160 u8 pad[3]; 161 u8 irq_index; 162}; 163 164struct dpni_cmd_get_irq_enable { 165 __le32 pad; 166 u8 irq_index; 167}; 168 169struct dpni_rsp_get_irq_enable { 170 u8 enabled; 171}; 172 173struct dpni_cmd_set_irq_mask { 174 __le32 mask; 175 u8 irq_index; 176}; 177 178struct dpni_cmd_get_irq_mask { 179 __le32 pad; 180 u8 irq_index; 181}; 182 183struct dpni_rsp_get_irq_mask { 184 __le32 mask; 185}; 186 187struct dpni_cmd_get_irq_status { 188 __le32 status; 189 u8 irq_index; 190}; 191 192struct dpni_rsp_get_irq_status { 193 __le32 status; 194}; 195 196struct dpni_cmd_clear_irq_status { 197 __le32 status; 198 u8 irq_index; 199}; 200 201struct dpni_rsp_get_attr { 202 /* response word 0 */ 203 __le32 options; 204 u8 num_queues; 205 u8 num_tcs; 206 u8 mac_filter_entries; 207 u8 pad0; 208 /* response word 1 */ 209 u8 vlan_filter_entries; 210 u8 pad1; 211 u8 qos_entries; 212 u8 pad2; 213 __le16 fs_entries; 214 __le16 pad3; 215 /* response word 2 */ 216 u8 qos_key_size; 217 u8 fs_key_size; 218 __le16 wriop_version; 219}; 220 221#define DPNI_ERROR_ACTION_SHIFT 0 222#define DPNI_ERROR_ACTION_SIZE 4 223#define DPNI_FRAME_ANN_SHIFT 4 224#define DPNI_FRAME_ANN_SIZE 1 225 226struct dpni_cmd_set_errors_behavior { 227 __le32 errors; 228 /* from least significant bit: error_action:4, set_frame_annotation:1 */ 229 u8 flags; 230}; 231 232/* There are 3 separate commands for configuring Rx, Tx and Tx confirmation 233 * buffer layouts, but they all share the same parameters. 234 * If one of the functions changes, below structure needs to be split. 235 */ 236 237#define DPNI_PASS_TS_SHIFT 0 238#define DPNI_PASS_TS_SIZE 1 239#define DPNI_PASS_PR_SHIFT 1 240#define DPNI_PASS_PR_SIZE 1 241#define DPNI_PASS_FS_SHIFT 2 242#define DPNI_PASS_FS_SIZE 1 243 244struct dpni_cmd_get_buffer_layout { 245 u8 qtype; 246}; 247 248struct dpni_rsp_get_buffer_layout { 249 /* response word 0 */ 250 u8 pad0[6]; 251 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 252 u8 flags; 253 u8 pad1; 254 /* response word 1 */ 255 __le16 private_data_size; 256 __le16 data_align; 257 __le16 head_room; 258 __le16 tail_room; 259}; 260 261struct dpni_cmd_set_buffer_layout { 262 /* cmd word 0 */ 263 u8 qtype; 264 u8 pad0[3]; 265 __le16 options; 266 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 267 u8 flags; 268 u8 pad1; 269 /* cmd word 1 */ 270 __le16 private_data_size; 271 __le16 data_align; 272 __le16 head_room; 273 __le16 tail_room; 274}; 275 276struct dpni_cmd_set_offload { 277 u8 pad[3]; 278 u8 dpni_offload; 279 __le32 config; 280}; 281 282struct dpni_cmd_get_offload { 283 u8 pad[3]; 284 u8 dpni_offload; 285}; 286 287struct dpni_rsp_get_offload { 288 __le32 pad; 289 __le32 config; 290}; 291 292struct dpni_cmd_get_qdid { 293 u8 qtype; 294}; 295 296struct dpni_rsp_get_qdid { 297 __le16 qdid; 298}; 299 300struct dpni_rsp_get_tx_data_offset { 301 __le16 data_offset; 302}; 303 304struct dpni_cmd_get_statistics { 305 u8 page_number; 306}; 307 308struct dpni_rsp_get_statistics { 309 __le64 counter[DPNI_STATISTICS_CNT]; 310}; 311 312struct dpni_cmd_set_link_cfg { 313 /* cmd word 0 */ 314 __le64 pad0; 315 /* cmd word 1 */ 316 __le32 rate; 317 __le32 pad1; 318 /* cmd word 2 */ 319 __le64 options; 320}; 321 322#define DPNI_LINK_STATE_SHIFT 0 323#define DPNI_LINK_STATE_SIZE 1 324 325struct dpni_rsp_get_link_state { 326 /* response word 0 */ 327 __le32 pad0; 328 /* from LSB: up:1 */ 329 u8 flags; 330 u8 pad1[3]; 331 /* response word 1 */ 332 __le32 rate; 333 __le32 pad2; 334 /* response word 2 */ 335 __le64 options; 336}; 337 338struct dpni_cmd_set_max_frame_length { 339 __le16 max_frame_length; 340}; 341 342struct dpni_rsp_get_max_frame_length { 343 __le16 max_frame_length; 344}; 345 346struct dpni_cmd_set_multicast_promisc { 347 u8 enable; 348}; 349 350struct dpni_rsp_get_multicast_promisc { 351 u8 enabled; 352}; 353 354struct dpni_cmd_set_unicast_promisc { 355 u8 enable; 356}; 357 358struct dpni_rsp_get_unicast_promisc { 359 u8 enabled; 360}; 361 362struct dpni_cmd_set_primary_mac_addr { 363 __le16 pad; 364 u8 mac_addr[6]; 365}; 366 367struct dpni_rsp_get_primary_mac_addr { 368 __le16 pad; 369 u8 mac_addr[6]; 370}; 371 372struct dpni_rsp_get_port_mac_addr { 373 __le16 pad; 374 u8 mac_addr[6]; 375}; 376 377struct dpni_cmd_add_mac_addr { 378 __le16 pad; 379 u8 mac_addr[6]; 380}; 381 382struct dpni_cmd_remove_mac_addr { 383 __le16 pad; 384 u8 mac_addr[6]; 385}; 386 387#define DPNI_UNICAST_FILTERS_SHIFT 0 388#define DPNI_UNICAST_FILTERS_SIZE 1 389#define DPNI_MULTICAST_FILTERS_SHIFT 1 390#define DPNI_MULTICAST_FILTERS_SIZE 1 391 392struct dpni_cmd_clear_mac_filters { 393 /* from LSB: unicast:1, multicast:1 */ 394 u8 flags; 395}; 396 397#define DPNI_DIST_MODE_SHIFT 0 398#define DPNI_DIST_MODE_SIZE 4 399#define DPNI_MISS_ACTION_SHIFT 4 400#define DPNI_MISS_ACTION_SIZE 4 401 402struct dpni_cmd_set_rx_tc_dist { 403 /* cmd word 0 */ 404 __le16 dist_size; 405 u8 tc_id; 406 /* from LSB: dist_mode:4, miss_action:4 */ 407 u8 flags; 408 __le16 pad0; 409 __le16 default_flow_id; 410 /* cmd word 1..5 */ 411 __le64 pad1[5]; 412 /* cmd word 6 */ 413 __le64 key_cfg_iova; 414}; 415 416/* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at 417 * key_cfg_iova) 418 */ 419struct dpni_mask_cfg { 420 u8 mask; 421 u8 offset; 422}; 423 424#define DPNI_EFH_TYPE_SHIFT 0 425#define DPNI_EFH_TYPE_SIZE 4 426#define DPNI_EXTRACT_TYPE_SHIFT 0 427#define DPNI_EXTRACT_TYPE_SIZE 4 428 429struct dpni_dist_extract { 430 /* word 0 */ 431 u8 prot; 432 /* EFH type stored in the 4 least significant bits */ 433 u8 efh_type; 434 u8 size; 435 u8 offset; 436 __le32 field; 437 /* word 1 */ 438 u8 hdr_index; 439 u8 constant; 440 u8 num_of_repeats; 441 u8 num_of_byte_masks; 442 /* Extraction type is stored in the 4 LSBs */ 443 u8 extract_type; 444 u8 pad[3]; 445 /* word 2 */ 446 struct dpni_mask_cfg masks[4]; 447}; 448 449struct dpni_ext_set_rx_tc_dist { 450 /* extension word 0 */ 451 u8 num_extracts; 452 u8 pad[7]; 453 /* words 1..25 */ 454 struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS]; 455}; 456 457struct dpni_cmd_get_queue { 458 u8 qtype; 459 u8 tc; 460 u8 index; 461}; 462 463#define DPNI_DEST_TYPE_SHIFT 0 464#define DPNI_DEST_TYPE_SIZE 4 465#define DPNI_STASH_CTRL_SHIFT 6 466#define DPNI_STASH_CTRL_SIZE 1 467#define DPNI_HOLD_ACTIVE_SHIFT 7 468#define DPNI_HOLD_ACTIVE_SIZE 1 469 470struct dpni_rsp_get_queue { 471 /* response word 0 */ 472 __le64 pad0; 473 /* response word 1 */ 474 __le32 dest_id; 475 __le16 pad1; 476 u8 dest_prio; 477 /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */ 478 u8 flags; 479 /* response word 2 */ 480 __le64 flc; 481 /* response word 3 */ 482 __le64 user_context; 483 /* response word 4 */ 484 __le32 fqid; 485 __le16 qdbin; 486}; 487 488struct dpni_cmd_set_queue { 489 /* cmd word 0 */ 490 u8 qtype; 491 u8 tc; 492 u8 index; 493 u8 options; 494 __le32 pad0; 495 /* cmd word 1 */ 496 __le32 dest_id; 497 __le16 pad1; 498 u8 dest_prio; 499 u8 flags; 500 /* cmd word 2 */ 501 __le64 flc; 502 /* cmd word 3 */ 503 __le64 user_context; 504}; 505 506struct dpni_cmd_set_taildrop { 507 /* cmd word 0 */ 508 u8 congestion_point; 509 u8 qtype; 510 u8 tc; 511 u8 index; 512 __le32 pad0; 513 /* cmd word 1 */ 514 /* Only least significant bit is relevant */ 515 u8 enable; 516 u8 pad1; 517 u8 units; 518 u8 pad2; 519 __le32 threshold; 520}; 521 522struct dpni_cmd_get_taildrop { 523 u8 congestion_point; 524 u8 qtype; 525 u8 tc; 526 u8 index; 527}; 528 529struct dpni_rsp_get_taildrop { 530 /* cmd word 0 */ 531 __le64 pad0; 532 /* cmd word 1 */ 533 /* only least significant bit is relevant */ 534 u8 enable; 535 u8 pad1; 536 u8 units; 537 u8 pad2; 538 __le32 threshold; 539}; 540 541#endif /* _FSL_DPNI_CMD_H */ 542