1/* 2 * Copyright 2014-2016 Freescale Semiconductor Inc. 3 * Copyright NXP 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * * Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * * Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * * Neither the name of Freescale Semiconductor nor the 13 * names of its contributors may be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * ALTERNATIVELY, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") as published by the Free Software 18 * Foundation, either version 2 of that License or (at your option) any 19 * later version. 20 * 21 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32#ifndef __FSL_DPAA2_IO_H 33#define __FSL_DPAA2_IO_H 34 35#include <linux/types.h> 36#include <linux/cpumask.h> 37 38#include "dpaa2-fd.h" 39#include "dpaa2-global.h" 40 41struct dpaa2_io; 42struct dpaa2_io_store; 43struct device; 44 45/** 46 * DOC: DPIO Service 47 * 48 * The DPIO service provides APIs for users to interact with the datapath 49 * by enqueueing and dequeing frame descriptors. 50 * 51 * The following set of APIs can be used to enqueue and dequeue frames 52 * as well as producing notification callbacks when data is available 53 * for dequeue. 54 */ 55 56/** 57 * struct dpaa2_io_desc - The DPIO descriptor 58 * @receives_notifications: Use notificaton mode. Non-zero if the DPIO 59 * has a channel. 60 * @has_8prio: Set to non-zero for channel with 8 priority WQs. Ignored 61 * unless receives_notification is TRUE. 62 * @cpu: The cpu index that at least interrupt handlers will 63 * execute on. 64 * @stash_affinity: The stash affinity for this portal favour 'cpu' 65 * @regs_cena: The cache enabled regs. 66 * @regs_cinh: The cache inhibited regs 67 * @dpio_id: The dpio index 68 * @qman_version: The qman version 69 * 70 * Describes the attributes and features of the DPIO object. 71 */ 72struct dpaa2_io_desc { 73 int receives_notifications; 74 int has_8prio; 75 int cpu; 76 void *regs_cena; 77 void *regs_cinh; 78 int dpio_id; 79 u32 qman_version; 80}; 81 82struct dpaa2_io *dpaa2_io_create(const struct dpaa2_io_desc *desc); 83 84void dpaa2_io_down(struct dpaa2_io *d); 85 86irqreturn_t dpaa2_io_irq(struct dpaa2_io *obj); 87 88/** 89 * struct dpaa2_io_notification_ctx - The DPIO notification context structure 90 * @cb: The callback to be invoked when the notification arrives 91 * @is_cdan: Zero for FQDAN, non-zero for CDAN 92 * @id: FQID or channel ID, needed for rearm 93 * @desired_cpu: The cpu on which the notifications will show up. -1 means 94 * any CPU. 95 * @dpio_id: The dpio index 96 * @qman64: The 64-bit context value shows up in the FQDAN/CDAN. 97 * @node: The list node 98 * @dpio_private: The dpio object internal to dpio_service 99 * 100 * Used when a FQDAN/CDAN registration is made by drivers. 101 */ 102struct dpaa2_io_notification_ctx { 103 void (*cb)(struct dpaa2_io_notification_ctx *); 104 int is_cdan; 105 u32 id; 106 int desired_cpu; 107 int dpio_id; 108 u64 qman64; 109 struct list_head node; 110 void *dpio_private; 111}; 112 113int dpaa2_io_service_register(struct dpaa2_io *service, 114 struct dpaa2_io_notification_ctx *ctx); 115void dpaa2_io_service_deregister(struct dpaa2_io *service, 116 struct dpaa2_io_notification_ctx *ctx); 117int dpaa2_io_service_rearm(struct dpaa2_io *service, 118 struct dpaa2_io_notification_ctx *ctx); 119 120int dpaa2_io_service_pull_fq(struct dpaa2_io *d, u32 fqid, 121 struct dpaa2_io_store *s); 122int dpaa2_io_service_pull_channel(struct dpaa2_io *d, u32 channelid, 123 struct dpaa2_io_store *s); 124 125int dpaa2_io_service_enqueue_fq(struct dpaa2_io *d, u32 fqid, 126 const struct dpaa2_fd *fd); 127int dpaa2_io_service_enqueue_qd(struct dpaa2_io *d, u32 qdid, u8 prio, 128 u16 qdbin, const struct dpaa2_fd *fd); 129int dpaa2_io_service_release(struct dpaa2_io *d, u32 bpid, 130 const u64 *buffers, unsigned int num_buffers); 131int dpaa2_io_service_acquire(struct dpaa2_io *d, u32 bpid, 132 u64 *buffers, unsigned int num_buffers); 133 134struct dpaa2_io_store *dpaa2_io_store_create(unsigned int max_frames, 135 struct device *dev); 136void dpaa2_io_store_destroy(struct dpaa2_io_store *s); 137struct dpaa2_dq *dpaa2_io_store_next(struct dpaa2_io_store *s, int *is_last); 138 139#endif /* __FSL_DPAA2_IO_H */ 140