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9#include <linux/delay.h>
10#include <linux/device.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/spi/spi.h>
18#include <linux/slab.h>
19#include <linux/sysfs.h>
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include "meter.h"
23
24#define ADE7754_AENERGY 0x01
25#define ADE7754_RAENERGY 0x02
26#define ADE7754_LAENERGY 0x03
27#define ADE7754_VAENERGY 0x04
28#define ADE7754_RVAENERGY 0x05
29#define ADE7754_LVAENERGY 0x06
30#define ADE7754_PERIOD 0x07
31#define ADE7754_TEMP 0x08
32#define ADE7754_WFORM 0x09
33#define ADE7754_OPMODE 0x0A
34#define ADE7754_MMODE 0x0B
35#define ADE7754_WAVMODE 0x0C
36#define ADE7754_WATMODE 0x0D
37#define ADE7754_VAMODE 0x0E
38#define ADE7754_IRQEN 0x0F
39#define ADE7754_STATUS 0x10
40#define ADE7754_RSTATUS 0x11
41#define ADE7754_ZXTOUT 0x12
42#define ADE7754_LINCYC 0x13
43#define ADE7754_SAGCYC 0x14
44#define ADE7754_SAGLVL 0x15
45#define ADE7754_VPEAK 0x16
46#define ADE7754_IPEAK 0x17
47#define ADE7754_GAIN 0x18
48#define ADE7754_AWG 0x19
49#define ADE7754_BWG 0x1A
50#define ADE7754_CWG 0x1B
51#define ADE7754_AVAG 0x1C
52#define ADE7754_BVAG 0x1D
53#define ADE7754_CVAG 0x1E
54#define ADE7754_APHCAL 0x1F
55#define ADE7754_BPHCAL 0x20
56#define ADE7754_CPHCAL 0x21
57#define ADE7754_AAPOS 0x22
58#define ADE7754_BAPOS 0x23
59#define ADE7754_CAPOS 0x24
60#define ADE7754_CFNUM 0x25
61#define ADE7754_CFDEN 0x26
62#define ADE7754_WDIV 0x27
63#define ADE7754_VADIV 0x28
64#define ADE7754_AIRMS 0x29
65#define ADE7754_BIRMS 0x2A
66#define ADE7754_CIRMS 0x2B
67#define ADE7754_AVRMS 0x2C
68#define ADE7754_BVRMS 0x2D
69#define ADE7754_CVRMS 0x2E
70#define ADE7754_AIRMSOS 0x2F
71#define ADE7754_BIRMSOS 0x30
72#define ADE7754_CIRMSOS 0x31
73#define ADE7754_AVRMSOS 0x32
74#define ADE7754_BVRMSOS 0x33
75#define ADE7754_CVRMSOS 0x34
76#define ADE7754_AAPGAIN 0x35
77#define ADE7754_BAPGAIN 0x36
78#define ADE7754_CAPGAIN 0x37
79#define ADE7754_AVGAIN 0x38
80#define ADE7754_BVGAIN 0x39
81#define ADE7754_CVGAIN 0x3A
82#define ADE7754_CHKSUM 0x3E
83#define ADE7754_VERSION 0x3F
84
85#define ADE7754_READ_REG(a) a
86#define ADE7754_WRITE_REG(a) ((a) | 0x80)
87
88#define ADE7754_MAX_TX 4
89#define ADE7754_MAX_RX 4
90#define ADE7754_STARTUP_DELAY 1000
91
92#define ADE7754_SPI_SLOW (u32)(300 * 1000)
93#define ADE7754_SPI_BURST (u32)(1000 * 1000)
94#define ADE7754_SPI_FAST (u32)(2000 * 1000)
95
96
97
98
99
100
101
102
103struct ade7754_state {
104 struct spi_device *us;
105 struct mutex buf_lock;
106 u8 tx[ADE7754_MAX_TX] ____cacheline_aligned;
107 u8 rx[ADE7754_MAX_RX];
108};
109
110
111static int __ade7754_spi_write_reg_8(struct device *dev, u8 reg_address, u8 val)
112{
113 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
114 struct ade7754_state *st = iio_priv(indio_dev);
115
116 st->tx[0] = ADE7754_WRITE_REG(reg_address);
117 st->tx[1] = val;
118 return spi_write(st->us, st->tx, 2);
119}
120
121static int ade7754_spi_write_reg_8(struct device *dev, u8 reg_address, u8 val)
122{
123 int ret;
124 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
125 struct ade7754_state *st = iio_priv(indio_dev);
126
127 mutex_lock(&st->buf_lock);
128 ret = __ade7754_spi_write_reg_8(dev, reg_address, val);
129 mutex_unlock(&st->buf_lock);
130
131 return ret;
132}
133
134static int ade7754_spi_write_reg_16(struct device *dev,
135 u8 reg_address, u16 value)
136{
137 int ret;
138 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
139 struct ade7754_state *st = iio_priv(indio_dev);
140
141 mutex_lock(&st->buf_lock);
142 st->tx[0] = ADE7754_WRITE_REG(reg_address);
143 st->tx[1] = (value >> 8) & 0xFF;
144 st->tx[2] = value & 0xFF;
145 ret = spi_write(st->us, st->tx, 3);
146 mutex_unlock(&st->buf_lock);
147
148 return ret;
149}
150
151static int ade7754_spi_read_reg_8(struct device *dev, u8 reg_address, u8 *val)
152{
153 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
154 struct ade7754_state *st = iio_priv(indio_dev);
155 int ret;
156
157 ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
158 if (ret < 0) {
159 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
160 reg_address);
161 return ret;
162 }
163 *val = ret;
164
165 return 0;
166}
167
168static int ade7754_spi_read_reg_16(struct device *dev,
169 u8 reg_address, u16 *val)
170{
171 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
172 struct ade7754_state *st = iio_priv(indio_dev);
173 int ret;
174
175 ret = spi_w8r16be(st->us, ADE7754_READ_REG(reg_address));
176 if (ret < 0) {
177 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
178 reg_address);
179 return ret;
180 }
181
182 *val = ret;
183
184 return 0;
185}
186
187static int ade7754_spi_read_reg_24(struct device *dev,
188 u8 reg_address, u32 *val)
189{
190 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
191 struct ade7754_state *st = iio_priv(indio_dev);
192 int ret;
193 struct spi_transfer xfers[] = {
194 {
195 .tx_buf = st->tx,
196 .rx_buf = st->rx,
197 .bits_per_word = 8,
198 .len = 4,
199 },
200 };
201
202 mutex_lock(&st->buf_lock);
203 st->tx[0] = ADE7754_READ_REG(reg_address);
204 st->tx[1] = 0;
205 st->tx[2] = 0;
206 st->tx[3] = 0;
207
208 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
209 if (ret) {
210 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
211 reg_address);
212 goto error_ret;
213 }
214 *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
215
216error_ret:
217 mutex_unlock(&st->buf_lock);
218 return ret;
219}
220
221static ssize_t ade7754_read_8bit(struct device *dev,
222 struct device_attribute *attr,
223 char *buf)
224{
225 int ret;
226 u8 val = 0;
227 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
228
229 ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
230 if (ret)
231 return ret;
232
233 return sprintf(buf, "%u\n", val);
234}
235
236static ssize_t ade7754_read_16bit(struct device *dev,
237 struct device_attribute *attr,
238 char *buf)
239{
240 int ret;
241 u16 val = 0;
242 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
243
244 ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
245 if (ret)
246 return ret;
247
248 return sprintf(buf, "%u\n", val);
249}
250
251static ssize_t ade7754_read_24bit(struct device *dev,
252 struct device_attribute *attr,
253 char *buf)
254{
255 int ret;
256 u32 val = 0;
257 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
258
259 ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
260 if (ret)
261 return ret;
262
263 return sprintf(buf, "%u\n", val & 0xFFFFFF);
264}
265
266static ssize_t ade7754_write_8bit(struct device *dev,
267 struct device_attribute *attr,
268 const char *buf,
269 size_t len)
270{
271 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
272 int ret;
273 u8 val;
274
275 ret = kstrtou8(buf, 10, &val);
276 if (ret)
277 goto error_ret;
278 ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
279
280error_ret:
281 return ret ? ret : len;
282}
283
284static ssize_t ade7754_write_16bit(struct device *dev,
285 struct device_attribute *attr,
286 const char *buf,
287 size_t len)
288{
289 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
290 int ret;
291 u16 val;
292
293 ret = kstrtou16(buf, 10, &val);
294 if (ret)
295 goto error_ret;
296 ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
297
298error_ret:
299 return ret ? ret : len;
300}
301
302static int ade7754_reset(struct device *dev)
303{
304 int ret;
305 u8 val;
306
307 ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
308 if (ret < 0)
309 return ret;
310
311 val |= BIT(6);
312 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
313}
314
315static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
316static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
317static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
318static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
319static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
320 ade7754_read_8bit,
321 ade7754_write_8bit,
322 ADE7754_VPEAK);
323static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
324 ade7754_read_8bit,
325 ade7754_write_8bit,
326 ADE7754_VPEAK);
327static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
328 ade7754_read_8bit,
329 ade7754_write_8bit,
330 ADE7754_APHCAL);
331static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
332 ade7754_read_8bit,
333 ade7754_write_8bit,
334 ADE7754_BPHCAL);
335static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
336 ade7754_read_8bit,
337 ade7754_write_8bit,
338 ADE7754_CPHCAL);
339static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
340 ade7754_read_16bit,
341 ade7754_write_16bit,
342 ADE7754_AAPOS);
343static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
344 ade7754_read_16bit,
345 ade7754_write_16bit,
346 ADE7754_BAPOS);
347static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
348 ade7754_read_16bit,
349 ade7754_write_16bit,
350 ADE7754_CAPOS);
351static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
352 ade7754_read_8bit,
353 ade7754_write_8bit,
354 ADE7754_WDIV);
355static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
356 ade7754_read_8bit,
357 ade7754_write_8bit,
358 ADE7754_VADIV);
359static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
360 ade7754_read_16bit,
361 ade7754_write_16bit,
362 ADE7754_CFNUM);
363static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
364 ade7754_read_16bit,
365 ade7754_write_16bit,
366 ADE7754_CFDEN);
367static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
368 ade7754_read_16bit,
369 ade7754_write_16bit,
370 ADE7754_AAPGAIN);
371static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
372 ade7754_read_16bit,
373 ade7754_write_16bit,
374 ADE7754_BAPGAIN);
375static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
376 ade7754_read_16bit,
377 ade7754_write_16bit,
378 ADE7754_CAPGAIN);
379static IIO_DEV_ATTR_AIRMS(S_IRUGO,
380 ade7754_read_24bit,
381 NULL,
382 ADE7754_AIRMS);
383static IIO_DEV_ATTR_BIRMS(S_IRUGO,
384 ade7754_read_24bit,
385 NULL,
386 ADE7754_BIRMS);
387static IIO_DEV_ATTR_CIRMS(S_IRUGO,
388 ade7754_read_24bit,
389 NULL,
390 ADE7754_CIRMS);
391static IIO_DEV_ATTR_AVRMS(S_IRUGO,
392 ade7754_read_24bit,
393 NULL,
394 ADE7754_AVRMS);
395static IIO_DEV_ATTR_BVRMS(S_IRUGO,
396 ade7754_read_24bit,
397 NULL,
398 ADE7754_BVRMS);
399static IIO_DEV_ATTR_CVRMS(S_IRUGO,
400 ade7754_read_24bit,
401 NULL,
402 ADE7754_CVRMS);
403static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
404 ade7754_read_16bit,
405 ade7754_write_16bit,
406 ADE7754_AIRMSOS);
407static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
408 ade7754_read_16bit,
409 ade7754_write_16bit,
410 ADE7754_BIRMSOS);
411static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
412 ade7754_read_16bit,
413 ade7754_write_16bit,
414 ADE7754_CIRMSOS);
415static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
416 ade7754_read_16bit,
417 ade7754_write_16bit,
418 ADE7754_AVRMSOS);
419static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
420 ade7754_read_16bit,
421 ade7754_write_16bit,
422 ADE7754_BVRMSOS);
423static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
424 ade7754_read_16bit,
425 ade7754_write_16bit,
426 ADE7754_CVRMSOS);
427
428static int ade7754_set_irq(struct device *dev, bool enable)
429{
430 int ret;
431 u16 irqen;
432
433 ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
434 if (ret)
435 return ret;
436
437 if (enable)
438 irqen |= BIT(14);
439
440
441 else
442 irqen &= ~BIT(14);
443
444 return ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
445}
446
447
448static int ade7754_stop_device(struct device *dev)
449{
450 int ret;
451 u8 val;
452
453 ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
454 if (ret < 0) {
455 dev_err(dev, "unable to power down the device, error: %d",
456 ret);
457 return ret;
458 }
459
460 val |= 7 << 3;
461 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
462}
463
464static int ade7754_initial_setup(struct iio_dev *indio_dev)
465{
466 int ret;
467 struct ade7754_state *st = iio_priv(indio_dev);
468 struct device *dev = &indio_dev->dev;
469
470
471 st->us->mode = SPI_MODE_3;
472 spi_setup(st->us);
473
474
475 ret = ade7754_set_irq(dev, false);
476 if (ret) {
477 dev_err(dev, "disable irq failed");
478 goto err_ret;
479 }
480
481 ade7754_reset(dev);
482 usleep_range(ADE7754_STARTUP_DELAY, ADE7754_STARTUP_DELAY + 100);
483
484err_ret:
485 return ret;
486}
487
488static ssize_t ade7754_read_frequency(struct device *dev,
489 struct device_attribute *attr,
490 char *buf)
491{
492 int ret;
493 u8 t;
494 int sps;
495
496 ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, &t);
497 if (ret)
498 return ret;
499
500 t = (t >> 3) & 0x3;
501 sps = 26000 / (1 + t);
502
503 return sprintf(buf, "%d\n", sps);
504}
505
506static ssize_t ade7754_write_frequency(struct device *dev,
507 struct device_attribute *attr,
508 const char *buf,
509 size_t len)
510{
511 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
512 struct ade7754_state *st = iio_priv(indio_dev);
513 u16 val;
514 int ret;
515 u8 reg, t;
516
517 ret = kstrtou16(buf, 10, &val);
518 if (ret)
519 return ret;
520 if (!val)
521 return -EINVAL;
522
523 mutex_lock(&st->buf_lock);
524
525 t = 26000 / val;
526 if (t > 0)
527 t--;
528
529 if (t > 1)
530 st->us->max_speed_hz = ADE7754_SPI_SLOW;
531 else
532 st->us->max_speed_hz = ADE7754_SPI_FAST;
533
534 ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, ®);
535 if (ret)
536 goto out;
537
538 reg &= ~(3 << 3);
539 reg |= t << 3;
540
541 ret = __ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
542
543out:
544 mutex_unlock(&st->buf_lock);
545
546 return ret ? ret : len;
547}
548static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
549static IIO_CONST_ATTR(in_temp_offset, "129 C");
550static IIO_CONST_ATTR(in_temp_scale, "4 C");
551
552static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
553 ade7754_read_frequency,
554 ade7754_write_frequency);
555
556static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
557
558static struct attribute *ade7754_attributes[] = {
559 &iio_dev_attr_in_temp_raw.dev_attr.attr,
560 &iio_const_attr_in_temp_offset.dev_attr.attr,
561 &iio_const_attr_in_temp_scale.dev_attr.attr,
562 &iio_dev_attr_sampling_frequency.dev_attr.attr,
563 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
564 &iio_dev_attr_aenergy.dev_attr.attr,
565 &iio_dev_attr_laenergy.dev_attr.attr,
566 &iio_dev_attr_vaenergy.dev_attr.attr,
567 &iio_dev_attr_lvaenergy.dev_attr.attr,
568 &iio_dev_attr_vpeak.dev_attr.attr,
569 &iio_dev_attr_ipeak.dev_attr.attr,
570 &iio_dev_attr_aphcal.dev_attr.attr,
571 &iio_dev_attr_bphcal.dev_attr.attr,
572 &iio_dev_attr_cphcal.dev_attr.attr,
573 &iio_dev_attr_aapos.dev_attr.attr,
574 &iio_dev_attr_bapos.dev_attr.attr,
575 &iio_dev_attr_capos.dev_attr.attr,
576 &iio_dev_attr_wdiv.dev_attr.attr,
577 &iio_dev_attr_vadiv.dev_attr.attr,
578 &iio_dev_attr_cfnum.dev_attr.attr,
579 &iio_dev_attr_cfden.dev_attr.attr,
580 &iio_dev_attr_active_power_a_gain.dev_attr.attr,
581 &iio_dev_attr_active_power_b_gain.dev_attr.attr,
582 &iio_dev_attr_active_power_c_gain.dev_attr.attr,
583 &iio_dev_attr_airms.dev_attr.attr,
584 &iio_dev_attr_birms.dev_attr.attr,
585 &iio_dev_attr_cirms.dev_attr.attr,
586 &iio_dev_attr_avrms.dev_attr.attr,
587 &iio_dev_attr_bvrms.dev_attr.attr,
588 &iio_dev_attr_cvrms.dev_attr.attr,
589 &iio_dev_attr_airmsos.dev_attr.attr,
590 &iio_dev_attr_birmsos.dev_attr.attr,
591 &iio_dev_attr_cirmsos.dev_attr.attr,
592 &iio_dev_attr_avrmsos.dev_attr.attr,
593 &iio_dev_attr_bvrmsos.dev_attr.attr,
594 &iio_dev_attr_cvrmsos.dev_attr.attr,
595 NULL,
596};
597
598static const struct attribute_group ade7754_attribute_group = {
599 .attrs = ade7754_attributes,
600};
601
602static const struct iio_info ade7754_info = {
603 .attrs = &ade7754_attribute_group,
604 .driver_module = THIS_MODULE,
605};
606
607static int ade7754_probe(struct spi_device *spi)
608{
609 int ret;
610 struct ade7754_state *st;
611 struct iio_dev *indio_dev;
612
613
614 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
615 if (!indio_dev)
616 return -ENOMEM;
617
618 spi_set_drvdata(spi, indio_dev);
619
620 st = iio_priv(indio_dev);
621 st->us = spi;
622 mutex_init(&st->buf_lock);
623
624 indio_dev->name = spi->dev.driver->name;
625 indio_dev->dev.parent = &spi->dev;
626 indio_dev->info = &ade7754_info;
627 indio_dev->modes = INDIO_DIRECT_MODE;
628
629
630 ret = ade7754_initial_setup(indio_dev);
631 if (ret)
632 goto powerdown_on_error;
633 ret = iio_device_register(indio_dev);
634 if (ret)
635 goto powerdown_on_error;
636 return ret;
637
638powerdown_on_error:
639 ade7754_stop_device(&indio_dev->dev);
640 return ret;
641}
642
643static int ade7754_remove(struct spi_device *spi)
644{
645 struct iio_dev *indio_dev = spi_get_drvdata(spi);
646
647 iio_device_unregister(indio_dev);
648 ade7754_stop_device(&indio_dev->dev);
649
650 return 0;
651}
652
653static struct spi_driver ade7754_driver = {
654 .driver = {
655 .name = "ade7754",
656 },
657 .probe = ade7754_probe,
658 .remove = ade7754_remove,
659};
660module_spi_driver(ade7754_driver);
661
662MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
663MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
664MODULE_LICENSE("GPL v2");
665MODULE_ALIAS("spi:ad7754");
666
