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22#ifndef REGULATOR_MAX8952
23#define REGULATOR_MAX8952
24
25#include <linux/regulator/machine.h>
26
27enum {
28 MAX8952_DVS_MODE0,
29 MAX8952_DVS_MODE1,
30 MAX8952_DVS_MODE2,
31 MAX8952_DVS_MODE3,
32};
33
34enum {
35 MAX8952_DVS_770mV = 0,
36 MAX8952_DVS_780mV,
37 MAX8952_DVS_790mV,
38 MAX8952_DVS_800mV,
39 MAX8952_DVS_810mV,
40 MAX8952_DVS_820mV,
41 MAX8952_DVS_830mV,
42 MAX8952_DVS_840mV,
43 MAX8952_DVS_850mV,
44 MAX8952_DVS_860mV,
45 MAX8952_DVS_870mV,
46 MAX8952_DVS_880mV,
47 MAX8952_DVS_890mV,
48 MAX8952_DVS_900mV,
49 MAX8952_DVS_910mV,
50 MAX8952_DVS_920mV,
51 MAX8952_DVS_930mV,
52 MAX8952_DVS_940mV,
53 MAX8952_DVS_950mV,
54 MAX8952_DVS_960mV,
55 MAX8952_DVS_970mV,
56 MAX8952_DVS_980mV,
57 MAX8952_DVS_990mV,
58 MAX8952_DVS_1000mV,
59 MAX8952_DVS_1010mV,
60 MAX8952_DVS_1020mV,
61 MAX8952_DVS_1030mV,
62 MAX8952_DVS_1040mV,
63 MAX8952_DVS_1050mV,
64 MAX8952_DVS_1060mV,
65 MAX8952_DVS_1070mV,
66 MAX8952_DVS_1080mV,
67 MAX8952_DVS_1090mV,
68 MAX8952_DVS_1100mV,
69 MAX8952_DVS_1110mV,
70 MAX8952_DVS_1120mV,
71 MAX8952_DVS_1130mV,
72 MAX8952_DVS_1140mV,
73 MAX8952_DVS_1150mV,
74 MAX8952_DVS_1160mV,
75 MAX8952_DVS_1170mV,
76 MAX8952_DVS_1180mV,
77 MAX8952_DVS_1190mV,
78 MAX8952_DVS_1200mV,
79 MAX8952_DVS_1210mV,
80 MAX8952_DVS_1220mV,
81 MAX8952_DVS_1230mV,
82 MAX8952_DVS_1240mV,
83 MAX8952_DVS_1250mV,
84 MAX8952_DVS_1260mV,
85 MAX8952_DVS_1270mV,
86 MAX8952_DVS_1280mV,
87 MAX8952_DVS_1290mV,
88 MAX8952_DVS_1300mV,
89 MAX8952_DVS_1310mV,
90 MAX8952_DVS_1320mV,
91 MAX8952_DVS_1330mV,
92 MAX8952_DVS_1340mV,
93 MAX8952_DVS_1350mV,
94 MAX8952_DVS_1360mV,
95 MAX8952_DVS_1370mV,
96 MAX8952_DVS_1380mV,
97 MAX8952_DVS_1390mV,
98 MAX8952_DVS_1400mV,
99};
100
101enum {
102 MAX8952_SYNC_FREQ_26MHZ,
103 MAX8952_SYNC_FREQ_13MHZ,
104 MAX8952_SYNC_FREQ_19_2MHZ,
105};
106
107enum {
108 MAX8952_RAMP_32mV_us = 0,
109 MAX8952_RAMP_16mV_us,
110 MAX8952_RAMP_8mV_us,
111 MAX8952_RAMP_4mV_us,
112 MAX8952_RAMP_2mV_us,
113 MAX8952_RAMP_1mV_us,
114 MAX8952_RAMP_0_5mV_us,
115 MAX8952_RAMP_0_25mV_us,
116};
117
118#define MAX8952_NUM_DVS_MODE 4
119
120struct max8952_platform_data {
121 int gpio_vid0;
122 int gpio_vid1;
123 int gpio_en;
124
125 u32 default_mode;
126 u32 dvs_mode[MAX8952_NUM_DVS_MODE];
127
128 u32 sync_freq;
129 u32 ramp_speed;
130
131 struct regulator_init_data *reg_data;
132};
133
134
135#endif
136