LXR linux/arch/arm/include/asm/kvm

   1/*
   2 * Copyright (C) 2015 - ARM Ltd
   3 * Author: Marc Zyngier <marc.zyngier@arm.com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License version 2 as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18#ifndef __ARM_KVM_HYP_H__
  19#define __ARM_KVM_HYP_H__
  20
  21#include <linux/compiler.h>
  22#include <linux/kvm_host.h>
  23#include <asm/cp15.h>
  24#include <asm/kvm_mmu.h>
  25#include <asm/vfp.h>
  26
  27#define __hyp_text __section(.hyp.text) notrace
  28
  29#define __ACCESS_VFP(CRn)                       \
  30        "mrc", "mcr", __stringify(p10, 7, %0, CRn, cr0, 0), u32
  31
  32#define write_special(v, r)                                     \
  33        asm volatile("msr " __stringify(r) ", %0" : : "r" (v))
  34#define read_special(r) ({                                      \
  35        u32 __val;                                              \
  36        asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
  37        __val;                                                  \
  38})
  39
  40#define TTBR0           __ACCESS_CP15_64(0, c2)
  41#define TTBR1           __ACCESS_CP15_64(1, c2)
  42#define VTTBR           __ACCESS_CP15_64(6, c2)
  43#define PAR             __ACCESS_CP15_64(0, c7)
  44#define CNTV_CVAL       __ACCESS_CP15_64(3, c14)
  45#define CNTVOFF         __ACCESS_CP15_64(4, c14)
  46
  47#define MIDR            __ACCESS_CP15(c0, 0, c0, 0)
  48#define CSSELR          __ACCESS_CP15(c0, 2, c0, 0)
  49#define VPIDR           __ACCESS_CP15(c0, 4, c0, 0)
  50#define VMPIDR          __ACCESS_CP15(c0, 4, c0, 5)
  51#define SCTLR           __ACCESS_CP15(c1, 0, c0, 0)
  52#define CPACR           __ACCESS_CP15(c1, 0, c0, 2)
  53#define HCR             __ACCESS_CP15(c1, 4, c1, 0)
  54#define HDCR            __ACCESS_CP15(c1, 4, c1, 1)
  55#define HCPTR           __ACCESS_CP15(c1, 4, c1, 2)
  56#define HSTR            __ACCESS_CP15(c1, 4, c1, 3)
  57#define TTBCR           __ACCESS_CP15(c2, 0, c0, 2)
  58#define HTCR            __ACCESS_CP15(c2, 4, c0, 2)
  59#define VTCR            __ACCESS_CP15(c2, 4, c1, 2)
  60#define DACR            __ACCESS_CP15(c3, 0, c0, 0)
  61#define DFSR            __ACCESS_CP15(c5, 0, c0, 0)
  62#define IFSR            __ACCESS_CP15(c5, 0, c0, 1)
  63#define ADFSR           __ACCESS_CP15(c5, 0, c1, 0)
  64#define AIFSR           __ACCESS_CP15(c5, 0, c1, 1)
  65#define HSR             __ACCESS_CP15(c5, 4, c2, 0)
  66#define DFAR            __ACCESS_CP15(c6, 0, c0, 0)
  67#define IFAR            __ACCESS_CP15(c6, 0, c0, 2)
  68#define HDFAR           __ACCESS_CP15(c6, 4, c0, 0)
  69#define HIFAR           __ACCESS_CP15(c6, 4, c0, 2)
  70#define HPFAR           __ACCESS_CP15(c6, 4, c0, 4)
  71#define ICIALLUIS       __ACCESS_CP15(c7, 0, c1, 0)
  72#define ATS1CPR         __ACCESS_CP15(c7, 0, c8, 0)
  73#define TLBIALLIS       __ACCESS_CP15(c8, 0, c3, 0)
  74#define TLBIALL         __ACCESS_CP15(c8, 0, c7, 0)
  75#define TLBIALLNSNHIS   __ACCESS_CP15(c8, 4, c3, 4)
  76#define PRRR            __ACCESS_CP15(c10, 0, c2, 0)
  77#define NMRR            __ACCESS_CP15(c10, 0, c2, 1)
  78#define AMAIR0          __ACCESS_CP15(c10, 0, c3, 0)
  79#define AMAIR1          __ACCESS_CP15(c10, 0, c3, 1)
  80#define VBAR            __ACCESS_CP15(c12, 0, c0, 0)
  81#define CID             __ACCESS_CP15(c13, 0, c0, 1)
  82#define TID_URW         __ACCESS_CP15(c13, 0, c0, 2)
  83#define TID_URO         __ACCESS_CP15(c13, 0, c0, 3)
  84#define TID_PRIV        __ACCESS_CP15(c13, 0, c0, 4)
  85#define HTPIDR          __ACCESS_CP15(c13, 4, c0, 2)
  86#define CNTKCTL         __ACCESS_CP15(c14, 0, c1, 0)
  87#define CNTV_CTL        __ACCESS_CP15(c14, 0, c3, 1)
  88#define CNTHCTL         __ACCESS_CP15(c14, 4, c1, 0)
  89
  90#define VFP_FPEXC       __ACCESS_VFP(FPEXC)
  91
  92/* AArch64 compatibility macros, only for the timer so far */
  93#define read_sysreg_el0(r)              read_sysreg(r##_el0)
  94#define write_sysreg_el0(v, r)          write_sysreg(v, r##_el0)
  95
  96#define cntv_ctl_el0                    CNTV_CTL
  97#define cntv_cval_el0                   CNTV_CVAL
  98#define cntvoff_el2                     CNTVOFF
  99#define cnthctl_el2                     CNTHCTL
 100
 101void __timer_save_state(struct kvm_vcpu *vcpu);
 102void __timer_restore_state(struct kvm_vcpu *vcpu);
 103
 104void __vgic_v2_save_state(struct kvm_vcpu *vcpu);
 105void __vgic_v2_restore_state(struct kvm_vcpu *vcpu);
 106
 107void __sysreg_save_state(struct kvm_cpu_context *ctxt);
 108void __sysreg_restore_state(struct kvm_cpu_context *ctxt);
 109
 110void __vgic_v3_save_state(struct kvm_vcpu *vcpu);
 111void __vgic_v3_restore_state(struct kvm_vcpu *vcpu);
 112
 113asmlinkage void __vfp_save_state(struct vfp_hard_struct *vfp);
 114asmlinkage void __vfp_restore_state(struct vfp_hard_struct *vfp);
 115static inline bool __vfp_enabled(void)
 116{
 117        return !(read_sysreg(HCPTR) & (HCPTR_TCP(11) | HCPTR_TCP(10)));
 118}
 119
 120void __hyp_text __banked_save_state(struct kvm_cpu_context *ctxt);
 121void __hyp_text __banked_restore_state(struct kvm_cpu_context *ctxt);
 122
 123asmlinkage int __guest_enter(struct kvm_vcpu *vcpu,
 124                             struct kvm_cpu_context *host);
 125asmlinkage int __hyp_do_panic(const char *, int, u32);
 126
 127#endif /* __ARM_KVM_HYP_H__ */
 128