LXR linux/arch/arm/include/asm/ptrace.h

   1/*
   2 *  arch/arm/include/asm/ptrace.h
   3 *
   4 *  Copyright (C) 1996-2003 Russell King
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 */
  10#ifndef __ASM_ARM_PTRACE_H
  11#define __ASM_ARM_PTRACE_H
  12
  13#include <uapi/asm/ptrace.h>
  14
  15#ifndef __ASSEMBLY__
  16#include <linux/types.h>
  17
  18struct pt_regs {
  19        unsigned long uregs[18];
  20};
  21
  22struct svc_pt_regs {
  23        struct pt_regs regs;
  24        u32 dacr;
  25        u32 addr_limit;
  26};
  27
  28#define to_svc_pt_regs(r) container_of(r, struct svc_pt_regs, regs)
  29
  30#define user_mode(regs) \
  31        (((regs)->ARM_cpsr & 0xf) == 0)
  32
  33#ifdef CONFIG_ARM_THUMB
  34#define thumb_mode(regs) \
  35        (((regs)->ARM_cpsr & PSR_T_BIT))
  36#else
  37#define thumb_mode(regs) (0)
  38#endif
  39
  40#ifndef CONFIG_CPU_V7M
  41#define isa_mode(regs) \
  42        ((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
  43         (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
  44#else
  45#define isa_mode(regs) 1 /* Thumb */
  46#endif
  47
  48#define processor_mode(regs) \
  49        ((regs)->ARM_cpsr & MODE_MASK)
  50
  51#define interrupts_enabled(regs) \
  52        (!((regs)->ARM_cpsr & PSR_I_BIT))
  53
  54#define fast_interrupts_enabled(regs) \
  55        (!((regs)->ARM_cpsr & PSR_F_BIT))
  56
  57/* Are the current registers suitable for user mode?
  58 * (used to maintain security in signal handlers)
  59 */
  60static inline int valid_user_regs(struct pt_regs *regs)
  61{
  62#ifndef CONFIG_CPU_V7M
  63        unsigned long mode = regs->ARM_cpsr & MODE_MASK;
  64
  65        /*
  66         * Always clear the F (FIQ) and A (delayed abort) bits
  67         */
  68        regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
  69
  70        if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
  71                if (mode == USR_MODE)
  72                        return 1;
  73                if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
  74                        return 1;
  75        }
  76
  77        /*
  78         * Force CPSR to something logical...
  79         */
  80        regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
  81        if (!(elf_hwcap & HWCAP_26BIT))
  82                regs->ARM_cpsr |= USR_MODE;
  83
  84        return 0;
  85#else /* ifndef CONFIG_CPU_V7M */
  86        return 1;
  87#endif
  88}
  89
  90static inline long regs_return_value(struct pt_regs *regs)
  91{
  92        return regs->ARM_r0;
  93}
  94
  95#define instruction_pointer(regs)       (regs)->ARM_pc
  96
  97#ifdef CONFIG_THUMB2_KERNEL
  98#define frame_pointer(regs) (regs)->ARM_r7
  99#else
 100#define frame_pointer(regs) (regs)->ARM_fp
 101#endif
 102
 103static inline void instruction_pointer_set(struct pt_regs *regs,
 104                                           unsigned long val)
 105{
 106        instruction_pointer(regs) = val;
 107}
 108
 109#ifdef CONFIG_SMP
 110extern unsigned long profile_pc(struct pt_regs *regs);
 111#else
 112#define profile_pc(regs) instruction_pointer(regs)
 113#endif
 114
 115#define predicate(x)            ((x) & 0xf0000000)
 116#define PREDICATE_ALWAYS        0xe0000000
 117
 118/*
 119 * True if instr is a 32-bit thumb instruction. This works if instr
 120 * is the first or only half-word of a thumb instruction. It also works
 121 * when instr holds all 32-bits of a wide thumb instruction if stored
 122 * in the form (first_half<<16)|(second_half)
 123 */
 124#define is_wide_instruction(instr)      ((unsigned)(instr) >= 0xe800)
 125
 126/*
 127 * kprobe-based event tracer support
 128 */
 129#include <linux/stddef.h>
 130#include <linux/types.h>
 131#define MAX_REG_OFFSET (offsetof(struct pt_regs, ARM_ORIG_r0))
 132
 133extern int regs_query_register_offset(const char *name);
 134extern const char *regs_query_register_name(unsigned int offset);
 135extern bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr);
 136extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
 137                                               unsigned int n);
 138
 139/**
 140 * regs_get_register() - get register value from its offset
 141 * @regs:          pt_regs from which register value is gotten
 142 * @offset:    offset number of the register.
 143 *
 144 * regs_get_register returns the value of a register whose offset from @regs.
 145 * The @offset is the offset of the register in struct pt_regs.
 146 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
 147 */
 148static inline unsigned long regs_get_register(struct pt_regs *regs,
 149                                              unsigned int offset)
 150{
 151        if (unlikely(offset > MAX_REG_OFFSET))
 152                return 0;
 153        return *(unsigned long *)((unsigned long)regs + offset);
 154}
 155
 156/* Valid only for Kernel mode traps. */
 157static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
 158{
 159        return regs->ARM_sp;
 160}
 161
 162static inline unsigned long user_stack_pointer(struct pt_regs *regs)
 163{
 164        return regs->ARM_sp;
 165}
 166
 167#define current_pt_regs(void) ({ (struct pt_regs *)                     \
 168                ((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1;  \
 169})
 170
 171#endif /* __ASSEMBLY__ */
 172#endif
 173