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15#include <linux/gpio.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/platform_device.h>
20#include <linux/slab.h>
21#include <linux/types.h>
22
23#include <linux/usb/otg.h>
24
25#include "common.h"
26#include "devices-imx31.h"
27#include "ehci.h"
28#include "hardware.h"
29#include "iomux-mx3.h"
30#include "ulpi.h"
31
32static unsigned int devboard_pins[] = {
33
34 MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
35 MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
36
37 MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
38 MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
39 MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
40 MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
41
42 MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
43 MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
44 MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
45 MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
46 MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
47
48 MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
49 MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
50};
51
52static const struct imxuart_platform_data uart_pdata __initconst = {
53 .flags = IMXUART_HAVE_RTSCTS,
54};
55
56#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
57#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
58
59static int devboard_sdhc2_get_ro(struct device *dev)
60{
61 return !gpio_get_value(SDHC2_WP);
62}
63
64static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
65 void *data)
66{
67 int ret;
68
69 ret = gpio_request(SDHC2_CD, "sdhc-detect");
70 if (ret)
71 return ret;
72
73 gpio_direction_input(SDHC2_CD);
74
75 ret = gpio_request(SDHC2_WP, "sdhc-wp");
76 if (ret)
77 goto err_gpio_free;
78 gpio_direction_input(SDHC2_WP);
79
80 ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
81 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
82 "sdhc2-card-detect", data);
83 if (ret)
84 goto err_gpio_free_2;
85
86 return 0;
87
88err_gpio_free_2:
89 gpio_free(SDHC2_WP);
90err_gpio_free:
91 gpio_free(SDHC2_CD);
92
93 return ret;
94}
95
96static void devboard_sdhc2_exit(struct device *dev, void *data)
97{
98 free_irq(gpio_to_irq(SDHC2_CD), data);
99 gpio_free(SDHC2_WP);
100 gpio_free(SDHC2_CD);
101}
102
103static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
104 .get_ro = devboard_sdhc2_get_ro,
105 .init = devboard_sdhc2_init,
106 .exit = devboard_sdhc2_exit,
107};
108
109#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
110#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
111#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
112#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
113
114static void devboard_init_sel_gpios(void)
115{
116 if (!gpio_request(SEL0, "sel0")) {
117 gpio_direction_input(SEL0);
118 gpio_export(SEL0, true);
119 }
120
121 if (!gpio_request(SEL1, "sel1")) {
122 gpio_direction_input(SEL1);
123 gpio_export(SEL1, true);
124 }
125
126 if (!gpio_request(SEL2, "sel2")) {
127 gpio_direction_input(SEL2);
128 gpio_export(SEL2, true);
129 }
130
131 if (!gpio_request(SEL3, "sel3")) {
132 gpio_direction_input(SEL3);
133 gpio_export(SEL3, true);
134 }
135}
136#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
137 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
138
139static int devboard_usbh1_hw_init(struct platform_device *pdev)
140{
141 mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
142
143 mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
144 mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
145 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
146 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
147 mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
148 mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
149 mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
151
152 mdelay(10);
153
154 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
155 MXC_EHCI_INTERFACE_SINGLE_UNI);
156}
157
158#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
159#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
160
161static int devboard_isp1105_init(struct usb_phy *otg)
162{
163 int ret = gpio_request(USBH1_MODE, "usbh1-mode");
164 if (ret)
165 return ret;
166
167 gpio_direction_output(USBH1_MODE, 0);
168
169 ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
170 if (ret) {
171 gpio_free(USBH1_MODE);
172 return ret;
173 }
174 gpio_direction_output(USBH1_VBUSEN_B, 1);
175
176 return 0;
177}
178
179
180static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
181{
182 if (on)
183 gpio_set_value(USBH1_VBUSEN_B, 0);
184 else
185 gpio_set_value(USBH1_VBUSEN_B, 1);
186
187 return 0;
188}
189
190static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
191 .init = devboard_usbh1_hw_init,
192 .portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
193};
194
195static int __init devboard_usbh1_init(void)
196{
197 struct usb_phy *phy;
198 struct platform_device *pdev;
199
200 phy = kzalloc(sizeof(*phy), GFP_KERNEL);
201 if (!phy)
202 return -ENOMEM;
203
204 phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
205 if (!phy->otg) {
206 kfree(phy);
207 return -ENOMEM;
208 }
209
210 phy->label = "ISP1105";
211 phy->init = devboard_isp1105_init;
212 phy->otg->set_vbus = devboard_isp1105_set_vbus;
213
214 usbh1_pdata.otg = phy;
215
216 pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
217
218 return PTR_ERR_OR_ZERO(pdev);
219}
220
221
222static const struct fsl_usb2_platform_data usb_pdata __initconst = {
223 .operating_mode = FSL_USB2_DR_DEVICE,
224 .phy_mode = FSL_USB2_PHY_ULPI,
225};
226
227
228
229
230void __init mx31moboard_devboard_init(void)
231{
232 printk(KERN_INFO "Initializing mx31devboard peripherals\n");
233
234 mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
235 "devboard");
236
237 imx31_add_imx_uart1(&uart_pdata);
238
239 imx31_add_mxc_mmc(1, &sdhc2_pdata);
240
241 devboard_init_sel_gpios();
242
243 imx31_add_fsl_usb2_udc(&usb_pdata);
244
245 devboard_usbh1_init();
246}
247