LXR linux/arch/arm64/include/asm/acpi.h

   1/*
   2 *  Copyright (C) 2013-2014, Linaro Ltd.
   3 *      Author: Al Stone <al.stone@linaro.org>
   4 *      Author: Graeme Gregory <graeme.gregory@linaro.org>
   5 *      Author: Hanjun Guo <hanjun.guo@linaro.org>
   6 *
   7 *  This program is free software; you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License version 2 as
   9 *  published by the Free Software Foundation;
  10 */
  11
  12#ifndef _ASM_ACPI_H
  13#define _ASM_ACPI_H
  14
  15#include <linux/memblock.h>
  16#include <linux/psci.h>
  17
  18#include <asm/cputype.h>
  19#include <asm/smp_plat.h>
  20#include <asm/tlbflush.h>
  21
  22/* Macros for consistency checks of the GICC subtable of MADT */
  23#define ACPI_MADT_GICC_LENGTH   \
  24        (acpi_gbl_FADT.header.revision < 6 ? 76 : 80)
  25
  26#define BAD_MADT_GICC_ENTRY(entry, end)                                 \
  27        (!(entry) || (entry)->header.length != ACPI_MADT_GICC_LENGTH || \
  28        (unsigned long)(entry) + ACPI_MADT_GICC_LENGTH > (end))
  29
  30/* Basic configuration for ACPI */
  31#ifdef  CONFIG_ACPI
  32/* ACPI table mapping after acpi_permanent_mmap is set */
  33static inline void __iomem *acpi_os_ioremap(acpi_physical_address phys,
  34                                            acpi_size size)
  35{
  36        /*
  37         * EFI's reserve_regions() call adds memory with the WB attribute
  38         * to memblock via early_init_dt_add_memory_arch().
  39         */
  40        if (!memblock_is_memory(phys))
  41                return ioremap(phys, size);
  42
  43        return ioremap_cache(phys, size);
  44}
  45#define acpi_os_ioremap acpi_os_ioremap
  46
  47typedef u64 phys_cpuid_t;
  48#define PHYS_CPUID_INVALID INVALID_HWID
  49
  50#define acpi_strict 1   /* No out-of-spec workarounds on ARM64 */
  51extern int acpi_disabled;
  52extern int acpi_noirq;
  53extern int acpi_pci_disabled;
  54
  55static inline void disable_acpi(void)
  56{
  57        acpi_disabled = 1;
  58        acpi_pci_disabled = 1;
  59        acpi_noirq = 1;
  60}
  61
  62static inline void enable_acpi(void)
  63{
  64        acpi_disabled = 0;
  65        acpi_pci_disabled = 0;
  66        acpi_noirq = 0;
  67}
  68
  69/*
  70 * The ACPI processor driver for ACPI core code needs this macro
  71 * to find out this cpu was already mapped (mapping from CPU hardware
  72 * ID to CPU logical ID) or not.
  73 */
  74#define cpu_physical_id(cpu) cpu_logical_map(cpu)
  75
  76/*
  77 * It's used from ACPI core in kdump to boot UP system with SMP kernel,
  78 * with this check the ACPI core will not override the CPU index
  79 * obtained from GICC with 0 and not print some error message as well.
  80 * Since MADT must provide at least one GICC structure for GIC
  81 * initialization, CPU will be always available in MADT on ARM64.
  82 */
  83static inline bool acpi_has_cpu_in_madt(void)
  84{
  85        return true;
  86}
  87
  88struct acpi_madt_generic_interrupt *acpi_cpu_get_madt_gicc(int cpu);
  89
  90static inline void arch_fix_phys_package_id(int num, u32 slot) { }
  91void __init acpi_init_cpus(void);
  92
  93#else
  94static inline void acpi_init_cpus(void) { }
  95#endif /* CONFIG_ACPI */
  96
  97#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
  98bool acpi_parking_protocol_valid(int cpu);
  99void __init
 100acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor);
 101#else
 102static inline bool acpi_parking_protocol_valid(int cpu) { return false; }
 103static inline void
 104acpi_set_mailbox_entry(int cpu, struct acpi_madt_generic_interrupt *processor)
 105{}
 106#endif
 107
 108static inline const char *acpi_get_enable_method(int cpu)
 109{
 110        if (acpi_psci_present())
 111                return "psci";
 112
 113        if (acpi_parking_protocol_valid(cpu))
 114                return "parking-protocol";
 115
 116        return NULL;
 117}
 118
 119#ifdef  CONFIG_ACPI_APEI
 120/*
 121 * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling
 122 * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode
 123 * with a kernel command line parameter "acpi=nocmcoff". But we don't
 124 * have this IA-32 specific feature on ARM64, this definition is only
 125 * for compatibility.
 126 */
 127#define acpi_disable_cmcff 1
 128pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr);
 129
 130/*
 131 * Despite its name, this function must still broadcast the TLB
 132 * invalidation in order to ensure other CPUs don't end up with junk
 133 * entries as a result of speculation. Unusually, its also called in
 134 * IRQ context (ghes_iounmap_irq) so if we ever need to use IPIs for
 135 * TLB broadcasting, then we're in trouble here.
 136 */
 137static inline void arch_apei_flush_tlb_one(unsigned long addr)
 138{
 139        flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
 140}
 141#endif /* CONFIG_ACPI_APEI */
 142
 143#ifdef CONFIG_ACPI_NUMA
 144int arm64_acpi_numa_init(void);
 145int acpi_numa_get_nid(unsigned int cpu, u64 hwid);
 146#else
 147static inline int arm64_acpi_numa_init(void) { return -ENOSYS; }
 148static inline int acpi_numa_get_nid(unsigned int cpu, u64 hwid) { return NUMA_NO_NODE; }
 149#endif /* CONFIG_ACPI_NUMA */
 150
 151#define ACPI_TABLE_UPGRADE_MAX_PHYS MEMBLOCK_ALLOC_ACCESSIBLE
 152
 153#endif /*_ASM_ACPI_H*/
 154